Massive MIMO radio unit system and design method

Abstract

The present disclosure relates to a 5G Massive MIMO Radio Unit (MRU) that is connected to a Unified Central Distribution Unit (CCDU) ​​at a fronthaul interface 25G using an optical interface and is compliant with 3GPP (3rd Generation Partnership Project) based ORAN (Open Radio Access Network) standards. The proposed 5G-MRU may include a lower layer PHY (physical) part of the L1 layer with a network layer split of 7.2X, a baseband section, an RF (radio frequency) front-end module (RFEM), and an antenna filter unit (AFU) as part of a single housing / unit for easy and efficient installation.

Description

[Technical field]

[0001] The present invention relates generally to network devices, and more particularly to the design and architecture of massive multiple-input multiple-output (MIMO) radio units. [Background technology]

[0002] The following description of related art is intended to provide background information regarding the field of the disclosure. This section may include certain aspects of the art that may be related to various features of the present disclosure. However, it should be recognized that this section is used only to enhance the reader's understanding of the present disclosure and is not to be used as an admission of prior art.

[0003] 5G communication systems are expected to be implemented in sub-6 GHz and higher frequency (millimeter (mm) wave) bands, e.g., 60 gigahertz (GHz) band, to achieve higher data rates. To reduce radio wave propagation loss and increase transmission distance, beamforming, massive multiple-input multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, and large antenna technologies are described for use in 5G communication systems.

[0004] MIMO (Multiple Input, Multiple Output) is a wireless antenna technology that employs more than one antenna at both the transmitting and receiving ends to improve the quality, throughput, and capacity of a wireless link. MIMO uses techniques known as spatial diversity and spatial multiplexing to transmit independent and individually encoded data signals, known as "streams," reusing the same time and frequency resources.

[0005] MIMO is used in many modern wireless and RF technologies, such as Wi-Fi and Long Term Evolution (LTE). 3GPP first specified MIMO for LTE in Release 8 in 2008. This variant used two transmitters and two receivers, i.e. 2x2 MIMO, with subsequent processing power enhancements allowing the use of more simultaneous data streams in wireless networks, with current 4G LTE networks using 4x4 MIMO. The wavelengths are very short at mmWave frequencies, which allows for smaller antenna dimensions, and for 5G NR, 3GPP specifies 32 antennas (32x32 MIMO). This increase in size of MIMO antennas gave rise to the term Massive MIMO.

[0006] Massive MIMO is based on three main concepts: spatial diversity, spatial multiplexing, and beamforming. Existing disclosures on Massive MIMO Radio Unit (MRU) designs / architectures make the entire device very expensive, power-hungry, thermally inefficient, large and cumbersome, and require interoperability and coupling with various separate / currently independent / non-compliant cabled components such as antenna components and transceiver elements, thus complicating the overall design and construction. Thus, there is a need for an MRU that can efficiently integrate all of these components together, thus providing a cost-effective solution where an integrated antenna filter unit (AFU) is used, blind mated with the RF front-end board, and cable-less design. Summary of the Invention

[0007] The present disclosure relates to a radio unit, the radio unit comprising: a high speed transceiver board (HSTB) operably coupled to a consolidated central distribution unit (CCDU) ​​on a fronthaul interface, the HSTB comprising a plurality of RF transceivers for receiving digital signals from the CCDU and converting the received digital signals into RF signals across a plurality of RF chains; an RF front-end module (RFEM) operably coupled to the HSTB, the RFEM having one or more RF power amplifiers for receiving and amplifying the RF signals; and an antenna filter unit (AFU) comprising an integrated MIMO antenna and cavity filter for enabling beamforming to multi-user MIMO.

[0008] In one aspect, the radio unit is a massive MIMO radio unit (MRU). In another aspect, the radio unit is an ORAN-compliant 5G massive MIMO radio unit (MRU). In yet another aspect, the radio unit is a 32T32R-based 5G massive MIMO radio unit (MRU) in a multiple antenna configuration.

[0009] In another aspect, the HSTB may include multiple RF transceivers to generate a bitstream of RF signals, a lower layer PHY section at the L1 layer, and a baseband section supporting 32 transmit and receive chains, the elements being arranged into a set of dense layers of the HSTB.

[0010] In another aspect, the transceiver is an FPGA and the HSTB may include multiple FPGAs, where the digital signal received from the CCDU is converted to an RF signal using a first transceiver, and the other two transceivers act as a digital front end to process the RF signal by one or more of an analog-to-digital (ADC) converter and a digital-to-analog (DAC) converter to generate an analog signal, which is then transmitted to one or more RF connectors that will blind mate with the RFEB. In another aspect, the HSTB interfaces with the CCDU over a predefined optical interface.

[0011] In one aspect, the L1 upper layer is configured on the CCDU, which merges the central unit (CU) with the distributed unit (DU) and interfaces with the radio unit via a fronthaul interface. The radio unit may further include a clock synchronization architecture on the fronthaul interface using a system synchronizer IC and a clock generator. In another aspect, the RFEM may further include one or more low noise amplifiers (LNAs), gain blocks, and multiple RF switches for multiple transmit and receive chains that act as a digital pre-distortion (DPD) feedback path from the power amplifier (PA) to the FPGA for linearization.

[0012] In one aspect, each transmit chain includes a matching balun, pre-driver amplification, and final RF power amplification as part of a final power amplification (PA) stage, each receive chain includes a low noise amplifier (LNA), bandpass SAW filter, and matching network, and each observation chain includes a directional coupler, digital step attenuator (DSA), and matching network.

[0013] The RFEM may include one or more layers and a receive section that receives an amplified RF signal, and may use multiple receivers to decode the RF signal in the receive section, after which the RF signal is converted to digital and transmitted to an upper layer with an RF connector. The RFEM may further include an RF TDD switch associated with each transmit-receive pair, and one or more circulators and cavity filters may be used between each RF switch and an antenna port.

[0014] In an aspect, the integrated antenna is a MIMO antenna operatively coupled with a cavity filter, and the HSTB, RFEM, and AFU of the radio unit are blind-mated via their respective connectors.

[0015] In an exemplary embodiment, the HSTB can receive an external 48V input DC voltage and down-convert the external 48V input DC voltage to a desired low voltage based on the requirements from different devices on the board. In another exemplary embodiment, a combination of a power management integrated chipset (PMIC), a DC-DC converter, and an LDO regulation device is used to generate the desired low voltage.

[0016] The present disclosure further relates to a user equipment (UE) communicatively coupled to a massive MIMO radio unit (RU), wherein the coupling between the massive MIMO RU and the UE may include receiving a connection request, sending an acknowledgment of the connection request to the radio unit, and transmitting a plurality of signals in response to the connection request.

[0017] In one aspect, the present disclosure relates to a non-transitory computer-readable medium including processor-executable instructions that cause a processor to receive a connection request, send an acknowledgment of the connection request to a wireless unit, and transmit a plurality of signals in response to the connection request, the wireless unit being a massive MIMO unit as described herein.

[0018] Object of the invention An object of the present invention is to provide higher spectral efficiency by enabling an antenna array to focus a narrow beam towards a user.

[0019] It is an object of the present invention to provide a more energy efficient system since the antenna array is focused to a small specific section, less radiated power is required, thus reducing the energy requirements of a massive MIMO system.

[0020] An object of the present invention is to increase the data rate and capacity of wireless systems.

[0021] It is an object of the present invention to facilitate more reliable and accurate user tracking.

[0022] The aim of the present invention is to eliminate high power consumption.

[0023] An object of the present invention is to reduce latency and increase network reliability.

[0024] An object of the present invention is to provide a cableless design of a massive MIMO radio unit.

[0025] An object of the present invention is to provide a Massive MIMO standalone unit that is mounted in a single convection-cooled enclosure and weighs less than 25-29 kg.

[0026] The objective of the present invention is to provide a Massive MIMO standalone unit consisting of a lower layer PHY section, an ORAN compliant fronthaul over a 25G optical interface, and digital front-end support for 32 transmit and receive chains using three commercial grade FPGAs.

[0027] The objective of the present invention is to provide a massive MIMO standalone unit including an IEEE 1588v2 PTP-based clock synchronization architecture on a 25G optical interface using a system synchronizer IC and a clock generator.

[0028] The objective of the present invention is to provide a Massive MIMO Standalone Unit that includes integrated 8x8 MIMO antennas with 32 cavity filters in one unit known as Antenna Filter Unit (AFU).

[0029] The accompanying drawings, which are incorporated herein and constitute a part of the present invention, illustrate exemplary embodiments of the disclosed methods and systems, with like reference numerals referring to the same parts throughout the different drawings. The components in the drawings are not necessarily drawn to scale, emphasis instead being placed on clearly illustrating the principles of the invention. Some drawings may use block diagrams to illustrate components and may not represent the internal circuitry of each component. It will be recognized by those skilled in the art that the inventions in such drawings include inventions in electrical components, electronic components, or circuits commonly used to implement such components. [Brief description of the drawings]

[0030] [Figure 1] 1 illustrates an example design architecture of a massive MIMO radio unit in accordance with an embodiment of the present disclosure. [Diagram 2] 1 illustrates an example design architecture of a high speed transceiver board (HSTB) according to an aspect of the present disclosure. [Diagram 3] 1 illustrates an example design architecture of an RF front-end module (RFEM or RFFE) board, according to an embodiment of the present disclosure. [Figure 4] 1 illustrates an example combined representation of a user equipment (UE) with a MIMO radio unit, according to an embodiment of the present disclosure. [Diagram 5]In accordance with an embodiment of the present disclosure, an exemplary computer system is shown in or with which embodiments of the present invention may be utilized. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] The foregoing will become more apparent from the following more detailed description of the invention.

[0032] In the following description, for purposes of explanation, various specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure. However, it will be apparent that the embodiments of the present disclosure may be practiced without these specific details. Some features described below may be used independently of each other or with any combination of other features. Individual features may not address all of the problems described above, or may address only some of the problems described above. Some of the problems described above may not be fully addressed by any of the features described herein.

[0033] The following description provides exemplary embodiments only and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the following description of exemplary embodiments provides those skilled in the art with a helpful description for implementing the exemplary embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the spirit and scope of the invention as described.

[0034] In the following description, specific details are given to provide a thorough understanding of the embodiments. However, it will be understood by those skilled in the art that the embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form so as not to obscure the embodiments with unnecessary detail. In other examples, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail so as to avoid obscuring the embodiments.

[0035] It should also be noted that the particular embodiments may be described as a process that is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operations as a sequential process, many operations may occur in parallel or simultaneously. Additionally, the order of operations may be rearranged. A process terminates when an operation of a process is completed, but there may be additional steps not included in the diagram. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, or the like. When a process corresponds to a function, its termination may correspond to a return of the function to the calling function or to the main function.

[0036] The words "exemplary" and / or "demonstrative" are used herein in the sense of serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Moreover, any aspect or design described herein as "exemplary" and / or "demonstrative" should not necessarily be construed as preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those skilled in the art. Moreover, to the extent that the terms "includes," "has," "contains," and other similar terms are used in either the embodiments or the claims to describe the invention, such terms are intended to be inclusive in a similar manner to the term "comprising" as an open transition term, without excluding any additional or other elements.

[0037] References throughout this specification to "one embodiment" or "an embodiment" or "an instance" or "one instance" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification do not necessarily all refer to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0038] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. Furthermore, it is understood that the terms "comprise" and / or "comprising" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0039] In this disclosure, various embodiments are described using terminology used in some communication standards (e.g., 3rd Generation Partnership Project (3GPP), Extensible Radio Access Network (xRAN), and Open Radio Access Network (O-RAN)) as merely illustrative examples. Also, various embodiments of the present disclosure can be easily modified and applied to other communication systems.

[0040] Typically, a base station is a network infrastructure that provides wireless access to one or more terminals. A base station has a coverage area defined as a predefined geographic area based on the distance over which signals can be transmitted. In addition to "base station," a base station may also be referred to as an "access point (AP)," "evolved NodeB (eNodeB) (eNB)," "5G node (fifth generation node)," "next generation NodeB (gNB)," "radio point," "transmission / reception point (TRP)," or other terms having equivalent technical meanings.

[0041] The present disclosure relates to an ORAN-compliant 5G Massive MIMO Radio Unit (MRU) (hereinafter alternatively and interchangeably referred to as "5G-MRU" or "RU"). In an exemplary and non-limiting embodiment, the present disclosure provides a hardware architecture and design of a multi-antenna configuration 32T32R-based 5G Massive MIMO Radio Unit (MRU) for standalone mode, where the proposed 5G-MRU is a Radio Unit (RU) connected to a Unified Central Distribution Unit (CCDU) ​​over a fronthaul interface using a 25G optical interface and conforms to 3GPP (3rd Generation Partnership Project)-based ORAN (Open Radio Access Network) specifications. The proposed MRU can be configured in such a way that, in an exemplary embodiment, there are three cell sites and three corresponding MRUs are used with a CCDU, and each MRU can be connected to the CCDU via a 25G interface.

[0042] In an exemplary embodiment, the proposed 5G-MRU may include a lower layer PHY (physical) section of the L1 layer with a network layer split of 7.2X (O-RAN Alliance Fronthaul specification between O-DU and O-RRU), a baseband section, an RF (radio frequency) front-end module (RFEM), and an antenna filter unit (AFU) as part of a single housing / unit for easy and efficient installation. However, it should be recognized that the design and architecture of each of the components / units of the proposed RU are novel and inventive with respect to the proposed invention, and therefore each will be protected by a respective patent application.

[0043] In an exemplary embodiment, with reference to FIG. 1, the proposed 5G-MRU 100 includes a high speed transceiver board (HSTB) 200 with a lower layer PHY section, an ORAN compliant fronthaul over a 25G optical interface 204, and digital RF front-end support for 32 transmit and receive chains using, for example, three commercial grade FPGAs / transceivers (202-1 through 202-3, hereafter collectively referred to as 202), which are integrated onto a dense 26 layer of the HSTB 200. While the present disclosure is described with respect to FPGAs, it will be recognized that any other equivalent transceivers are fully within the scope of the present disclosure, and thus the scope of each FPGA should be treated as the scope of any transceiver or technically equivalent component, such as an ASIC.

[0044] In an exemplary embodiment, L1 lower layer PHY development and bitstream generation can be implemented / executed on FPGA 202 itself. L1 upper layer can be configured on CCDU under tower, L2 and L3 are configured on distributed units, and macro site usually includes central unit node (server side) and distributed unit node (CU and RU configured node). The present invention merges the central unit node with distributed unit node to form CCDU, which interfaces with RU / MRU via 25G optical interface. The proposed MRU can further include IEEE1588v2 PTP based clock synchronization architecture on 25G optical interface 204 using system synchronizer IC and clock generator.

[0045] The proposed MRU 100 may further include an integrated 8×8 MIMO antenna with 32 cavity filters as one unit known as an antenna filter unit (AFU) 350. The proposed MRU 100 can be blind-mated as configured and has a cableless design.

[0046] In an exemplary and non-limiting aspect of the present disclosure, the proposed 5G-MRU 100 is a 200W high power gNB operating at macro class (typically 6.25W or 38dBm per antenna port) and configured to provide a macro-level wide area solution for coverage and capacity that can find utility in dense urban morphology, hot zone / hot spot areas with high traffic and QoS requirements. The proposed 5G-MRU 100 integrates a lower layer PHY section, a commercial grade FPGA based RF transceiver for 32 transmit and receive chains (as part of the HSTB 200), an RF Front End Module (RFEM) 300 including RF power amplifiers, low noise amplifiers (LNAs), and RF switches for the 32 chains, as well as 8*8 MIMO antennas with 32 cavity filters known as Antenna Filter Unit (AFU) 350 as part of a single convection cooled housing weighing less than 25-29kg. In an aspect, the macro gNB can provide good coverage and capacity for dense urban and mixed environments with support for 8 beams in downlink and 4 beams in uplink under multi-UE scenarios. The proposed 5G-MRU 100 can be deployed in high-rise buildings, dense mixed environments, and hotspot locations where traffic demand is significantly higher and cannot be served by 4G gNBs alone for improved coverage and capacity.

[0047] In another aspect, the proposed 5G-MRU can be configured as a design with integrated antenna and cavity filter solution, eliminating the need for cables, resulting in a cable-less design. The proposed MRU 100 can be deployed at tower sites, GBTs, and GBMs. The MRU can be rapidly deployed to achieve high performance with low power consumption, making it a power-efficient solution. The proposed MRU can be connected to the CCDU under the tower on a single 25G optical fronthaul interface that is 3GPP-ORAN compliant.

[0048] In an aspect, the proposed 5G-MRU is a high-power gNB (Next Generation Node B) operating at macro-class (typically ≦38 dBm per antenna port) and can be configured to complement macro-level wide area solutions in terms of coverage and capacity. In an exemplary aspect, the high-level architecture of the proposed 32T32R-5G-NR-MRU includes a High Speed ​​Transceiver Board (HSTB) 200, a 32T32R-RF Front-End Module (RFEM) board 300, an Antenna Filter Unit (AFU) 350, and a mechanical housing (in one example, there may be two housings in total, one for the HSTB 200 and one for the RFEM 300). The proposed MRU structure further promotes and enables optimal heat dissipation by operating in weather conditions ranging from -10 degrees to 50 degrees.

[0049] In an exemplary embodiment, the proposed 5G-NR-MRU 100 integrates a lower layer PHY section, a commercial grade FPGA based RF transceiver (not an intermediate frequency stage) for 32 transmit and receive chains with RF sampling (as part of the HSTB 200), an RF Front End Module (RFEM) 300 including RF power amplifiers, low noise amplifiers (LNAs), and RF switches for the 32 chains, as well as 8*8 MIMO antennas along with 32 cavity filters known as Antenna Filter Unit (AFU) 350 in a single convection cooled housing weighing less than 29 kg.

[0050] In an exemplary embodiment, the proposed MRU 100 includes 64 connectors, 32 each on the transmit and receive sides, and two DC connectors with 25 pins each, totaling 50 pins for the two DC connectors. These connectors are configured on the HSTB 200 in an overlapping and blind-connected / mapped / mated / sandwiched manner with the RFEM board 300.

[0051] In an aspect, the proposed design architecture consists of a control plane, a user plane and a synchronization plane, where the control plane is configured to remotely control the configuration of the units / sub-units forming part of the proposed MRU 100 in terms of distance-location, the user plane consists of user data and finally, the synchronization plane is configured to utilise Precision Time Base Protocol (PTP) over the Instant 25G interface to synchronize the units / sub-units to a global clock using a timing protocol (i.e. slave devices synchronize their clocks with the master device in terms of phase and frequency) and maintain coherence / synchronisation with the CCDU.

[0052] It will be recognized that the TDD-based 5G-NR-MRU, after integration with the Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD) modules of the Digital Front-End lineup, meets all RF performance requirements mentioned in the 3GPP standard (TS38.141). Furthermore, the MRU has low power consumption and is thermally optimally handled by a mechanical housing with IP65 ingress protection.

[0053] In further examples of the present disclosure, some or all of the steps of the communication may be performed by a MIMO base station, for example by processing software or functions within the MIMO base station itself. An example M-MIMO base station may perform some or all of the steps of the communication method upon receiving appropriate instructions, for example from a computer program. The MIMO base station may comprise an interface, a processor, and a memory. The memory includes instructions executable by the processor to operate the MIMO base station to perform some or all of the steps of the communication method. The instructions stored in the memory may include a computer program in some examples. MIMO may be dynamically managed based on operating conditions. Additionally, the disclosed massive multiple-input multiple-output (MIMO) radio unit may support all frequency bands.

[0054] High Speed ​​Transceiver Board (HSTB) 200 In an exemplary embodiment, referring to Figures 1 and 2, the HSTB 200 may include three FPGA chipsets 202-1, 202-2, and 202-3 for the lower L1 layer processing and digital front-end section. The HSTB 200 may be configured to receive an external -48V input DC voltage and downconvert it to various low voltages (12V, then 12V to 5V, 1V, etc., among other desired combinations) based on the requirements from different devices on the board. Any or combination of a power management integrated chipset (PMIC) 206, a DC-DC converter 208, and an LDO regulation device 210 may be used to generate these desired low voltages.

[0055] In an exemplary embodiment, transceiver 202-1 may be configured to receive digital data / signals from the CCDU and transmit to transceiver 202-2 / 202-3 (e.g., a first transceiver can handle / process 16 chains / control signals and power, and a second transceiver can handle / process an additional 16 chains / control signals and power) (which would be blind-mated for DC and RF) that converts the digital data / signals from the CCDU to 32 RF chains, and transceiver 202-2 / 202-3 would be operatively coupled to RF board 212. RF board 212, being a passive element, derives power from HSTB 200 to reduce and optimize overall cost and draw as much power as required from HSTB 200 itself.

[0056] In an aspect, the complete system can be synchronized within the HSTB 200 (e.g., using the clock / sync section 214) via IEEE 1588v2-based PTP over the 25G fronthaul interface 204 while initiating a PTP client to the on-board synchronization circuitry. The proposed circuitry can include any or a combination of ultra-low noise clock generation PLLs, programmable oscillators, and system synchronizers. FIG. 2 shows an overall example design architecture of the proposed HSTB. The HSTB can include subsystems including, but not limited to, FPGA-based RF transceivers, digital high-speed signals, switching power supplies, clock sections, and radio frequency signals designed in a PCB with 26 or more layers. The PCB design can include proprietary design techniques to route RF and Aurora signals operating at speeds of 25 GT / s on adjacent layers to meet the design specifications.

[0057] In an embodiment, the HSTB can be configured to acquire data from a CCDU residing on an ODC (Outdoor Cabinet) with transceivers (such as FPGAs) via an (exemplary) 25 Gigabit fiber interface, process the acquired digital data, and provide an RF signal. The other two transceivers can then be configured to act as a digital front-end to process high-speed RF signals with analog-to-digital (ADC) converters and digital-to-analog (DAC) converters. The analog signal will then be transmitted to an RF connector that will blind-mate with the RFEB 300. The transceivers configured on the HSTB can be configured to provide 78 bands (exemplary) of RF signals with 32 chips on transmit and 32 chips on receive. In an exemplary embodiment, the proposed HSTB may be approximately 530×360 mm in size and will be configured as a 26+ layer board.

[0058] 32T32R-RF Front-End Module (RFEM or RFFE) Board 300 In an exemplary embodiment, the RFEM board 300 can be configured to receive control signals (RF signals) from the HSTB 200 along with power via a connector. The RFFE / RFEM board can be configured to act as an expanded signal to incorporate 32 transmit chains for signal transmission, 32 receive chains for signal reception, and 32 observation chains that act as digital predistortion (DPD) feedback paths from the power amplifier (PA) to the FPGA for linearization. The RFEM board essentially amplifies each RF signal received from the HSTB across each chain using gain blocks and power amplifiers to generate 6.25 watts of power from each chain. Considering the 32 chains that form part of the proposed RFEM board, a cumulative power of about 200 watts is generated, which corresponds to 53 dBm. In an embodiment, each transmit chain can be configured to include a matching balun, pre-driver amplification, and a final RF power amplification as part of the final stage of the power amplification (PA). In an exemplary embodiment, the power consumption of the proposed MRU is about 780-800W, thus, for a 200W supply, the power saving efficiency of the system is about 25%.

[0059] On the one hand, each receive chain can be configured to include a low noise amplifier (LNA), a bandpass SAW filter, and a matching network, and each observe chain can be configured to include a directional coupler, a digital step attenuator (DSA), and a matching network.

[0060] In an embodiment, the RFEM board may include 10 or more layers and a receive section that can receive amplified RF signals from 5E user equipment (UE) and can decode the RF signals in the receive section using 32 receivers, after which the RF signals are converted to digital and transmitted to the upper layer with RF connectors.

[0061] In an aspect, the proposed board may include an RF TDD switch that can pair each transmit and receive pair. Circulators and cavity filters can be used between each RF switch and the antenna port. In an aspect, the RF front-end board (RFFE) can be configured to blind mate with the high-speed transceiver board (HSTB), thus eliminating cabling complexity to avoid RF signal oscillation. The mating bullet provides a robust connection between the HBTB and the RFFE to meet optimal design considerations, including but not limited to providing a target 200W output power.

[0062] Antenna Filter Unit (AFU) 350 In an exemplary embodiment, the proposed AFU comprises 8x8 MIMO (128 single antenna elements) antenna units with cavity filters and calibration PCB in one integrated unit known as the AFU, which is configured to blind mate with the RFEB to enable beamforming to multi-user MIMO. The AFU can be configured to be coupled to the housing from below in an exemplary embodiment / design, and the board will be installed in an aluminum metal housing with a cover on the bottom side. In an embodiment, the AFU and RFEB will be configured on the HSTB along a cylindrical transmission line from both sides. The transmission line will be connected between two connectors such as poles, so there will be two receptacles and a pillar between them will be configured to connect these units / subunits.

[0063] The proposed AFU may include 32 ports for a 32T3R configuration (32 antenna ports as receivers and transmitters will reach the same antenna port, and the 32 ports will be connected to corresponding / respective 32 cavity filters) that provides a steeper roll-off outside the operating band. The proposed AFU allows for a unique radiation pattern, low loss, and low interference.

[0064] In one aspect, the proposed MRU is capable of achieving a system noise figure level of 3.5-3.6 dB through the design and layout of the MRU architecture, as well as reducing cable loss and number of cables, and enabling blind mating.

[0065] FIG. 4 illustrates an exemplary coupled representation of a user equipment (UE) with an MRU. As illustrated, the UE 402 may be communicatively coupled to the MRU 100. The coupling may be via a wireless network 404. In an exemplary embodiment, the communication network 404 may include at least a portion of one or more networks having one or more nodes that transmit, receive, forward, generate, buffer, store, route, switch, process, or any combination thereof, one or more messages, packets, signals, radio waves, voltage or current levels, some combination thereof, or the like, by way of example and not limitation. The UE 402 may be any handheld device, mobile device, palmtop, laptop, smartphone, pager, or the like. As a result of the coupling, the UE 402 may be configured to receive a connection request from the MRU 100, send an acknowledgment of the connection request to the MRU 100, and further transmit a plurality of signals in response to the connection request.

[0066] Exemplary Computer System 500 FIG. 5 illustrates an exemplary computer system in which or with which embodiments of the present disclosure may be utilized, according to an embodiment of the present disclosure. As illustrated in FIG. 5, computer system 500 may include an external storage device 510, a bus 520, a main memory 530, a read-only memory 540, a mass storage device 550, a communication port 560, and a processor 570. Those skilled in the art will recognize that a computer system may include more than one processor and communication port. Processor 570 may include various modules associated with embodiments of the present invention. Communication port 560 may be any of an RS-232 port for use with a modem-based dial-up connection, a 10 / 100 Ethernet port, a 1 Gigabit port or a 10 Gigabit port using copper or fiber, a serial port, a parallel port, or other existing or next generation ports. Communication port 560 may be selected depending on the network, such as a local area network (LAN), a wide area network (WAN), or any network to which the computer system is connected. Memory 530 may be a random access memory (RAM), or any other dynamic storage device commonly known in the art. Read-only memory 540 may be any static storage device. Mass storage 550 may be any current or next generation mass storage solution that can be used to store information and / or instructions.

[0067] The bus 520 communicatively couples the processor 570 to other memory, storage, and communication blocks.

[0068] In an embodiment, an apparatus may be disclosed that includes a radio unit. The radio unit may include a high-speed transceiver board (HSTB) operably coupled to a unified central distribution unit (CCDU) ​​on a fronthaul interface, the HSTB including a plurality of RF transceivers that receive digital signals from the CCDU and convert the received digital signals to RF signals across a plurality of RF chains, an RF front-end module (RFEM) operably coupled to the HSTB, the RFEM including one or more RF power amplifiers for receiving and amplifying the RF signals, and an antenna filter unit (AFU) including an integrated MIMO antenna and a cavity filter that enables beamforming to multi-user MIMO.

[0069] Optionally, operator and management interfaces such as a display, keyboard, and cursor control devices may also be coupled to bus 520 to support direct operator interaction with the computer system. Other operator and management interfaces may be provided via a network connection connected via communications port 560. The above components are intended only to illustrate various possibilities. In no way are the foregoing exemplary computer systems intended to limit the scope of the present disclosure.

[0070] Advantages of the Invention The present invention provides greater spectral efficiency by allowing an antenna array to focus a narrow beam towards a user.

[0071] The present invention provides a more energy efficient system since the antenna array is focused to a small specific section, requiring less radiated power, lowering the energy requirements of a massive MIMO system.

[0072] The present invention increases the data rate and capacity of wireless systems.

[0073] The present invention facilitates more reliable and accurate user tracking.

[0074] The present invention eliminates high power consumption and is thermally well handled by a machine housing with IP65 ingress protection.

[0075] The present invention reduces latency and increases network reliability.

[0076] The disclosed Massive MIMO provides additional physical security.

[0077] The present invention meets all RF performance requirements mentioned in the 3GPP standard (TS38.141) after integrating a TDD-based 5G-NR-MRU with Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD) modules in the digital front-end lineup.

[0078] Although considerable emphasis has been placed herein on the preferred embodiment, it is recognized that many embodiments may be made and that many changes may be made in the preferred embodiment without departing from the principles of the invention. Since these and other changes in the preferred embodiment of the invention will be apparent to those skilled in the art from the disclosure herein, it is to be clearly understood that the foregoing description is to be taken merely as illustrative and not limiting of the invention.

[0079] Portions of the disclosure of this patent document contain material that is subject to intellectual property rights, such as, but not limited to, copyright, designs, trademarks, IC layout designs, and / or trade dress protection, owned by Jio Platforms Limited (JPL) or its affiliates (hereinafter referred to as the Owner). The Owner has no objection to the complete reproduction by anyone of the patent document or patent disclosure as it appears in the Patent and Trademark Office files and records, but otherwise reserves all rights whatsoever. All rights to such intellectual property are fully reserved by the Owner.

Claims

1. A wireless unit comprising: a high speed transceiver board (HSTB) (200) operably coupled to a consolidated central distribution unit (CCDU) ​​on a fronthaul interface, the high speed transceiver board (HSTB) (200) comprising a plurality of RF transceivers for receiving digital signals from the CCDU and converting the received digital signals to RF signals across a plurality of RF chains; an RF front-end module (RFEM) (300) operably coupled to the HSTB (200), the RFEM (300) receiving the RF signal and having one or more RF power amplifiers for amplifying the RF signal; an antenna filter unit (AFU) with an integrated MIMO (multiple-input, multiple-output) antenna and cavity filter to enable beamforming to a user; A wireless unit comprising:

2. The radio unit of claim 1 , which is a massive MIMO radio unit (MRU).

3. The HSTB is the plurality of RF transceivers generating the RF signal bitstream; a lower layer PHY section of the L1 layer; a baseband section supporting multiple transmit and receive chains, the components of the HSTB being organized into a set of dense layers; and 2. The wireless unit of claim 1, comprising:

4. 4. The wireless unit of claim 3, wherein the transceiver is a field programmable gate array (FPGA), the HSTB includes multiple FPGAs, and the digital signal received from the CCDU is converted to the RF signal using a first transceiver, and the other two transceivers act as a digital front end to process the RF signal by one or more of an analog-to-digital (ADC) converter and a digital-to-analog (DAC) converter to generate an analog signal, which is then transmitted to one or more RF connectors that will blind mate with the RFEB (300).

5. The wireless unit of claim 1 , wherein the HSTB interfaces with the CCDU over a default optical interface.

6. The wireless unit of claim 1 , wherein an L1 upper layer is configured on the CCDU, the CCDU merging a central unit (CU) with a distributed unit (DU) and interfacing with the wireless unit via the fronthaul interface.

7. 10. The wireless unit of claim 1, further comprising a clock synchronization module on the fronthaul interface using a system synchronizer IC and a clock generator.

8. 10. The radio unit of claim 1, wherein the RFEM (300) further comprises one or more low noise amplifiers (LNAs), gain blocks, and a number of RF switches for the multiple transmit and receive chains that act as a digital pre-distortion (DPD) feedback path from a power amplifier (PA) to an FPGA for linearization.

9. 11. The radio unit of claim 10, wherein each transmit chain includes a matching balun, a pre-driver amplification, and a final RF power amplification as part of a final stage of power amplification (PA), each receive chain includes a low noise amplifier (LNA), a bandpass SAW filter and a matching network, and each observation chain includes a directional coupler, a digital step attenuator (DSA), and a matching network.

10. 2. The wireless unit of claim 1, wherein the RFEM includes one or more layers and a receiving section that receives the amplified RF signal, and decodes the RF signal in the receiving section using the multiple receivers, after which the RF signal is converted to digital and transmitted to an upper layer having an RF connector.

11. 2. The wireless unit of claim 1, wherein the RFEM comprises an RF TDD switch associated with each transmit-receive pair, and one or more circulators and cavity filters are used between each RF switch and an antenna port.

12. The wireless unit of claim 1 , wherein the integrated antenna is a MIMO antenna operatively coupled with a cavity filter.

13. 2. The wireless unit of claim 1, wherein the HSTB, RFEM, and AFU of the wireless unit are blind-mated via their respective connectors.

14. 2. The wireless unit of claim 1, wherein the HSTB (200) receives an external 48V input DC voltage and down-converts the external 48V input DC voltage to a desired lower voltage based on requirements from different devices on the board.

15. 14. The wireless unit of claim 13, wherein the desired low voltage is generated using any or a combination of a power management integrated chipset (PMIC) (206), a DC-DC converter (208), and an LDO regulation device (210).

16. An apparatus comprising the wireless unit of claim 1.

17. A user equipment (UE) communicatively coupled to a radio unit (RU), the coupling comprising: receiving a connection request; sending an acknowledgment of the connection request to the wireless unit; transmitting a plurality of signals in response to the connection request, the wireless unit being a massive MIMO unit as claimed in claim 1; The user equipment.

18. A non-transitory computer readable medium containing processor-executable instructions, the non-transitory computer readable medium comprising: receiving a connection request; sending an acknowledgment of the connection request to the wireless unit; transmitting a plurality of signals in response to the connection request; The non-transitory computer-readable medium, wherein the wireless unit is a massive MIMO unit as recited in claim 1 .

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