Topological superconducting devices

Abstract

According to the present disclosure, a topological superconducting device based on phase control is provided. The present invention relies on two key elements: at least three mutually parallel superconducting regions forming two SNS junctions (i.e., SNSNS junctions) have phase windings, and the Fermi velocities of the two spin branches across the SNS junction are unequal. The two phase differences between the three superconducting regions define a two-dimensional parameter plane that includes a large topological region. Also, according to the present disclosure, a topological superconducting array device is disclosed that includes a plurality of the topological superconducting devices of the present disclosure. Also, according to the present disclosure, a material platform with unequal Fermi velocities is provided.

Description

[Technical field]

[0001] The subject matter of this disclosure relates to the field of topological superconducting devices that utilize non-uniform Fermi velocities and phase windings. [Background technology]

[0002] Current proposals for topological qubits are based on combining two superconducting pads, a semiconductor with strong spin-orbit coupling that connects to the superconductor, and a magnetic field of around 1 Tesla. Progress towards realizing such proposals has been hindered by the suppressing effect of the magnetic field on superconductivity and by material limitations, particularly those required to connect the superconductor to the semiconductor.

[0003] The present invention significantly reduces the demands placed on the materials, so that the requirements for the electronic band structure can be easily met.

[0004] The aim / goal of the present invention is to provide a method for inducing topological superconductivity. The key condition is that the material has unequal Fermi velocities for the two spin branches in a device with a topological winding of a superconductor.

[0005] A further objective / goal of the present invention is to provide a platform consisting of a single material that does not require connections, thereby opening up novel ways to overcome the obstacles facing the realization of topological qubits. Summary of the Invention [Means for solving the problem]

[0006] In one embodiment, the present invention provides a topological superconducting device, the device comprising three adjacent superconducting regions made of at least one material and disposed on a substrate, the three adjacent superconducting regions producing two spin branches, each superconducting region of the three adjacent superconducting regions exhibiting a phase winding, and in the two spin branches, a first spin branch has a different Fermi velocity than a second spin branch.

[0007] In one embodiment, the topological superconducting device of the present disclosure includes at least one gate. In one embodiment, multiple gates are used on the superconducting region (S) and / or the non-superconducting region (N). In one embodiment, the gates are capable of inducing superconductivity. In one embodiment, the topological superconducting device of the present disclosure further includes a non-superconducting region disposed between each of the three adjacent superconducting regions, thereby forming two SNS junctions and forming an SNSNS junction overall by overlapping one superconducting region of each SNS junction with each other.

[0008] In one embodiment, the three adjacent superconducting regions are arranged parallel to each other and / or in a planar configuration. In one embodiment, the substrate of the topological superconducting device of the present disclosure is selected from the group consisting of non-superconducting metals, two-dimensional electron gas materials, semiconductors, dielectric media, silicon, oxides, and any combination thereof. In one embodiment, the two SNS junctions include at least one gate configured to modulate the superconductivity of the at least one material by the at least one gate. In one embodiment, the at least one gate is configured to modulate the phase difference between the three adjacent superconducting regions. In one embodiment, the three adjacent superconducting regions are gate-defined wires. In one embodiment, the width of the central superconducting region of the three adjacent superconducting regions is greater than the width of the outer superconducting regions. In one embodiment, the at least one material is selected from the group consisting of transition metal dichalcogenides (TMDs), Al, Nb, Pb, NbSe2, HgTe, InAs, and InSb. In one embodiment, the transition metal dichalcogenide (TMD) is selected from the group consisting of TaS2, MoS2, MoSe2, MoTe2, WS2, WSe2, WTe2, and any combination thereof. In one embodiment, at least one of the materials is doped.

[0009] In one embodiment, the phase windings are 2π or occur at multiples of 2π. In one embodiment, the topological superconducting device of the present disclosure further comprises a periodic modulation above, below, and / or within at least one of the three adjacent superconducting regions. In one embodiment, the topological superconducting device of the present disclosure further comprises at least one additional superconducting region parallel to the three adjacent superconducting regions. In one embodiment, the topological superconducting device of the present disclosure further comprises at least one additional non-superconducting region between the three adjacent superconducting regions and the at least one additional superconducting region parallel thereto. In one embodiment, the topological superconducting device of the present disclosure further comprises an additional layer between, next to, above, and / or below the at least three superconducting regions. In one embodiment, the at least one gate comprises a top gate, a back gate, a side gate, or any combination thereof.

[0010] In one embodiment, the present invention provides a quantum computer comprising a topological superconducting device of the present disclosure. In one embodiment, the present invention provides a topological superconducting array device comprising a plurality of topological superconducting devices of the present disclosure. In one embodiment, the present invention provides a quantum computer comprising the topological superconducting array device described above. [Brief description of the drawings]

[0011] In order to better understand the subject matter disclosed herein and to illustrate how it may be carried out in practice, embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0012] [Figure 1] FIG. 1 is a schematic diagram illustrating various embodiments of the relative widths of the superconducting and non-superconducting materials in an SNSNS junction. [Figure 2A] FIG. 2A is a schematic diagram of a multi-gate SNSNS device setup. [Figure 2B]FIG. 2B is a schematic diagram of a configuration of an SNS device that can be added to an existing SNSNS device. [Figure 2C] FIG. 2C is a schematic diagram of an SNSNS device setup with a top layer containing multiple gates. [Figure 3A] FIG. 3A is a schematic diagram of a device with three superconducting regions on a two-dimensional electron gas, with a periodic modulation in the central superconducting region. [Figure 3B] FIG. 3B is a schematic diagram of a device with three separated superconducting regions on a two-dimensional electron gas with a periodic modulation in the central superconducting region. [Figure 3C] FIG. 3C is a schematic diagram of a periodic modulation in the upper material. [Figure 3D] FIG. 3D is a schematic illustration of a periodic modulation at the interface between an upper material and a lower material. [Figure 4A] FIG. 4A is a schematic diagram of a phase-biased SNSNS junction. [Figure 4B] FIG. 4B is a graph showing the transverse spectrum of the SNSNS junction of FIG. 4A using a model including next-nearest neighbor hopping. [Diagram 5] FIG. 5 is a topological diagram of the SNSNS configuration of FIG. 4A. [Figure 6A] FIG. 6A is a phase diagram of the SNSNS geometry of FIG. 4A with an expanded region of phases θ, φ. [Figure 6B] FIG. 6B is a phase diagram as a function of the parameters φ1=φ+θ, φ2=φ-θ.

[0013] For simplicity and clarity of illustration, the elements shown in the drawings have not necessarily been drawn to scale, dimensions of some elements may be exaggerated relative to other elements, and reference numerals may be repeated among the drawings to indicate corresponding or similar elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] In some implementations, the subject matter of the present disclosure relates to the induction of topological superconductivity in magnetic field-free planar devices. In some embodiments, in a purely phase-controlled setup, two conditions are necessary: ​​a superconducting phase winding and an unequal Fermi velocity. In some embodiments, the phase winding is the mechanism that breaks the time-reversal symmetry. While it is true that any phase bias breaks the time-reversal symmetry, the subject matter of the present disclosure supports the separation of spin species that mimics the effect of the Zeeman field when the phase is wound. When the phase is unwound, the current goes back and forth between the superconductors that are adjacent to each other. The qualitative change that occurs when the phase winding is introduced is the circulating current that flows around the system.

[0015] The role of the unequal Fermi velocity is strongly related to spin-orbit coupling. Note that if the electric field responsible for the spin-orbit coupling is purely out-of-plane, the Fermi velocity imbalance does not occur. Additional factors, such as in-plane electric fields common in transition metal dichalcogenides (TMDs), induce additional phases. In some embodiments, TMDs support unequal Fermi velocity in SNSNS junctions to induce topological phases. In some embodiments, periodic modulation of at least one superconducting region is required to induce unequal Fermi velocity in SNSNS junctions.

[0016] As used herein with respect to the structure of a device, "periodic modulation" refers to physical and / or structural periodic modulation along, above, below, and / or within a surface of a region of a device, such as a superconducting (SC) region and / or binding material, as described in more detail below.

[0017] The present invention provides methods for inducing topological superconductivity in planar superconductor-normal-superconductor (SNS) Josephson junctions. In some embodiments, no Zeeman field is applied.

[0018] The present invention relies on two key elements: At least three mutually parallel superconducting regions forming two SNS junctions (i.e., SNSNS junctions) have phase windings; and ·The Fermi velocities of the two spin branches across the SNS junction are not equal.

[0019] As used herein, the Fermi velocity refers to the velocity that corresponds to the Fermi energy of a particle.

[0020] As used herein, the term "lateral" refers to a direction generally perpendicular to the longitudinal axis. In particular, "lateral" refers to a direction substantially perpendicular to the parallel superconducting regions that form the two SNS junctions.

[0021] As used herein, the term "spin branch" refers to the spin states in two separate SNS portions of an SNSNS device. In some embodiments, it is required that the Fermi velocities of the two spin branches in the direction perpendicular to the SNS junction are not equal to each other.

[0022] As used herein, the term "superconducting," in the context of being a component of a device, refers to a surface, material, or substrate that is in a superconducting state under appropriate physical conditions and that becomes superconducting by being subjected to appropriate physical conditions when the device is in a functional mode of operation. In some embodiments, superconducting materials and / or gate modulatable materials are referred to as "functional" materials.

[0023] As used herein, the term "quantum proximity" refers to the close relative positioning of two structures such that the physical properties or state of one structure can detectably affect the quantum mechanical properties or state of the other structure.

[0024] In one embodiment, for two phase differences between the three superconductors, the phase winding puts the system into a topological phase. The present invention provides an embodiment of a physical platform with unequal Fermi velocities. Two key points make it possible to achieve this goal. One is to introduce two phase differences by including three superconductors. With such two phase differences, the phase winding puts the system into a topological phase. In one embodiment, the larger the difference in Fermi velocities of the two parts, the larger the topological region.

[0025] The term "topological region" generally refers to a two-dimensional parameter plane, e.g., phase space, in which topological superconductivity occurs. The objective of the present invention is to induce topological superconductivity in a device. Thus, by fine-tuning various physical and material parameters described throughout this specification, the likelihood of topological superconductivity occurring in the device can be induced, optimized, and increased. Thus, several non-limiting materials, device layouts / geometry, and architectures are exemplified herein as demonstrations of the present invention.

[0026] As used herein, "S" or "SC" refer interchangeably to a superconductor or a superconductor / superconducting region. As described herein, in some embodiments, a material can include physical and / or chemical properties that are inherently superconducting, and in other embodiments, superconductivity can be induced in a material by, for example, a gate magnetic field or doping.

[0027] As used herein, a "normal (N)" region in an SNS and / or SNSNS junction is considered to be any type of region that is not superconducting. Otherwise, as used herein, the term "normal" is used interchangeably with the terms "trivial" or "insulating" unless the region exhibits superconducting properties.

[0028] The term "phase winding" refers to a scenario where a phase of 2π creates a vortex carrying one unit of magnetic flux quantum. In general, phase windings are a mechanism that breaks time reversal symmetry and helps circulate current around the system. Phase windings also occur at integers or multiples of 2π, i.e., 2πn, where n is an integer greater than but not including 0. In some embodiments, phase windings can be utilized with non-uniform Fermi velocities to replace the need for an external Zeeman field.

[0029] In some embodiments, when spin-orbit coupling is present, the Fermi velocity is generally unequal, which forms the basis on which the topological superconducting devices of the present disclosure operate, where "spin-orbit coupling" (SOC) generally refers to the relativistic interaction between the spin of a particle and its motion within a potential.

[0030] In some embodiments, the terms "lead," "electrode," "pad," "region," "terminal," and "substrate" are used interchangeably.

[0031] In some embodiments, superconductivity in the material is induced by a gate potential, material doping, or a combination thereof. In some embodiments, the gate potential is applied directly to the material (e.g., via a lead). In other embodiments, the gate potential is applied indirectly to the material, i.e., coupled to any number of other materials or layers, such as an oxide or other dielectric medium. A dielectric medium refers to a medium that is an electrical insulator that can be polarized by an applied electric field.

[0032] As used herein, "doping" or "chemical doping" refers to the introduction of an impurity (single or multiple types) for the purpose of modulating the electrical, optical, and / or structural properties of a material.

[0033] In one embodiment, two or more gate terminals interact with any one of the SC regions. For example, the SC region may include a top and / or bottom gate configuration such that the chemical potential is modulated within the SC region. In this embodiment, the gate potential defines the SC region, which may define any shape and / or structure, as described below. Furthermore, the gate profile may be selected to optimize the device's characteristics. In some embodiments, the gate bias may be positive, in other embodiments it may be negative, and / or it may be different for different regions of the device.

[0034] Topological superconducting device of the present invention

[0035] In some embodiments, the SNSNS junction is composed of a single material. In other embodiments, the S regions are composed of different S materials. In one embodiment, gate-controlled superconductivity and non-uniform Fermi velocities in a single material (e.g., a transition metal dichalcogenide) do not require quantum proximity coupling to an external superconductor and / or semiconductor. In some embodiments, the SNSNS junction is composed of two or more materials.

[0036] In some embodiments, the geometrical structure of the SNSNS junction of the embodied device is primarily, but not limited to, a planar junction. The operating principles of the present invention are not limited to a particular device configuration, structure, and orientation, as will be further detailed below. Furthermore, as will become apparent from the following description, multiple topological devices of the present disclosure can be coupled together to form an array of devices that operate collectively. A two-dimensional array of topological devices is comprised of multiple topological devices. In some embodiments, the array is comprised of at least two topological devices. In some embodiments, the array is comprised of 2-10 topological devices. In some embodiments, the array is comprised of 2-100 topological devices. In some embodiments, the array is comprised of 100-1000 topological devices. In some embodiments, the array is comprised of 1000-5000 topological devices. In some embodiments, the array is comprised of 5000-10000 topological devices. In some embodiments, the array is comprised of 10,000-1 million topological devices. In some embodiments, the array is comprised of between 1 million and 1 billion topological devices. In some embodiments, the array is comprised of between 1 billion and 1 trillion topological devices.

[0037] The topological devices can be connected to the array using any non-limiting method known in the art. In some embodiments, such an array is referred to as a "topological superconducting array device," "array device," or simply an "array." The array device is composed of a plurality of topological devices. In some embodiments, the connection of the topological devices is facilitated by any of the following non-limiting examples of materials, connection means, and classes of materials: electrical connections, optical connections, connections by semiconductors, magnetic materials, alloys, magnetic semiconductors, magnetic insulators, superconductors, quantum materials, and topological insulators. In some implementations, the magnetic semiconductor is selected from diluted magnetic semiconductors (DMS), yttrium iron garnet (YIG), bismuth iron garnet (BIG), magnetic oxides, semimetallic ferromagnets, and magnetic topological insulators. Non-limiting examples of magnetic insulators include ferrites, ceramic-based materials, rare earth compounds, antiferromagnets, spin glasses, and multiferroics. In some embodiments, connections of the topological devices are facilitated by any of EuS, EuO, GdS:Eu, CoFe2O4, Cr2Ge2Te (including any compounds related to these material families). Further non-limiting examples of materials used to connect the topological devices of the present application include rare earth metal chalcogenides, spinel ferrites, ceramic-based materials, and TMDs.

[0038] Non-limiting examples of DMS materials are doped with Mn, Fe, or Co, e.g., (Ga,Mn)As, (In,Mn)As, or (Zn,Mn)Te. Non-limiting examples of magnetic oxides include Fe3O4, CoFe2O4, and NiO. Non-limiting examples of magnetic topological insulators include Cr-doped (Bi,Sb)2Te3, and (Bi,Sb)2Se3.

[0039] Such devices and arrays may form components of devices such as, but not limited to, electronic devices, integrated circuits, processors, quantum processors, quantum computers, quantum cryptography systems, quantum sensors, and quantum communication systems. As used herein, a "quantum computer" is a type of computer that uses qubits. A "qubit" is a unit of quantum information.

[0040] Reference will now be made to the various figures which illustrate specific embodiments of the present invention. Those skilled in the art to which the present invention pertains will readily appreciate that various changes, modifications and alterations may be made without departing from the scope of the subject matter of the present disclosure.

[0041] FIG. 1 shows cross-sectional views of various embodiments of SNSNS junctions. L N L S M N R S R The subscript "L" corresponds to the "left side" of the junction, the subscript "M" corresponds to the "middle" of the junction, and the subscript "R" corresponds to the "right side" of the junction. In some embodiments, the terms "section," "region," and "side" are used interchangeably to describe the junction. In some embodiments, the SNSNS junction is a planar device having S regions (or S strips) and N regions (or strips) that are parallel to each other. Also, the S L N L S M N R S R The width of each S region and N region of the junction is denoted as "W" for convenience (see FIG. 1A). For example, W SL refers to the width of the left S region. In some embodiments, all S and N regions have the same width as each other, as shown in FIG. 1A. That is, W S =W N Figure 1A shows the above rule (S L , W SL , N L , W NL1B-1F ) and the labeling of the S and N regions applies similarly. In some embodiments, the width of each region in an SNSNS junction can be described by any one of the following rules: W S ≠W N (See Figures 1B to 1E) W S >W N (See Figure 1B) W S <W N (See Figure 1C) W SL =W SR , and W SM >W SL / SR / NL / NR (See Figure 1D) W SL ≠W NL ≠W SM ≠W NR ≠W SR (See Figure 1E).

[0042] In some embodiments, the boundaries and / or interfaces between the S and N regions are clearly defined and are shown as separating the S and N regions by a line (see, e.g., FIG. 1A-1E). In other embodiments, the S and N regions and their boundaries / interfaces are not clearly defined (see, e.g., FIG. 1F). In a sense, FIG. 1A-1E shows an idealized configuration of an SNSNS junction, and it is not detrimental to the essence of the invention if, in a "real" scenario, the interface between the materials (or one or more materials having regions with different electronic states) is less idealized. In some embodiments, the boundaries and / or interfaces between the S and N regions are continuous. In other embodiments, the boundaries and / or interfaces between the S and N regions are discontinuous. In some embodiments, the S and N regions are blurred and / or continuous with respect to each other (see, e.g., FIG. 1F). The term "boundary" generally refers to a line that defines where one region begins and where the other region ends. The term "interface" generally refers to the area where two different systems, materials, and / or items interact.

[0043] In some embodiments, the three superconducting regions are adjacent to one another. As used herein, "adjacent" can refer to regions that are in contact with, adjacent to, near, or in close proximity to one another, even if they are completely or partially separated.

[0044] In some embodiments, any of the layers and / or regions within the device form structures as any one of a monolayer, surface, thin film, layer, and / or three-dimensional shape / structure as a component within the device. In some embodiments, the structures of the device are fabricated by any one of photolithography, e-beam lithography processes, physical vapor deposition, chemical vapor deposition, epitaxy, focused ion beam, self-assembly, nanoimprinting, dry / wet etching, electrically induced nanopatterning, dry / wet deposition, and / or combinations thereof.

[0045] In one embodiment, the thickness of the SC and N layers in the device ranges from 1 nanometer to 1000 nanometers. In one embodiment, the thickness of the SC and N layers in the device ranges from 1 nanometer to 200 nanometers. In one embodiment, the thickness of the SC and N layers in the device ranges from 1 nanometer to 500 nanometers. In one embodiment, the thickness of the SC and N layers in the device ranges from 500 nanometers to 1000 nanometers. In another embodiment, the thickness of the SC and N layers in the device ranges from 1 micron to 20 microns. In another embodiment, the thickness of the SC and N layers in the device ranges from 1 micron to 50 microns. In another embodiment, the thickness of the SC and N layers in the device ranges from 50 microns to 100 microns.

[0046] In other embodiments, different S and / or N structures in an SNSNS device have the same thickness as one another. In other embodiments, different S and / or N structures in an SNSNS device have different thicknesses as one another. In other embodiments, different SC and / or N structures in an SNSNS device have the same shape as one another. In other embodiments, different SC and / or N structures in an SNSNS device have different shapes as one another.

[0047] In some embodiments, the gate potential modulates the electrical properties of the material from insulating to superconducting, for example in an Al substrate. In some embodiments, any material with spin-orbit coupling can be used in the functional material. In some implementations, quantum proximity of the SC region to the substrate is required. In some embodiments, phase modulation of the superconducting state is achieved by a gate in the SNSNS device. In some embodiments, a single material can be used where multiple gates are used to induce superconductivity in specific regions, such as forming an SNSNS device in one material. In such embodiments, no coupling to a two-dimensional electron gas material (2DEG) substrate is required.

[0048] In some embodiments, the combination of intrinsic gate-controlled superconductivity and non-uniform Fermi velocity in a layer of TMDs exhibits topological superconductivity in a single material system without the need for quantum proximity coupling to an external superconductor.

[0049] As shown in the schematic diagram of FIG. 2A, the device 200 of the present disclosure includes a substrate 201, SC regions 202 disposed on the substrate 201 and separated by N regions 203, and at least one gate 204. Three of the gates 204 are V G1 , V G2 , and V G3 On the SC region as V' G1 , V´ G22A , on the N region as a top gate. For clarity, not all coupling layers and structures are shown in FIG. 2A . As shown, at least one gate 204 or multiple gates are connected to the SC region 202 through a capacitor. In some embodiments, any number of gates can be used. In some embodiments, any number of additional layers (not shown), such as dielectric materials, are coupled to the multiple electrodes to facilitate gating to either the SC region 202 and / or the N region 203. In some embodiments, the dielectric materials are selected from silicon, silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, zirconium oxide, titanium dioxide, superconducting layers, semiconductors, topological insulating layers, and polymers, or any combination thereof. In some implementations, the additional layers include at least one metal. In some implementations, the additional layers include graphene. These additional layers can be applied to any of the devices of the present disclosure. In some implementations, the additional layers include transition metal oxides, topological insulators, heavy fermion materials, semiconductors, and organic molecules, or any combination thereof. The device 200 includes at least three superconducting (SC) regions 202 made of superconducting material and in a superconducting state. In some embodiments, the SC and / or N regions can be adjacent regions or parallel strips or pads. A non-superconducting region (N) 203 separates each of the SC regions 202 from each other forming two SNS junctions, i.e., SNSNS junctions or devices, disposed on a substrate 201 and connected to each other. In one embodiment, the SC and N regions 202 and 203, i.e., SNSNS junctions, are disposed on a non-superconducting substrate 201. According to some embodiments, the substrate 201 includes any of, but is not limited to, non-superconducting metals, semiconductors, dielectric media, oxides, and / or combinations thereof. In some embodiments, the terms "topological device", "device", and "junction" are used interchangeably.Although the gate 204 is shown diagrammatically as a top gate indirectly connected to the SC region 202 and the N region 203, the implementation of the gate field is not limited to a particular setup, as will become clear from the following description. The gate potential of any one of the gates used may be the same as each other or may be different from each other. In some embodiments, each gate 204 can provide a constant voltage (DC) or an oscillating voltage (AC). The voltage may be applied directly to the corresponding region or indirectly through a subsequent layer and / or electrode, e.g., multiple electrodes, appropriately positioned and coupled. In some embodiments, the profile of the applied voltage is nonlinear, pulsed, periodic, and / or aperiodic. In some embodiments, any one of the gates 204 can control the gate potential in one or more of the SC region 202 and / or the N region 203.

[0050] As shown in FIG. 2B, an additional SNS junction 220 including SC regions 202 disposed on a substrate 201 and separated by N regions 203 can be added in parallel to an existing SNS or SNSNS junction. For clarity, not all coupling layers and structures are shown in FIG. 2B. Thus, the SC and / or N regions can include a gate 204 corresponding to each region. In some embodiments, each gate 204 or gates are connected to the SC region 202 and / or N region 203 via a capacitor. In some embodiments, any number of layers of dielectric material are coupled to the multiple electrodes to facilitate gating to either the SC region 202 and / or N region 203. Additionally, each SNSNS device can further include at least one additional SC region 202 and / or at least one additional N region 203. Thus, multiple topological devices of the present disclosure can be coupled together to form an array of devices that operate collectively. In one embodiment, multiple topological devices are coupled together to form an array of topological devices. In principle, the connection of multiple devices can be extended to any of the devices of the present disclosure.

[0051] As shown in FIG. 2C, the device architecture 230 includes an SNSNS junction having SC regions 202 separated by N regions 203 disposed on a substrate 201. For clarity, not all coupling layers and structures are shown in FIG. 2C. The SC regions 202 and N regions 203 are defined by a number of top gate electrodes 204 disposed on a top layer 205 shown as strips. The substrate 201 is also a back gate 206 (bottom gate). The top gate 204 and back gate 206 (bottom gate) modulate the gate potential across the central layer that constitutes the SNSNS junction, modulating the electronic properties of the SC regions 202 and N regions 203. In this way, the electronic properties of the SNSNS layers can be controlled by the gates. A number of such devices can be connected to form an array of devices operating collectively.

[0052] In some embodiments of the devices of the present disclosure, the height, width, thickness, and / or shape of any of the SC and / or N and / or insulating regions may vary from device to device. Additionally, the devices illustrated generally in the accompanying drawings may incorporate additional layers between, adjacent to, above, and below any of the illustrated layers to facilitate electronic coupling or isolation of various portions of the device as required by the device architecture to achieve the described objectives of the invention.

[0053] In some embodiments, the functional materials used in the device can be made of any suitable superconducting material. In some implementations, the superconducting materials include type I superconductors, type II superconductors, organic superconductors, iron-based superconductors, rare earth metal-based superconductors, or any combination thereof. Non-limiting examples include Al, Nb, Pb, NbSe2, HgTe, InAs, InSb, and transition metal dichalcogenides (TMDs). All substrates and / or electrodes may be made of the same material or may be made of two or more different materials. The functional and / or non-functional elements of the device can include TMDs, non-limiting examples of which include MX2 (M=Mo, W; X=S, Se, Te), MoS2, MoSe2, MoTe2, WS2, WSe2, TaS2, WTe2, or any combination thereof. In fact, any material that supports non-uniform Fermi velocities can be used as a functional material to implement the present invention. TMDs support unequal Fermi velocities and provide a platform that meets one of the conditions of the present invention. In some embodiments, any material that exhibits strong spin-orbit coupling and has unequal Fermi velocities in two distinct parts of the device can be used.

[0054] According to some examples, the material of the substrate is different from the material of the SC region or the N region.

[0055] One means of practicing the invention is to utilize gate-controlled modulation of superconducting materials. Some embodiments utilize gates to define gate-controlled modulation of materials, i.e., "quantum wires," which refers to structures embedded in, on, or under substrates, materials, layers, and / or films whose properties can be modulated by a gate magnetic field to exhibit quantum properties, such as superconductivity.

[0056] In some embodiments, multiple quantum wires can be arranged in parallel with corresponding gate electrodes to achieve an SNSNS structure. Gate-defined superconducting regions such as quantum wires can be extrapolated to any desired shape and device structure according to the requirements of a particular device optimized to achieve the required topological superconductivity in two or three dimensions of space. Indeed, in some embodiments, multiple top gates, back gates (bottom gates), and / or side gates can be used independently of each other or in any combination to achieve the desired gate field and / or gate profile, coupling the gates to the SC and / or N regions.

[0057] In one embodiment, the S material of the SNSNS device is incorporated into a layered structure. In one embodiment, the SNSNS junction further comprises at least one or more additional materials of S material, N material, doped material, semiconductor material, dielectric material, oxide, insulating material, metal, two-dimensional electron gas material, TMD, electron conductor and hole conductor, or any combination thereof. As used herein, "two-dimensional electron gas material" refers to a material that contains an electron gas that moves freely in two dimensions but is strongly confined in the third dimension. In some embodiments, any of the materials described herein can be doped. In some embodiments, the SC material can be selected from any material platform that supports large spin-orbit semiconductor quantum wells, such as, but not limited to, HgTe, InAs, and InSb.

[0058] Topological superconducting devices with periodic modulation

[0059] FIG. 3 illustrates how topological superconductivity can be induced by combining a periodic modulation 303 along the junction, i.e., longitudinal, with the Rashba SOC to induce an uneven Fermi velocity, as shown in certain embodiments. For clarity, not all coupling layers and structures are shown in FIG. 3. As shown in FIG. 3, a device 300 having three laterally separated SC regions 301 is disposed on a spin-orbit coupled two-dimensional electron gas material 302 (i.e., substrate), with the central superconducting region having a periodic modulation 303 represented by a sinusoidal wave, thereby inducing a topological phase. In some embodiments, the SC region 301 is in direct contact or quantum close proximity with the two-dimensional electron gas material 302 (2DEG), and in other embodiments, there is at least one layer separating the SC region 301 and the two-dimensional electron gas material 302 (2DEG). In some embodiments, the periodic modulation 303 induces a modulation of the chemical potential of the intermediate superconductor. In other embodiments, the periodic modulation 303 induces a modulation of the chemical potential of a superconductor that is not an intermediate superconductor.

[0060] In some embodiments, the periodic modulation 303 along the intermediate SC region is a physical periodic structure modulation along the SC region 301. Any periodic structure modulation can be utilized, such as sine wave, square wave, sawtooth, zigzag, etc. In some embodiments, the periodic modulation is provided on (above), below, within, or combinations of any of the SC region 301, the N region, the intermediate material 305, the substrate, one of the gate electrodes, any other bonding material, or any combination thereof. As used herein, "bonding material" refers to any material disposed above, below, or next to another material and / or layer. In some embodiments, the bonding material can be any material selected from non-superconducting metals, 2DEG materials, semiconductors, dielectric media, silicon, oxides, or combinations thereof. In some embodiments, the periodic modulation 303 is achieved by scratching the surface. In some embodiments, the periodic modulation 303 is partially uniform.

[0061] FIG. 3C shows a schematic diagram of the top layer 310 and the bottom layer 311 of the device. These two layers can represent any layered material in a planar device of the invention, for example an SNSNS junction disposed on a substrate. In some embodiments, the top layer 310 has a periodic modulation 312 in the form of a sine wave on its upper surface. The area containing the periodic modulation 312 is shown as a dotted rectangle. FIG. 3D shows the periodic modulation 312 at the interface or boundary between the top layer 310 and the bottom layer 311.

[0062] In some embodiments, the height of the periodic modulation 312 is in the range of 1-10 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 1-50 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 1-100 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 50-100 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 100-500 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 500-1000 nm. In some embodiments, the height of the periodic modulation 312 is in the range of 1-10 μm. In some embodiments, the height of the periodic modulation 312 is in the range of 5-10 μm. In some embodiments, the height of the periodic modulation 312 is greater than 10 μm. As used herein, "height" refers to the amplitude of the periodic modulation 312.

[0063] In some embodiments, a constant or oscillating voltage can be applied by connecting a top gate 304 to any one of the SC regions 301, as shown in Figures 3A and 3B. The voltage can be applied directly to the corresponding region or indirectly through additional layers and / or electrodes, such as multiple electrodes and dielectric materials, appropriately positioned and coupled. In some embodiments, the profile of the applied voltage is non-linear, pulsed, periodic, and / or aperiodic. In some implementations, the 2DEG is a substrate 302 on which the superconducting region 301 is disposed. In another embodiment, the superconducting regions 301 are separated from each other and / or from the substrate by intermediate material 305, as shown in Figure 3B. In some implementations, the intermediate material 305 can be any one of a superconducting material in a non-superconducting state, an insulator, a semiconductor, a 2DEG material, and / or an oxide. In further implementations, the superconducting region 301 is a quantum wire defined by a gate electrode. In some embodiments, the device of Figures 3A and 3B can incorporate multiple gates.

[0064] Phase windings and unequal Fermi velocities

[0065] In one-dimensional superconducting systems with broken time-reversal symmetry and translational invariance, a transition between tribal and topological phases occurs when there is a single gap that closes at zero longitudinal momentum (kx=0). For such a single gap closure to occur, spin symmetry must be broken. In many models, the relevant parameter space is two-dimensional, and one parameter (the Zeeman energy) breaks the symmetry of the two spin branches. The second parameter is the phase difference of the planar Josephson junctions. Application of a Zeeman field separates the gap closed curves of the two spin branches in the parameter space, separating the tribal and topological regions.

[0066] Figure 4 shows a phase-biased SNSNS junction (light grey area indicates the superconducting region, dark grey area indicates the normal region). The SNS junction between two superconductors has an order parameter Δe ±iθIf the superconducting gap Δ is much smaller than the Fermi energy EF, then at θ = π / 2 (π is the phase difference across the junction), double gap closure occurs at the junction, resulting in four states with energy 0. The third superconductor has Δ´e iφ is introduced in the center of the junction with an order parameter of θ−φ (see Fig. 4A). The area between the single gap-closure curves in θ-φ space corresponds to a topological phase.

[0067] The two outer superconductors are semi-infinite in the lateral direction y, and their superconducting order parameter Δ is in general different from that of the central superconductor Δ′. x At k = 0, this reduces to a one-dimensional problem, whose zero-energy crossings correspond to topological phase transitions. Figure 4B shows the transverse spectrum of the junction (dashed line) in a model with next-nearest-neighbor hopping. At the Fermi energy (black dashed line in the middle of Figure 4B), there are four Fermi points (represented by two circles labeled "1" and two squares labeled "2"). The "outer" branches (k y = ±π / 2) and the "inner" branch (k y = 0) are not identical to each other. The solid line corresponds to the linearized spectrum.

[0068] Materials can be characterized in terms of their band structure, and in many cases, next-nearest-neighbor interactions can be exploited to obtain empirically observed band structures. Such band structures can be used to determine whether a material is suitable for implementation as a component of a topological superconducting device. Thus, materials with the desired topological superconducting state, e.g., the largest topological domain, can be selected. For example, 2DEGs of different thicknesses exhibit different numbers of bands or subbands that can be selected to optimize the topological superconducting properties.

[0069] If the velocities of the two spin branches are different, the Zeeman field is replaced by a second phase difference. In the presence of spin-orbit coupling, the Fermi velocities v1 and v2 are, in general, not equal. The position of the gap closing transition in the θ-φ plane is determined by the dimensionless ratio W S / ξj It is determined by (ξ j =v j / Δ´ is the coherence length of the intermediate superconductor for branch j, and W S is the width of the intermediate superconductor). If there is no intermediate superconductor (W S =0), the transition occurs at θ=π / 2 for both spins, resulting in a phase difference of π. If the central superconductor is very wide, the system can be seen as two unconnected junctions, and the gap closes when the phase difference of one junction is π. In between, the positions of the gap closure form a curve in the θ-φ plane. In an SNSNS junction, the gap closure curves of the two spin branches are different when the velocities of the intermediate superconductors are unequal. The area between these curves defines the topological region, as shown in Figure 5. The large topological region (represented by the grey area between the two nonlinear curves) results from the Fermi velocities of the two branches being significantly different from each other. The limit is ξ j =0(θ=π / 2) and ξ j →∞(φ=π±θ).

[0070] FIG. 5 shows a phase diagram of the SNSNS configuration of FIG. j =v j The two values ​​of / Δ´ come from the unequal transverse Fermi velocities. The wide and short dotted curves are the S / ξ1 =0.5 and W S / ξ2 For =2, k x = 0. Because these crossings are non-degenerate, they correspond to topological phase transitions, and therefore the region between the two curves (shaded area) has a topological superconducting state. The solid black lines define the region where the vortices exist.

[0071] There are several material platforms in which the band structure has an imbalance such that the Fermi velocities of the two spin branches are unequal. In some embodiments, the present invention supports any material that exhibits an unequal Fermi velocity in an SNSNS configuration, such as a TMD. In some embodiments, a single material system can be exploited with intrinsic gate-controlled superconductivity and unequal Fermi velocities in a layer of TMD without the need for close coupling to an external superconductor.

[0072] Figure 6 illustrates the inherent periodicity of the phase, as mapped onto the phase diagram, distinguishing topological from tribal effects. Figures 6A and 6B show that the emergent periodic patterns are intrinsic to the phase induction setup. The dashed black square indicates the unit cell, and the dashed grey rectangle indicates a cross section of the phase diagram shown in Figure 5.

[0073] It will be understood that the above-described examples, as embodied in the various figures, are examples and that the devices of the present disclosure may be provided in accordance with the subject matter of the present invention or in any other configuration that achieves the described goals of the invention. Furthermore, the examples and embodiments disclosed herein help provide a platform where the phase differences of materials within the device can be controlled, selected and / or modulated to provide desired parameters such as phase windings and non-uniform Fermi velocities of materials within the device.

[0074] Thus, it will be readily apparent to those skilled in the art to which the present invention pertains that various changes, modifications and alterations can be made, mutatis mutandis, without departing from the scope of the subject matter disclosed herein.

Claims

1. A topological superconducting device, comprising: The method includes the steps of: forming a first superconducting region on a substrate, the first superconducting region being made of at least one material; and forming a second superconducting region on the substrate; the second superconducting region having two spin branches; each superconducting region of the three adjacent superconducting regions has a phase winding; A topological superconducting device, wherein in the two spin branches, a first spin branch has a different Fermi velocity than a second spin branch.

2. 2. The topological superconducting device of claim 1, The topological superconducting device further comprises at least one gate.

3. 2. The topological superconducting device of claim 1, a non-superconducting region disposed between each of the three adjacent superconducting regions; This results in two SNS junctions being formed, and one superconducting region of each SNS junction overlaps with another to form an SNS junction as a whole, resulting in a topological superconducting device.

4. 2. The topological superconducting device of claim 1, A topological superconducting device, wherein the three adjacent superconducting regions are arranged parallel to each other and / or in a planar configuration.

5. 2. The topological superconducting device of claim 1, 13. A topological superconducting device, wherein the substrate is selected from the group consisting of a non-superconducting metal, a two-dimensional electron gas material, a semiconductor, a dielectric medium, silicon, an oxide, and any combination thereof.

6. 4. The topological superconducting device according to claim 3, said two SNS junctions each including at least one gate; 13. A topological superconducting device configured such that the at least one gate modulates superconductivity of the at least one material.

7. 3. The topological superconducting device according to claim 2, 13. A topological superconducting device, wherein the at least one gate is configured to modulate a phase difference between the three adjacent superconducting regions.

8. 3. The topological superconducting device according to claim 2, 13. A topological superconducting device, wherein the three adjacent superconducting regions are gate-defined wires.

9. 2. The topological superconducting device of claim 1, A topological superconducting device, wherein a width of a central superconducting region of the three adjacent superconducting regions is greater than a width of an outer superconducting region.

10. 2. The topological superconducting device of claim 1, The at least one material is a transition metal dichalcogenide (TMD), Al, Nb, Pb, NbSe ２ , HgTe, InAs, and InSb.

11. 11. The topological superconducting device of claim 10, The transition metal dichalcogenide (TMD) is TaS ２ , MoS ２ , MoSe ２ , MoTe ２ , W.S. ２ , WSe ２ , W.T.e ２ and any combination thereof.

12. 2. The topological superconducting device of claim 1, 13. A topological superconducting device, wherein the at least one material is doped.

13. 2. The topological superconducting device of claim 1, A topological superconducting device, wherein the phase windings occur at multiples of 2π.

14. 4. The topological superconducting device according to claim 3, 13. A topological superconducting device, further comprising a periodic modulation on top of, below, and / or within at least one of the three adjacent superconducting regions.

15. 2. The topological superconducting device of claim 1, 13. A topological superconducting device, further comprising at least one additional superconducting region parallel to the three adjacent superconducting regions.

16. 16. A topological superconducting device according to claim 15, 13. A topological superconducting device, further comprising at least one additional non-superconducting region between the three adjacent superconducting regions and the at least one additional superconducting region parallel thereto.

17. 2. The topological superconducting device of claim 1, 13. A topological superconducting device, further comprising additional layers between, adjacent to, above, and / or below said at least three superconducting regions.

18. 3. The topological superconducting device according to claim 2, 2. A topological superconducting device, wherein the at least one gate comprises a top gate, a back gate, a side gate, or any combination thereof.

19. A quantum computer comprising the topological superconducting device of claim 1.

20. A topological superconducting array device comprising a plurality of the topological superconducting devices according to claim 1.

21. A quantum computer comprising the topological superconducting array device of claim 20.

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