Broadband architecture for centralized coherent control at the edge of a processing tool.

The control system for impedance matching in semiconductor processing tools, featuring a processing power control module with advanced components, addresses the limitations of existing systems by enabling efficient and coherent power transfer across diverse architectures.

JP2025515010AActive Publication Date: 2025-05-13APPLIED MATERIALS INC
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Patent Information

Application Number
JP2024564552
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-05-05
Filing Date
2023-04-14
Publication Date
2025-05-13
Estimated Expiration
2043-04-14

AI Technical Summary

Technical Problem

Existing impedance matching networks in semiconductor processing tools face challenges with narrow control bandwidth, high group delay, and limited peer-to-peer coordination, which hinder efficient power transfer and coherent control.

Method used

A control system for impedance matching that includes a processing power control module with an RF platform board, a carrier card for an analog-to-digital converter, a heterogeneous computing module, a programmable logic board, a real-time processing unit, and a messaging controller, enabling flexible and coherent control of power supply architectures.

Benefits of technology

The proposed solution enhances impedance matching control, achieving efficient power transfer and coherent control across various power supply architectures, thereby improving the overall performance of semiconductor processing tools.

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Abstract

Embodiments disclosed herein include a processing tool, in one embodiment, the processing tool includes a power source, an impedance matching network coupled to the power source, a cathode, where the power source is configured to provide power to the cathode through the impedance matching network, and a processing module communicatively coupled to the power source and the impedance matching network.
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Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Patent Application No. 17 / 737,659, filed May 5, 2022, the entire contents of which are incorporated herein by reference.

[0002] FIELD OF THE DISCLOSURE

[0002] Embodiments relate to the field of semiconductor manufacturing, and in particular to control systems for impedance matching within semiconductor processing tools. [Background technology]

[0003] In plasma processing tools, the plasma is ignited by a cathode coupled to the process gases in the chamber. In most tools, the power source is coupled to the cathode through an impedance matching network (sometimes simply called a "matcher"). The matcher allows the impedance of the system to be adjusted to match the impedance of the load to which the cathode is coupled. The load has a wide range of impedances dictated by parameters such as process conditions and chamber geometry. Impedance matching is important for efficient power transfer from the power source to the load.

[0004] Typically, matching networks are controlled with a distributed control architecture. In such systems, control is established locally for the system and the corresponding subsystems. Interaction between the systems is via the network. Networked devices have low control bandwidth, large group delays, and limited peer-to-peer coordination. Localized schemes inhibit higher order coherency between the coupled systems. Summary of the Invention

[0005] Embodiments disclosed herein include a processing tool, in one embodiment, the processing tool includes a power source, an impedance matching network coupled to the power source, a cathode, where the power source is configured to provide power to the cathode through the impedance matching network, and a processing module communicatively coupled to the power source and the impedance matching network.

[0006] The embodiments disclosed herein may further include a processing power control module, in one embodiment, the processing power control module includes an RF platform board, a carrier card for an analog-to-digital converter (ADC), a heterogeneous computing module (HCM), a programmable logic board, a real-time processing unit (RTPU), and a messaging controller.

[0007] The embodiments disclosed herein may further comprise a semiconductor processing tool. In one embodiment, the semiconductor processing tool comprises a power source, a cathode, where the power source is configured to provide power to the cathode through an impedance matching network, and a processing module communicatively coupled to the power source and the impedance matching network, the processing module comprising an RF platform board, a carrier card for an analog-to-digital converter (ADC), a heterogeneous computing module (HCM), a programmable logic board, a real-time processing unit (RTPU), and a messaging controller. [Brief description of the drawings]

[0008] [Figure 1] 1 is a schematic diagram of a plasma processing tool including a central control architecture according to an embodiment. [Figure 2A] FIG. 1 is a schematic diagram of a plasma processing tool including a process power control module coupled to a matching network connected to an upper cathode in the plasma processing tool according to an embodiment. [Figure 2B]1 is a schematic diagram of a plasma processing tool including a process power control module coupled to a bias source at a substrate support in the plasma processing tool according to an embodiment. [Figure 2C] FIG. 1 is a schematic diagram of a plasma processing tool including a matching network for RF and non-sinusoidal control within the plasma processing tool, according to an embodiment. [Figure 3A] 1 is a schematic diagram of a plasma processing tool having a single power supply with a single output, according to an embodiment. [Figure 3B] 1 is a schematic diagram of a plasma processing tool having a single power supply and a pair of outputs, according to an embodiment. [Figure 3C] 1 is a schematic diagram of a plasma processing tool having a pair of power supplies with a single output, according to an embodiment. [Figure 3D] FIG. 1 is a schematic diagram of a plasma processing tool having a set of three power supplies with a single output, according to an embodiment. [Figure 4] 1 is a schematic diagram of a power processing module according to an embodiment. [Diagram 5] FIG. 1 illustrates a block diagram of an exemplary computer system that may be used with a processing tool, according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The system described herein includes a semiconductor processing tool including a control system for impedance matching in the semiconductor processing tool. In the following description, numerous specific details are presented to provide a thorough understanding of the embodiments. It will be apparent to one of ordinary skill in the art that the embodiments may be practiced without these specific details. In other instances, well-known aspects have not been described in detail so as not to unnecessarily obscure the embodiments. Furthermore, it should be understood that the various embodiments illustrated in the accompanying figures are illustrative representations and are not necessarily drawn to scale.

[0010] As discussed above, existing control of impedance matching networks associated with power supplies has deficiencies. In one embodiment, there are various architectures that allow for coherent control of power supplies. In one embodiment, the power supply is controlled by a controller. The controller receives feedback from sensors located before and after the impedance matching network. For example, the sensors may be current and voltage sensors. The sensor information may be used to activate variable capacitors in the matcher to match the impedance of the load.

[0011] The embodiments are flexibly configurable to accommodate various power supply architectures. For example, one, two, three or more power sources may be fed into the matcher, and one, two or more outputs may be provided from the matcher. Thus, there is flexibility to accommodate the power supply architectures of the various embodiments.

[0012] 1, a more detailed schematic diagram of a plasma processing tool 100 is shown, according to an embodiment. In one embodiment, the plasma processing tool 100 includes a plasma chamber 120. The plasma chamber 120 includes a cathode 122 for coupling received power to one or more gases flowing into the plasma chamber 120. In one embodiment, the plasma chamber 120 may be suitable for any plasma processing typical of a semiconductor manufacturing environment. For example, the plasma chamber 120 may be a plasma etch chamber, a plasma deposition chamber, a plasma processing chamber, etc. In certain embodiments, the plasma chamber 120 may be a plasma enhanced chemical vapor deposition (PECVD) chamber, a physical vapor deposition (PVD) chamber, or a plasma enhanced atomic layer deposition (PEALD) chamber.

[0013] In one embodiment, the plasma chamber 120 may be coupled to a power supply architecture. For example, the power supply architecture may include one or more power sources 1321-132. nIn the illustrated embodiment, multiple power sources 132 are shown. However, it should be understood that in some embodiments, a single power source 132 may be used. In one embodiment, the power source 132 may include any type of power source. For example, the power source 132 may be an RF power source, a microwave power source, a direct current (DC) power source, a pulsed DC power source, or the like.

[0014] In one embodiment, the power supply 132 may be coupled to the cathode 122 through an impedance matching network 130. The impedance matching network 130 changes the impedance of the power delivery architecture to match a load within the chamber 120. Due to changes in process conditions (e.g., gas flow rates, pressure, temperature, etc.), the impedance of the load may vary. Thus, the impedance matching network 130 is used to match the varying impedance to provide an efficient power delivery within the chamber (i.e., with no or minimal reflected power).

[0015] In one embodiment, the sensors 151 and 152 may be provided on either side of the impedance matching network 130. For example, the sensors 1511-151 n may be upstream of the impedance matching network 130, and the sensor 152 may be downstream of the impedance matching network 130. The "upstream" side may refer to the input side of the matching network 130, and the "downstream" side may refer to the output side of the matching network 130. As shown, multiple sensors 1511-151 n is provided upstream of the impedance matching network 130. The number of sensors 151 may be equal to the number of power sources 132. That is, each power source 132 has its own dedicated sensor 151. The downstream side of the impedance matching network 130 may have a single sensor 152. However, it should be understood that if there is more than one output from the matching network 130, there may be additional sensors 152. For example, if there are two outputs (e.g., for a center of the chamber 120 and an end of the chamber 120), there may be two sensors 152.

[0016] In one embodiment, sensors 151 and 152 may be any suitable sensor architecture that can be used to monitor the flow of power from power supply 132 to cathode 122. In a particular embodiment, sensors 151 and 152 are sensors for detecting voltage (V) and current (I). In one embodiment, sensor 151 couples to an electromagnetic signal on a power coupling transmission line. A power supply cable (e.g., a wire, etc.) passes through the center of the ring.

[0017] In one embodiment, the sensors 151 and 152 may be communicatively coupled to the processing module 134. As shown in FIG. 1, a processing power control module 134 is provided. However, it should be understood that the processing module may be a microwave processing module 134, a DC processing module, etc., depending on the type of power source 132 included in the tool 100. In one embodiment, the sensors 151 and 152 provide voltage and / or current to the processing module 134. In one embodiment, the processing module 134 may have external connections, such as ENET and ECAT connections.

[0018] In one embodiment, the processing module 134 may be coupled to the impedance matching network by an analog / digital link. The analog / digital link may enable the processing module 134 to send a control signal to the impedance matching network 130. For example, the control signal may be used to adjust the capacitance of a variable capacitor in the impedance matching network 130. Furthermore, the processing module 134 may be coupled to the power source 132 by an analog / digital link. Thus, the processing module 134 is capable of coordinated impedance adjustment. In one embodiment, the analog / digital link may have corresponding transceivers on both ends of the link.

[0019] 2A, a schematic diagram of a semiconductor processing tool 200 according to an additional embodiment is shown. As shown, the processing tool 200 may include a chamber 220. An upper electrode 222 may be provided as a lid to the chamber 220. A pedestal 223 for supporting a substrate 224 may be provided inside the chamber 220. In one embodiment, the substrate 224 may be a semiconductor wafer or any other substrate typical for semiconductor processing steps. In one embodiment, the upper electrode 222 may be coupled to a power supply architecture.

[0020] In one embodiment, the power supply architecture may be a power supply 232. The power supply 232 may be an RF power supply, a microwave power supply, a direct current (DC) power supply, a pulsed DC power supply, or the like. In one embodiment, the power supply 232 may be coupled to a processing module 234. In a particular embodiment, the power supply 232 may be a 13.56 MHz RF power supply. In one embodiment, the processing module 234 may comprise a current control module 241. Further, the processing module may comprise an RF sensor processing block 242. The RF sensor processing block 242 may include circuitry for receiving and interpreting outputs from the sensors 261 and 262. In one embodiment, the sensor 261 may be upstream of the impedance matching network 230 and the sensor 262 may be downstream of the impedance matching network 230. The sensors 261 and 262 may be current and voltage sensors.

[0021] In one embodiment, the processing module 234 may further include a tuning circuit 243 and a uniformity control block 244. The tuning circuit 243 and the uniformity control block 244 may be communicatively coupled to an actuator controller 235 in the impedance matching network 230. The actuator controller 235 may be actuated to vary the capacitance of a variable capacitor in the impedance matching network 230 to control the impedance through the impedance matching network 230. In certain embodiments, the capacitor is a mechanical capacitor. In other embodiments, the capacitor is a solid state capacitor.

[0022] 2B, a schematic diagram of a semiconductor processing tool 200 according to an additional embodiment is shown. In one embodiment, the processing tool 200 may include a chamber 220. An upper electrode 222 may be provided as a lid to the chamber 220. In one embodiment, a pedestal 223 for supporting a substrate 224 may be at the bottom of the chamber 220. In certain embodiments, the pedestal 223 may be coupled to one or more power sources 232. In the embodiment shown in FIG. 2B, the semiconductor processing tool 200 may include a first power source 2321 and a second power source 2322. One or more power sources 232 may be used in various embodiments.

[0023] In one embodiment, the power source 232 may be coupled to the processing module 234. For example, the power source 232 may be fed to a voltage controller 245. For example, the first power source 2321 may be a 2 MHz RF power source and the second power source 2322 may be a 13.56 MHz RF power source.

[0024] In one embodiment, the voltage control block 245 may be coupled to the sensor processing block 242. In one embodiment, the sensor processing block 242 may be communicatively coupled to a plurality of sensors. For example, a pair of first sensors 2611 and 2622 may be upstream of the impedance matching network 230. The first sensors 2611 and 2612 may be sensors for the input of the first power source 2321 and the second power source 2322 into the impedance matching network 230. In one embodiment, the second sensor 262 may be downstream of the impedance matching network 230. The first sensor 261 and the second sensor 262 may be current and voltage sensors, as described in more detail above.

[0025] In one embodiment, the tuning circuit 243 and the current ratio control block 244 may be communicatively coupled to the sensor processing block 242. The tuning circuit 243 and the uniformity control block 244 may be communicatively coupled to an actuator controller 235 in the impedance matching network 230. The actuator controller 235 may be actuated to vary the capacitance of a variable capacitor in the impedance matching network 230 to control the impedance through the impedance matching network 230. In certain embodiments, the capacitor is a mechanical capacitor. In other embodiments, the capacitor is a solid-state variable impedance device.

[0026] In Figure 2A, the power supply architecture is coupled to the upper electrode, and in Figure 2B, the power supply architecture is coupled to the lower pedestal. However, it should be understood that in other embodiments, the power supply architecture may be coupled to both the upper electrode and the lower pedestal. In such embodiments, a pair of power supply architectures may be used, one for the upper electrode and one for the lower pedestal.

[0027] 2C, a schematic diagram of a semiconductor processing tool 200 according to an additional embodiment is shown. In one embodiment, the semiconductor processing tool 200 includes a chamber 220. The chamber is sealed by an upper electrode 222. In one embodiment, a pedestal 223 may be provided at the bottom of the chamber 220. The pedestal 223 is configured to hold a substrate 224.

[0028] In one embodiment, a processing module 234 may be coupled to the chamber 220. In one embodiment, the processing module 234 may be a processing power control module, although other power sources (e.g., microwave, DC, etc.) may be used. In one embodiment, the processing module 234 may be coupled to more than one power source. For example, the AEC controller 246 may have a block 247 coupled to the RF generator 232 (e.g., a 40 MHz generator) and a block 248 coupled to the non-sine wave supply system 238.

[0029] In one embodiment, the non-sinewave supply sensor processing block 249 may be coupled to sensors on the non-sinewave supply matcher 237. For example, the sensors may include a first sensor 263 and a second sensor 264. The first sensor 263 may provide measurements of edge voltage and edge current. The second sensor 263 may provide measurements of wafer voltage and wafer current.

[0030] In one embodiment, the RF sensor processing block 242 may also be coupled to a pair of sensors. For example, a first sensor 261 may be upstream of the RF impedance matching device 230 and a second sensor 262 may be downstream of the RF impedance matching device 230. The downstream side of the RF matcher may be coupled to the pedestal 223. In one embodiment, the first sensor 261 and the second sensor 262 may be current and voltage sensors.

[0031] In one embodiment, the processing power control module 234 may further include a tuning circuit 243. The tuning circuit 243 may be coupled to a motor controller within the RF matcher 230. The tuning circuit 243 may be used to adjust the impedance within the RF matcher 230. For example, the motor controller 235 may adjust the positioning of one or more variable capacitors to change the impedance of the system.

[0032] 3A-3D, a series of schematic diagrams of a processing tool 300 are shown, in accordance with various embodiments. In the illustrated embodiment, various inputs and outputs are provided in and out of an impedance matching network 330. Additionally, the circuit architecture within the impedance matching network 330 is shown.

[0033] 3A, a semiconductor processing tool 300 is shown, according to an embodiment. In one embodiment, the semiconductor processing tool 300 includes a power source 332. The power source 332 shown in FIG. 3A is an RF generator. However, it should be understood that other power sources may be used according to additional embodiments. In one embodiment, the power source 332 may be coupled to a first sensor 351. The first sensor 351 may be upstream to an impedance matching network 330. In one embodiment, the first sensor 351 is a voltage and current sensor. In one embodiment, the first sensor 351 may be followed by an impedance matching network 330.

[0034] The impedance matching network 330 may include a first capacitor C1 and a second capacitor C2. The first capacitor C1 and the second capacitor C2 may be variable capacitors. The first capacitor C1 may be between an input to the impedance matching network 330 and ground. The second capacitor C2 may be between an input to the impedance matching network 330 and an output of the impedance matching network 330.

[0035] In one embodiment, the output of the impedance matching network 330 may be coupled to a second sensor 352. The second sensor 352 may be a voltage and current sensor. In one embodiment, the first sensor 351 and the second sensor 352 may be coupled to a process module (not shown) similar to the process power control module described in more detail above. In one embodiment, the second sensor 352 may be between the impedance matching network 330 and the plasma source 320. For example, the plasma source 320 may be a plasma processing chamber, such as a PECVD chamber, a PEALD chamber, a PVD chamber, or a plasma processing chamber.

[0036] 3B, a schematic diagram of a semiconductor processing tool 300 according to an embodiment is shown. In one embodiment, the semiconductor processing tool 300 includes a power source 332. The power source 332 shown in FIG. 3B is an RF generator. However, it should be understood that other power sources may be used according to additional embodiments. In one embodiment, the power source 332 may be coupled to a first sensor 351. The first sensor 351 may be upstream to an impedance matching network 330. In one embodiment, the first sensor 351 is a voltage and current sensor. In one embodiment, the first sensor 351 may be followed by an impedance matching network 330.

[0037] The impedance matching network 330 may include a first capacitor C1, a second capacitor C2, and a third capacitor C3. The first capacitor C1, the second capacitor C2, and the third capacitor C3 may be variable capacitors. The first capacitor C1 may be between an input to the impedance matching network 330 and ground. The second capacitor C2 may be between an input to the impedance matching network 330 and a first output of the impedance matching network 330. The third capacitor C3 may be between the second capacitor C2 and a second output of the impedance matching network 330. For example, the first output is used for an inner portion of the plasma source and the second output is used for an outer portion of the plasma source. By controlling the capacitance of the third capacitor C3, the power division between the inner portion of the plasma source and the outer portion of the plasma source is determined.

[0038] In one embodiment, second sensors 3521 and 3522 may be provided between the impedance matching network 330 and the plasma source 320. In one embodiment, the second sensors 3521 and 3522 may be current and voltage sensors. In one embodiment, the first sensor 351 and the second sensor 352 may be coupled to a process module (not shown) similar to the process power control module described in more detail above. In one embodiment, the second sensor 352 may be between the impedance matching network 330 and the plasma source 320. For example, the plasma source 320 may be a plasma processing chamber, such as a PECVD chamber, a PEALD chamber, a PVD chamber, or a plasma processing chamber.

[0039] 3C, a schematic diagram of a semiconductor processing tool 300 according to an additional embodiment is shown. In one embodiment, the semiconductor processing tool 300 includes a pair of power sources 332A and 332B. The power sources 332A and 332B shown in FIG. 3C are RF generators. However, it should be understood that other power sources may be used according to additional embodiments. In one embodiment, the power source 332 may be coupled to one of the first sensors 351A or 351B. The first sensor 351 may be upstream of the impedance matching network 330. In one embodiment, the first sensor 351 is a voltage and current sensor. In one embodiment, the first sensor 351 may be followed by the impedance matching network 330.

[0040] As shown, a pair of inputs may be provided for the impedance matching network 330. The first input may be provided by a first power supply 332A, and the second input may be provided by a second power supply 332B. Each input of the impedance matching network 330 may include a first capacitor C1 and a second capacitor C2. The first capacitor C1 and the second capacitor C2 may be variable capacitors. The first capacitor C1 may be between the input to the impedance matching network 330 and ground. The second capacitor C2 may be between the input to the impedance matching network 330 and the output of the impedance matching network 330. In one embodiment, the two input sources may be combined after the second capacitor C2 to provide a single output.

[0041] In one embodiment, the output of the impedance matching network 330 may be coupled to a second sensor 352. The second sensor 352 may be a voltage and current sensor. In one embodiment, the first sensor 351 and the second sensor 352 may be coupled to a process module (not shown) similar to the process power control module described in more detail above. In one embodiment, the second sensor 352 may be between the impedance matching network 330 and the plasma source 320. For example, the plasma source 320 may be a plasma processing chamber, such as a PECVD chamber, a PEALD chamber, a PVD chamber, or a plasma processing chamber.

[0042] 3D, a schematic diagram of a semiconductor processing tool 300 according to an embodiment is shown. In one embodiment, the semiconductor processing tool 300 includes a set of three power sources 332A, 332B, and 332C. The power sources 332A, 332B, and 332C shown in FIG. 3D are RF generators. However, it should be understood that other power sources may be used according to additional embodiments. In one embodiment, the power source 332 may be coupled to one of the first sensors 351A, 351B, or 351C. The first sensor 351 may be upstream of the impedance matching network 330. In one embodiment, the first sensor 351 is a voltage and current sensor. In one embodiment, the first sensor 351 may be followed by the impedance matching network 330.

[0043] As shown, a set of three inputs may be provided for the impedance matching network 330. The first input may be provided by a first power supply 332A, the second input may be provided by a second power supply 332B, and the third input may be provided by a third power supply 332C. Each input of the impedance matching network 330 may include a first capacitor C1 and a second capacitor C2. The first capacitor C1 and the second capacitor C2 may be variable capacitors. The first capacitor C1 may be between the input to the impedance matching network 330 and ground. The second capacitor C2 may be between the input to the impedance matching network 330 and the output of the impedance matching network 330. In one embodiment, the three input sources may be combined after the second capacitor C2 to provide a single output.

[0044] In one embodiment, the output of the impedance matching network 330 may be coupled to a second sensor 352. The second sensor 352 may be a voltage and current sensor. In one embodiment, the first sensor 351 and the second sensor 352 may be coupled to a process module (not shown) similar to the process power control module described in more detail above. In one embodiment, the second sensor 352 may be between the impedance matching network 330 and the plasma source 320. For example, the plasma source 320 may be a plasma processing chamber, such as a PECVD chamber, a PEALD chamber, a PVD chamber, or a plasma processing chamber.

[0045] 4, a block diagram of the processing module 434 is shown, according to an embodiment. In one embodiment, the processing module 434 may include a platform board 470, such as an RF platform board. In one embodiment, the platform board 470 may be a printed circuit board (PCB), or the like. In one embodiment, the platform board provides board-to-board connectors that support connectivity to various combinations of heterogeneous computing modules (HCMs) 471 and dual ADCs 475. The HCMs 471 may be modules that are comprised of high performance and high integration CPUs and programmable logic. The platform board 470 may support two Ethernet interfaces, such as an ECAT module and a USB (storage memory device). The platform board 470 may include an actuator controller 485, and drivers are required for the various use cases described above in FIG. 3A-3D. In one embodiment, the platform board 470 may partition the voltage rails and supplies for the functionality on the platform board 470, the carrier card 474, and the HCMs 471.

[0046] In one embodiment, the platform board 470 may have two carrier cards 474 to support a variety of ADC 475 combinations. For a single sensor 451, only one carrier card 474 slot is filled with an ADC assembly 475 and RF coupling is supported by passive elements to the ADC 475 inputs. For a dual sensor 451 configuration, both carrier slots are used with coupling circuitry and dual ADCs 475. To accommodate four sensor 451 inputs, two independent carrier slots 474 are combined to form a solution to support two quad ADCs 475 or eight input ADCs 475.

[0047] In one embodiment, HCM 471 includes a programmable logic board 472 and a real-time processing unit (RTPU) board 473. Logic board 472 and RTPU 473 may be coupled to a memory device (e.g., DRAM, etc.). A messaging controller and a host may also be provided on HCM 471.

[0048] In one embodiment, the RTPU 473 includes an impedance matching / frequency control block 476. The impedance matching / frequency control block 476 is a processing component that calculates position commands for the variable capacitors and solid state tuning elements from transmission line measurements. In some embodiments, there may be up to three impedance matching / frequency control blocks 476.

[0049] In one embodiment, the RTPU 473 may further comprise a current ratio control block 484. The current ratio control block 484 is a processing component that calculates commands for the various elements to steer RF power between the outputs. In some embodiments, the RF current is targeted. However, in other embodiments, the voltage and / or phase values ​​may also be controlled. In other embodiments, the current ratio control block 484 may be optionally omitted.

[0050] In one embodiment, the RTPU 473 may further comprise a safe operating area (SOA) manager control block 483. The SOA manager control block is a processing component for generating power and coupling RF power to dynamic loads. This subsystem may have an SOA associated with maximum dissipation, creepage, and clearance. This processing module can proactively vary the RF power as well as issue warnings for operation at high dissipation loads.

[0051] In one embodiment, RTPU 473 may further comprise an RF source control block 477, which may include components to control the RF power set point based on measured RF quantified from input and output sensors. The RF set point is derived in CW and pulsed modes. Compensation for line losses is incorporated into the command set point to the RF power source.

[0052] In one embodiment, the RTPU 473 may further comprise an impedance matching / frequency control block 482. For cluster tools, multiple RF power delivery systems may be used. This agent provides a local computing engine that interfaces with a global administrator to improve repeatability and reproducible performance on the cluster tool. Such an embodiment may be formulated with an evolving trellis that is shared with the overseeing global agent.

[0053] In one embodiment, the RTPU 473 may further comprise a pulse monitor agent 478. The pulse monitor agent 478 may collect statistical summaries from a compilation of measured and calculated pulse results. In one embodiment, the RTPU 473 may further comprise an RF agent 481. The RF agent 481 provides a set of configurable parameters for triggering a high resolution set of sequential samples. Trigger configurations are devised from various measurement parameters with variable numbers of samples or acquisition times. In one embodiment, the RTPU 473 may further comprise an impedance matching calibration agent 479. The impedance matching calibration agent 479 manages the calibration of the impedance matching network. In one embodiment, the RTPU 473 may further comprise a sensor calibration agent 480. The sensor calibration agent 480 may manage the calibration of RF sensors and sampling times for accurate frequency measurements.

[0054] Referring now to FIG. 5, a block diagram of an exemplary computer system 500 of a processing tool is shown according to an embodiment. In one embodiment, the computer system 500 is coupled to the processing tool and controls processing within the processing tool. The computer system 500 may be connected (e.g., networked) to other machines in a local area network (LAN), an intranet, an extranet, or the Internet. The computer system 500 may operate in the role of a server or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The computer system 500 may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a web appliance, a server, a network router, switch, or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify operations to be performed by that machine. Additionally, although only a single machine is shown as computer system 500, the term "machine" should further be interpreted to include any collection of machines (e.g., computers) that individually or in concert execute a set (or sets) of instructions to perform any one or more of the methodologies described herein.

[0055] The computer system 500 may include a computer program product, or software 522, having a non-transitory machine-readable medium having instructions stored thereon that may be used to program the computer system 500 (or other electronic devices) to perform processes according to embodiments. A machine-readable medium includes any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable (e.g., computer-readable) medium includes a machine (e.g., computer) readable storage medium (e.g., read-only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.), a machine (e.g., computer) readable transmission medium (in the form of electrical, optical, acoustic, or other propagated signals (e.g., infrared signals, digital signals, etc.)), etc.

[0056] In one embodiment, computer system 500 includes a system processor 502, a main memory 504 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), a static memory 506 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory 518 (e.g., a data storage device), which communicate with each other via a bus 530.

[0057] The system processor 502 represents one or more general-purpose processing devices, such as a microsystem processor or a central processing unit. More specifically, the system processor may be a complex instruction set computing (CISC) microsystem processor, a reduced instruction set computing (RISC) microsystem processor, a very long instruction word (VLIW) microsystem processor, a system processor that executes other instruction sets, or a system processor that executes a combination of instruction sets. The system processor 502 may also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal system processor (DSP), a network system processor, etc. The system processor 502 is configured to execute processing logic 526 for performing the operations described herein.

[0058] The computer system 500 may further include a system network interface device 508 for communicating with other devices or machines. The computer system 500 may further include a video display unit 510 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 512 (e.g., a keyboard), a cursor control device 514 (e.g., a mouse), and a signal generating device 516 (e.g., a speaker).

[0059] The secondary memory 518 may include a machine-accessible storage medium 532 (or, more specifically, a computer-readable storage medium) having stored thereon one or more sets of instructions (e.g., software 522) that embody any one or more of the methods or functions described herein. The software 522 may also reside, completely or at least partially, within the main memory 504 and / or the system processor 502 while being executed by the computer system 500, and the main memory 504 and the system processor 502 may also constitute machine-readable storage media. The software 522 may further be transmitted and received over the network 520 via the system network interface device 508. In one embodiment, the network interface device 508 may operate using RF, optical, acoustic, or inductive coupling.

[0060] While the illustrated embodiment shows the machine-accessible storage medium 532 as a single medium, the term "machine-readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of instructions. Furthermore, the term "machine-readable storage medium" should be taken to include any medium that is capable of storing or encoding a set of instructions that are executed by a machine and that cause the machine to perform any of one or more of the methods. Thus, the term "machine-readable storage medium" should be taken to include, but is not limited to, solid-state memories, optical media, and magnetic media.

[0061] In the foregoing specification, certain exemplary embodiments have been described. It will be apparent that various modifications may be made thereto without departing from the scope of the following claims. The specification and drawings are therefore to be regarded in an illustrative rather than a restrictive sense.

Claims

1. 1. A processing tool, comprising: power supply, an impedance matching network coupled to the power source; a cathode, the power supply configured to supply power to the cathode through the impedance matching network; and a processing module communicatively coupled to the power source and the impedance matching network; A processing tool comprising:

2. The processing tool of claim 1 , wherein a first sensor is disposed upstream of the impedance matching network and a second sensor is disposed downstream of the impedance matching network.

3. The processing tool of claim 2 , wherein the first sensor and the second sensor are communicatively coupled to the processing module.

4. The processing tool of claim 2 , wherein the first sensor and the second sensor are voltage / current sensors.

5. The processing tool of claim 1 , further comprising a plurality of power sources coupled to the impedance matching network.

6. a plurality of first sensors, each of the plurality of first sensors being between each of the plurality of power sources and the impedance matching network; and The processing tool of claim 5 comprising a second sensor between the impedance match network and the cathode.

7. The processing tool of claim 1 , wherein the cathode is in a plasma chamber.

8. The processing tool of claim 1 , wherein the power source is an RF power source.

9. The processing tool of claim 1 , wherein the power source is a microwave power source.

10. The processing tool of claim 1 , wherein the power supply is a DC power supply.

11. The processing tool of claim 1 , wherein the impedance matching network modifies an impedance of an electrical path between the power source and the cathode to match an impedance of a load coupled to the cathode.

12. The processing tool of claim 1 , wherein the cathode is an upper electrode in a plasma chamber.

13. The processing tool of claim 1 , wherein the cathode is a bottom electrode in a plasma chamber.

14. 1. A processing power control module, comprising: RF platform board, A carrier card for an analog-to-digital converter (ADC); Heterogeneous Computing Module (HCM), Programmable Logic Board, A real-time processing unit (RTPU), and Messaging Controller a processing power control module comprising:

15. The processing power control module of claim 14 , wherein the RTPU comprises an impedance matching / frequency control module.

16. The processing power control module of claim 14 , wherein the RTPU comprises a current ratio control module.

17. The processing power control module of claim 14 , wherein the RTPU comprises an RF source control module.

18. The processing power control module of claim 14 , wherein the RTPU comprises one or more of an impedance matching / frequency agent, a pulse monitor agent, an impedance matching calibration agent, and a sensor calibration agent.

19. 1. A semiconductor processing tool comprising: power supply, an impedance matching network coupled to the power source; a cathode, the power supply configured to supply power to the cathode through the impedance matching network; and a processing module communicatively coupled to the power source and the impedance matching network, An RF platform board; a carrier card for an analog-to-digital converter (ADC); A heterogeneous computing module (HCM); A programmable logic board; a real time processing unit (RTPU); Messaging Controller and A processing module comprising:

16. A semiconductor processing tool comprising:

20. The processing tool of claim 19 , wherein a first sensor is disposed upstream of the impedance matching network and a second sensor is disposed downstream of the impedance matching network.

Citation Information

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