Method and single-wafer processing system for processing a semiconductor wafer

Abstract

Improved processing systems and methods are provided for wet and dry processing of semiconductor wafers. A sealed chamber for processing a semiconductor wafer within a processing space and an exhaust system for conducting a processing fluid out of the processing space are provided. The sealed chamber includes an upper plate and a bottom plate that physically confine the processing fluid within a relatively small sealed processing space. This forces the processing fluid to flow radially across the wafer surface without the need to rotate the wafer. The exhaust system includes a conduit that is downstream of the processing space and configured to hold at least a portion of the processing fluid supplied within the processing space. The portion held within the conduit provides a pressure resistance to the processing fluid supplied within the processing space to improve wet and dry processing of the wafer surface.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims priority to U.S. Provisional Patent Application No. 63 / 351,922, entitled "METHOD AND SINGLE WAFER PROCESSING SYSTEM FOR PROCESSING OF SEMICONDUCTOR WAFERS", filed on June 14, 2022, and U.S. Patent Application No. 18 / 192,279, entitled "METHOD AND SINGLE WAFER PROCESSING SYSTEM FOR PROCESSING OF SEMICONDUCTOR WAFERS", filed on March 29, 2023, the disclosures of these U.S. applications are hereby expressly incorporated by reference in their entirety into this specification.

[0002] The present invention generally relates to the processing and surface treatment of semiconductor wafers, and more particularly to methods and processing systems for both wet and dry processing of such wafers.

Background Art

[0003] Integrated circuits are formed using a planar process, in which an ultra - clean and flat silicon wafer is used as a substrate, and a number of identical devices are built on the substrate by various processes of oxidation, photolithography, removal, ion bombardment, and deposition. Since the device performance, reliability, and product yield of silicon circuits are greatly affected by the presence of chemical contaminants and particulate impurities on the wafer surface, surface treatment before and after the process is important for patterning microelectronic devices.

[0004] Currently, various dry and wet processes are used for cleaning the surface of semiconductor wafers. The dry cleaning process includes the steps of wafer cleaning and wafer drying using gas exposure. The wet cleaning process includes a series of steps of immersing or spraying the wafer with various liquids including chemical solutions and rinsing liquids. These wet and dry processes can be performed in a wide variety of processing chambers and systems.

[0005] A spin chamber is used to clean one or more surfaces of a semiconductor wafer using wet and dry processes. The spin chamber uses a spin chuck, a drive mechanism (e.g., a stepping motor) that rotates or spins the semiconductor wafer placed on the spin chuck, at least one liquid nozzle for supplying one or more liquids onto the wafer surface while the semiconductor wafer is rotating, and a large cup for taking in the liquid discharged from the wafer surface by the centrifugal force generated during the rotation of the spin chuck.

[0006] In the spin chamber, various cleaning processes can be performed. In one exemplary cleaning process, with the semiconductor wafer rotating, a chemical solution is supplied onto the surface of the semiconductor wafer to clean the wafer surface. After the cleaning step, with the semiconductor wafer rotating, a rinsing liquid is supplied onto the wafer surface to remove the chemical solution and rinse the wafer surface. After the rinsing step, the rotation of the wafer may be continued to spin-dry the wafer surface. In some cases, a paddle process may be performed between the wafer cleaning step and the rinsing step. In the paddle process, the chemical solution is supplied onto the wafer surface with the rotation of the wafer stopped (or significantly decelerated) so that a paddle of the chemical solution can be formed on the wafer surface. In some cases, the paddle may reduce the amount of chemicals required to clean the wafer surface.

[0007] Conventional wet cleaning processes and processing chambers have several drawbacks. For example, spin chambers tend to be large and complex due to the need for a spin chuck, a drive mechanism, and a large liquid intake cup. In addition, current wet cleaning processes utilized within spin chambers generally require large amounts of ultra-high purity chemicals. Due to the high cost and large amounts of ultra-high purity chemicals required in current wet cleaning processes, the treatment of harmful waste generated as a result of such processes, and the incompatibility with advanced concepts of integrated processing such as cluster tool installation, there is a need for new processing chambers and methods that are less affected by these limitations.

[0008] There is a strong demand for improved processing systems and methods that reduce chemical consumption, reduce processing steps, and increase equipment utilization without losing the effectiveness of the process. In particular, there is a need for improved processing systems and methods for ultra-clean surface treatment that are capable of performing both wet and dry processes.

Summary of the Invention

Means for Solving the Problems

[0009] The present disclosure provides an improved processing system and method for wet and dry processing of semiconductor wafers. The processing system and method disclosed herein provide various advantages compared to conventional systems and methods for processing semiconductor wafers. For example, the disclosed processing system and method provide a sealed chamber for wet and dry processing of semiconductor wafers. The sealed chamber includes an upper plate and a bottom plate that physically confine the processing fluid within a relatively small sealed processing space (PS). Thereby, without the need to rotate the wafer, the processing fluid is forced to flow radially across the wafer surface, resulting in a more compact chamber design. The upper and bottom plates of the sealed chamber also (a) reduce the amount of processing fluid required to execute the process, (b) isolate the wafer from the environment, and (c) enable the utilization of additional mechanisms and functions (e.g., acoustic transducers, heating elements, additional nozzles, and / or sensors).

[0010] In addition to the sealed chamber, the disclosed processing system and method provide an exhaust system that improves wet and dry processing of semiconductor wafers. The exhaust system includes a conduit that is disposed downstream of the processing space and is configured to temporarily capture or hold at least a portion of the processing fluid that is supplied within and conducted through the processing space. The portion of the processing fluid held within the conduit provides a pressure resistance to the processing fluid supplied within the processing space. This pressure resistance improves wet processing by making the fluid flow rate of the processing fluid spreading radially across the wafer surface more uniform. During dry processing, the pressure resistance provided by the processing fluid captured within the conduit makes the radial removal of the processing fluid from the wafer surface more uniform.

[0011] According to one embodiment, a processing system for processing a semiconductor wafer is provided herein. The processing system described herein generally includes a chamber in which the semiconductor wafer is processed. The chamber includes a bottom plate having a portion that defines a lower working surface inside the chamber, and an upper plate having a portion that defines an upper working surface inside the chamber. The upper working surface is spaced above the lower working surface.

[0012] The chamber further includes a processing space between the upper working surface and the lower working surface, at least one opening penetrating the lower working surface, and at least one opening penetrating the upper working surface. At least one opening penetrating the lower working surface is configured to direct a processing fluid into the processing space above the lower working surface for processing the lower surface of the semiconductor wafer. At least one opening penetrating the upper working surface is configured to direct a processing fluid into the processing space below the upper working surface for processing the upper surface of the semiconductor wafer.

[0013] The chamber further includes a discharge system having a conduit downstream of the processing space for guiding the processing fluid out of the processing space. As will be described in detail later, the conduit is configured to hold a portion of the processing fluid within the conduit and provide a pressure resistance to the processing fluid introduced into the processing space.

[0014] In some embodiments, at least one opening penetrating the lower working surface is disposed at the center of the bottom plate, and at least one opening penetrating the upper working surface is disposed at the center of the upper plate, in order to direct the processing fluid into the processing space near the center of the semiconductor wafer. In such embodiments, the pressure resistance provided by the portion of the processing fluid held within the conduit enables the processing fluid to flow over the upper and lower surfaces of the semiconductor wafer at a uniform fluid velocity from the center of the semiconductor wafer to the edge of the semiconductor wafer.

[0015] In some embodiments, at least one opening that penetrates the lower working surface and at least one opening that penetrates the upper working surface each comprise one or more nozzles coupled to supply a processing fluid into the processing space. For example, at least one opening that penetrates the lower working surface may comprise a first back surface nozzle at the center of the bottom plate and a second back surface nozzle disposed between the center of the bottom plate and the edge of the semiconductor wafer. Similarly, at least one opening that penetrates the upper working surface may comprise a first front surface nozzle at the center of the top plate and a second front surface nozzle disposed between the center of the top plate and the edge of the semiconductor wafer.

[0016] In some embodiments, the upper working surface and the lower working surface are substantially flat planar surfaces. In other embodiments, the upper working surface and the lower working surface are non-planar surfaces. The non-planar surfaces may be configured to make the fluid velocity of the processing fluid more uniform in the radial direction on the upper and lower surfaces of the semiconductor wafer as compared to substantially flat planar surfaces.

[0017] In some embodiments, the upper working surface and the lower working surface each comprise a non-wetting coating layer that provides a contact angle of substantially 90 degrees between the processing fluid and the upper and lower working surfaces. In some embodiments, the non-wetting coating layer may be used in conjunction with a discharge system to uniformly dry the semiconductor wafer surface.

[0018] In some embodiments, additional mechanisms may be added to the top plate and / or the bottom plate of the chamber. For example, an acoustic transducer, a heating element, or a sensor may be coupled to or incorporated into the top plate and / or the bottom plate of the chamber.

[0019] The chamber may further include an upper gap between the upper working surface and the upper surface of the semiconductor wafer, and a lower gap between the lower working surface and the lower surface of the semiconductor wafer. The upper gap and the lower gap may generally be in the range of about 0.01 mm to about 10.0 mm. In some embodiments, the processing system described herein may further include at least one lifting mechanism and a controller. The at least one lifting mechanism may be coupled to at least one of the upper plate and the bottom plate to adjust the vertical position of at least one of the upper plate and the bottom plate. The controller is coupled to the at least one lifting mechanism to adjust the vertical position of at least one of the upper plate and the bottom plate and to change at least one of the upper gap and the lower gap.

[0020] As described above, the discharge system includes, downstream of the processing space, a conduit for guiding the processing fluid out of the processing space. In some embodiments, the conduit may include a first portion coupled to the processing space and disposed below the lower working surface. The first portion of the conduit may be a U-shaped conduit configured to temporarily capture or hold a portion of the processing fluid and provide pressure resistance to the processing fluid introduced into the processing space.

[0021] In some embodiments, the conduit may further include a second portion disposed above the lower working surface and a third portion disposed below the lower working surface. The second portion of the conduit is coupled between the first portion of the conduit and the third portion of the conduit. The third portion of the conduit is coupled to the first portion of the conduit, the second portion of the conduit, and the outlet of the discharge system.

[0022] In some embodiments, the conduit may further include a first valve disposed between a first portion of the conduit and a second portion of the conduit, and a second valve disposed between the first portion of the conduit and a third portion of the conduit. When the first valve is open and the second valve is closed, the conduit is configured to direct the processing fluid out of the processing space and, in turn, through the first portion, the second portion, and the third portion of the conduit to the outlet of the discharge system. In other words, the second portion of the conduit is configured to increase the pressure resistance to the processing fluid introduced into the processing space when the first valve is open and the second valve is closed. On the other hand, when the first valve is closed and the second valve is open, the conduit is configured to direct the processing fluid out of the processing space and, in turn, through the first portion and the third portion of the conduit to the outlet of the discharge system.

[0023] According to another embodiment, a method for processing a semiconductor wafer is provided herein. In some embodiments, the method may include inserting a semiconductor wafer between a bottom plate having a portion defining a lower working surface of a sealed chamber and an upper plate having a portion defining an upper working surface within the processing space, and supporting the semiconductor wafer substantially parallel to the upper and lower working surfaces. The method may further include (a) injecting at least one type of processing fluid into the processing space through at least one opening in the upper plate, the bottom plate, or both the upper plate and the bottom plate; (b) pressing at least one type of processing fluid onto at least one surface of the semiconductor wafer; and (c) directing at least one type of processing fluid out of the processing space through a discharge system having a conduit downstream of the processing space, wherein the directing holds a portion of the at least one type of processing fluid within the conduit and provides pressure resistance to the at least one type of processing fluid injected into the processing space, thereby further including processing at least one surface of the semiconductor wafer.

[0024] In some embodiments, injecting at least one process fluid may include injecting a liquid into the processing space to process at least one surface of the semiconductor wafer. In such embodiments, guiding may include holding a portion of the liquid within the conduit to provide pressure resistance to the liquid injected into the processing space. By doing so, the pressure resistance may equalize the fluid velocity of the liquid radially at at least one surface of the semiconductor wafer.

[0025] In some embodiments, the method may include one or more additional steps before injecting the liquid into the processing space. For example, the method may further include injecting a low surface tension liquid into the processing space to pre-wet at least one surface of the semiconductor wafer, the upper working surface, and the lower working surface. The low surface tension liquid injected into the processing space then prevents the formation of bubbles on at least one surface of the semiconductor wafer when the liquid is subsequently injected into the processing space.

[0026] In some embodiments, injecting at least one process fluid may further include injecting a gas after injecting the liquid into the processing space to dry at least one surface of the semiconductor wafer. In such embodiments, guiding may include holding a portion of the liquid within the conduit to provide pressure resistance to the gas injected into the processing space. By doing so, the pressure resistance may uniformly dry at least one surface of the semiconductor wafer.

[0027] In some embodiments, the method may include one or more additional steps after injecting the liquid into the processing space. For example, the method may include (a) injecting a rinse liquid into the processing space to remove the liquid and rinse at least one surface of the semiconductor wafer, (b) injecting a liquid with low surface tension into the processing space to remove the rinse liquid from at least one surface of the semiconductor wafer, and (c) further processing at least one surface of the semiconductor wafer with a supercritical fluid. In some embodiments, the method may further include adjusting the vertical positions of the upper plate and the bottom plate to reduce the gap between the upper plate and the bottom plate and reduce the amount of the liquid with low surface tension on at least one surface of the semiconductor wafer before processing at least one surface of the semiconductor wafer with a supercritical fluid.

[0028] The present invention and its advantages can be more fully understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals indicate like features. However, it should be noted that the accompanying drawings only show a plurality of exemplary embodiments of the disclosed concept, and therefore, the disclosed concept may also include a plurality of other equally valid embodiments, and should not be regarded as limiting the scope of the present invention.

Brief Description of the Drawings

[0029]

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DETAILED DESCRIPTION OF THE INVENTION

[0030] The present disclosure provides improved processing systems and methods for wet and dry processing of semiconductor wafers. The processing systems and methods disclosed herein provide various advantages compared to conventional systems and methods for processing semiconductor wafers. For example, the disclosed processing systems and methods provide a sealed chamber for wet and dry processing of semiconductor wafers. The sealed chamber includes an upper plate and a bottom plate that physically confine the processing fluid within a relatively small sealed processing space (PS). This allows the processing fluid to be forced to flow radially across the wafer surface without the need to rotate the wafer, resulting in a more compact chamber design. The upper and bottom plates of the sealed chamber also (a) reduce the amount of processing fluid required to execute the process, (b) isolate the wafer from the environment, and (c) enable the use of additional mechanisms and functions (e.g., acoustic transducers, heating elements, additional nozzles, and / or sensors).

[0031] In addition to the sealed chamber, the disclosed processing system and method provide an exhaust system that improves the wet and dry processing of semiconductor wafers. The exhaust system includes a conduit that is disposed downstream of the processing space and is configured to temporarily capture or hold at least a portion of the processing fluid supplied within the processing space and conducted through the conduit. The portion of the processing fluid held within the conduit provides a pressure resistance to the processing fluid supplied within the processing space. This pressure resistance improves wet processing by making the fluid flow rate of the processing fluid spreading radially across the wafer surface more uniform. During dry processing, the pressure resistance provided by the processing fluid captured within the conduit makes the radial removal of the processing fluid from the wafer surface more uniform.

[0032] FIG. 1A schematically shows a single-wafer processing system 100 for wet and dry processing of a semiconductor wafer according to one embodiment of the present disclosure. The processing system 100 shown in FIG. 1A includes a chamber 105 in which a semiconductor wafer (W) is processed. The chamber 105 includes a bottom plate 110 having a portion that defines a lower working surface 120 inside the chamber 105, and an upper plate 115 having a portion that defines an upper working surface 125 inside the chamber 105. The upper working surface 125 inside the chamber 105 is spaced above the lower working surface 120 and separated by a gap (g). A processing space (PS) is formed between the upper working surface 125 and the lower working surface 120 of the chamber 105.

[0033] Chamber 105 further comprises means for supporting the semiconductor wafer (W) in the processing space (PS). In some embodiments, the means for supporting the wafer may comprise a plurality of pins 123 that extend into the processing space through the bottom plate 110 and support the wafer from the bottom, as shown in FIG. 1A. In one example, the wafer may be supported by at least three circumferentially spaced pins 123 that protrude from the bottom plate 110 and extend above the lower working surface 120. In other embodiments, as shown in FIG. 1D, a plurality of pins 123 may support the wafer by contacting the edge of the wafer. Whichever embodiment is utilized, a plurality of pins 123 that support the wafer from the bottom may prevent sagging of the wafer and, thus, the formation of a non-uniform gap between the upper / lower working surfaces of the chamber 105 and the upper / lower surfaces of the wafer.

[0034] When the semiconductor wafer (W) to be processed is inserted and placed in the processing space (PS), an upper gap (g U ) exists between the upper working surface 125 of the chamber 105 and the upper surface of the wafer, and a lower gap (g L ) exists between the lower working surface 120 of the chamber 105 and the lower surface of the wafer. Generally, it is desirable for the upper gap (g U ) and the lower gap (g L ) to be substantially equal to maintain a similar distance (or uniform gap) between the upper working surface 125 and the upper surface of the wafer (W) and between the lower working surface 120 and the lower surface of the wafer (W). The upper gap (g U ) and the lower gap (g L ) can range from about 0.01 mm to about 10.0 mm.

[0035] In some embodiments, the upper gap (g U ) and the lower gap (g L ) can be adjusted before or during the process to increase the gap (g) between the upper working surface 125 and the lower working surface 120, and thus increase the internal volume of the processing space (PS), as shown in FIG. 1B. In other embodiments, the upper gap (g U ) and the lower gap (g L) can be adjusted before or during the process to reduce the gap (g) between the upper working surface 125 and the lower working surface 120, and thus reduce the internal volume of the processing space (PS), as shown in FIG. 1C.

[0036] As shown in FIG. 1A, the bottom plate 110 may have at least one opening 130 that penetrates the lower working surface 120 of the chamber 105. When processing a semiconductor wafer (W) placed in the processing space (PS), at least one opening 130 that penetrates the lower working surface 120 can be in fluid flow communication with at least one type of processing fluid (e.g., liquid and / or gas), and can be configured to direct at least one type of processing fluid into the processing space (PS) above the lower working surface 120 to process the lower surface of the semiconductor wafer (W).

[0037] In some embodiments, at least one opening 130 that penetrates the lower working surface 120 may include one or more backside nozzles for supplying a processing fluid into the processing space (PS) above the lower working surface 120. In one embodiment, at least one opening 130 may include a backside nozzle at the center of the bottom plate 110 to supply a processing fluid into the processing space (PS) near the center of the semiconductor wafer (W), as shown in FIG. 1A. In some embodiments, at least one opening 130 may optionally include one or more auxiliary backside nozzles disposed between the center of the bottom plate 110 and the edge of the wafer to supply a processing fluid (or a different processing fluid) onto other areas of the wafer. Regardless of the number of backside nozzles utilized, the processing fluid supplied from the backside nozzles is directed onto the lower surface of the semiconductor wafer (W) and then flows radially towards the edge of the wafer. According to one embodiment, the backside nozzle may be coupled to a controller (such as controller 160) configured to select a first processing fluid (e.g., liquid or gas) introduced into the processing space.

[0038] The upper plate 115 may also have at least one opening 135 that penetrates the upper working surface 125 of the chamber 105. When processing a semiconductor wafer (W) placed in the processing space (PS), at least one opening 135 that penetrates the upper working surface 125 can be in fluid flow communication with at least one type of processing fluid (e.g., liquid and / or gas), and can be configured to direct at least one type of processing fluid into the processing space (PS) below the upper working surface 125 to process the upper surface of the semiconductor wafer (W).

[0039] In some embodiments, at least one opening 135 that penetrates the upper working surface 125 can include one or more surface nozzles for supplying a processing fluid into the processing space (PS) below the upper working surface 125. In one embodiment, as shown in FIG. 1A, at least one opening 135 can include a surface nozzle at the center of the upper plate 115 for supplying a processing fluid into the processing space (PS) near the center of the semiconductor wafer (W). Optionally, at least one opening 135 can include one or more auxiliary surface nozzles disposed between the center of the upper plate 115 and the edge of the wafer for supplying a processing fluid (or a different processing fluid) onto other areas of the wafer. Regardless of the number of surface nozzles utilized, the processing fluid supplied from the surface nozzles is directed onto the upper surface of the semiconductor wafer (W) and then flows radially towards the edge of the wafer. Similar to the backside nozzles, the surface nozzles can be coupled to a controller (such as controller 160) configured to select a second processing fluid (e.g., liquid or gas) introduced into the processing space.

[0040] According to one embodiment, the processing system 100 shown in FIG. 1A may be configured to wet process a semiconductor wafer (W) in a processing space (PS). The wet process may include introducing a first liquid into the processing space through at least one opening 130 in the lower working surface 120, introducing a second liquid into the processing space through at least one opening 135 in the upper working surface 125, or both. The first liquid and the second liquid may be the same liquid or different liquids. In one example, the wet process is a cleaning process that removes residues and contaminants from the upper surface of the wafer, the lower surface of the wafer, or both.

[0041] According to one embodiment, the processing system 100 shown in FIG. 1A may be configured to dry process a semiconductor wafer (W) in a processing space (PS). The dry process may include introducing a first gas into the processing space through at least one opening 130 in the lower working surface 120, introducing a second gas into the processing space through at least one opening 135 in the upper working surface 125, or both. The first gas and the second gas may be the same gas or different gases. In one example, the dry process is a drying process that dries the liquid from the upper surface of the wafer, the lower surface of the wafer, or both.

[0042] According to one embodiment, the processing system 100 shown in FIG. 1A may be configured to wet process a semiconductor wafer (W) in a processing space (PS) and then dry process it. In one example, the wet process may be a cleaning process that removes residues and contaminants from the upper surface of the wafer, the lower surface of the wafer, or both by injecting one or more liquids onto the wafer surface. The dry process may be a drying process that dries the upper surface of the wafer, the lower surface of the wafer, or both and removes the liquid from the wafer surface by injecting one or more gases onto the wafer surface.

[0043] According to one embodiment, the semiconductor wafer (W) is not rotated during wet or dry processing. According to another embodiment, the processing system 100 includes means (not shown) for rotating the wafer, and the wafer is rotated during wet processing, dry processing, or both wet and dry processing.

[0044] In some embodiments, at least one opening 130 that penetrates the upper working surface 125 of the chamber 105 and at least one opening 135 that penetrates the lower working surface 120 of the chamber 105 can be in fluid flow communication with one or more liquids 140 and / or one or more gases 150 via one or more supply lines and valves 145 / 155, as further shown in FIG. 1A. In some embodiments, the processing system 100 can include a controller 160 coupled to the liquid and gas supply valves 145 / 155 to selectively provide one or more liquids 140 and / or one or more gases 150 to a processing space (PS) defined within the chamber 105. Depending on the process or process steps being performed within the chamber 105, a wide variety of liquids and gases can be selectively provided to the processing space (PS).

[0045] For example, during a cleaning process, the controller 160 can supply control signals to the liquid and gas supply valves 145 / 155 to selectively supply a cleaning liquid and / or a rinsing liquid to the processing space (PS) to clean and / or rinse at least one surface of the semiconductor wafer (W). Examples of cleaning liquids include, but are not limited to, ammonia / peroxide mixtures (APM), hydrochloric acid / peroxide mixtures (HPM), and sulfuric acid peroxide mixtures (SPM). Examples of rinsing liquids include, but are not limited to, deionized (DI) water and isopropyl alcohol (IPA). Other cleaning liquids and rinsing liquids may be utilized. After cleaning and / or rinsing the wafer surface, the controller 160 can supply control signals to the liquid and gas supply valves 145 / 155 to selectively supply a gas (such as, but not limited to, air or nitrogen) to the processing space (PS) to remove any remaining liquid from the wafer surface, thereby drying the wafer surface.

[0046] In some embodiments, before the cleaning process is executed, the controller 160 supplies a control signal for selectively supplying a liquid with low surface tension (such as IPA) to the processing space (PS) to the liquid and gas supply valves 145 / 155, so as to pre-wet the wafer surface, as well as the upper working surface 125 and the lower working surface 120 of the chamber 105. As will be described in detail later, pre-wetting can, in some embodiments, improve the flow of fluid on the wafer surface and can be utilized to prevent the formation of bubbles on the wafer surface when a liquid (e.g., a cleaning liquid) is subsequently supplied into the processing space.

[0047] In some embodiments, the controller 160 (or another controller included in the processing system 100) may be configured to adjust the vertical position of the upper plate 115, the vertical position of the bottom plate 110, and / or the gap (g) between the upper plate and the bottom plate. In the embodiment shown in FIG. 1A, the controller 160 is coupled to supply control signals to the lifting mechanism 170 coupled to the bottom plate 110 and the lifting mechanism 175 coupled to the upper plate 115. The arrangement and configuration of the lifting mechanisms 170 / 175 are exemplary and are provided herein for illustrative purposes only.

[0048] The control signal supplied from the controller 160 to the lifting mechanisms 170 / 175 can be used to adjust the vertical position of the upper plate 115 and / or the vertical position of the bottom plate 110. In some embodiments, for example, the controller 160 can supply a control signal to the lifting mechanism 175 to raise the upper plate 115 so that the semiconductor wafer (W) can be inserted into the processing space (PS), as shown, for example, in FIG. 7A. In other embodiments, the controller 160 adjusts the upper gap (g U ) between the upper working surface 125 of the chamber 105 and the upper surface of the wafer (W), and / or the lower gap (g LA control signal for adjusting [[ID=]] can be supplied to the elevating mechanisms 170 / 175. It should be recognized that the controller 160 and the elevating mechanisms 170 / 175 merely represent one means for adjusting the vertical position of the upper plate 115, the vertical position of the bottom plate 110, and / or the gap (g) between the upper plate and the bottom plate. Other means for adjustment may be used.

[0049] Upper gap (g U ) and lower gap (g L ) can be adjusted according to various purposes. In some embodiments, as shown in FIG. 1C, the upper gap (g U ) and the lower gap (g L ) are decreased to decrease the internal volume of the processing space (PS), increase the fluid velocity of the processing fluid spreading radially on the wafer surface, and / or decrease the amount of processing fluid required to perform a specific process or process step. On the other hand, as shown in FIG. 1B, the upper gap (g U ) and the lower gap (g L ) are increased to increase the internal volume of the processing space (PS), decrease the fluid velocity of the processing fluid spreading radially on the wafer surface, and / or increase the amount of processing fluid required to perform a specific process or process step. In some embodiments, the upper gap (g U ) and the lower gap (g L ) can be adjusted together or independently for different processes (e.g., different cleaning processes) or different steps within the same process (e.g., a cleaning step and a rinsing step).

[0050] In some embodiments, an additional mechanism 180 may be added to the upper plate 115 and / or the bottom plate 110 of the chamber 105. For example, an acoustic transducer may be added to the upper plate 115 and / or the bottom plate 110 to enhance a wet (e.g., cleaning) process. The acoustic transducer can be embedded either throughout the upper / bottom plate or only in a portion of the upper / bottom plate. In another example, the upper plate 115 and / or the bottom plate 110 may comprise a heating element for heating a liquid / gas supplied onto the wafer surface. Alternatively, additional nozzles for injecting vapor into the processing space to heat the liquid / gas supplied onto the wafer surface may be embedded within the upper plate 115 and / or the bottom plate 110. In yet another example, the upper plate 115 and / or the bottom plate 110 may comprise one or more sensors used for inspecting the wafer and / or the liquid supplied onto the wafer surface. For example, a conductivity meter may be added to the upper / bottom plate to monitor the liquid supplied onto the wafer surface.

[0051] FIG. 1D shows an alternative embodiment of the processing system 100 in which an additional mechanism 180 is coupled to the upper plate 115 and / or the bottom plate 110 of the chamber 105. The additional mechanism 180 (e.g., an acoustic transducer, a heating element, an additional nozzle, and / or a sensor) may be provided anywhere within the upper plate 115 and / or the bottom plate 110 and is not limited to the exemplary arrangement shown in FIG. 1D.

[0052] The processing system 100 shown in FIGS. 1A-1D provides several advantages compared to conventional process chambers used for wet / dry processing of semiconductor wafers. For example, unlike a conventional spin chamber, the upper plate 115 and the bottom plate 110 each define an upper working surface 125 and a lower working surface 120 of the sealed chamber 105. During wet / dry processing, the upper plate 115 and the bottom plate 110 physically confine the processing fluid used to process the semiconductor wafer (W) within a relatively small, sealed processing space (PS). This provides several advantages not achievable with conventional spin chambers.

[0053] For example, the upper plate 115 and the bottom plate 110 physically confine the processing fluid supplied on the wafer surface, and by preventing the supplied processing fluid from escaping, reduce the amount of processing fluid required to perform a specific process or process step (compared to a conventional process chamber that does not utilize the upper and bottom plates). As will be described in detail later in connection with FIGS. 7C and 7D, the processing fluid supplied on the wafer surface fills a sealed processing space (PS) defined between the upper working surface 125 and the lower working surface 120 of the chamber 105. This eliminates the need to supply additional liquid on the wafer surface, thereby further conserving fluid during the paddle process. In addition to fluid conservation, the upper plate 115 and the bottom plate 110 isolate the wafer from the environment, minimizing the impact on the wafer from the environment (e.g., oxygen or defects due to exposure to ambient air, splashing of liquid from the drain cup, etc.).

[0054] The relatively small sealed processing space (PS) defined between the upper working surface 125 and the lower working surface 120 of the chamber 105 forces the processing fluid to flow radially on the wafer surface without the need to rotate the wafer. As a result, compared to a conventional spin chamber, the need for a spin chuck and a motor is eliminated, resulting in a more compact chamber design.

[0055] In some embodiments, as shown in FIGS. 1A - 1D, the upper working surface 125 and the lower working surface 120 of the chamber 105 can be substantially flat planar surfaces. When implemented with substantially flat planar working surfaces, the upper gap (g U ) and the lower gap (g L ) can be substantially equal across the entire wafer surface.

[0056] In other embodiments, the upper working surface 125 and the lower working surface 120 of the chamber 105 can be implemented with substantially non - flat, rather a wide variety of non - planar surfaces. In some embodiments, non - planar working surfaces are utilized to make the fluid velocity of the processing fluid more uniform radially on the wafer surface. Examples of non - planar working surfaces are schematically shown in FIGS. 2A - 2D.

[0057] In some embodiments, as shown in FIG. 2A, the upper working surface 125 and the lower working surface 120 of the chamber 105 may have an inverted V-shaped configuration. Due to the inverted V-shaped configuration, from the center of the wafer towards the edge of the wafer, the upper gap (g U ) and the lower gap (g L ) are steadily decreased radially, so that the fluid velocity of the processing fluid can be made uniform radially on the upper and lower surfaces of the semiconductor wafer (W). A similar effect can also be achieved, for example, as shown in FIG. 2B, by providing curved surfaces on the upper working surface 125 and the lower working surface 120 of the chamber 105. Similar to the inverted V-shaped configuration, the curved surfaces shown in FIG. 2B steadily decrease the upper gap (g U ) and the lower gap (g L ) radially from the center of the wafer towards the edge of the wafer.

[0058] In other embodiments, ribs or grooves may be formed on the upper working surface 125 and the lower working surface 120 of the chamber 105. For example, the upper working surface 125 and the lower working surface 120 may each be implemented with a plurality of radial or circumferential ribs 127 extending from the working surface, as shown in FIG. 2C. As shown in FIG. 2D, the plurality of ribs 127 are formed concentrically about the central axis of the upper working surface 125 and the lower working surface 120. A plurality of recesses 129 are formed between the plurality of ribs 127, with each recess 129 formed between two adjacent ribs 127. In the examples shown in FIGS. 2C-2D, five ribs are shown for illustrative purposes, but the upper working surface 125 and the lower working surface 120 of the chamber 105 may include more or fewer ribs.

[0059] The plurality of radial or circumferential ribs 127 and recesses 129 shown in FIGS. 2C to 2D can be utilized in some embodiments to radially equalize the fluid velocity of the processing fluid on the upper and lower surfaces of the semiconductor wafer (W) by acting as a fluid buffer. When a processing fluid (e.g., a cleaning liquid, a rinsing liquid, or another liquid) is supplied into the processing space (PS) and onto the wafer surface, the supplied fluid first fills the innermost recess 129a and then spreads radially outward on the wafer surface to each adjacent recess 129. In this way, the processing fluid spreads radially stepwise on the wafer surface, and the fluid velocity within each step is substantially equal.

[0060] The processing system 100 shown in FIGS. 1A to 1D further includes a discharge system 190 for guiding the processing fluid out of the chamber 105. According to one embodiment, the discharge system 190 includes a conduit 195 that is in fluid communication with the processing space (PS) and is downstream of the processing space (PS). The conduit 195 is generally configured to temporarily capture or hold at least a portion of the processing fluid supplied into the processing space during wet / dry processing. The portion of the processing fluid held within the conduit 195 provides a pressure resistance against the processing fluid supplied within the processing space during wet and dry processing steps.

[0061] For example, during wet processing, a liquid may be supplied into the processing space above and / or below the semiconductor wafer (W) to process the upper and / or lower surface of the wafer. The liquid spreads radially on the wafer surface and overflows into the conduit 195. The conduit 195 includes a first portion 192 that is coupled to the processing space (PS) and is disposed below the lower working surface 120 of the chamber 105. At least a portion of the liquid can be held at least temporarily within the first portion 192 of the conduit 195. The held portion of the liquid provides a pressure resistance against the processing fluid supplied within the processing space.

[0062] According to one embodiment, the first portion 192 of the conduit 195 is implemented in a U-shape as shown in FIGS. 1A - 1D. The bottom of the U-shaped conduit is disposed below the lower working surface 120 of the chamber 105. In conjunction with the shape of the conduit, this arrangement enables the U-shaped conduit to temporarily capture or hold a portion of the liquid overflowing from the processing space. The liquid temporarily captured within the U-shaped conduit separates the atmosphere within the processing space from the atmosphere downstream of the U-shaped conduit. If there is additional liquid entering the U-shaped conduit from the processing space, it will replace the liquid already within the U-shaped conduit.

[0063] The inventors have noticed that the U-shaped conduit in the discharge system 190 offers more advantages than other conduit designs. One of the advantages is due to the fact that the U-shaped conduit captures liquid from the processing space and seals the atmosphere within the processing space from the atmosphere downstream of the U-shaped conduit. This provides advantages in both wet and dry processing.

[0064] During wet processing, the liquid within the U-shaped conduit of the discharge system 190 provides pressure resistance against the liquid introduced above and / or below the wafer within the processing space. Due to the pressure resistance, the liquid supplied into the processing space can completely fill the processing space, and as a result, the liquid can flow smoothly and uniformly across the wafer surface from the center of the wafer to the edge of the wafer. The uniform fluid flow of the liquid across the wafer surface makes the processing of the wafer more efficient and uniform.

[0065] Similarly, during dry processing, the liquid within the U-shaped conduit of the discharge system 190 provides pressure resistance against the gas introduced above and / or below the wafer within the processing space. Due to the pressure resistance provided by the liquid held within the U-shaped conduit, the gas pressure within the processing space increases, and as a result, the gas can flow smoothly and uniformly across the wafer surface from the center of the wafer to the edge of the wafer.

[0066] Figures 3A and 3B illustrate problems that occur during wet processing in a conventional processing system without the discharge system 190 illustrated and described herein. When liquid (L) is supplied onto the surface of semiconductor wafer (W) from a central opening or nozzle, the liquid spreads laterally across the wafer surface from the center of the wafer to the edge of the wafer. However, in the absence of the pressure resistance provided by the discharge system 190, the liquid can spread radially across the wafer surface at non-uniform fluid velocities, as shown in FIG. 3A. In some cases, non-uniform fluid velocities can cause the formation of air bubbles on the wafer surface, as shown in FIG. 3B.

[0067] Figure 3C illustrates the improved wettability of the wafer surface using the techniques described herein. Due to the pressure resistance provided by the liquid temporarily trapped or held within the U-shaped conduit of the discharge system 190, the liquid can spread radially across the wafer surface at a uniform fluid velocity. In some embodiments, the fluid velocity of the liquid can be further improved by providing the chamber 105 with non-planar upper / lower working surfaces, as shown, for example, in FIGS. 2A-2D. In other embodiments, the uniform fluid velocity of the liquid can be improved by pre-wetting the wafer surface and the upper / lower working surfaces of the chamber 105 with a low surface tension liquid (such as IPA), as will be described in more detail later. In combination with the discharge system 190, the use of non-planar working surfaces, pre-wetting, and / or both can improve the wettability of the wafer surface and make the fluid velocity of the liquid on the wafer surface uniform.

[0068] In one example, after wet processing, a liquid film is present on the surface of the wafer. During dry processing, the liquid film needs to be removed uniformly from the center of the wafer to the edge of the wafer. However, during dry processing, problems often occur when gas is injected onto the wafer surface in a conventional processing system without the discharge system 190 illustrated and described herein.

[0069] Figure 4A shows one problem that occurs when gas (G) is injected onto the surface of semiconductor wafer (W) to remove processing liquid (L) from the wafer surface in a conventional processing system without an exhaust system 190. In the absence of the pressure resistance provided by the exhaust system 190, non-uniform removal of the liquid film of liquid (L) is observed, and as a result, in some areas the liquid film is completely removed radially, while in other parts it is not removed. This is schematically shown in Figure 4A. When gas (e.g., air or nitrogen, N2) can completely remove the liquid film radially in an area (e.g., area A), the gas escapes and stops pushing the liquid film in other areas, resulting in non-uniform drying of the wafer surface.

[0070] Figure 4B shows another problem that occurs when gas (G) is injected onto the surface of semiconductor wafer (W) to remove processing liquid (L) from the wafer surface in a processing system without an exhaust system 190. When the liquid contacts the surface, depending on the properties of the liquid and the surface, the liquid may spread along the surface (i.e., wet the surface) or form beads on the surface. The angle at which the liquid contacts the surface is called the "contact angle". The contact angle is a measure of the ability of the liquid to spread along the surface of a solid or "wet" the surface. When the contact angle is less than 90°, due to the low surface tension between the liquid and the surface, the liquid can spread on the surface. In this case, the surface is described as hydrophilic (in the case of water) or having good wettability. When the contact angle is greater than 90°, due to the high surface tension between the liquid and the surface, the liquid forms beads on the surface. In this case, the surface is described as hydrophobic (in the case of water) or non-wettable.

[0071] In dry processing, problems can occur if there is a contact angle that is substantially greater than 90° or substantially less than 90° between the processing liquid (L) and the upper and / or lower working surfaces of the chamber. For example, the inventors have recognized that when gas (G) is injected into the chamber to remove the processing liquid (L) from the wafer surface, non-uniform drying occurs when the contact angle between the processing liquid (L) and the upper and / or lower working surfaces of the processing chamber is substantially less than 90° or greater than 90°. Specifically, as shown in FIG. 4B, fingering of the processing liquid (L) was observed at an angle substantially less than 90°.

[0072] FIG. 4C shows the drying of the wafer surface improved using the techniques described herein. In some embodiments, the pressure resistance provided by the liquid temporarily trapped or held within the U-shaped conduit of the drain system 190 can solve the problems shown in FIGS. 4A and 4B and enable uniform radial removal of the liquid thin film across the wafer. In some embodiments, a non-wetting coating layer can be provided on the upper / lower working surface of the chamber 105 to provide a contact angle of substantially 90° between the processing liquid (L) and the upper / lower working surface of the chamber 105. In some embodiments, the non-wetting coating layer can be used with the U-shaped conduit of the drain system 190, as shown in FIG. 4C, to dry the wafer surface uniformly.

[0073] The non-wetting coating layer preferably provides a contact angle of substantially 90° between the processing liquid (L) and the upper / lower working surface of the chamber 105. Since the contact angle depends on the specific processing liquid supplied into the chamber 105 and the coating material applied to the upper / lower working surface of the chamber 105, a wide variety of coating materials can be utilized. In some embodiments, the non-wetting coating layer can be made of a Teflon-type material, a hydrophobic material, or a variety of other non-wetting materials compatible with semiconductor processing.

[0074] FIG. 5 shows a chamber 105 design similar to that shown in FIG. 1A, but with an alternative exhaust system 190. In some embodiments, a substantially high pressure resistance may be required during the drying process to completely remove the processing liquid from the wafer surface and uniformly dry the wafer. FIG. 5 shows an alternative exhaust system 190 that meets this need.

[0075] Similar to the embodiments described above, the exhaust system 190 shown in FIG. 5 includes a conduit 195 having a first portion 192 coupled to the processing space (PS) and disposed below the lower working surface 120 of the chamber 105. The first portion 192 of the conduit 195 can be a substantially U-shaped conduit, as illustrated and described above. The conduit 195 shown in FIG. 5 includes, in addition to the first portion 192, a second portion 194 and a third portion 196. The second portion 194 of the conduit 195 is coupled between the first portion 192 and the third portion 196 of the conduit 195 and is disposed above the lower working surface 120 of the chamber 105. The third portion 196 of the conduit 195 is coupled to the first portion 192 of the conduit 195, the second portion 194 of the conduit 195, and the outlet 198 of the exhaust system 190. The third portion 196 of the conduit 195 is disposed below the lower working surface 120 of the chamber 105. The conduit 195 shown in FIG. 5 further includes a first valve 193 disposed between the first portion 192 and the second portion 194 of the conduit 195 and a second valve 197 disposed between the first portion 192 and the third portion 196 of the conduit 195.

[0076] When a processing fluid (e.g., a cleaning liquid or a rinsing liquid) is supplied into the processing space (PS) during a wet process, the first valve 193 can be closed and the second valve 197 can be opened so as to guide the processing fluid out of the processing space and then, in sequence, through the first portion 192 and the third portion 196 of the conduit 195 to the outlet 198 of the discharge system 190. When a gas (e.g., air or nitrogen) is supplied into the processing space (PS) during a subsequent dry process, the first valve 193 can be opened and the second valve 197 can be closed so as to guide the remaining processing fluid out of the processing space and then, in sequence, through the first portion 192, the second portion 194, and the third portion 196 of the conduit 195 to the outlet 198 of the discharge system 190. By opening the first valve 193 and closing the second valve 197, the processing fluid is guided through the second portion 194 of the conduit 195 disposed above the lower working surface 120 of the chamber 105. Thereby, the processing fluid is forced to flow upward into the second portion 194 of the conduit 195, increasing the pressure resistance to the processing fluid and ensuring that the processing liquid must overcome a higher back pressure to exit the discharge system 190. Increasing the back pressure helps to dry the wafer surface more uniformly. After the wafer surface is dried, the first valve 193 and the second valve 197 are each opened so that, if there is any liquid remaining in the conduit 195, it can be discharged through the outlet 198 by gravity.

[0077] Within the embodiments of the processing system 100 and the chamber 105 shown in FIGS. 1A - 1D, FIGS. 2A - 2D, and FIG. 5, a wide variety of wet and / or dry processes can be performed. For example, a cleaning process can be performed within the processing system 100 and the chamber 105 illustrated and described herein to clean one or more surfaces of a semiconductor wafer and / or to remove contaminants or residues therefrom. Exemplary cleaning processes are described below. However, it should be recognized that the processing system 100 and the chamber 105 illustrated and described herein are not limited to cleaning processes and may be utilized to perform other wet and dry processes.

[0078] Exemplary Cleaning Process The wafer processing in the processing system 100 and the chamber 105 shown in FIGS. 1A-1D, FIGS. 2A-2D, and FIG. 5 may include a wet process followed by a dry process to clean one or more surfaces of a semiconductor wafer. In some embodiments, the wet process may include 1) pre-wetting the wafer and the inner surface of the chamber with isopropyl alcohol (IPA). The wet process may further include 2) treating the wafer with a chemical liquid to clean the wafer surface and 3) treating the wafer with deionized (DI) water to remove the chemical liquid from the wafer and rinse the wafer surface. In one example, the chemical liquid removes chemical contaminants and particulate impurities from the wafer surface that are derived from a previous wafer process. Thereafter, the dry process includes 3) rinsing the wafer with IPA to remove DI water from the wafer surface and 4) drying the wafer using air or nitrogen (N2). IPA has a low surface tension, enabling efficient drying of the wafer. In some embodiments, the drying process may further include treating the wafer with a supercritical fluid after rinsing the wafer with IPA and before drying the wafer with air or nitrogen.

[0079] FIGS. 6 and 7A-7D illustrate an embodiment of a processing system 100 and a method 600 that utilize the techniques described herein to process a semiconductor wafer. The processing system 100 shown in FIGS. 7A-7D is illustrated in FIGS. 1A-1D, FIGS. 2A-2D, and FIG. 5 and may utilize any of the embodiments described above. It will be recognized that the embodiments shown in FIGS. 6 and 7A-7D are merely exemplary and that additional methods may utilize the techniques described herein. Further, since the steps described are not intended to be exclusive, additional processing steps may be added to the methods shown in FIGS. 6 and 7A-7D. Moreover, the order of the steps is not limited to the order shown in the drawings since different orders may occur and / or various steps may be combined or even performed simultaneously.

[0080] The method 600 shown in FIG. 6 is initiated by inserting a semiconductor wafer between a bottom plate having a portion that defines a lower working surface of a sealed chamber and an upper plate having a portion that defines an upper working surface within a processing space (at step 610). Next, the method 600 includes (at step 620) supporting the semiconductor wafer substantially parallel to the upper and lower working surfaces of the sealed chamber.

[0081] FIGS. 7A and 7B show one way in which a semiconductor wafer (W) can be inserted into a processing space (PS) (at step 610) and supported substantially parallel to the upper and lower working surfaces of a sealed chamber 105 (at step 620). In the exemplary embodiment shown in FIG. 7A, a control signal for raising the upper plate 115 is supplied to the lift mechanism 175 to insert the semiconductor wafer (W) into the processing space (PS) formed between the bottom plate 110 and the upper plate 115 of the chamber 105. Once inserted, the semiconductor wafer (W) is supported substantially parallel to the upper working surface 125 and the lower working surface 120 of the chamber 105. In the exemplary embodiment shown in FIG. 7B, the semiconductor wafer (W) is supported on a plurality of pins 123 that extend from the lower working surface 120 of the sealed chamber 105 and support the wafer from the bottom. In other embodiments, the wafer can be supported by a plurality of pins 123 that contact the edge of the wafer (at step 620), as shown in FIG. 1D.

[0082] After the semiconductor wafer (W) is inserted into the processing space (PS) and placed on the plurality of pins 123, a control signal for lowering the upper plate 115 and sealing the chamber 105 can be supplied to the lift mechanism 175. In some embodiments, additional control signals for adjusting an upper gap (g U ) between the upper working surface 125 of the chamber 105 and the upper surface of the wafer, and a lower gap (g L ) between the lower working surface 120 of the chamber 105 and the lower surface of the wafer can be supplied to the lift mechanisms 170 / 175.

[0083] The method 600 shown in FIG. 6 further includes treating at least one surface of a semiconductor wafer by: (a) injecting at least one treatment fluid into a processing space through at least one opening in the upper plate, bottom plate, or both the upper and bottom plates of a sealed chamber (at step 630); (b) pressing at least one treatment fluid onto at least one surface of the semiconductor wafer (at step 640); and (c) conducting at least one treatment fluid from the processing space through a discharge system having a conduit downstream of the processing space (at step 650). The treatment fluid is conducted through the conduit as illustrated and described herein. Thus, the conducting can hold a portion of at least one treatment fluid within the conduit and provide pressure resistance to at least one treatment liquid injected into the processing space.

[0084] FIGS. 7C and 7D show various ways in which at least one surface of a semiconductor wafer can be treated using wet and dry processes. In the exemplary embodiment shown in FIG. 7C, the top and bottom surfaces of the semiconductor wafer (W) are treated by injecting a liquid (L) into the upper / lower processing space (PS) above / below the wafer (at step 630). In some embodiments, a control signal for selectively providing the liquid (L) within the processing space (PS) can be supplied from the controller 160 to the liquid and gas supply valves 145 / 155. In one embodiment, the liquid (L) injected into the processing space (at step 630) can be a cleaning liquid and / or a rinsing liquid used for cleaning and / or rinsing at least one surface of the semiconductor wafer (W) as described above. However, other liquids can also be injected into the processing space (at step 630).

[0085] In some embodiments, additional processing steps (not shown in FIG. 6) may be performed before injecting the liquid (L) into the processing space (in step 630). For example, method 600 may further include injecting a low surface tension liquid (e.g., IPA) into the processing space to pre-wet the wafer surface, the upper working surface 125 of chamber 105, and the lower working surface 120. The low surface tension liquid injected into the processing space may prevent the formation of bubbles on the wafer surface when the liquid is subsequently injected into the processing space (in step 630).

[0086] In the embodiment shown in FIG. 7C, the liquid (L) injected into the processing space (PS) is pushed onto the upper and lower surfaces of the semiconductor wafer (in step 640) and spreads radially across the wafer surface from the center of the wafer to the edge of the wafer (when a central nozzle is used). Next, the liquid (L) is guided through conduit 195 downstream of the processing space (in step 650). As shown in FIG. 7A, guiding the liquid through conduit 195 can hold a portion of the liquid within conduit 195 and provide pressure resistance to the liquid injected into the processing space. This pressure resistance improves the wettability of the wafer surface by making the radial fluid velocity of the liquid uniform across the upper and lower surfaces of the wafer.

[0087] In the exemplary embodiment shown in FIG. 7D, the upper and lower surfaces of the semiconductor wafer (W) are processed by injecting a gas (G) into the processing space (PS) above / below the wafer (in step 630). After injecting the liquid (L) into the processing space, the gas (G) is injected to remove the liquid from the upper and lower surfaces of the wafer and dry the wafer surface. In some embodiments, a control signal for selectively providing the gas (G) within the processing space (PS) may be supplied from the controller 160 to the liquid and gas supply valves 145 / 155. In one embodiment, air, nitrogen, or other inert gas may be injected into the processing space (in step 630) to dry the wafer surface.

[0088] In the embodiment shown in FIG. 7D, the gas (G) injected into the processing space (PS) is pushed onto the upper and lower surfaces of the semiconductor wafer (in step 640) and spreads radially across the wafer surface from the center of the wafer to the edge of the wafer (when a central nozzle is used). The portion of the liquid (L) held within conduit 195 provides a pressure resistance to the gas (G) injected into the processing space by filling at least a portion of conduit 195. The liquid-filled portion of conduit 195 seals the atmosphere in the processing space from the atmosphere downstream of the liquid-filled portion of conduit 195. This increases the gas pressure within the processing space, and as a result, the gas can flow smoothly and uniformly across the wafer surface from the center of the wafer to the edge of the wafer. This improves the drying of the wafer surface by making the radial removal of the liquid (L) from the wafer surface more uniform.

[0089] In some embodiments, conduit 195 is as shown in the embodiment of FIG. 5 and may include a first portion 192, a second portion 194, a third portion 196, a first valve 193, and a second valve 197 as discussed above. In such an embodiment, method 600 shown in FIG. 6 may further include controlling the positions of first valve 193 and second valve 197 during one or more processing steps to direct at least one processing fluid through drain system 190 (in step 640).

[0090] In a first processing step, for example, method 600 may include: (a) injecting a liquid (L) into the processing space (PS) to clean or rinse at least one surface of the semiconductor wafer; (b) closing first valve 193 and opening second valve 197 to direct the liquid out of the processing space through first portion 192 and third portion 196 of conduit 195 to outlet 198 of drain system 190; and (c) holding a portion of the liquid (L) within first portion 192 of conduit 195 to provide a pressure resistance to the liquid injected into the processing space. This pressure resistance improves the wettability of the wafer surface by making the fluid velocity of the liquid uniform radially across the wafer surface.

[0091] In the second processing step executed after the first processing step, method 600 may further include: (a) injecting gas (G) into the processing space (PS) to dry at least one surface of the semiconductor wafer; and (b) opening the first valve 193 and closing the second valve 197 to direct liquid out of the processing space through the first portion 192, the second portion 194, and the third portion 196 of conduit 195 to the outlet 198 of the discharge system 190. The portion of the liquid held within the first portion 192 of the conduit 195 provides a pressure resistance against the gas injected into the processing space. This pressure resistance improves the drying of the wafer surface by making the radial removal of the liquid (L) from the wafer surface more uniform.

[0092] In some embodiments, additional processing steps (not shown in FIG. 6) may be performed after the liquid (L) has been injected into the processing space to process the wafer surface and before the gas (G) is injected into the processing space to dry the wafer surface. In one embodiment, the liquid (L) injected into the processing space may be a cleaning liquid used to clean the wafer surface. Examples of cleaning liquids have been given above. After the cleaning liquid has been injected into the processing space, a rinse liquid may be injected into the processing space to remove the cleaning liquid and rinse the wafer surface. The rinse liquid may be, in one embodiment, deionized water. Next, before the gas (G) is injected into the processing space to dry the wafer surface, a liquid with a low surface tension (e.g., IPA) may be injected into the processing space to remove the rinse liquid from the wafer surface. IPA has a relatively low surface tension, which enables more efficient drying of the wafer.

[0093] In some embodiments, additional processing steps may be utilized to improve the drying of the wafer and avoid pattern collapse that sometimes occurs when using IPA to dry the wafer surface. For example, after a liquid with a low surface tension is injected into the processing space (PS), the wafer surface can be treated with a supercritical fluid, such as supercritical carbon dioxide (CO2), before drying the wafer surface. Since the supercritical fluid has a surface tension of zero, pattern collapse does not occur even when the wafer is dried in the environment of the supercritical fluid.

[0094] FIG. 8 shows a chamber 105 design similar to that shown in FIG. 1A, but with additional mechanisms that enable supercritical processing to be performed within the chamber 105. In the embodiment shown in FIG. 8, a first set of valves 200 is provided between the processing space (PS) and the exhaust system 190 within the chamber 105. The first set of valves 200 can be closed, as shown in FIG. 8, to seal the processing fluid within the processing space (PS), or can be opened so that the processing fluid is discharged out of the processing space through the conduit 195 contained within the exhaust system 190. A second set of valves 202 is provided between the gas inlet 204 within the chamber 105 and the conduit 195 contained within the exhaust system 190. The second set of valves 202 can be closed, as shown in FIG. 8, when injecting the processing fluid into the processing space (PS), or can be opened so that the gas (e.g., air or nitrogen, etc.) injected into the gas inlet 204 can be pushed out of the exhaust system 190 through the conduit 195 if there is remaining processing fluid.

[0095] In some embodiments of the methods described herein, a low surface tension liquid (e.g., IPA, etc.) is injected into the processing space to remove the rinse liquid from the wafer surface, and then the wafer surface can be processed with a supercritical fluid in chamber 105 shown in FIG. 8. In some embodiments, the first set of valves 200 shown in FIG. 8 can be closed to seal the low surface tension liquid within chamber 105 prior to injecting the supercritical fluid (e.g., supercritical CO2) into the processing space (PS). In some embodiments of the methods described herein, prior to processing the wafer surface with a supercritical fluid, the vertical positions of the upper plate 115 and the bottom plate 110 are adjusted to reduce the gap (g) between the upper plate and the bottom plate, which can reduce the amount of the low surface tension liquid on the wafer surface. By reducing the amount of the low surface tension liquid on the wafer surface, the advantage of reducing or eliminating defects that could otherwise occur when the low surface tension liquid merges with the supercritical fluid is provided.

[0096] Systems and methods for processing a semiconductor wafer (e.g., a substrate) are described in various embodiments. The substrate may include any material portion or structure of a device, particularly a semiconductor or other electronic device, and may be, for example, a base substrate structure such as a semiconductor substrate, or a layer on or overlapping a base substrate structure. Thus, the term "substrate" is not intended to be limited to any particular base structure, whether the layer is patterned or unpatterned, an underlying layer or an upper layer, but rather is intended to include any such layer or base structure and any combination of layers and / or base structures.

[0097] As used herein, the term "substrate" means and includes the base material or structure on which materials are formed. It will be understood that the substrate may include a single layer or multiple layers having within them a single material, multiple layers of different materials, regions of different materials or different structures, etc. These materials may include semiconductors, insulators, conductors, or combinations thereof. For example, the substrate may be a semiconductor substrate, a base semiconductor layer on a support structure, a metal electrode, or a semiconductor substrate with one or more layers, structures, or regions formed thereon. The substrate may be a conventional silicon substrate or other bulk substrate including a layer of a semiconductive material. As used herein, the term "bulk substrate" means and includes not only silicon wafers, but also silicon-on-insulator ("SOI") substrates such as silicon-on-sapphire ("SOS") substrates and silicon-on-glass ("SOG") substrates, epitaxial layers of silicon on a base semiconductor substrate, and other semiconductors or optoelectronic materials such as silicon germanium, germanium, gallium arsenide, gallium nitride, and indium phosphide. The substrate may or may not be doped.

[0098] Throughout this specification, references to "one embodiment" or "an embodiment" mean that the particular features, structures, materials, or characteristics described in connection with that embodiment are included in at least one embodiment of the invention, but do not indicate that they are present in all embodiments. It should be noted that, accordingly, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the invention. Further, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments. In other embodiments, various additional layers and / or structures may be included and / or the features described may be omitted.

[0099] Those skilled in the relevant art will recognize that various embodiments can be implemented without one or more specific details, or using other alternative and / or additional methods, materials, or elements. In other cases, to avoid obscuring aspects of various embodiments of the present invention, well-known structures, materials, or operational details are not illustrated or described. Similarly, for purposes of explanation, specific numbers, materials, and configurations are disclosed to provide a sufficient understanding of the present invention. Nevertheless, the present invention may be practiced without specific details. Further, it should be understood that the various embodiments shown in the figures are exemplary representations and are not necessarily drawn to scale.

[0100] Upon reviewing this specification, further modifications and alternative embodiments of the systems and methods described herein should become apparent to those skilled in the art. Therefore, it should be recognized that the described systems and methods are not limited to these exemplary configurations. It should be understood that the forms of the systems and methods illustrated and described herein are to be construed as exemplary embodiments. Various changes may be made in implementation. For this reason, although the present invention has been described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention. Therefore, this specification and the accompanying drawings should be regarded as being of an exemplary rather than a limiting meaning, and such modifications are intended to be included within the scope of the present invention. Further, no benefit, advantage, or solution to any problem described herein with respect to a specific embodiment is intended to be construed as a critical, required, or essential feature or element of any or all of the claims.

Claims

1. A processing system for processing a semiconductor wafer, the processing system comprising: a chamber in which the semiconductor wafer is processed, the chamber comprising: a bottom plate having a portion that defines a lower working surface inside the chamber; an upper plate having a portion that defines an upper working surface inside the chamber, the upper working surface being spaced above the lower working surface; a processing space between the upper working surface and the lower working surface; at least one opening penetrating the lower working surface, the at least one opening penetrating the lower working surface being configured to direct a processing fluid into the processing space above the lower working surface for processing the lower surface of the semiconductor wafer; at least one opening penetrating the upper working surface, the at least one opening penetrating the upper working surface being configured to direct the processing fluid into the processing space below the upper working surface for processing the upper surface of the semiconductor wafer; a discharge system downstream of the processing space and having a conduit for discharging the processing fluid out of the processing space, the conduit being configured to hold a portion of the processing fluid within the conduit and provide a pressure resistance to the processing fluid introduced into the processing space; a chamber a processing system.

2. The processing system according to claim 1, wherein the at least one opening penetrating the lower working surface is disposed at the center of the bottom plate and the at least one opening penetrating the upper working surface is disposed at the center of the upper plate to direct the processing fluid into the processing space near the center of the semiconductor wafer.

3. The processing system according to claim 2, wherein the pressure resistance provided by the portion of the processing fluid held within the conduit enables the processing fluid to flow over the upper and lower surfaces of the semiconductor wafer at a uniform fluid velocity from the center of the semiconductor wafer to the edge thereof.

4. The processing system according to claim 1, wherein each of the at least one opening penetrating the lower working surface and the at least one opening penetrating the upper working surface comprises one or more nozzles coupled to supply the processing fluid into the processing space.

5. The processing system according to claim 1, wherein the upper working surface and the lower working surface are substantially flat planar surfaces.

6. The processing system according to claim 1, wherein the upper working surface and the lower working surface are non-planar surfaces, and the non-planar surfaces are configured to make the fluid velocity of the processing fluid more uniform in the radial direction on the upper and lower surfaces of the semiconductor wafer compared to a substantially flat planar surface.

7. The processing system according to claim 1, wherein each of the upper working surface and the lower working surface comprises a non-wetting coating layer that provides a contact angle of substantially 90 degrees between the processing fluid and the upper working surface and the lower working surface.

8. The processing system according to claim 1, further comprising an acoustic transducer, a heating element, or a sensor coupled to or incorporated in the upper plate or the bottom plate.

9. The chamber an upper gap between the upper working surface and the upper surface of the semiconductor wafer, and a lower gap between the lower working surface and the lower surface of the semiconductor wafer further comprising The processing system according to claim 1, wherein the upper gap and the lower gap are from about 0.01 mm to about 10.0 mm.

10. At least one lifting mechanism coupled to at least one of the upper plate and the bottom plate to adjust a vertical position of at least one of the upper plate and the bottom plate; and a controller coupled to the at least one lifting mechanism to adjust the vertical position of at least one of the upper plate and the bottom plate and change at least one of the upper gap and the lower gap. The processing system according to claim 9, further comprising

11. The processing system according to claim 1, wherein the conduit is coupled to the processing space and comprises a first portion disposed below the lower working surface, and the first portion of the conduit comprises a U-shaped conduit configured to hold the portion of the processing fluid and provide pressure resistance to the processing fluid introduced into the processing space.

12. The conduit a second portion disposed above the lower working surface, a third portion disposed below the lower working surface and further comprising the second portion of the conduit being coupled between the first portion of the conduit and the third portion of the conduit, the third portion of the conduit being coupled to the first portion of the conduit, the second portion of the conduit, and an outlet of the discharge system, the processing system of claim 11. **Claim 13** the conduit being a first valve disposed between the first portion of the conduit and the second portion of the conduit, a second valve disposed between the first portion of the conduit and the third portion of the conduit further comprising when the first valve is open and the second valve is closed, the conduit being configured to direct the processing fluid out of the processing space and, in sequence, through the first portion, the second portion, and the third portion of the conduit to the outlet of the discharge system, the processing system of claim 12. **Claim 14** the second portion of the conduit being configured to increase the pressure resistance to the processing fluid introduced into the processing space when the first valve is open and the second valve is closed, the processing system of claim 13. **Claim 15** when the first valve is closed and the second valve is open, the conduit being configured to direct the processing fluid out of the processing space and, in sequence, through the first portion and the third portion of the conduit to the outlet of the discharge system, the processing system of claim 13. **Claim 16** A method for processing a semiconductor wafer, the method comprising inserting the semiconductor wafer between a bottom plate having a portion defining a lower working surface of a sealed chamber and an upper plate having a portion defining an upper working surface within a processing space; supporting the semiconductor wafer substantially parallel to the upper and lower working surfaces; processing at least one surface of the semiconductor wafer, injecting at least one type of processing fluid into the processing space through at least one opening in the upper plate, the bottom plate, or both the upper plate and the bottom plate; pushing the at least one type of processing fluid onto at least one surface of the semiconductor wafer. Guiding the at least one processing fluid from the processing space through a discharge system having a conduit downstream of the processing space, wherein the guiding holds a portion of the at least one processing fluid in the conduit and provides a pressure resistance against the at least one processing fluid injected into the processing space for processing at least one surface of the semiconductor wafer comprising a method

17. The method according to claim 16, wherein injecting the at least one processing fluid includes injecting a liquid into the processing space to process at least one surface of the semiconductor wafer

18. The method according to claim 17, wherein the guiding includes holding a portion of the liquid in the conduit and providing a pressure resistance against the liquid injected into the processing space, and the pressure resistance equalizes the fluid velocity of the liquid radially at at least one surface of the semiconductor wafer

19. Before injecting the liquid into the processing space, the method further includes injecting a liquid with low surface tension into the processing space to pre-wet at least one surface of the semiconductor wafer, the upper working surface, and the lower working surface and the liquid with low surface tension injected into the processing space prevents the formation of bubbles on at least one surface of the semiconductor wafer when the liquid is subsequently injected into the processing space, according to the method of claim 17

20. The method according to claim 17, wherein injecting the at least one processing fluid further includes injecting a gas after injecting the liquid into the processing space to dry at least one surface of the semiconductor wafer

21. The method according to claim 20, wherein the guiding holds a portion of the liquid in the conduit and provides a pressure resistance against the gas injected into the processing space, and the pressure resistance uniformly dries at least one surface of the semiconductor wafer

22. After injecting the liquid into the processing space, the method further includes injecting a rinsing liquid into the processing space to remove the liquid and rinse at least one surface of the semiconductor wafer Injecting a liquid with low surface tension into the processing space to remove the rinsing liquid from at least one surface of the semiconductor wafer; Adjusting the vertical positions of the upper plate and the bottom plate to reduce the gap between the upper plate and the bottom plate, and reducing the amount of the liquid with low surface tension on at least one surface of the semiconductor wafer; Processing at least one surface of the semiconductor wafer with a supercritical fluid; The method according to claim 17, further comprising.

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