Display substrate, display panel and display device

Abstract

The present invention discloses a display substrate, a display panel, and a display device, the display substrate including a first base substrate (101), a first polarizer (102) disposed on the first base substrate (101), and data lines (103) disposed on the side of the first base substrate (101) away from the first polarizer (102), the extension direction of the data lines (103) being substantially perpendicular to the absorption axis of the first polarizer (102).

Description

[Technical Field]

[0001] The present invention relates to the field of display technology, and in particular to a display substrate, a display panel, and a display device. [Background technology]

[0002] With the continuous development of display technology, users' requirements for display resolution (PPI) are becoming increasingly higher. Three-dimensional (3D) display technologies such as virtual reality (VR) and augmented reality (AR) are gradually becoming popular as near-sighted displays. To make the experience more immersive and reduce the screen door effect when using VR and AR products, higher requirements are being placed on the PPI of VR and AR products. Summary of the Invention [Means for solving the problem]

[0003] The present invention provides a display substrate, a display panel and a display device, and the specific solutions are as follows:

[0004] a first base substrate; a first polarizer disposed on the first base substrate side; a data line disposed on a side of the first base substrate away from the first polarizer; The extending direction of the data lines is substantially perpendicular to the absorption axis of the first polarizer.

[0005] In some embodiments, in the display substrate according to the embodiment of the present invention, the display substrate is applied to a liquid crystal display panel, and the ratio of the thickness of the data line in a direction perpendicular to the first base substrate to the cell gap of the liquid crystal display panel is 0.14 or more and 0.27 or less.

[0006] In some embodiments, the display substrate according to the embodiment of the present invention further includes an interlayer dielectric layer disposed on the side of the layer in which the data lines are located away from the first base substrate, the interlayer dielectric layer including at least one sub-interlayer dielectric layer, and the sum of the products of the refractive index and thickness of each of the sub-interlayer dielectric layers is an integer multiple of λ / 4.

[0007] In some embodiments, in the display substrate according to the present invention, the data line has a tilt angle α, where tan α=a*b, where a is greater than or equal to 2.66 and b is the cell gap of the LCD panel.

[0008] In some embodiments, in the display substrate according to the embodiment of the present invention, the tilt angle α of the data lines is greater than 75° and less than 90°.

[0009] In some embodiments, the display substrate according to the embodiment of the present invention further includes a common electrode, the common electrode being arranged on the side of the layer in which the data lines are located away from the first base substrate, the common electrode including a slit, and the angle between the extension direction of the slit and the absorption axis of the first polarizer being greater than or equal to 80° and less than or equal to 100°.

[0010] In some embodiments, the display substrate according to the present invention further includes a light-shielding structure and a transistor, the transistor including an active layer disposed between a layer in which a data line is located and the first base substrate, and the light-shielding structure is disposed between the active layer and the first base substrate; The active layer includes a first portion extending in a direction of an absorption axis of the first polarizer, and a distance d1 between the first portion and the light-shielding structure in the extension direction of the data line. 、 d1=c*(l / w), where c is greater than 0.446 and less than 2.08, l is the length of the pixel opening area along the extension direction of the data line, and w is the width of the light-shielding structure along the extension direction of the data line.

[0011] In some embodiments, in the display substrate according to the embodiments of the present invention, the transistor includes a first electrode disposed on a side of a layer in which a data line is located, the side being away from the first base substrate, and the display substrate further includes an insulating layer disposed between the active layer and the first electrode, the first electrode being electrically connected to the active layer by a via hole penetrating the insulating layer, the diameter of the via hole gradually increasing in a direction in which the insulating layer is away from the first base substrate, and the diameter of a bottom opening of the via hole facing the first base substrate is d; The active layer further includes a second portion extending in the extension direction of the data line, wherein the orthogonal projection of the second portion onto the first base substrate does not overlap with the orthogonal projection of the data line onto the first base substrate, the second portion is disposed integrally with the first portion, the distance in the extension direction of the data line between one end of the second portion remote from the first portion and the via hole is d2, and d2 / d is greater than or equal to 0.4 and less than or equal to 1.

[0012] In another aspect, a display panel according to an embodiment of the present invention includes a display substrate and an opposing substrate arranged opposite each other, and a liquid crystal layer arranged between the display substrate and the opposing substrate, wherein the display substrate is the above-described display substrate according to an embodiment of the present invention, and the opposing substrate includes a second base substrate and a second polarizer arranged on a side of the second base substrate away from the liquid crystal layer, and the absorption axis of the second polarizer is approximately parallel to the extension direction of the data lines.

[0013] In some embodiments, in the above display panel according to an embodiment of the present invention, the opposing substrate further includes a black matrix arranged on the side of the second base substrate facing the liquid crystal layer, the black matrix including a first black matrix lip extending along the absorption axis direction of the first polarizer, and the orthogonal projection of the first black matrix lip onto the first base substrate is located within the orthogonal projection of the light-shielding structure onto the first base substrate.

[0014] In some embodiments, in the above display panel according to an embodiment of the present invention, the black matrix further includes a second black matrix lip extending along the extension direction of the data line and arranged on a layer different from the layer on which the first black matrix lip is located, and the orthogonal projection of the second black matrix lip onto the first base substrate covers the orthogonal projection of the data line onto the first base substrate.

[0015] In some embodiments, in the display panel according to the embodiment of the present invention, the display panel includes a display area and a dummy area surrounding the display area, the black matrix further includes black matrix blocks arranged in a single layer on the entire surface of the dummy area, the first black matrix lip and the second black matrix lip are located in the display area, and the first black matrix lip and the second black matrix lip have wide portions at overlapping positions where they overlap each other, The opposing substrate further includes a color resistive layer located on the side of the layer where the black matrix is ​​located facing the liquid crystal layer, and the color resistive layer further includes a first color resistive strip located in the display area and a second color resistive strip located in the dummy area, the first color resistive strip and the second color resistive strip respectively extending along the extension direction of the data lines, the first color resistive strip filling the grid defined by the first black matrix lip and the second black matrix lip and covering the first black matrix lip and the second black matrix lip, the thickness of the first color resistive strip in the grid defined by the first black matrix lip and the second black matrix lip is greater than the thickness of the first color resistive strip in the wide portion and the thickness of the first color resistive strip in the second color resistive strip, and the thickness of the first color resistive strip in the wide portion is less than the thickness of the second color resistive strip.

[0016] In some embodiments, in the above display panel according to an embodiment of the present invention, the opposing substrate further includes a spacer and a first auxiliary spacer arranged in a single layer on the side of the color resistive layer facing the liquid crystal layer, wherein the orthogonal projection of the spacer onto the first base substrate is located within the orthogonal projection of the wide portion onto the first base substrate, and the orthogonal projection of the first auxiliary spacer onto the first base substrate is located within the second color resistive strip.

[0017] In some embodiments, in the above display panel according to an embodiment of the present invention, the first color resistive strip includes a red resistive strip, the orthogonal projection of the wide portion onto the first base substrate is penetrated by the orthogonal projection of the red resistive strip onto the first base substrate, and the orthogonal projection of the spacer onto the first base substrate overlaps with the orthogonal projection of the red resistive strip onto the first base substrate.

[0018] In some embodiments, in the display panel according to the embodiments of the present invention, the black matrix block is arranged in one layer with the first black matrix lip or the second black matrix lip.

[0019] In some embodiments, in the display panel according to the embodiment of the present invention, the thickness of the black matrix block is equal to the thickness of the first black matrix lip or the thickness of the second black matrix lip.

[0020] In some embodiments, in the display panel according to the embodiment of the present invention, the display substrate includes a support layer arranged on a side of the common electrode away from the first base substrate, the support layer includes a first boss located in the display region, and the area of ​​the surface of the first boss facing the liquid crystal layer is smaller than the area of ​​the surface of the spacer facing the liquid crystal layer.

[0021] In some embodiments, in the above display panel according to the embodiment of the present invention, the display substrate includes a support layer arranged on a side of the common electrode away from the first base substrate, the support layer includes a first boss located in the display area, the spacers include a main spacer and a second auxiliary spacer, and in a direction perpendicular to the first base substrate, the height of the first boss is greater than the difference between the height of the main spacer and the height of the second auxiliary spacer.

[0022] In some embodiments, in the display panel according to the embodiments of the present invention, the height of the first auxiliary spacer is approximately the same as the height of the second auxiliary spacer.

[0023] In some embodiments, in the above display panel according to the embodiment of the present invention, the support layer further includes a second boss located in the dummy region, and the distance between the surface of the second boss facing the liquid crystal layer and the first base substrate is greater than the distance between the surface of the second boss facing the liquid crystal layer and the first base substrate.

[0024] In some embodiments, the display panel according to the embodiment of the present invention further includes a protective layer disposed between the color resistive layer and the layer in which the spacer is located, and the thickness of the protective layer in the display area is thinner than the thickness of the protective layer in the dummy area.

[0025] In another aspect, a display device according to an embodiment of the present invention includes a backlight module and a display panel arranged on the light-emitting side of the backlight module, wherein the display panel includes the display panel according to an embodiment of the present invention. [Brief explanation of the drawings]

[0026] [Figure 1] FIG. 1 is a schematic diagram of light propagation. [Figure 2] FIG. 1 is a schematic diagram showing the relationship between the vibration direction of an S wave and the direction of a wave vector. [Figure 3]FIG. 1 is a schematic diagram showing the relationship between the vibration direction of a P wave and the direction of a wave vector. [Figure 4] FIG. 2 is a schematic diagram illustrating the propagation of backlight through a liquid crystal panel. [Figure 5] FIG. 1 is a schematic diagram of the wave vectors of backlight passing through the bottom polarizer before reaching the data lines. [Figure 6] FIG. 2 is a schematic diagram of wave vectors after a backlight passes through a data line. [Figure 7] FIG. 1 is a schematic diagram illustrating the practical effect of light leakage due to data lines. [Figure 8] 1 is a structural schematic diagram of a display substrate according to an embodiment of the present invention; [Figure 9] FIG. 9 is a cross-sectional view taken along line I-II in FIG. 8. [Figure 10] FIG. 9 is a schematic diagram of the light blocking structure of FIG. 8. [Figure 11] FIG. 9 is a schematic diagram of the active layer of FIG. 8. [Figure 12] FIG. 9 is a schematic diagram of the gate lines of FIG. 8. [Figure 13] 9 is a schematic diagram of the gate insulating layer and first interlayer dielectric layer of FIG. 8. [Figure 14] FIG. 9 is a schematic diagram of the data lines of FIG. 8. [Figure 15] FIG. 9 is a schematic diagram of the second interlevel dielectric layer of FIG. 8. [Figure 16] FIG. 9 is a schematic diagram of the first electrode of FIG. 8. [Figure 17] FIG. 9 is a schematic diagram of the planarization layer of FIG. 8. [Figure 18] FIG. 9 is a schematic diagram of the pixel electrode of FIG. 8. [Figure 19] FIG. 9 is a schematic diagram of the common electrode of FIG. 8. [Figure 20] Schematic of the propagation of P and S waves between membrane layer interfaces. [Figure 21] The form of the active layer. [Figure 22] FIG. 1 is a schematic diagram illustrating the practical effect of light leakage through the active layer. [Figure 23] 1 is another structural schematic diagram of a display substrate according to an embodiment of the present invention; [Figure 24] FIG. 24 is a cross-sectional view taken along line III-IV in FIG. 23. [Figure 25] 1 is a structural schematic diagram of a display panel according to an embodiment of the present invention; [Figure 26] FIG. 26 is a cross-sectional view taken along line V-VI in FIG. [Figure 27] 10 is a schematic diagram showing the actual effect when the black resin material of the black matrix remains in the aperture region. FIG. [Figure 28] 1 is a schematic diagram of a black matrix design. [Figure 29] 1 is a schematic structural diagram of a black matrix according to an embodiment of the present invention; [Figure 30] 2 is a schematic diagram of a first black matrix lip, a second black matrix lip, and a black matrix formed by the first black matrix lip and the second black matrix lip according to an embodiment of the present invention. FIG. [Figure 31] FIG. 30 is a cross-sectional view taken along line VII-VIII in FIG. 29. [Figure 32] FIG. 2 is another structural schematic diagram of a display panel according to an embodiment of the present invention; [Figure 33] FIG. 33 is a partial enlarged view of the display area of ​​FIG. 32. [Figure 34] FIG. 34 is a schematic diagram of the structure of the black matrix in FIG. 33. [Figure 35] FIG. 34 is a structural schematic diagram of the color resistive layer of FIG. 33. [Figure 36] FIG. 34 is a structural schematic diagram of the spacer of FIG. 33. [Figure 37] FIG. 34 is a structural schematic diagram of the light blocking structure of FIG. 33. [Figure 38] FIG. 34 is a structural schematic diagram of the support layer of FIG. 33. [Figure 39] FIG. 34 is a cross-sectional view taken along line IX-X in FIG. [Figure 40] FIG. 33 is a cross-sectional view taken along line XI-XII in FIG. 32. [Figure 41] 1 is a structural schematic diagram of a display device according to an embodiment of the present invention; [Figure 42]FIG. 2 is another structural schematic diagram of a display device according to an embodiment of the present invention; [Figure 43] FIG. 2 is another structural schematic diagram of a display device according to an embodiment of the present invention; [Figure 44] FIG. 2 is another structural schematic diagram of a display device according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0027] To clarify the objectives, technical solutions, and advantages of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Please note that in the accompanying drawings, thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. The embodiments of the present invention are described with reference to cross-sectional views of schematic diagrams that are idealized embodiments. As such, deviations from the shapes of the figures are expected, for example, as a result of manufacturing techniques and / or tolerances. Therefore, the embodiments of the present invention are not limited to the specific shapes of the regions shown in the embodiments of the present invention, but should be interpreted as including deviations in shape caused by, for example, manufacturing. For example, a region shown or described as flat may typically have rough and / or nonlinear features. Illustrated sharp corners may be rounded, etc. Therefore, the regions shown in the figures are exemplary in nature, and their dimensions and shapes are not intended to represent the exact shapes of the illustrated regions, nor do they reflect true proportions, but are intended only to illustrate the content of the present invention. The same or similar reference numerals always refer to the same or similar elements or components having the same or similar functions. To keep the following description of embodiments of the present invention clear and concise, detailed descriptions of known functions and components are omitted.

[0028] Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning understood by those skilled in the art to which this invention belongs. The terms "first," "second," and similar terms used herein do not denote order, quantity, or importance, but are used only to distinguish between different components. Terms such as "comprise" or "contain" mean that the element or thing preceding the term includes the elements or things listed thereafter and their equivalents, without excluding other elements or things. Terms such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include direct or indirect electrical connections. Terms such as "above," "below," "inside," and "outside" are used only to express relative positions, and if the absolute positions of the described objects change, the relative positions may also change accordingly.

[0029] In the following description, when an element or layer is said to be "on" or "connected to" another element or layer, the element or layer may be immediately on top of or directly connected to the other element or layer, or intermediate elements or layers may be present. When an element or layer is said to be "disposed on one side of" another element or layer, the element or layer may be directly connected to one side of the other element or layer, or intermediate elements or layers may be present. However, when an element or layer is said to be "on top of" or "directly connected to" another element or layer, there are no intermediate elements or layers present. The term "and / or" includes any and all combinations of one or more of the associated listed items.

[0030] As used herein, the term "approximately" or "approximately" is inclusive of the stated value and connotes an acceptable deviation from the specified value as determined by one of ordinary skill in the art with respect to the measurement in question and the error associated with measuring the particular quantity (i.e., limitations of the measurement system). For example, "approximately" can mean that the stated value is within one or more standard deviations (e.g., ±10%).

[0031] Figure 1 is a schematic diagram of light propagation. Figure 2 is a schematic diagram showing the relationship between the vibration direction of an S-wave and the direction of its wave vector. Figure 3 is a schematic diagram showing the relationship between the vibration direction of a P-wave and the direction of its wave vector. As shown in Figure 1, the incident light, refracted light, and interface normal are all in the same plane. The vibration direction of the S-wave is perpendicular to the plane, and the vibration direction of the P-wave is in the plane and perpendicular to the vibration direction of the S-wave. As shown in Figures 2 and 3, if the plane of the incident light, refracted light, and interface normal is the XZ plane, waves whose vibration direction is within this plane are P-waves, and waves whose vibration direction is in the Y-axis direction are S-waves. As shown in Figure 2, the initial vibration direction of the S-wave is the Y-direction. As the wave vector direction of the S-wave gradually changes from the X-direction to the Z-direction, the vibration direction of the S-wave is always only in the Y-direction. As shown in Figure 3, the initial vibration direction of the P-wave is the Z-direction, but as the wave vector direction of the P-wave gradually changes from the X-direction to the Z-direction, the vibration direction of the P-wave increases only in the X-direction relative to the Z-direction. Therefore, even if the propagation direction of light changes, the polarization direction of the S wave does not change, but the polarization direction of the P wave changes.

[0032] FIG. 4 is a schematic diagram showing the propagation of backlight through a liquid crystal panel. FIG. 5 is a schematic diagram of the wave vector of the backlight before it passes through the lower polarizer (Pol1) and reaches the data line (SD). FIG. 6 is a schematic diagram of the wave vector of the backlight after it passes through the data line (SD). As shown in FIGS. 4 to 6, the liquid crystal panel is composed of a lower polarizer (Pol1) on the light incident side, an upper polarizer (Pol2) on the light exit side, and a liquid crystal cell (Cell 1) located between the lower polarizer (Pol1) and the upper polarizer (Pol2). lcd The angle between the light transmission axis direction of the lower polarizer (Pol1) and the Y axis is 0°. The angle between the light transmission axis direction of the upper polarizer (Pol2) and the Y axis is 90°, and the angle between the light transmission axis direction of the upper polarizer (Pol2) and the XX axis is 0°. lcd The angle between the data line (SD) and the Y axis in the figure is α. XYWhen the P wave hits the data line (SD), linear diffraction occurs, changing the direction of light propagation. This occurs because the P wave is in the vertical direction (perpendicular to the XY plane on which the LCD panel is arranged), and only the S wave (s) exists in the XY plane. The S wave is further polarized by the depolarized component E in the direction of the light transmission axis of the upper polarizer (Pol2). XY’ The depolarization component E can be decomposed into XY’ can cause light leakage through the top polarizer (Pol2).

[0033]

number

[0034] According to [Equation 1], when α is 45°, E XY’ is the largest, causing the most serious light leakage.

[0035] Furthermore, as resolution continues to improve, the difficulty of product design and processes is also increasing. To achieve high aperture ratio and high transmittance, the conventional data lines (SD) are tilted at 80° (corresponding to α being 45°) with respect to the absorption axis (corresponding to the X-axis above) of the lower polarizer (Pol1), as shown in Figure 7. In addition, as the density of data lines (SD) continues to increase, light leakage under black screen conditions is becoming increasingly serious with conventional pixel designs. Therefore, how to improve the light leakage defect caused by the data lines (SD) is the key to improving contrast.

[0036] In order to improve the above technical problems existing in the prior art, the embodiment of the present invention is such that the display substrate shown in FIGS. 8 to 19: a first base substrate 101; a first polarizer 102 (i.e., the lower polarizer Pol1) disposed on one side of a first base substrate 101; and data lines 103 disposed on the side of the first base substrate 101 away from the first polarizer 102 .

[0037] The extension direction of the data line 103 (corresponding to the Y-axis) is approximately perpendicular to the absorption axis of the first polarizer 102 (corresponding to the X-axis), i.e., perpendicular or within an error range of ±5% caused by factors such as manufacturing and measurement.

[0038] In the display substrate according to the embodiment of the present invention, the extension direction of the data lines 103 (corresponding to the Y-axis) is set to be approximately perpendicular to the absorption axis of the first polarizer 102 (corresponding to the X-axis), so that the angle α between the data lines 103 and the X-axis is approximately 90°. XY’ When combined with the formula,

[0039]

number

[0040] It is expressed as:

[0041] Depolarization component E XY’ Therefore, by adopting the technical solution of the present invention, the depolarization component E XY’ 7, the data lines (SD) are arranged diagonally, forming a roughly "V-shape" in the direction of the inclination of the adjacent pixel region in the Y direction. Therefore, the data lines 103 actually resemble block shapes such as semi-elliptical or U-shaped corners of the "V-shape." Covering these corners increases the size (CD) of the black matrix in the corresponding region, reducing the aperture ratio. In the present invention, the data lines 103 extend in a direction roughly perpendicular to the absorption axis (corresponding to the aforementioned X-axis) of the first polarizer 102, reducing the difficulty of process control and improving the aperture ratio by approximately 3%.

[0042] In some embodiments, the display substrate according to the present invention is applied to a liquid crystal display panel, and the ratio of the thickness of the data lines 103 in a direction perpendicular to the first base substrate 101 to the cell gap of the liquid crystal display panel may be 0.14 to 0.27, for example, 0.18 to 0.23. Here, the cell gap of the liquid crystal display panel is the sum of the thickness of the alignment film of the display substrate, the thickness of the liquid crystal layer, and the thickness of the alignment film of the opposing substrate. In some embodiments, the cell gap of the liquid crystal display panel may be 1.4 μm to 2 μm, for example, 1.4 μm to 1.8 μm. For example, it may be 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, or 1.8 μm. The thickness of the data line 103 in a direction perpendicular to the first base substrate 101 (corresponding to the Z-axis) is 2800 Å or more and 3800 Å or less, for example, 2800 Å, 2900 Å, 3000 Å, 3100 Å, 3200 Å, 3300 Å, 3400 Å, 3500 Å, 3600 Å, 3700 Å, or 3800 Å. Conventional data lines 103 have a larger thickness, for example, 5500 Å. In the present invention, the data line 103 is thinned to a thickness of 2800 Å to 3800 Å. The data line 103 includes a side surface extending along its extension direction (corresponding to the Y-axis) and a bottom surface facing the first base substrate 101. The side surface area can be reduced by thinning the data line 103, provided that the angle between the side surface and the bottom surface is an acute angle and the area of ​​the bottom surface remains unchanged. In this way, the backlight reflection at the side surface is reduced, and the light leakage defect is improved. Furthermore, the data line 103 that satisfies the above ratio and thickness range can also have good electrical conductivity.

[0043] In some embodiments, the display substrate according to the present invention further includes an interlayer dielectric layer (i.e., second interlayer dielectric layer 1073) disposed on the side of the layer where the data line 103 is located (corresponding to the layer where the second electrode 1064 of the transistor 106 is located), away from the first base substrate 101, as shown in FIG. 9 . The interlayer dielectric layer (i.e., second interlayer dielectric layer 1073) includes at least one sub-interlayer dielectric layer (e.g., a stacked silicon nitride layer, a silicon oxide layer, and a silicon nitride layer). The sum of the product of the refractive index and thickness (i.e., the optical path) of each sub-interlayer dielectric layer (e.g., a stacked silicon nitride layer, a silicon oxide layer, and a silicon nitride layer) is an integer multiple of λ / 4. The main consideration in this arrangement is the refractive index and thickness between the film layers. The inventors discovered that when the sum of the optical path lengths of each film layer reaches an integer multiple of λ / 4, the reflectivity between the film layers can be reduced and the transmittance can be improved.

[0044] In some embodiments, in the display substrate according to the embodiment of the present invention, the inclination angle of the data line 103 (i.e., the angle between the side and bottom surfaces of the data line 103) is α, where tan α=a*b. Here, a is 2.66 or more, for example, a may be 4.05 or more, for example, a may be 6.72. b is the cell gap of the liquid crystal display panel. The inclination angle α of the data line 103 may be greater than 75° and less than 90°, for example, 78° or more and 85° or less, for example, 76°, 78°, 80°, 82°, 85°, 88°, etc. While the inclination angle of the conventional data line 103 is 75°, in the present invention, by increasing the inclination angle of the data line 103, the area of ​​the side surface of the data line 103 can be reduced, which reduces backlight reflection on the side surface and improves light leakage defects.

[0045] In some embodiments, as shown in FIGS. 8 to 19, the display substrate provided by the present invention further includes a common electrode 104. The common electrode 104 is disposed on the side of the layer where the data lines 103 are located, away from the first base substrate 101, and includes a slit 1041. The angle between the extension direction of the slit 1041 and the absorption axis (corresponding to the X-axis) of the first polarizer 102 is between 80° and 100°. The incident polarization angle (which varies depending on the needs of different products and is generally about 10° for VR products) must be designed to match the angle between the alignment direction of the liquid crystal (corresponding to the absorption axis direction of the upper polarizer Pol2) and the slit 1041 in the common electrode 104. This ensures that the liquid crystal molecules rotate in one direction. When the slits 1041 of the common electrode 1044 are changed from the conventional vertical design to an inclination of 80° to 100° with respect to the absorption axis of the first polarizer 102, the absorption axis of the second polarizer (i.e., upper polarizer Pol2) of the opposing substrate can be made at an angle of 90° with respect to the absorption axis of the first polarizer 102. In this case, since the absorption axis of the second polarizer (i.e., upper polarizer Pol2) is parallel to the extension direction of the data line 103 (corresponding to the above-mentioned Y axis), light leakage from the end of the data line 103 is prevented by the second polarizer (i.e., upper polarizer Pol 2 ) This provides maximum blocking, reducing the brightness of the L0 grayscale and improving contrast.

[0046] Figure 20 is a schematic diagram of the propagation of P and S waves between film layer interfaces. P and S waves are calculated by combining Figure 10 and Fresnel's equations to satisfy [Equation 3].

[0047]

number

[0048] Here, the active layer (poly) is a high-refractive index film layer (n>4), and an interlayer dielectric layer (n≈1.5) is located above the active layer (poly). The surface of the active layer (poly) is uneven (as shown in Figure 21). Because the backlight is incident almost perpendicularly to the active layer (poly), after the interlayer dielectric layer is plated on the active layer (poly), a non-normal incidence angle (i.e., θ2≠θ1) is formed between the active layer (poly) and the interlayer dielectric layer. As a result, the polarization state changes, and the upper polarizer (Pol2) cannot absorb the light, resulting in light leakage, as shown in Figure 22.

[0049] In light of this, to address the problem of light leakage caused by the active layer (poly) in the prior art, the display substrate provided in the embodiment of the present invention further includes a light-shielding structure 105 and a transistor 106, as shown in FIGS. 9, 23, and 24. The transistor 106 includes an active layer 1061 located between the layer in which the data line 103 is located and the first base substrate 101. The light-shielding structure 105 is located between the active layer 1061 and the first base substrate 101. The active layer 1061 includes a first portion 611 extending in the absorption axis direction (corresponding to the X-axis) of the first polarizer 102. The distance between the first portion 611 and the light-shielding structure 105 in the extension direction of the data line 103 (corresponding to the Y-axis) is d1, where d1=c*(l / w). Here, c is greater than 0.446 and less than 2.08, e.g., c is greater than 0.7 and less than 1.5, l is the length of the pixel aperture region along the extension direction of the data line 103 (corresponding to the Y-axis), and w is the width of the light-shielding structure 105 along the extension direction of the data line 103 (corresponding to the Y-axis). If c is less than 0.446, the semiconductor region of the transistor 106 will not be fully turned on, causing problems with pixel illumination. If c is greater than 2.08, the transistor 106 will occupy too much space, reducing the pixel aperture ratio. Therefore, if d1 satisfies the relationship d1=c*(l / w), the pixel aperture ratio will be increased and the characteristics of the transistor 106 will be improved.

[0050] In some embodiments, d1 is equal to or greater than 1.5 μm and less than 3 μm, such as 1.5 μm, 1.55 μm, 1.6 μm, 1.65 μm, 1.7 μm, 1.75 μm, 1.8 μm, 1.85 μm, 1.9 μm, 1.95 μm, 2 μm, 2.05 μm, 2.1 μm, 2.15 μm, 2.2 μm, 2.25 μm, 2.3 μm, 2.35 μm, 2.4 μm, 2.45 μm, 2.5 μm, 2.55 μm, 2.6 μm, 2.65 μm, 2.7 μm, 2.75 μm, 2.8 μm, 2.95 μm, etc. Conventionally, the distance d1 between the first portion 611 and the light-shielding structure 105 in the extension direction of the data line 103 (corresponding to the X-axis) is 3 μm. In the present invention, by taking into consideration the alignment deviation (OL) between the first portion 611 and the gate 1062 of the transistor 106, size (CD) variation, and channel range, the first portion 611 is positioned as far below the light-shielding structure 105 as possible, so that the distance d1 between the first portion 611 and the light-shielding structure 105 in the extension direction of the data line 103 (corresponding to the above-mentioned X-axis) is 1.5 μm or more and less than 3 μm, which effectively reduces the proportion of the first portion 611 in the pixel aperture region, reduces the amount of backlight light irradiated to the active layer 1061, and improves light leakage defects caused by the active layer 106.

[0051] In some embodiments, in the display substrate provided by the present invention, as shown in FIGS. 9, 23, and 24, the transistor 106 may further include a first electrode 1063 located on a side of the layer in which the data line 103 is located, away from the first base substrate 101. The display substrate further includes an insulating layer 107 located between the active layer 1061 and the first electrode 1063, and the first electrode 1063 is electrically connected to the active layer 1061 through a first via hole h1 penetrating the insulating layer 107. The diameter of the first via hole h1 gradually increases in a direction away from the first base substrate 101. The diameter of the bottom opening of the first via hole h1 facing the first base substrate 101 is d, and the shape of the bottom opening of the first via hole h1 facing the first base substrate 101 may be approximately circular or may have other shapes. d is the size of the opening of the first via hole h1 facing the first base substrate 101 in the extension direction of the data line 103 (corresponding to the aforementioned Y-axis). The active layer 1061 further includes a second portion 612 extending in the extension direction of the data line 103 (corresponding to the aforementioned Y-axis). The orthogonal projection of the second portion 612 onto the first base substrate 101 does not overlap with the orthogonal projection of the data line 103 onto the first base substrate 101. The second portion 612 is disposed integrally with the first portion 611, and the distance between the end of the second portion 612 remote from the first portion 611 and the first via hole h1 in the extension direction of the data line 103 (corresponding to the aforementioned Y-axis) is d2, and d2 / d is 0.4 or more and 1 or less. For example, d2 / d is 0.5 or more and 0.7 or less, such as 1.4, 0.5, 0.6, 0.7, 0.8, 0.9, etc. If d2 / d is less than 0.5, the second portion 612 of the first via hole h1 may be partially etched, resulting in incomplete contact between the active layer 1061 and the first electrode 1063, which may affect conduction. If d2 / d is greater than 0.7, the occupied space may become too large, reducing the pixel aperture ratio. Therefore, the present invention sets d2 / d to be between 0.5 and 0.7. This not only ensures a better morphology of the active layer 1061 in the first via hole h1, but also 、 The electrical connection between the active layer 1061 and the first electrode 1063 is also improved, and the pixel aperture ratio is also effectively improved.

[0052] In some embodiments, d2 is equal to or greater than 1 μm and less than 2.5 μm, such as 1 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, 2 μm, 2.1 μm, 2.2 μm, 2.3 μm, 2.4 μm, etc. In the related art, the distance d2 between one end of the second portion 612 remote from the first portion 611 and the first via hole h1 in the extension direction of the data line 103 (corresponding to the Y-axis described above) is 2.5 μm. In the present invention, taking into consideration the alignment deviation (OL), size (CD) variation, and channel range between the second portion 612 and the first via hole h1, the second portion 612 is positioned as far below the light-shielding structure 105 as possible, and the distance d2 between the second portion 612 and the first via hole h1 in the extension direction of the data line 103 (corresponding to the X-axis) is set to be 1 μm or more and less than 2.5 μm, thereby effectively reducing the proportion of the second portion 612 in the opening region, reducing the amount of backlight irradiated to the active layer 1061, and improving light leakage defects caused by the active layer 106. Optionally, the orthogonal projection of the first via hole h1 onto the first base substrate 101 is positioned within the orthogonal projection of the light-shielding structure 105 onto the first base substrate 101 to prevent light leakage from the orthogonal projection of the first via hole h1 onto the first base substrate 101.

[0053] In some embodiments, as shown in Figures 8-19, 23, and 24, a local portion of the data line 103 can be used as the second electrode 1064 of the transistor 106. The insulating layer 107 can include a gate insulating layer 1071 located between the layer in which the gate 1062 is located and the active layer 1061, a first interlayer dielectric layer 1072 located between the layer in which the gate 1062 is located and the layer in which the second electrode 1064 is located, and a second interlayer dielectric layer 1073 located between the layer in which the first electrode 1063 is located and the layer in which the second electrode 1064 is located. The second electrode 1064 can be electrically connected to the active layer 106 through a second via hole h2 that penetrates the gate insulating layer 1071 and the first interlayer dielectric layer 1072. The display substrate further includes a planarization layer 108 located between the layer on which the first electrode 1063 is located and the layer on which the common electrode 104 is located, a passivation layer 109 located between the planarization layer 108 and the layer on which the common electrode 104 is located, and a pixel electrode 110 located between the passivation layer 109 and the planarization layer 108, where the pixel electrode 110 can be electrically connected to the first electrode 1063 through a third via hole h3 penetrating the planarization layer 108. Optionally, the orthogonal projection of the third via hole h3 onto the first base substrate 101 can be positioned within the orthogonal projection of the light-shielding structure 105 onto the first base substrate 101 to prevent light leakage from the orthogonal projection of the third via hole h3 onto the first base substrate 101. The display substrate may also include a gate line 111. A portion of the gate line 111 can be used as the gate 1062. Optionally, the orthogonal projection of the gate line 111 onto the first base substrate 101 is located within the orthogonal projection of the first light-shielding structure 105 onto the first base substrate 101 to reduce the light-shielding area as much as possible and ensure the aperture ratio. Other essential components of the display substrate should be understood by those skilled in the art and will not be repeated herein or used as limitations on the present invention.

[0054] Based on a similar inventive concept, an embodiment of the present invention further provides a display panel, as shown in FIGS. 25 and 26, including a display substrate 001 and an opposing substrate 002 arranged opposite each other, and a first liquid crystal layer 003 positioned between the display substrate 001 and the opposing substrate 002. Here, the display substrate 001 is the display substrate 001 provided in the embodiment of the present invention, and the opposing substrate 002 includes a second base substrate 201 and a second polarizer 202 positioned on the side of the second base substrate 201 away from the first liquid crystal layer 003. The absorption axis of the second polarizer 202 is substantially parallel to the extension direction of the data lines 103, i.e., parallel or within an error range caused by factors such as manufacturing and measurement. The principles for solving the problems of this display panel are similar to those for solving the problems of the display substrate described above. Therefore, the implementation of the display panel according to the embodiment of the present invention can be referenced to the implementation of the display substrate described above, and a repetition thereof will be omitted.

[0055] 25 and 26 , in the display panel according to the embodiment of the present invention, the counter substrate 002 further includes a black matrix 203 disposed on the side of the second base substrate 201 facing the first liquid crystal layer 003. The black matrix 203 includes a first black matrix strip 2031 extending along the absorption axis direction (corresponding to the X-axis) of the first polarizer 102. The orthogonal projection of the first black matrix lip 2031 onto the first base substrate 101 is located within the orthogonal projection of the light-shielding structure 105 onto the first base substrate 101, and the shielding layer in the absorption axis direction (corresponding to the X-axis) of the first polarizer 102 is changed from the first black matrix lip 2031 of the counter substrate 002 to the light-shielding structure 105 of the display substrate 001. The light-shielding structure 105, the active layer 1061, most of which is blocked by the light-shielding structure 105, the first via hole h1 that penetrates the insulating layer 107 and is completely blocked by the light-shielding structure 105, and the third via hole h3 that penetrates the planarization layer 108 are all located within the display substrate. This improves the direct alignment accuracy between the film layers within the display substrate compared to when the alignment between the film layers of the display substrate and the opposing substrate varies significantly, improving the accuracy of the shielding process and resulting in a better shielding effect. Furthermore, to meet the light-shielding requirements, the present invention employs the light-shielding structure 105 in the absorption axis direction (corresponding to the aforementioned X-axis) of the first polarizer 102. Therefore, the primary function of the first black matrix lip 2031 extending in the absorption axis direction (corresponding to the aforementioned X-axis) of the first polarizer 102 is changed from light-shielding to reducing the reflectance of the first polarizer 102 in the absorption axis direction (corresponding to the aforementioned X-axis).

[0056] In the related art, the black matrix 203 on the opposing substrate 002 is grid-shaped and made of a single layer of black resin material. This has the advantage of being low cost, but it also has obvious drawbacks. In high-resolution products, especially VR products with a resolution of over 1000 PPI, the pixel size is small, so the actual apertures in the mask plate are small and cannot fully react during the exposure process. Because the apertures in the black matrix 203 are relatively small, the developer is less likely to remove the black resin material in the aperture areas from the apertures during the development process. As a result, the black resin material (the dots shown in the oval circles in Figure 27) remains in the aperture areas after development, preventing the actual shape of the black matrix 203 (shown in Figure 27) from fully matching the designed shape (shown in Figure 28), impairing the aperture ratio. Furthermore, a large amount of black resin material remains in the aperture areas, resulting in visually unsightly black spots.

[0057] In light of this, to improve black dot defects, in a display panel provided in an embodiment of the present invention, as shown in FIGS. 25, 29, and 30, the black matrix 203 further includes a second black matrix lip 2032 extending along the extension direction of the data lines 103 (corresponding to the Y-axis) and disposed in a layer different from the layer in which the first black matrix lip 2031 is located. The orthogonal projection of the second black matrix lip 2032 onto the first base substrate 101 covers the orthogonal projection of the data lines 103 onto the first base substrate 101. The openings defined by the first black matrix lip 2031 and the second black matrix lip 2032 are multiple open channels. Therefore, the areas of these open channels are generally large, and the black resin material in the openings can be relatively easily removed by the developer during development, thereby eliminating the black resin material remaining in the opening areas and improving black dot defects.

[0058] In some embodiments, the second black matrix lip 2032 may be positioned to be located on the side of the first black matrix lip 2031 that is farther from the second base substrate 201, or the first black matrix lip 2031 may be positioned to be located on the side of the second black matrix lip 2032 that is farther from the second base substrate 201. Furthermore, as shown in FIG. 31 , at the overlap position of the first black matrix lip 2031 and the second black matrix lip 2032, the material of the first black matrix lip 2031 and the second black matrix lip 2032 may partially flow onto the edge of the grid defined by the first black matrix lip 2031 and the second black matrix lip 2032, so that the thickness of the black matrix 203 at the overlap position is slightly less than the sum of the thicknesses of the first black matrix strip 2031 and the second black matrix strip 2032. At the non-overlapping positions of the first black matrix lip 2031 and the second black matrix lip 2032, the first black matrix lip 2031 is flush with the second black matrix lip 2032, and the thickness of the black matrix 203 at the non-overlapping positions is equal to the thickness of the first black matrix lip 2031 or the second black matrix lip 2032.

[0059] In some embodiments, a portion of the first black matrix lip 2031 and a portion of the second black matrix lip 2032 are arranged on the same layer, and the remaining first black matrix lip 2031 and the remaining second black matrix lip 2032 are arranged on a different layer, and in order to reduce residue of the black resin material, the grid size defined by the first black matrix lip 2031 and the second black matrix lip 2032 arranged on the same layer may be larger than the grid size defined by all of the first black matrix lip 2031 and the second black matrix lip 2032.

[0060] In the present invention, "arranged in the same layer" refers to a layer structure formed by forming a film layer for forming a specific pattern using the same single film formation process, followed by a single patterning process using the same mask plate. That is, one patterning process corresponds to one mask plate (also called a mask). Depending on the specific pattern, one patterning process may include multiple exposures, developments, or etchings. The specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may be the same height or thickness, or may have different heights or thicknesses.

[0061] In some embodiments, in the display panel according to the embodiment of the present invention, as shown in FIGS. 32 to 40, the display panel includes a display area AA and a dummy area DA surrounding the display area AA. The black matrix 203 is disposed over the entire dummy area DA and further includes a black matrix block 2033 arranged in a single layer. Optionally, the black matrix block 2033 is disposed in the same layer as the first black matrix lip 2031 or the second black matrix lip 2032. The thickness of the black matrix block 2033 may be equal to the thickness of the first black matrix lip 2031 or the second black matrix lip 2032. That is, the thickness of the black matrix block 2033 is smaller than the thicknesses of the first black matrix lip 2031 and the second black matrix lip 2032 at the overlapping positions. For example, the thickness of the black matrix block 2033 is greater than half the thicknesses of the first black matrix lip 2031 and the second black matrix lip 2032 at the overlapping positions. The first black matrix lip 2031 and the second black matrix lip 2032 are located in the display area AA, and the first black matrix lip 2031 and the second black matrix lip 2032 have a wide portion BM where they overlap. The counter substrate 002 further includes a color resistive layer 204 located on the side of the layer in which the black matrix 203 is located that faces the first liquid crystal layer 003, and spacers 205 and first auxiliary spacers 206 located on the side of the color resistive layer 204 that faces the first liquid crystal layer 003 and are arranged in the same layer. Here, the color resistive layer 204 includes a first color resistive strip 2041 located in the display area AA and a second color resistive strip 2042 located in the dummy area DA, and both the first color resistive strip 2041 and the second color resistive strip 2042 extend along the extension direction of the data line 103 (corresponding to the aforementioned Y axis). The first color resistive strip 2041 is filled in the grid K defined by the first black matrix lip 2031 and the second black matrix lip 2032 and covers the first black matrix lip 2031 and the second black matrix lip 2032 .In the present invention, the first color resistive strip 2041 covering the first black matrix lip 2031 and the second black matrix lip 2032 can be understood as the orthogonal projection of the end of the first color resistive strip 2041 onto the first base substrate 101 overlapping with the orthogonal projection of the first black matrix lip 2031 onto the first base substrate 101 and the orthogonal projection of the second black matrix lip 2032 onto the first base substrate 101. Also, during the manufacturing process, the material of the first color resistive strip 2041 may flow into the grid K defined by the first black matrix lip 2031 and the second black matrix lip 2032 in the display area AA to form a substantially flat surface (i.e., the surface of the first color resistive strip 2041 located within the grid K facing the first liquid crystal layer 003 may be flush with the surface of the first color resistive strip 2041 in the wide portion BM facing the first liquid crystal layer 003), or may be different depending on factors such as manufacturing and measurement. Considering that the black matrix blocks 2033 of the second color resistive strip 2042 are disposed over the entire surface and the thickness of the second color resistive strip 2042 is the actual coating thickness (within the error range that may occur), the thickness of the first color resistive strip 2041 in the grid K is thicker than the thicknesses of the first color resistive strip 2041 and the second color resistive strip 2042 in the widened portion BM, and the thickness of the first color resistive strip 2041 in the widened portion BM is thinner than the thickness of the second color resistive strip 2042. Optionally, the orthogonal projection of the spacer 205 onto the first base substrate 101 is located within the orthogonal projection of the widened portion BM onto the first base substrate 101. The orthogonal projection of the first auxiliary spacer 206 onto the first base substrate 101 is located within the orthogonal projection of the second color resistive strip 2042 onto the first base substrate 101.

[0062] With the above arrangement, the thickness of the counter substrate 002 at the position of the spacer 205 is substantially equal to the sum of the thicknesses of the second base substrate 201, the wide portion BM, the first color resistive strip 2041, and the spacer 205. The thickness of the counter substrate 002 at the first auxiliary spacer 206 is substantially equal to the sum of the thicknesses of the second base substrate 201, the black matrix block 2033, the second color resistive strip 2042, and the first auxiliary spacer 206. Since the thickness of the wide portion BM can be greater than the thickness of the black matrix block 2033 and the thickness of the first color resistive strip 2041 at the wide portion BM is less than the thickness of the second color resistive strip 2042, the thickness of the counter substrate 002 at the spacer 205 is guaranteed to be essentially the same as the thickness of the counter substrate 002 at the first auxiliary spacer 206, thereby ensuring the uniformity of the cell gap of the liquid crystal cell.

[0063] 40, a protective layer 207 may be further provided between the layer on which the color resistive layer 204 is disposed and the layer on which the spacers 205 are disposed. The protective layer 207 may flow into the grid defined by the first black matrix lip 2031 and the second black matrix lip 2032 in the display area AA, so that the thickness of the protective layer 207 in the display area AA is thinner than that in the dummy area DA. The thickness of the opposing substrate 002 at the spacers 205 is substantially equal to the sum of the thickness of the second base substrate 201, the thickness of the wide portion BM, the thickness of the first color resistive strip 2041, the thickness of the spacers 205, and the thickness of the protective layer 207. The thickness of the opposing substrate 002 at the first auxiliary spacers 206 is equal to the sum of the thickness of the second base substrate 201, the thickness of the black matrix block 2033, the thickness of the second color resistive strip 2042, the thickness of the first auxiliary spacers 206, and the thickness of the protective layer 207. Since the thickness of the wide portion BM is thicker than that of the black matrix block 2033, the thickness of the first color resistive strip 2041 is smaller than that of the second color resistive strip 2042, and the thickness of the protective layer 207 in the display area AA is smaller than that in the dummy area DA, the thickness of the opposing substrate 002 in the spacer 205 can be ensured to be approximately the same as the thickness of the opposing substrate 002 in the first auxiliary spacer 206, and the uniformity of the cell gap of the liquid crystal cell can be more effectively guaranteed.

[0064] 35 , in the display panel according to the embodiment of the present invention, the first color resistive strip 2041 includes a red resistive strip R, a green resistive strip G, and a blue resistive strip B, etc. Optionally, the second color resistive strip 2042 may include a single-color resistive strip of at least one color, such as a red resistive strip R, a green resistive strip G, and a blue resistive strip B. In some embodiments, the orthogonal projection of the wide portion BM in the display area AA onto the first base substrate 101 is penetrated by the orthogonal projection of the red resistive strip R onto the first base substrate 101, and the orthogonal projection of the spacer 205 onto the first base substrate 101 overlaps with the orthogonal projection of the red resistive strip R onto the first base substrate 101.

[0065] Table 1 shows the white screen color point (Wx, Wy) levels for three cases in which the spacer 205 is placed on the red resistive strip R, green resistive strip G, and blue resistive strip B, respectively. Generally, the white screen color point most suitable for the human eye is (0.313-0.329). Because the VR device's optical system may shift the white point, the final white point requirement for the screen is (0.303-0.309). The more yellow the white point, the greater the brightness loss due to color block adjustment. Table 1 compares the case in which the spacer 205 is placed on the red resistive strip R as the reference and the case in which the spacer 205 is placed on the blue resistive strip B. Because the aperture ratio corresponding to the blue resistive strip B is smaller than that corresponding to the red resistive strip R, the brightness ratio of the blue resistive strip B is reduced, resulting in a yellowish overall color point. This necessitates adjustment of the backlight color blocks, resulting in a final brightness loss of approximately 16.4%. Compared with the case where the spacer 205 is placed on the green resistive strip G, the transmittance is reduced by about 14.6% due to the reduction in the light output ratio of the green resistive strip G, but the adjustment of the color block can compensate for 6%, but the overall brightness is still reduced by 8.6%.

[0066] Table 1

[0067] In some embodiments, in the display panel according to the embodiment of the present invention, as shown in FIGS. 38 to 40, the display substrate includes a support layer 112 located on the side of the common electrode 104 away from the first base substrate 101. The support layer 112 includes a first boss 1121 located in the display area AA. The surface area of ​​the first boss 1121 facing the first liquid crystal layer 003 is smaller than the surface area of ​​the spacer 205 facing the first liquid crystal layer 003. In the related art, the spacer 205 is disposed only on the counter substrate 002. After the display panel is extruded, the spacer 205 slides significantly, damaging the alignment film (PI) on the display substrate 001 side and causing serious light leakage. As a solution, a main spacer 2051 and a second auxiliary spacer 2052 are formed on the counter substrate 002. Furthermore, a support layer 112 is formed at the position of the spacer 205 on the display substrate 001, and a first boss 1121 is provided on the support layer 112 to support the spacer 205. In the display area AA, the width of the first boss 1121 is greater than the width of the support layer 112 outside the first boss 1121, and the sum of the thicknesses of the spacer 205 and the first boss 1121 is the cell gap. After the display panel is extruded in this manner, the support effect of the first boss 1121 prevents the main spacer 2051 from damaging the alignment film on the display substrate 001, effectively solving the problem of light leakage caused by the spacer 205. However, typically, the area of ​​the surface of the first boss 1121 facing the first liquid crystal layer 003 is larger than the area of ​​the surface of the spacer 205 facing the first liquid crystal layer 003. However, if the area of ​​the surface of the first boss 1121 facing the first liquid crystal layer 003 is large, craters may form on the surface of the first boss 1121 facing the first liquid crystal layer 003, causing the alignment film to accumulate at the crater locations, which may scratch the alignment film at these locations after the spacer 205 is compressed, resulting in poor stripe patterns.The spacer 205 is made of a resin material that is elastic and highly sensitive, and due to the characteristics of this material, craters will not form whether the area of ​​the surface of the spacer 205 facing the first liquid crystal layer 003 is large or small.As a result, the surface area of ​​the first boss 1121 facing the first liquid crystal layer 003 is smaller than the surface area of ​​the spacer 205 facing the first liquid crystal layer 003, which is equivalent to reducing the surface area of ​​the first boss 1121 facing the first liquid crystal layer 003. As a result, the crater shape of the first boss 1121 is significantly improved, and the occurrence of poor stripe patterns (roughness) is successfully reduced.

[0068] In some embodiments, in the display panel according to the embodiment of the present invention, to better prevent the main spacers 2051 from scratching the alignment film of the display substrate 001, the height of the first boss 1121 in the direction perpendicular to the first base substrate 101 (corresponding to the Z direction) may be greater than the difference between the height of the main spacers 2051 and the height of the second auxiliary spacers 2052. For example, the height of the main spacers 2051 is 1.5 μm, the height of the second auxiliary spacers 2052 is 1.1 μm, and the height of the first boss 1121 is 0.6 μm.

[0069] Optionally, as shown in FIG. 40 , the height of the second auxiliary spacer 2052 is substantially the same as the height of the first auxiliary spacer 206, i.e., the same or within an error range caused by factors such as manufacturing and measurement. In some embodiments, as shown in FIG. 40 , the support layer 112 may further include a second boss 1122 corresponding to the second auxiliary spacer 2052 in the dummy area DA. However, since there are many traces in the dummy area DA of the display substrate 001, and the traces essentially serve to lift up the second boss 1122, the distance between the surface of the second boss 1122 facing the first liquid crystal layer 003 and the first base substrate 101 is greater than the distance between the surface of the first boss 1021 facing the first liquid crystal layer 003 and the first base substrate 101.

[0070] In addition, the present invention also provides related measurement data for the contrast (CR1) of a display panel of the related art and the contrast (CR2) of a display panel of the present invention. As shown in Table 2, number 1 in Table 2 indicates the measurement data for the contrast of a display panel of the related art, and number 2 indicates the measurement data for the contrast of a display panel of the present invention. The units for the L255 grayscale luminance and the L0 grayscale luminance are nits. As can be seen from Table 2, the measurement data for the contrast randomly selected from five display panels of the related art and the average contrast value Ave1 are both smaller than the measurement data for the contrast randomly selected from five display panels of the present invention and the average contrast value Ave2. After using the contrast enhancement method, the contrast was significantly improved, increasing by an average of about 38%.

[0071] [Table 2]

[0072] In some embodiments, the display panel according to the embodiment of the present invention further includes a buffer layer 113, etc., as shown in Figures 9 and 24. Other essential components of a display panel should be understood by those skilled in the art, and will not be repeated herein or used as limitations of the present invention.

[0073] Based on the same inventive idea, an embodiment of the present invention further provides a display device, including a backlight module and a display panel disposed on the light-emitting side of the backlight module, wherein the display panel includes the display panel according to the embodiment of the present invention. Since the principle for solving the problem of the display device is similar to the principle for solving the problem of the display panel, the implementation of the display device provided in the embodiment of the present invention can refer to the implementation of the display panel, and the details will not be repeated.

[0074] In some embodiments, the backlight module according to the present invention may be a direct-lit backlight module or an edge-lit backlight module. Optionally, the edge-lit backlight module includes a light bar, a laminated reflector, a light guide plate, a diffuser, a prism assembly, etc. The light bar is located on the thickness direction side of the light guide plate. The direct-lit backlight module may include a matrix light source, a reflector laminated on the light-emitting side of the matrix light source, a diffuser, a brightness enhancement film, etc. The reflector has an opening that is directly opposite the position of the lamp beads of the matrix light source. The lamp beads of the light bar and the lamp beads of the matrix light source may be light-emitting diodes (LEDs), such as miniature light-emitting diodes (Mini LEDs, Micro LEDs, etc.).

[0075] Small light-emitting diodes (LEDs) measuring submillimeters or even microns in size are self-emissive devices, similar to organic light-emitting diodes (OLEDs). Like OLEDs, they offer a range of advantages, including high brightness, ultra-low latency, and ultra-wide viewing angles. Furthermore, inorganic LEDs emit light based on metal semiconductors, which have more stable characteristics and lower resistance. Compared to organic LEDs, which emit light based on organic materials, they have the advantages of lower power consumption, high and low temperature resistance, and a longer lifespan. Furthermore, when used as a backlight source, small LEDs can achieve more accurate and dynamic backlighting effects, effectively improving screen brightness and contrast. At the same time, they can also resolve the glare phenomenon that occurs between bright and dark areas of the screen with conventional dynamic backlights, optimizing the visual experience.

[0076] In some embodiments, the display device according to the present invention may be a 3D display device. As shown in FIG. 41 , the 3D display device may include a liquid crystal grid 004 positioned between a backlight module BLU and a display substrate 001. The liquid crystal grid 004 may be fixed to the display substrate 001 via an adhesive layer 005. Optionally, the liquid crystal grid 004 may be controlled to form alternating light-transmitting and light-blocking regions depending on the current position of the viewer's eyes. The viewer's left eye may view a left-eye image displayed by the display panel PNL (including the display substrate 001, the counter substrate 002, the first liquid crystal layer 003, the sealing adhesive SA, etc.) through the light-transmitting region of the liquid crystal grid 004, and the viewer's right eye may view a right-eye image displayed by the display panel PNL through the light-transmitting region. By arranging the liquid crystal grid 004 on the light-incident side of the display panel PNL, if the display panel PNL includes a touch electrode, the liquid crystal grid 004 will not block the touch electrode, thereby avoiding touch defects and improving touch sensitivity and accuracy.

[0077] In some embodiments, as shown in FIG. 41 , the liquid crystal grid 004 includes a third base substrate 401 and a fourth base substrate 402 arranged opposite each other, a second liquid crystal layer 403 located between the third base substrate 401 and the fourth base substrate 402, a first stripe electrode 404 located on the side of the third base substrate 401 facing the second liquid crystal layer 403, a second stripe electrode 405 located on the side of the layer in which the first stripe electrode 404 is located facing the second liquid crystal layer 403, a planar electrode 406 located on the side of the fourth base substrate 402 facing the second liquid crystal layer 403, a first transistor T1 electrically connected to the first stripe electrode 404, a second transistor T2 electrically connected to the second stripe electrode 405, and a sealing adhesive SA surrounding the second liquid crystal layer 403 located between the third base substrate 401 and the fourth base substrate 402. In a specific embodiment, by supplying power to the first stripe electrode 404, the second stripe electrode 405, and the planar electrode 406, the second liquid crystal layer 403 is controlled to form light-transmitting areas and light-blocking areas, and 3D display can be realized in cooperation with the liquid crystal display panel PNL that outputs images for the left eye and the right eye.

[0078] In some embodiments, the display device according to the present invention may be a 3D display device. As shown in FIG. 42, the 3D display device may further include a light-splitting element 006 located on the light-exiting side of the display panel PNL. Optionally, the light-splitting element 006 may include multiple light-splitting structures 601 arranged parallel to each other, each of which may be a compound lens formed by a high-refractive-index resin layer 601a and a low-refractive-index resin layer 601b. Specifically, the high-refractive-index resin layer 601a is composed of multiple cylindrical lenses, and the low-refractive-index resin layer 601b fills the gaps between the cylindrical lenses, with the thickness of the low-refractive-index resin layer being greater than the arch height of the cylindrical lenses. The cylindrical lenses may have edges or no edges. Optionally, the compound lenses may be made of a transparent material as a substrate 602. For example, the substrate 602 may be polyethylene terephthalate (PET). In some embodiments, a spacer glass 007 can be disposed between the display panel PNL and the light-splitting element 006, and the spacer glass 007 and the light-splitting element 006 are laminated and fixed via an optical adhesive 008.

[0079] In a specific embodiment, the image plane of the display panel PNL is set on the focal plane of the cylindrical lens, and the pixel under each cylindrical lens is divided into multiple sub-pixels. Pixels at different positions on the display panel PNL are refracted and split by the cylindrical lens, and the optical path changes to form different viewpoints in space. When the left eye receives a left-viewpoint image, the right eye simultaneously receives a right-viewpoint image, realizing 3D display.

[0080] 43 and 44 show examples in which the display device provided by the present invention is applied to virtual reality (VR) glasses. Optionally, the virtual reality glasses shown in FIG. 43 include two display screens 1 and r, through which different images are provided to the left and right eyes, thereby realizing a virtual reality display. The two display screens 1 and r each include the display panel according to an embodiment of the present invention. The virtual reality glasses shown in FIG. 44 include one display screen, and a display area AA of the display screen includes effective pixels capable of displaying an image, and a dummy area DA includes dummy pixels not capable of displaying an image, which are used to prevent the film layer of the effective pixels from being severely disconnected. Optionally, the display area AA includes a left-eye pixel area P l and right-eye pixel area P r Left eye pixel area P l and right-eye pixel area P r teeth 、 Each pixel displays a different image, thereby realizing a virtual reality display. l and right-eye pixel area P r teeth 、 The left-eye pixel area P l , right eye pixel area P r The display area AA may have other shapes and is not particularly limited herein. Continuing to look at Figures 43 and 44, it can be seen that the virtual reality glasses may further include a first gate drive circuit GOA1, a second gate drive circuit GOA2, a test circuit CT, and a multiplexer circuit MUX arranged around the display area AA. Other essential components of virtual reality glasses should be understood by those skilled in the art and will not be repeated herein or used as limitations on the present invention.

[0081] In some embodiments, the display device may be a projector, 3D printer, virtual reality device, mobile phone, tablet computer, television, display, laptop, digital photo frame, navigator, smart watch, fitness wristband, personal digital assistant, or other product or component with a display function. Optionally, the display device may include, but is not limited to, a radio frequency unit, a network module, an audio output and input unit, a sensor, a display unit, a user input unit, an interface unit, a control chip, or the like. Optionally, the control chip may be a central processing unit, a digital signal processor, a system-on-chip (SoC), or the like. For example, the control chip may include memory, a power supply module, or the like, and may realize power and signal input / output functions via separately arranged wiring, signal lines, or the like. For example, the control chip may include hardware circuits and computer executable code. The hardware circuits may include conventional very large-scale integrated circuits (VLSIs) or gate arrays, as well as existing semiconductors such as logic chips, transistors, or other discrete elements. The hardware circuits may also include field programmable gate arrays, programmable array logic, programmable logic devices, or the like. Furthermore, those skilled in the art will understand that the above structures do not constitute limitations of the above display devices; in other words, the above display devices may include more or fewer of the above components, or may combine certain components, or have different component arrangements.

[0082] Obviously, those skilled in the art can make various modifications and changes to the present invention without departing from the spirit and scope of the present invention. Therefore, if such modifications and changes of the present invention fall within the scope of the claims of the present invention and for the equivalent techniques thereof, the present invention intends to cover such modifications and changes.

Claims

1. A display substrate, a first base substrate; a first polarizer disposed on the first base substrate side; data lines disposed on a side of the first base substrate away from the first polarizer; The extension direction of the data lines is approximately perpendicular to the absorption axis of the first polarizer.

2. 2. The display substrate of claim 1, wherein the display substrate is applied to a liquid crystal display panel, and a ratio of a thickness of the data line in a direction perpendicular to the first base substrate to a cell gap of the liquid crystal display panel is 0.14 or more and 0.27 or less.

3. 3. The display substrate of claim 2, further comprising an interlayer dielectric layer disposed on a side of the layer in which the data lines are located away from the first base substrate, the interlayer dielectric layer including at least one sub-interlayer dielectric layer, and the sum of the products of the refractive index and thickness of each of the sub-interlayer dielectric layers is an integer multiple of λ / 4.

4. the data line has a tilt angle of α; tan α = a * b 4. The display substrate according to claim 1, wherein a is 2.66 or more, and b is a cell gap of the liquid crystal display panel.

5. 5. The display substrate of claim 1, wherein the tilt angle α of the data lines is greater than 75° and less than 90°.

6. 6. The display substrate of claim 1, further comprising a common electrode, the common electrode being arranged on a side of the layer in which the data lines are located away from the first base substrate, the common electrode including a slit, and an angle between an extension direction of the slit and an absorption axis of the first polarizer being 80° or more and 100° or less.

7. The semiconductor device further includes a light-shielding structure and a transistor, wherein the transistor includes an active layer disposed between a layer in which a data line is located and the first base substrate, and the light-shielding structure is disposed between the active layer and the first base substrate; The active layer includes a first portion extending in a direction of an absorption axis of the first polarizer, and a distance between the first portion and the light-shielding structure in the extending direction of the data line is d １ Yes, d １ = c * (L / W), 7. The display substrate of claim 1, wherein c is greater than 0.446 and less than 2.08, L is a length of the pixel opening region along the extension direction of the data lines, and W is a width of the light-shielding structure along the extension direction of the data lines.

8. the transistor includes a first electrode disposed on a side of a layer in which a data line is located, the side being away from the first base substrate; the display substrate further includes an insulating layer disposed between the active layer and the first electrode; the first electrode is electrically connected to the active layer by a via hole penetrating the insulating layer; a diameter of the via hole gradually increases in a direction in which the insulating layer is away from the first base substrate; and a diameter of a bottom opening of the via hole facing the first base substrate is d; The active layer further includes a second portion extending in the extension direction of the data line, wherein an orthogonal projection of the second portion onto the first base substrate does not overlap with an orthogonal projection of the data line onto the first base substrate, the second portion is disposed integrally with the first portion, and a distance in the extension direction of the data line between one end of the second portion remote from the first portion and the via hole is d ２ and d ２ 8. The display substrate according to claim 7, wherein / d is 0.4 or more and 1 or less.

9. A display panel, 1. A display panel comprising: a display substrate and an opposing substrate arranged opposite each other; and a liquid crystal layer arranged between the display substrate and the opposing substrate, wherein the display substrate is the display substrate described in claim 1; and the opposing substrate comprises a second base substrate and a second polarizer arranged on a side of the second base substrate away from the liquid crystal layer, and the absorption axis of the second polarizer is approximately parallel to the extension direction of the data lines.

10. 10. The display panel of claim 9, wherein the opposing substrate further includes a black matrix arranged on a side of the second base substrate facing the liquid crystal layer, the black matrix including a first black matrix lip extending along an absorption axis direction of the first polarizer, and a positive projection of the first black matrix lip onto the first base substrate is located within a positive projection of the light-shielding structure onto the first base substrate.

11. 11. The display panel of claim 10, wherein the black matrix further includes a second black matrix lip extending along the extension direction of the data lines and disposed in a layer different from the layer in which the first black matrix lip is present, and wherein a positive projection of the second black matrix lip onto the first base substrate covers a positive projection of the data lines onto the first base substrate.

12. the display panel includes a display area and a dummy area surrounding the display area, the black matrix further includes a black matrix block arranged in a single layer on the entire surface of the dummy area, the first black matrix lip and the second black matrix lip are located in the display area, and the first black matrix lip and the second black matrix lip have wide portions at overlapping positions where they overlap each other; 12. The display panel of claim 11, wherein the opposing substrate further includes a color resistive layer located on a side of the layer where the black matrix is ​​located that faces the liquid crystal layer, the color resistive layer further includes a first color resistive strip located in the display area and a second color resistive strip located in the dummy area, the first color resistive strip and the second color resistive strip respectively extending along the extension direction of the data lines, the first color resistive strip filling a grid defined by the first black matrix lip and the second black matrix lip and covering the first black matrix lip and the second black matrix lip, the thickness of the first color resistive strip in the grid defined by the first black matrix lip and the second black matrix lip being greater than the thickness of the first color resistive strip in the wide portion and the thickness of the first color resistive strip in the second color resistive strip, and the thickness of the first color resistive strip in the wide portion being less than the thickness of the second color resistive strip.

13. 13. The display panel of claim 12, wherein the opposing substrate further includes a spacer and a first auxiliary spacer arranged in a single layer on the side of the color resistive layer facing the liquid crystal layer, wherein the orthogonal projection of the spacer onto the first base substrate is located within the orthogonal projection of the wide portion onto the first base substrate, and the orthogonal projection of the first auxiliary spacer onto the first base substrate is located within the orthogonal projection of the second color resistive strip onto the first base substrate.

14. 14. The display panel of claim 13, wherein the first color resistive strip includes a red resistive strip, the orthogonal projection of the wide portion onto the first base substrate is penetrated by the orthogonal projection of the red resistive strip onto the first base substrate, and the orthogonal projection of the spacer onto the first base substrate overlaps with the orthogonal projection of the red resistive strip onto the first base substrate.

15. 15. The display panel of claim 12, wherein the black matrix block is disposed in one layer with the first black matrix lip or the second black matrix lip.

16. 16. The display panel of claim 12, wherein the thickness of the black matrix block is equal to the thickness of the first black matrix lip or the thickness of the second black matrix lip.

17. 15. The display panel according to claim 13, wherein the display substrate includes a support layer disposed on a side of the common electrode away from the first base substrate, the support layer includes a first boss located in the display region, and an area of ​​a surface of the first boss facing the liquid crystal layer is smaller than an area of ​​a surface of the spacer facing the liquid crystal layer.

18. 18. The display panel of claim 13, claim 14, or claim 17, wherein the display substrate includes a support layer arranged on a side of the common electrode away from the first base substrate, the support layer includes a first boss located in the display area, the spacers include a main spacer and a second auxiliary spacer, and a height of the first boss is greater than a difference between a height of the main spacer and a height of the second auxiliary spacer in a direction perpendicular to the first base substrate.

19. The display panel of claim 18 , wherein the height of the first auxiliary spacers is approximately the same as the height of the second auxiliary spacers.

20. 20. The display panel according to claim 17, wherein the support layer further includes a second boss located in the dummy region, and a distance between a surface of the second boss facing the liquid crystal layer and the first base substrate is greater than a distance between the surface of the second boss facing the liquid crystal layer and the first base substrate.

21. 21. A display panel according to claim 13, claim 14, or claim 17, further comprising a protective layer disposed between the color resistive layer and the layer in which the spacers are located, wherein the thickness of the protective layer in the display area is thinner than the thickness of the protective layer in the dummy area.

22. A display device, A display device comprising: a backlight module; and a display panel disposed on a light-emitting side of the backlight module, the display panel being the display panel according to claim 9.

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