Semiconductor device

Abstract

To provide a semiconductor device capable of improving a breakdown voltage.SOLUTION: The semiconductor device includes an insulating layer 2 provided on a semiconductor substrate 1, a first resistor (R (4)) embedded in the insulating layer 2 and electrically connected to a node on a first potential side, a second resistor (R (5)) embedded in the insulating layer 2, a third resistor (R (6)) embedded in the insulating layer 2, and a reference electrode EG electrically connected to a node on a second potential side of the third resistor (R (6)). A first resistor (R (4)), a second resistor (R (5)), and a third resistor (R (6)) are connected in series, the first resistor (R (4)) is configured by connecting N resistors in parallel, the second resistor (R (5)) is configured by connecting M resistors in parallel, the third resistor (R (6)) is configured by connecting L resistors in parallel, and N <L and M <L are satisfied.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device including a plurality of resistor elements.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

[0004] [Summary] The present disclosure provides a semiconductor device capable of improving breakdown voltage.

[0005] The semiconductor device according to the present disclosure includes an insulating layer provided on a semiconductor substrate, a first resistor embedded in the insulating layer and electrically connected to a node on the first potential side, a second resistor embedded in the insulating layer, a third resistor embedded in the insulating layer, and a reference electrode electrically connected to a node on the second potential side of the third resistor. The absolute value of the first potential is larger than the absolute value of the second potential. The first resistor, the second resistor, and the third resistor are connected in series. The first resistor is formed by connecting N resistors in parallel, the second resistor is formed by connecting M resistors in parallel, the third resistor is formed by connecting L resistors in parallel, and N < L and M < L are satisfied.

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a plan view of a semiconductor package equipped with a high-voltage detection device. [Figure 2] FIG. 2 is a circuit diagram of the high-voltage detection device. [Figure 3] FIG. 3 is a circuit diagram of a resistor of the first example (FIG. 3(A)) and a circuit diagram of a resistor of the second example (FIG. 3(B)). [Figure 4] FIG. 4 is a circuit diagram of a resistor near the reference electrode. [Figure 5] FIG. 5 is a diagram showing the connection relationship between the resistance elements and electrodes in the low resistance portion. [Figure 6] 6A and 6B are diagrams showing the longitudinal cross-sectional configuration of the resistor at a position passing through the resistance element (FIG. 6A) and the longitudinal cross-sectional configuration of the resistor at a position passing through the reference electrode (FIG. 6B). [Figure 7] FIG. 7 is a diagram showing the connection relationship between the resistance elements and electrodes in the low resistance portion. [Figure 8] FIG. 8 is a plan view of a plurality of resistance elements. [Figure 9] FIG. 9 is a diagram showing a planar configuration of a resistor provided with dummy wiring. [Figure 10] FIG. 10 is a diagram showing a vertical cross-sectional configuration of the resistor at a position where the dummy wiring passes.

[0007] [Detailed explanation] Various exemplary embodiments will be described in detail below with reference to the drawings. Note that the same or equivalent parts in the drawings will be denoted by the same reference numerals, and redundant explanations will be omitted.

[0008] FIG. 1 is a plan view of a semiconductor package 100 equipped with a high-voltage detection device.

[0009] In addition, the figure shows the state where the upper lid material is removed.

[0010] The semiconductor package 100 includes a case 30 having a recess D1. The case 30 is made of an insulating material such as resin or ceramic. The semiconductor package 100 includes a resistor chip 10 (semiconductor device) disposed on a first die pad 110 within the recess D1 and an amplifier chip 20 (semiconductor device) disposed on a second die pad 120 within the recess D1. The open end of the recess D1 of the semiconductor package 100 is sealed with a lid (not shown), creating an enclosed space within the recess D1. The lid may be made of an insulating material such as resin, and the recess D1 may be filled with a gas or an insulating material. An appropriate potential, such as ground potential, is applied to the first die pad 110 and the second die pad 120 via a lead frame. If necessary, the potential of the first die pad 110 may be set to a high potential, for example.

[0011] The output voltage of the resistor chip 10 is input to the amplifier chip 20. The amplifier chip 20 outputs an output voltage corresponding to the detected voltage.

[0012] The positive terminal of the battery 200 is electrically connected to the first inner lead 10a and is connected via a bonding wire to the first electrode E1 (see FIG. 2) of the resistor chip 10. The negative terminal of the battery 200 is electrically connected to the second inner lead 10b and is connected via a bonding wire to the second electrode E2 (see FIG. 2) of the resistor chip 10.

[0013] Each terminal of the amplifier chip 20 can be connected to the third inner lead 10c, the fourth inner lead 10d, the fifth inner lead 10e, the sixth inner lead 10f, the seventh inner lead 10g, the eighth inner lead 10h, and the ninth inner lead 10i via bonding wires.

[0014] For example, the third inner lead 10c is supplied with a power supply voltage Vcc and input to the amplifier chip 20. The ninth inner lead 10i is supplied with a ground potential GND and input to the amplifier chip 20. The sixth inner lead 10f can output an output voltage Vout. The fourth inner lead 10d can output a monitor signal corresponding to the potential of the first output electrode EP (see Figure 2). The eighth inner lead 10h can output a monitor signal corresponding to the potential of the second output electrode EN (see Figure 2). The fifth inner lead 10e and the seventh inner lead 10g can be used for other purposes as needed.

[0015] 2 is a circuit diagram of a high-voltage detection device. The high-voltage detection device includes a resistor circuit C10 (voltage divider circuit) and a voltage detection circuit C20. The resistor chip 10 described above includes the resistor circuit C10. The amplifier chip 20 includes the voltage detection circuit C20. A first input terminal HV(+) of the resistor circuit C10 is electrically connected to the positive electrode of the battery 200. A second input terminal HV(-) of the resistor circuit C10 is electrically connected to the negative electrode of the battery 200. The first input terminal HV(+) is electrically connected to a first electrode E1 (electrode pad). The second input terminal HV(-) is electrically connected to a second electrode E2 (electrode pad).

[0016] The resistance circuit C10 includes a first high resistance section RP (first resistor), a first low resistance section RPS, a second low resistance section RNS, and a second high resistance section RN (second resistor). The first high resistance section RP, the first low resistance section RPS, the second low resistance section RNS, and the second high resistance section RN are connected in series in this order between the first electrode E1 and the second electrode E2. The first high resistance section RP and the second high resistance section RN have a function of reducing a high voltage and each have a high resistance value. The first low resistance section RPS and the second low resistance section RNS have a function of detecting a voltage and each have a relatively low resistance value compared to the high resistance sections.

[0017] An exemplary resistance value of one high resistance section is 500 MΩ, but it can also be 1 MΩ or more and 1000 MΩ or less. The resistance value of the high resistance section can also be 100 MΩ or more and 800 MΩ or less. The resistance value of the high resistance section can also be 300 MΩ or more and 600 MΩ or less. This resistance value should be a resistance value that can withstand high voltages and allows voltage detection.

[0018] The resistance value of one low resistance section (RPS or RNS) is equal to or less than K% of the resistance value of the high resistance section. Exemplary values ​​of K% are 5%, 3%, 1%, 0.5%, 0.3%, 0.1%, 0.05%, or 0.01%, and the resistance value of the low resistance section can be, for example, 0.01 MΩ to 10 MΩ.

[0019] A first output electrode EP (electrode pad) is electrically connected to the connection point between the first high resistance section RP and the first low resistance section RPS. A second output electrode EN (electrode pad) is electrically connected to the connection point between the second high resistance section RN and the second low resistance section RNS. A reference electrode EG (electrode pad) is electrically connected between the first low resistance section RPS and the second low resistance section RNS.

[0020] The resistor circuit C10 is a voltage divider circuit, which can obtain a voltage corresponding to the resistance value between two selected points within the resistor circuit C10. The first output electrode EP is electrically connected to the first input terminal INP of the voltage detection circuit C20. The second output electrode EN is electrically connected to the second input terminal INN of the voltage detection circuit C20. The reference electrode EG is electrically connected to the reference terminal VC of the voltage detection circuit C20. The potential of the reference terminal VC can be set to, for example, ground potential. The voltage detection circuit C20 can output an output voltage Vout. The output voltage Vout can be the sum of a first potential difference between the first input terminal INP and the reference terminal VC and a second potential difference between the second input terminal INN and the reference terminal VC. The voltage detection circuit C20 can include a source follower (amplifier) ​​that amplifies the voltage input from the input terminals and a differential amplifier circuit that obtains the sum of the input voltages. The voltage detection circuit C20 has an input terminal for a power supply voltage Vcc for operating the internal circuit and an input terminal for setting the ground potential GND.

[0021] Resistor circuit C10 may include a dummy resistor.

[0022] FIG. 3 shows a circuit diagram of a resistor of a first example (FIG. 3(A)) and a circuit diagram of a resistor of a second example (FIG. 3(B)).

[0023] In the resistor circuit C10 of FIG. 3A, one end of a dummy resistor R (Dmy) is electrically connected to the input side of the first high resistance section RP. The dummy resistor R (Dmy) is electrically connected to the input side of the second high resistance section RN. The dummy resistor does not need to be electrically connected to a resistor. For example, resistors at both ends of a resistor chip may have different resistance characteristics compared to resistors near the center. Treating such resistors as dummy resistors may improve detection accuracy.

[0024] The resistor circuit C10 in FIG. 3B has a configuration that is a modification of the circuit of the first example. In this example, the first high resistance section RP is composed of a high resistance section RP1 and a high resistance section RP2 connected in series, and the second high resistance section RN is composed of a high resistance section RN1 and a high resistance section RN2 connected in series. In addition, the reference electrode EG is separated into a first reference electrode EG1 and a second reference electrode EG2, and these electrodes are electrically connectable on the voltage detection circuit side. Furthermore, compared to the circuit of the first example, one or more dummy resistors R (Dmy) are provided between each resistor section.

[0025] The dummy resistor is a resistor through which no current flows, and is provided to maintain electrical equivalence in the resistor circuit C10, maintain electrical stability, or reduce error factors that may occur during resistor manufacturing in the manufacturing process. The circuit configuration of the high voltage detection device is not limited to these, and the shape and arrangement of the resistor may be changed as long as the basic voltage detection function is achieved.

[0026] As described above, the high-voltage detection device can be housed in a single semiconductor package. Alternatively, the functions of each circuit can be separated into a resistor chip and an amplifier chip and mounted in the package. Modifications are also possible in which some of the circuit elements are moved to either chip or integrated into a single chip.

[0027] FIG. 4 is a circuit diagram of a resistor near the reference electrode.

[0028] The first high resistance section RP, to which a positive high potential is applied, includes a first resistor R(1), a second resistor R(2), and a third resistor R(3) connected in series. One resistor is configured by connecting at least two resistance elements (resistors, resistance layers) in series. For example, the first resistor R(1) is configured by connecting two resistance elements (R(1-1) and R(1-2)) in series. Similarly, the k-th resistor R(k) is configured by connecting two resistance elements (R(k-1) and R(k-2)) in series (k is a natural number).

[0029] The second high resistance section RN on the side to which a negative high potential is applied includes a first resistor R(1), a second resistor R(2), and a third resistor R(3) connected in series.

[0030] The first low resistance unit RPS includes a fourth resistor R(4), a fifth resistor R(5), and a sixth resistor R(6) connected in series. Similarly, the second low resistance unit RNS includes a fourth resistor R(4), a fifth resistor R(5), and a sixth resistor R(6) connected in series.

[0031] A first output electrode EP is connected to a node (N11) between the first high resistance portion RP and the first low resistance portion RPS.

[0032] A second output electrode EN is connected to a node (N21) between the second high resistance section RN and the second low resistance section RNS.

[0033] The reference electrode EG is electrically connected to a node N3 between the resistor R(6) of the first low resistance unit RPS and the resistor R(6) of the second low resistance unit RNS. In other words, the reference electrode EG is electrically connected to one end of the resistor R(6) of the first low resistance unit RPS and one end of the resistor R(6) of the second low resistance unit RNS.

[0034] FIG. 5 is a diagram showing the connection relationship between the resistance elements and electrodes in the low resistance portion.

[0035] The first row counting from the high potential side of the fourth resistor R(4) has two series-connected resistance elements R(4-1-1) and R(4-2-1). The Nth row counting from the high potential side of the fourth resistor R(4) has two series-connected resistance elements R(4-1-N) and R(4-2-N). The combined resistance of the resistance elements per row can be considered as one resistor. In this case, the fourth resistor R(4) has N resistors.

[0036] The first row counting from the high potential side of the fifth resistor R(5) has two series-connected resistance elements R(5-1-1) and R(5-2-1). The Mth row counting from the high potential side of the fifth resistor R(5) has two series-connected resistance elements R(5-1-M) and R(5-2-M). If the combined resistance of the resistance elements per row is considered to be one resistor, the fifth resistor R(5) has M resistors.

[0037] The first row counting from the high potential side of the sixth resistor R(6) has two series-connected resistance elements R(6-1-1) and R(6-2-1). The Lth row counting from the high potential side of the sixth resistor R(6) has two series-connected resistance elements R(6-1-L) and R(6-2-L). If the combined resistance of the resistance elements per row is considered to be one resistor, the sixth resistor R(6) has L resistors.

[0038] The upper surface of a via electrode VE is connected to the lower surface of each end of each resistance element R, and the lower surface of the via electrode is connected to a buried electrode BE. Focusing on one row, a pair of aligned resistance elements are connected in series via the via electrode VE and the buried electrode.

[0039] Focusing on the N resistors in the fourth resistor R(4), one end of each resistor is connected to a common buried electrode BE on one side through a via electrode VE located directly below it. The other end of each resistor is connected to a common buried electrode BE on the other side through a via electrode VE located directly below it. That is, the N resistors are connected in parallel between the buried electrode BE on one side and the buried electrode BE on the other side. A first wiring BEP is continuously connected to the common buried electrode BE on one side of the fourth resistor R(4), and an end of the first wiring BEP is electrically connected to the first output electrode EP through a via electrode (VE3).

[0040] In the fifth resistor R(5), focusing on the M resistors, one end of each resistor is connected to a common buried electrode BE on one side via a via electrode VE located directly below it. The other end of each resistor is connected to a common buried electrode BE on the other side via a via electrode VE located directly below it. That is, the M resistors are connected in parallel between the buried electrode BE on one side and the buried electrode BE on the other side.

[0041] In the sixth resistor R(6), focusing on the L resistors, one end of each resistor is connected to a common buried electrode BE on one side via a via electrode VE located directly below it. The other end of each resistor is connected to a common buried electrode BE on the other side via a via electrode VE located directly below it. That is, the L resistors are connected in parallel between the buried electrode BE on one side and the buried electrode BE on the other side. A second wiring BEG is continuously connected to the common buried electrode BE on the other side in the sixth resistor R(6), and the end of the second wiring BEG is electrically connected to the reference electrode EG via a via electrode (VE3).

[0042] When the number of resistors in the fourth resistor R(4) is N, the number of resistors in the fifth resistor R(5) is M, and the number of resistors in the sixth resistor R(6) is L, from the perspective of improving the breakdown voltage, at least N < L and M < L are satisfied. From the perspective of improving the breakdown voltage, preferably, N < M < L is satisfied. From the perspective of improving the breakdown voltage, even when M < N < L, a certain degree of effect can be obtained.

[0043] In FIG. 5, the structure of the first low-resistance portion RPS has been described, but the structure of the second low-resistance portion RNS is also the same as that of the first low-resistance portion RPS. However, in the first low-resistance portion RPS, a positive potential is applied, while in the second low-resistance portion RNS, a negative potential is applied. Also, in the second low-resistance portion RNS, the end of the first wiring BEP is electrically connected to the second output electrode EN (see FIG. 4) via a via electrode (VE3).

[0044] Figure 6 shows the longitudinal cross-sectional configuration of the resistor at a position passing through a pair of adjacent resistive elements in the row direction (Figure 6(A)), and a vertical cross-sectional configuration of the resistor at a position passing through the reference electrode EG (Figure 6(B)).

[0045] 6(A), the semiconductor device includes an insulating layer 2 provided on a semiconductor substrate 1, and a plurality of resistors R (resistive elements, resistive layers) embedded in the insulating layer 2. All of the resistors R are embedded in the insulating layer 2.

[0046] The insulating layer 2 includes a plurality of laminated dielectric layers (first dielectric layer 2A, second dielectric layer 2B). At least one of the plurality of dielectric layers (first dielectric layer 2A) is made of a material containing silicon oxide. At least one of the plurality of dielectric layers (second dielectric layer 2B) is made of a material containing silicon nitride. In this example, the first dielectric layer 2A and the second dielectric layer 2B are alternately laminated. The silicon oxide in this example is SiO2, but the elemental composition ratio may be changed or other elements may be included as necessary. The silicon nitride in this example is Si3N4, but the elemental composition ratio may be changed or other elements may be included as necessary. The thickness of the insulating layer 2 may be, for example, 5 μm or more and 50 μm or less.

[0047] The insulating layer 2 is a lower dielectric layer 2A formed on a second dielectric layer 2B located at the top. L and the lower dielectric layer 2A L Upper dielectric layer 2A formed on H The lower dielectric layer 2A L and upper dielectric layer 2A H The exemplary material is the same as the material of the first dielectric layer 2A.

[0048] The protective film 4 includes a first protective film 4A, a second protective film 4B, and a third protective film 4C, which are sequentially stacked on the insulating layer 2. The first protective film 4A may be made of an inorganic insulator such as silicon oxide or silicon nitride, for example, SiO2. The second protective film 4B is formed on the first protective film 4A. The second protective film 4B is made of an inorganic insulator such as silicon oxide or silicon nitride, and may be the same as or different from the material of the first protective film 4A, for example, silicon nitride. The third protective film 4C is made of a resin (insulator) such as polyimide.

[0049] A buried electrode BE is disposed directly below the resistor R, and the resistor R and the buried electrode BE are electrically connected through a via electrode (VE). Note that since the physical connection of conductive elements involves an electrical connection, in the explanation, the term "connection" may be used simply when the connection state is clear.

[0050] 6(B), a reference electrode EG is disposed on the insulating layer 2. The upper end of a via electrode (VE3) is connected to the lower surface of the reference electrode EG, and the lower end of the via electrode (VE3) is connected to the second wiring BEG. The second wiring BEG also functions as a buried electrode at a position directly below the resistor R, and the resistor R and the buried electrode (second wiring BEG) are electrically connected via the via electrode VE.

[0051] FIG. 7 is a diagram showing the connection relationship between the resistance elements and electrodes in the low resistance portion.

[0052] In this example, the number of pairs of resistance elements in one row shown in Figure 5 is reduced to one. That is, in the fourth resistor R(4), N resistors each having one resistance element R in one row are connected in parallel. In the fifth resistor R(5), M resistors each having one resistance element R in one row are connected in parallel. In the sixth resistor R(6), L resistors each having one resistance element R in one row are connected in parallel.

[0053] As in this example, even if a resistance element on one side is removed, at least N < L and M < L are satisfied from the viewpoint of improving the breakdown voltage. From the viewpoint of improving the breakdown voltage, preferably, N < M < L is satisfied. From the viewpoint of improving the breakdown voltage, even when M < N < L, a certain degree of effect can be obtained. The resistance values of all the resistance elements are equal and, for example, are 200 kΩ.

[0054] When removing a resistance element on one side, another resistance element can be arranged within the removed region.

[0055] FIG. 8 is a plan view of a plurality of resistance elements.

[0056] The fourth resistor R(4) is formed by connecting N resistance elements R (resistors, resistance layers) in parallel by embedded electrodes BE located at both ends. The fifth resistor R(5) is formed by connecting M resistance elements R in parallel by embedded electrodes BE located at both ends. The sixth resistor R(6) is formed by connecting L resistance elements R in parallel by embedded electrodes BE located at both ends. The fourth resistor (4), the fifth resistor R(5), and the sixth resistor R(6) are connected in series. In the first low-resistance portion RPS (see FIG. 4), these fourth to sixth resistors are connected in series between the first output electrode EP and the reference electrode EG. In the second low-resistance portion RNS (see FIG. 4), these fourth to sixth resistors are connected in series between the second output electrode EN and the reference electrode EG.

[0057] A dummy resistor R(Dmy) is arranged on the row extension of each resistive element R included in part of the fifth resistor R(5). A dummy resistor R(Dmy) is arranged on the row extension of each resistive element R included in the sixth resistor R(6). The dummy resistor R(Dmy) is not electrically connected to the fourth to sixth resistors. One end of the dummy resistor R(Dmy) may be electrically connected to the fourth to sixth resistors, but is not connected in such a way that current flows through the dummy resistor R(Dmy). A via electrode and a buried wiring may be formed directly below the dummy resistor R(Dmy), but this is not required. The dummy resistor R(Dmy), like other resistors, has a plurality of resistive elements R arranged in an array.

[0058] Let's consider an increase in withstand voltage. The resistor chip is fixed on a frame, and let's assume that a 2000V high-frequency noise is introduced into the frame. The resistance value of each resistive element R is assumed to be 200kΩ. The noise input to the frame is transmitted to the resistor via the parasitic capacitance between the semiconductor substrate and the resistor.

[0059] (Comparative Example 1) In Comparative Example 1 (N = M = L), the fourth resistor R(4) has N = 27 resistors, the fifth resistor R(5) has M = 27 resistors, and the sixth resistor R(6) has N = 27 resistors. The fourth resistor R(4) is configured by connecting N resistors in parallel, each of which is made up of two 200 kΩ resistance elements connected in series. The fifth resistor R(5) is configured by connecting M resistors in parallel, each of which is made up of two 200 kΩ resistance elements connected in series. The sixth resistor R(6) is configured by connecting L resistors in parallel, each of which is made up of two 200 kΩ resistance elements connected in series. The third resistor R(3) is configured by connecting two 200 kΩ resistance elements in series. The combined resistance of the fourth resistor R(4) is approximately 14.8 kΩ. The combined resistance value of the fifth resistor R(5) is approximately 14.8 kΩ. The combined resistance value of the sixth resistor R(6) is approximately 14.8 kΩ. When the fourth and fifth resistors are connected in series, the combined resistance value is approximately 44.4 kΩ.

[0060] In this case, the current flowing through one resistor element was 1.607 (mA) in the third resistor, 0.203 (mA) in the fourth resistor, 1.569 (mA) in the fifth resistor, and 3.504 (mA) in the sixth resistor. That is, the largest current was flowing through the sixth resistor.

[0061] (Example 1) As Example 1 (N < M < L), assume that the fourth resistor R(4) is composed of N = 10 resistors, the fifth resistor R(5) is composed of M = 12 resistors, and the sixth resistor R(6) is composed of L = 27 resistors. The fourth resistor R(4) is formed by connecting 10 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is 20 kΩ. The fifth resistor R(5) is formed by connecting 12 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is approximately 16.67 kΩ. The sixth resistor R(6) is formed by connecting 27 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is approximately 7.41 kΩ. Assume that the third resistor R(3) is formed by connecting two resistors each formed by connecting two 200 kΩ resistor elements in series in parallel. The combined resistance value when the fourth to sixth resistors are connected in series is approximately 44.1 kΩ. Note that the combined resistance value of the fourth resistor > the combined resistance value of the fifth resistor > the combined resistance value of the sixth resistor.

[0062] In this case, the current flowing through one resistor element was 2.108 (mA) in the third resistor, 0.897 (mA) in the fourth resistor, 2.564 (mA) in the fifth resistor, and 2.869 (mA) in the sixth resistor. That is, the current in the sixth resistor decreased, and the current flowed dispersedly through the other resistors.

[0063] (Example 2) As Example 2 (N < M < L), assume that the fourth resistor R(4) has N = 6 resistors, the fifth resistor R(5) has M = 27 resistors, and the sixth resistor R(6) has L = 54 resistors. The fourth resistor R(4) is formed by connecting 6 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is approximately 33.33 kΩ. The fifth resistor R(5) is formed by connecting 27 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is approximately 7.41 kΩ. The sixth resistor R(6) is formed by connecting 54 resistors each consisting of a 200 kΩ resistor element in parallel, and the combined resistance value is approximately 3.70 kΩ. Assume that the third resistor R(3) is formed by connecting 2 resistors each consisting of a 200 kΩ resistor element connected in series in parallel. The combined resistance value when the fourth resistor to the sixth resistor are connected in series is approximately 44.4 kΩ. Note that the combined resistance value of the fourth resistor > the combined resistance value of the fifth resistor > the combined resistance value of the sixth resistor.

[0064] In this case, the current flowing through one resistor element was 2.242 (mA) in the third resistor, 1.153 (mA) in the fourth resistor, 1.370 (mA) in the fifth resistor, and 2.171 (mA) in the sixth resistor. That is, the current in the sixth resistor was further reduced compared to Example 1, and the current flowed dispersedly through the other resistors.

[0065] (Example 3) In Example 3 (M < N < L), N = 14, M = 10, and L = 21, and other conditions were the same as in Example 1. In this case, the current flowing through one resistor element was 1.920 (mA) in the third resistor, 0.361 (mA) in the fourth resistor, 3.172 (mA) in the fifth resistor, and 3.234 (mA) in the sixth resistor. That is, the current in the sixth resistor was reduced compared to Comparative Example 1, and the current flowed dispersedly through the other resistors, but the current increased compared to Example 1.

[0066] (Example 4) In Example 4 (M < N < L), it is assumed that the third resistor R(3) is a resistor formed by connecting two 200 kΩ resistor elements in series, and other conditions are the same as in Example 3. In this case, the current flowing through one resistor element was 3.126 (mA) in the third resistor, 0.254 (mA) in the fourth resistor, 2.982 (mA) in the fifth resistor, and 3.219 (mA) in the sixth resistor. That is, the current in the sixth resistor decreased compared to Comparative Example 1, and the current flowed distributed among the other resistors, but the current increased compared to Example 1.

[0067] (Comparative Example 2) In Comparative Example 2 (M < L < N), N = 27, M = 10, and L = 21, and other conditions are the same as in Example 4. Note that the fourth resistor R(4) is formed by connecting 27 resistors, each of which is formed by connecting two 200 kΩ resistor elements in series, in parallel. In this case, the current flowing through one resistor element was 1.911 (mA) in the third resistor, 0.472 (mA) in the fourth resistor, 4.747 (mA) in the fifth resistor, and 3.449 (mA) in the sixth resistor. That is, the current in the fifth resistor increased compared to the maximum current (3.504 (mA)) in the sixth resistor of Comparative Example 1.

[0068] (Comparative Example 3) In Comparative Example 3 (N = 0, M = L), N = 0, M = 18, and L = 18, and other conditions are the same as in Example 1. Note that the fifth resistor R(5) is formed by connecting 18 resistors, each of which is formed by connecting two 200 kΩ resistor elements in series, in parallel. The sixth resistor R(6) is formed by connecting 18 resistors, each of which is formed by connecting two 200 kΩ resistor elements in series, in parallel. In this case, the current flowing through one resistor element was 1.537 (mA) in the third resistor, 0.795 (mA) in the fifth resistor, and 3.706 (mA) in the sixth resistor. That is, the current in the sixth resistor increased compared to the maximum current (3.504 (mA)) in the sixth resistor of Comparative Example 1.

[0069] (Comparative Example 4) In Comparative Example 4 (N=0, M=L), the third resistor R(3) was a resistor consisting of two 200 kΩ resistor elements connected in series, and the other conditions were the same as in Comparative Example 3. In this case, the current flowing through one resistor element was 2.403 (mA) in the third resistor, 0.673 (mA) in the fifth resistor, and 3.689 (mA) in the sixth resistor. In other words, the current in the sixth resistor was higher than the maximum current (3.504 (mA)) in the sixth resistor of Comparative Example 1.

[0070] (Comparative Example 5) In Comparative Example 5 (N=0, M=0, L=9), N=0, M=0, and L=9 were used, with the other conditions being the same as in Comparative Example 4. The sixth resistor R(6) consisted of nine resistors connected in parallel, each of which was made up of two 200 kΩ resistance elements connected in series. In this case, the current flowing through one resistance element was 4.106 mA in the third resistor and 2.875 mA in the sixth resistor. The current in the third resistor was higher than the maximum current (3.504 mA) in the sixth resistor of Comparative Example 1.

[0071] (Comparative Example 6) In Comparative Example 6 (N=0, M=0, L=9), the third resistor R(3) was configured as two parallel resistors, each of which was configured as two 200 kΩ resistance elements connected in series, and the other conditions were the same as in Comparative Example 5. In this case, the current flowing through one resistance element was 2.314 (mA) in the third resistor and 3.232 (mA) in the sixth resistor. The current in the sixth resistor was lower than the maximum current (3.504 (mA)) in the sixth resistor of Comparative Example 1.

[0072] The ratios of N, M, and L in Examples 1 to 4 will be examined.

[0073] In Comparative Example 1, (N / M) = 1, (M / L) = 1. In Example 1, (N / M) = (10 / 12) = 0.83, (M / L) = (12 / 27) = 0.44. In Example 2, (N / M) = (6 / 27) = 0.22, (M / L) = (27 / 54) = 0.5. In Examples 3 and 4, (N / M) = (14 / 10) = 1.4, (M / L) = (10 / 21) = 0.48.

[0074] In Examples 1 to 4, 0.44≦(M / L)≦0.5. If these lower and upper limits include an error of ±10%, the relationship 0.44×90%≦(M / L)≦0.5×110% is satisfied. That is, 0.396≦(M / L)≦0.55. When reduced to one significant digit, 0.4≦(M / L)≦0.6.

[0075] As in Examples 1 and 2, the smaller the (N / M) value, the lower the current flowing through the resistance element of the sixth resistor. That is, if 0.22≦(N / M)≦0.83, the same effect as in Examples 1 and 2 can be expected. If these lower and upper limits include an error of ±10%, the following relationship can be satisfied: 0.22×90%≦(N / M)≦0.83×110%. That is, 0.198≦(N / M)≦0.913. When the significant digit is one, 0.2≦(N / M)≦0.9.

[0076] The above-described structure may further include dummy wiring.

[0077] FIG. 9 is a diagram showing a planar configuration of a resistor provided with dummy wiring.

[0078] In one row, a pair of resistive elements R are connected in series via via electrodes VE and buried electrodes BE. The buried electrode BE on the left side extends across multiple rows and electrically connects one end of each of the resistive elements R in the left column via via electrodes VE provided on the undersides of the other ends of the resistive elements R in the left column. Similarly, the buried electrode BE on the right side extends across multiple rows and electrically connects the other end of each of the resistive elements R in the right column via via electrodes VE provided on the undersides of the other ends of the resistive elements R in the right column.

[0079] One end of the dummy wiring DMW is connected to the buried electrode BE on the left side through a via electrode (VE4). One end of the dummy wiring DMW is connected to the buried electrode BE on the right side through a via electrode (VE4). The dummy wiring DMW is directly connected to the buried electrode BE, but they may be capacitively coupled.

[0080] The dummy wiring can be arranged to suppress localized electric field concentration, thereby increasing the withstand voltage of the resistor chip. The length of the dummy wiring DMW is relatively long in a region relatively close to the first electrode E1 or the second electrode E2, and is relatively short in a region near the first output electrode EP or the second output electrode EN. The dummy wiring can be arranged to surround the first electrode E1 and the second electrode E2. The withstand voltage of the resistor chip can be further increased by arranging the dummy wiring so that the potential of the dummy wiring connected to the resistor gradually decreases in the direction from the first electrode E1 toward the chip edge.

[0081] FIG. 10 is a diagram showing a vertical cross-sectional configuration of the resistor at a position where the dummy wiring passes.

[0082] A pair of resistance elements R located in the center are connected via a central buried electrode BE and a via electrode VE. The left-side buried electrode BE is connected to the left-side resistance element R via a via electrode, and this buried electrode BE is connected to the left-side dummy wiring DMW via a via electrode (VE4). The right-side buried electrode BE is connected to the right-side resistance element R via a via electrode, and this buried electrode BE is connected to the right-side dummy wiring DMW via a via electrode (VE4). The connection structure of the dummy wiring DMW is the same even within a cross section including other resistors.

[0083] The dummy wiring DMW is formed on an insulating layer 2 and is covered with a protective film 4. The dummy wiring DMW, the first output electrode EP, the reference electrode EG, and the second output electrode EN can be formed at the same height position (in the same layer).

[0084] The materials of each element will be explained.

[0085] The semiconductor substrate 1 (FIGS. 6 and 10) may have conductivity. For example, the impurity concentration of the semiconductor substrate 1 may be 5×10 13 (cm -3 ) or more 5 x 10 14 (cm -3 The thickness of the semiconductor substrate 1 may be 50 μm or more and 800 μm or less. The material of the semiconductor substrate 1 may be silicon (Si), but it is also possible to use a compound semiconductor such as SiC or SiGe.

[0086] The material of the resistive layer (wire resistor) constituting the resistor R is a resistive material with a higher resistivity than polysilicon. Specifically, the material of the resistor (resistive layer) is a material containing chromium (Cr) and silicon (Si), such as CrSi, CrSiC, or CrSiN. Other materials can also be used. Specifically, the material of the resistive layer constituting the resistor can include at least one metal compound selected from the group consisting of CrSi, CrSiN, CrSiO, TaN, and TiN. The resistive layer constituting the resistor can be formed using a sputtering method using a target containing a resistive material. Depending on the type of material of the resistor R, a plating method can also be used. The material of the resistor R may be composed of a single resistive material or a combination of multiple resistive materials. The thickness Rd of each resistive layer constituting the resistor R can be 1 nm≦Rd≦5 nm. When the thickness Rd is equal to or less than the upper limit, the resistance value can be sufficiently high, and when the thickness Rd is equal to or greater than the lower limit, the durability and strength of the resistive layer can be maintained.

[0087] The first electrode E1, the second electrode E2, and the buried electrodes (buried wiring) can be made of metal materials such as Al (aluminum) or Cu (copper).The various via electrodes can be made of high-melting-point metals such as tungsten (W), but other electrode materials can also be used.

[0088] In addition, in the range of various parameters, the range of an arbitrary parameter P is P min ≦P≦P max If given by (P min +ΔP)≦P≦(P max -ΔP), ΔP=(P max -P min )×R%, R may be set to 10, or R may be set to 20, R may be set to 30, or R may be set to 40. (Supplementary Note) As described above, various embodiments of the present disclosure can be defined as the following supplementary notes. [A1]An insulating layer 2 provided on a semiconductor substrate 1, a first resistor (R(4)) embedded in the insulating layer 2 and electrically connected to a node on the first potential side, a second resistor (R(5)) embedded in the insulating layer 2, a third resistor (R(6)) embedded in the insulating layer 2, and a reference electrode EG electrically connected to a node on the second potential side of the third resistor (R(6)), wherein the absolute value of the first potential is greater than the absolute value of the second potential, the first resistor (R(4)), the second resistor (R(5)), and the third resistor (R(6)) are connected in series, the first resistor (R(4)) is formed by connecting N resistors in parallel, the second resistor (R(5)) is formed by connecting M resistors in parallel, the third resistor (R(6)) is formed by connecting L resistors in parallel, and N < L and M < L are satisfied. A semiconductor device.

[0089] [A2]The semiconductor device according to [A1], satisfying N < M.

[0090] [A3]A first high-resistance portion RP embedded in the insulating layer 2, a first low-resistance portion RPS embedded in the insulating layer 2, a first electrode electrically connected to one end of the first high-resistance portion RP, and a first output electrode electrically connected to a connection point between the first high-resistance portion RP and the first low-resistance portion RPS, wherein the first high-resistance portion RP has a relatively higher resistance value than the resistance value of the first low-resistance portion RPS, the reference electrode EG is electrically connected to an end portion of the first low-resistance portion RPS opposite to the connection point, and the first low-resistance portion RPS includes the first resistor (R(4)), the second resistor (R(5)), and the third resistor (R(6)). The semiconductor device according to [A1].

[0091] [A4]A fourth resistor (R(4): RNS) embedded in the insulating layer 2 and electrically connected to a node on the third potential side, a fifth resistor (R(5): RNS) embedded in the insulating layer 2, and a sixth resistor (R(6): RNS) embedded in the insulating layer 2, wherein the reference electrode EG is electrically connected to a node on the fourth potential side of the sixth resistor, the absolute value of the third potential is greater than the absolute value of the fourth potential, the fourth resistor, the fifth resistor, and the sixth resistor are connected in series, the fourth resistor is composed of N resistors connected in parallel, the fifth resistor is composed of M resistors connected in parallel, and the sixth resistor is composed of L resistors connected in parallel, the semiconductor device according to [A3].

[0092] [A5]The semiconductor device according to [A4], satisfying N < M.

[0093] [A6]A second high-resistance portion RN embedded in the insulating layer 2, a second low-resistance portion RNS embedded in the insulating layer 2, a second electrode electrically connected to one end of the second high-resistance portion RN, and a second output electrode electrically connected to a connection point between the second high-resistance portion RN and the second low-resistance portion RNS, wherein the second high-resistance portion RN has a relatively higher resistance value than the resistance value of the second low-resistance portion RNS, the reference electrode EG is electrically connected to an end portion of the second low-resistance portion RNS opposite to the connection point, and the second low-resistance portion RNS includes the fourth resistor, the fifth resistor, and the sixth resistor, the semiconductor device according to [5].

[0094] [A7]The semiconductor device according to any one of [A1] to [A6], satisfying 0.4 ≤ (M / L) ≤ 0.6.

[0095] [A8]The semiconductor device according to [A7], satisfying 0.2 ≤ (N / M) ≤ 0.9.

[0096] Although various exemplary embodiments have been described above, various omissions, substitutions, and modifications may be made without being limited to the above-described exemplary embodiments. Furthermore, elements from different embodiments may be combined to form other embodiments. Furthermore, it will be understood from the above description that various embodiments of the present disclosure have been described herein, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Therefore, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims. [Explanation of symbols]

[0097] 1...Semiconductor substrate 2...Insulating layer 2A...First dielectric layer 2A H ,2A L ...dielectric layer 2B: Second dielectric layer 4...Protective film 4A…First protective film 4B…Second protective film 4C…Third protective film 10...Resistor chip 10a…1st inner lead 10b…Second inner lead 10c…3rd inner lead 10d…4th inner lead 10e…5th Inner Lead 10f...6th inner lead 10g...7th inner lead 10h…8th inner lead 10i…9th inner lead 20...Amplifier chip 30…cases 100...Semiconductor package 110...First die pad 120...Second die pad 200...battery BE...buried electrode BEP…1st wiring BEG: Second wiring C10: Resistor circuit (voltage divider circuit) C20: Voltage detection circuit D1...recess DMW...dummy wiring E1…1st electrode E2…Second electrode EG…Reference electrode EG1...1st reference electrode EG2…Second reference electrode EP…1st output electrode EN: Second output electrode GND: Ground potential HV(+)...First input terminal HV(-)...Second input terminal INN: Second input terminal INP...First input terminal N3...node R…Resistor (resistance element, resistance layer) R(Dmy)...dummy resistor RP…1st high resistance part RPS...1st low resistance section RN…Second high resistance section RNS…Second low resistance section RN1,RN2,RP1,RP2…High resistance part VC…Reference terminal Vcc: power supply voltage VE: Via electrode

Claims

1. an insulating layer provided on a semiconductor substrate; a first resistor embedded in the insulating layer and electrically connected to a node on a first potential side; a second resistor embedded within the insulating layer; a third resistor embedded within the insulating layer; a reference electrode electrically connected to a node on the second potential side of the third resistor; Equipped with the absolute value of the first potential is greater than the absolute value of the second potential; the first resistor, the second resistor, and the third resistor are connected in series; the first resistor is configured by connecting N resistors in parallel, the second resistor is configured by connecting M resistors in parallel, the third resistor is configured by connecting L resistors in parallel, N<L, M<L, A semiconductor device that satisfies the above requirements.

2. N<M, meets the following criteria: The semiconductor device according to claim 1 .

3. a first high resistance portion embedded in the insulating layer; a first low resistance portion embedded in the insulating layer; a first electrode electrically connected to one end of the first high resistance portion; a first output electrode electrically connected to a connection point between the first high resistance portion and the first low resistance portion; Equipped with the first high resistance portion has a resistance value relatively higher than a resistance value of the first low resistance portion, the reference electrode is electrically connected to an end of the first low resistance portion opposite to the connection point, the first low resistance unit includes the first resistor, the second resistor, and the third resistor; The semiconductor device according to claim 1 .

4. a fourth resistor embedded in the insulating layer and electrically connected to a node on a third potential side; a fifth resistor embedded within the insulating layer; a sixth resistor embedded within the insulating layer; Equipped with the reference electrode is electrically connected to a node on a fourth potential side of the sixth resistor; the absolute value of the third potential is greater than the absolute value of the fourth potential; the fourth resistor, the fifth resistor, and the sixth resistor are connected in series; the fourth resistor is configured by connecting N resistors in parallel, the fifth resistor is configured by connecting M resistors in parallel, The sixth resistor is configured by connecting L resistors in parallel. The semiconductor device according to claim 3 .

5. N<M, meets the following criteria: The semiconductor device according to claim 4 .

6. a second high resistance portion embedded in the insulating layer; a second low resistance portion embedded in the insulating layer; a second electrode electrically connected to one end of the second high resistance portion; a second output electrode electrically connected to a connection point between the second high resistance portion and the second low resistance portion; Equipped with the second high resistance portion has a resistance value relatively higher than a resistance value of the second low resistance portion, the reference electrode is electrically connected to an end of the second low resistance section opposite to the connection point, the second low resistance unit includes the fourth resistor, the fifth resistor, and the sixth resistor; The semiconductor device according to claim 5 .

7. 0.4≦(M / L)≦0.6, fulfill, The semiconductor device according to any one of claims 1 to 6.

8. 0.2≦(N / M)≦0.9, fulfill, The semiconductor device according to claim 7 .

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