Semiconductor device and semiconductor device manufacturing method

The semiconductor device improves heat dissipation and insulation by employing an adhesive layer with varying thicknesses, addressing the trade-off in existing designs to achieve both properties simultaneously.

JP2026004940APending Publication Date: 2026-01-15TOYOTA INDUSTRIES CORP
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Patent Information

Application Number
JP2024103045
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-26
Publication Date
2026-01-15

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in achieving effective heat dissipation and insulation between the semiconductor chip and the heat sink, as current designs often compromise one property for the other.

Method used

A semiconductor device design featuring an adhesive layer with distinct thicknesses for different portions, allowing for efficient heat transfer while maintaining a longer creepage distance for insulation, including a thin first portion for heat dissipation and thicker contiguous portions for increased insulation.

Benefits of technology

The design enhances both heat dissipation and insulation properties by optimizing the adhesive layer's structure, ensuring efficient heat transfer and robust electrical insulation.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a semiconductor device capable of improving insulation while improving heat dissipation, and to provide a method of manufacturing the semiconductor device.SOLUTION: The semiconductor device 10 includes a semiconductor package 2 including a power semiconductor element, a partition wall 71 (heat sink) having an outer side surface 71c (mounting surface) on which the semiconductor package 2 is mounted and configured to dissipate heat of the semiconductor package 2, and an adhesive layer 8 formed of an insulating material and configured to bond the semiconductor package 2 and the partition wall 71. The adhesive layer 8 includes a first portion 81 disposed between the semiconductor packages 2 and the outer side surface 71c, and a second portion 82 provided continuously with the first portion 81 on the outer side of the first portion 81 as viewed in the X-direction and having a thickness larger than the thickness of the first portion 81 in the X-direction.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] Patent Document 1 describes a power module that includes a semiconductor chip, a heat sink for dissipating heat generated by the semiconductor chip to the outside, and a composite adhesive provided between the semiconductor chip and the heat sink. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-19182 Summary of the Invention [Problem to be solved by the invention]

[0004] In a power module such as that described in Patent Document 1, it is required to improve the insulation between the semiconductor chip (semiconductor package) and the heat sink while improving the heat dissipation performance.

[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a semiconductor device that can improve heat dissipation and insulation properties, and a method for manufacturing the semiconductor device. [Means for solving the problem]

[0006] The semiconductor device of the present invention comprises a semiconductor package including a power semiconductor element, a heat sink having a mounting surface on which the semiconductor package is mounted and for dissipating heat from the semiconductor package, and an adhesive layer formed of an insulating material for bonding the semiconductor package to the heat sink, wherein the adhesive layer includes a first portion arranged between the semiconductor package and the mounting surface, and a second portion provided contiguous to the first portion on the outside of the first portion when viewed from a first direction intersecting the mounting surface, and having a thickness in the first direction greater than the thickness of the first portion.

[0007] In this semiconductor device, the semiconductor package is bonded to the mounting surface of the heat sink by an insulating adhesive layer. The adhesive layer includes a first portion disposed between the semiconductor package and the mounting surface and a second portion provided outside the first portion and continuous with the first portion. The first portion interposed between the semiconductor package and the heat sink is relatively thin. This allows heat generated from the semiconductor package to be efficiently transferred to the heat sink via the first portion, thereby improving heat dissipation. The second portion provided outside the first portion and continuous with the first portion is relatively thick. This allows a longer creepage distance (creepage insulation distance) in the path from the semiconductor package to the mounting surface of the heat sink via the first and second portions of the adhesive layer compared to, for example, a case in which the second portion has the same thickness as the first portion. This improves insulation between the semiconductor package and the heat sink. Therefore, this semiconductor device improves both heat dissipation and insulation.

[0008] In the semiconductor device according to the present invention, the top surface of the second portion facing the side opposite the mounting surface may be located closer to the mounting surface than the top surface of the semiconductor package facing the side opposite the mounting surface. In this case, the second portion is prevented from becoming too thick, and therefore, an increase in size can be prevented while maintaining insulation properties.

[0009] In the semiconductor device according to the present invention, the adhesive layer may include a third portion that is provided contiguous to the second portion on the outer side of the second portion as viewed in the first direction and has a thickness greater than that of the second portion in the first direction, thereby effectively increasing the creepage distance.

[0010] In the semiconductor device according to the present invention, a recess may be formed on the top surface of the third portion facing the opposite side to the mounting surface. In this case, the creepage distance can be increased more effectively. Furthermore, when compared for the same creepage distance, the width of the adhesive layer can be reduced compared to when the third portion does not have a recess.

[0011] In the semiconductor device according to the present invention, the heat sink may have a side surface extending in the first direction from the mounting surface, and the adhesive layer may include a fourth portion formed from the second portion to the side surface. In this case, the fourth portion can increase the creepage distance, so that insulation can be maintained even when the semiconductor package is placed close to the side surface of the heat sink.

[0012] The semiconductor device manufacturing method of the present invention is a method for manufacturing a semiconductor device comprising: a semiconductor package including a power semiconductor element; a heat sink having a mounting surface on which the semiconductor package is mounted and for dissipating heat from the package; and an adhesive layer formed of an insulating material for adhering the semiconductor package to the heat sink, and comprises: a first step of placing an insulating paste-like adhesive on the mounting surface to form an adhesive layer on the mounting surface; a second step of placing the semiconductor package on the adhesive layer after the first step; a third step of thinning the adhesive layer between the semiconductor package and the mounting surface by pressing the semiconductor package toward the mounting surface; and a fourth step of hardening the adhesive layer after the third step to form an adhesive layer including a first portion arranged between the semiconductor package and the mounting surface and a second portion that is continuous with the first portion and outside the first portion when viewed from a first direction intersecting the mounting surface, and has a thickness greater than the thickness of the first portion in the first direction.

[0013] This semiconductor device manufacturing method includes a first step of placing an insulating paste-like adhesive on the mounting surface to form an adhesive layer on the mounting surface. In the first step, the adhesive layer is formed from a paste-like adhesive, so the shape of the adhesive layer can be freely modified to match the shape of the heat sink. Furthermore, after the second step, a third step of thinning the adhesive layer between the semiconductor package and the mounting surface by pressing the semiconductor package toward the mounting surface is included. This allows the thicknesses of the first and second portions of the adhesive layer formed in the fourth step to be freely adjusted by adjusting the pressure applied when pressing the semiconductor package toward the heat sink. The adhesive layer formed in the fourth step includes the first and second portions having the above-mentioned thickness relationship. This makes it possible to obtain a semiconductor device that can improve both heat dissipation and insulation. [Effects of the Invention]

[0014] According to the present invention, it is possible to provide a semiconductor device that can improve heat dissipation and insulation properties. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a schematic cross-sectional view of a power converter including a semiconductor device according to an embodiment. [Figure 2] FIG. 2 is an enlarged view of the semiconductor device shown in FIG. [Figure 3] 3A and 3B are schematic diagrams showing a first step and a second step of a semiconductor device manufacturing method according to an embodiment, in which Fig. 3A is a cross-sectional view showing the first step, and Fig. 3B is a cross-sectional view showing the second step. [Figure 4] 4A and 4B are schematic diagrams showing a third step and a fourth step of the semiconductor device manufacturing method according to one embodiment, in which Fig. 4A is a cross-sectional view showing the third step, and Fig. 4B is a cross-sectional view showing the fourth step. [Figure 5] FIG. 5 is a schematic cross-sectional view showing a semiconductor device according to a first modification. [Figure 6]FIG. 6 is a schematic cross-sectional view showing a semiconductor device according to a second modification. DETAILED DESCRIPTION OF THE INVENTION

[0016] An embodiment of the present invention will be described below with reference to the drawings. In the description of each drawing, the same or corresponding elements are given the same reference numerals, and duplicate explanations may be omitted. In addition, each drawing may show an orthogonal coordinate system consisting of an X-axis, a Y-axis, and a Z-axis.

[0017] FIG. 1 is a schematic cross-sectional view of a power converter including a semiconductor device according to one embodiment of the present invention. The power converter 1 of this embodiment is an inverter, converter, etc. that converts input power. For convenience, some hatching is omitted in the cross-sectional view of FIG.

[0018] The power converter 1 includes a plurality of semiconductor packages 2, a base plate 7, and a circuit board 3. In the power converter 1, as will be described later, the semiconductor packages 2 and parts of the base plate 7 form a semiconductor device 10. The details of the semiconductor device 10 will be described later.

[0019] The semiconductor package 2 is a package that includes a so-called power semiconductor element (discrete element), such as a MOSFET or IGBT. The semiconductor package 2 includes a package body 22 and a plurality of terminals 21 protruding from the package body 22. The package body 22 is formed in a rectangular parallelepiped shape, and houses a semiconductor element and a heat sink inside the package body 22. The package body 22 has a terminal protruding surface 22a from which the plurality of terminals 21 protrude, and a bottom surface 22b that dissipates heat generated from the semiconductor element (chip).

[0020] The base plate 7 is made of metal. In this embodiment, the base plate 7 is made of aluminum. The base plate 7 has a plate main body 70, a partition wall 71, and a side wall 72. The base plate 7 is configured such that the plate main body 70, the partition wall 71, and the side wall 72 are all integrally formed by casting or the like.

[0021] The plate body 70 is flat. The plate body 70 has two main surfaces, a first surface 70a and a second surface 70b. The first surface 70a and the second surface 70b are each perpendicular to the thickness direction of the plate body 70. The second surface 70b is the surface opposite to the first surface 70a. The side wall 72 is provided on the outer edge portion 70c of the plate body 70. The first surface 70a is a portion located inside the side wall 72 and forms the inner bottom surface of the base plate 7.

[0022] The partition wall 71 has a rectangular cylindrical shape. The partition wall 71 protrudes from the first surface 70a of the plate main body 70 in the thickness direction of the plate main body 70. In other words, the partition wall 71 protrudes from one main surface of the plate main body 70 in the thickness direction of the plate main body 70. The first surface 70a of the plate main body 70 and the inner surface of the partition wall 71 (including, for example, inner surfaces 71h and 71i (described later)) define an accommodating recess 73 that accommodates magnetic components T that tend to generate heat, such as a transformer or a coil. In other words, the partition wall 71 defines the accommodating recess 73, thereby protruding from the first surface 70a and defining the inside of the base plate 7.

[0023] The partition wall 71 has a rectangular annular tip surface 71e located at the end (tip) opposite the plate body 70 in the Z direction, which is the thickness direction of the plate body 70. The partition wall 71 has outer side surfaces 71c and 71d that are perpendicular to the X direction, which is perpendicular to the Z direction. The outer side surface 71c is the outer side surface opposite the outer side surface 71d in the X direction, with the installation recess 73 between them.

[0024] The partition wall 71 has inner surfaces 71h and 71i that are perpendicular to the X direction, which is perpendicular to the plate thickness direction. The outer surface 71c is an outer surface opposite the outer surface 71d in the X direction, with the installation recess 73 in between. The inner surface 71h is a surface opposite the outer surface 71c. The inner surface 71i is a surface opposite the outer surface 71d. The tip surface 71e is a surface perpendicular to the outer surfaces 71c and 71d and the inner surfaces 71h and 71i.

[0025] A plurality of semiconductor packages 2 are fixed to the outer surfaces 71c and 71d of the partition wall 71. In the semiconductor package 2, the package body 22 is fixed to the outer surfaces 71c and 71d of the partition wall 71 so that the plurality of terminals 21 face the opposite side to the plate body 70 in the plate thickness direction. In other words, the plurality of terminals 21 protrude from the package body 22 to the opposite side to the plate body 70 in the plate thickness direction.

[0026] The circuit board 3 has a flat plate shape. The circuit board 3 has a first surface 3a and a second surface 3b that are perpendicular to the thickness direction of the circuit board. The first surface 3a is the surface opposite the second surface 3b. The circuit board 3 has a through hole 3c that penetrates from the first surface 3a to the second surface 3b. The circuit board 3 is made of an insulating material. The second surface 3b of the circuit board 3 is joined to the terminal 21 in a state where the terminal 21 is inserted into the through hole 3c at a position facing the tip surface 71e of the partition wall 71 in the thickness direction. A soldering land (not shown) is provided around the through hole 3c of the circuit board 3.

[0027] A flow path forming recess 51 is formed on the second surface 70b of the plate main body 70. The opening of the flow path forming recess 51 is closed by a flow path forming plate 90. The flow path forming plate 90 is made of metal. A water channel 50 for cooling the semiconductor package 2 is provided in the flow path forming recess 51 of the plate main body 70, inside the partition wall 71, and inside the partition wall. The water channel 50 is a flow path through which cooling water for cooling the semiconductor package 2 flows. The flow path of the water channel 50 is provided so as to extend from the flow path forming recess 51 of the plate main body 70 to the inside of the partition wall 71. The plate main body 70 is provided with an inlet (not shown) that introduces cooling water from the outside into the water channel 50. The water channel 50 is provided so as to surround the accommodating recess 73. A magnetic component T that easily generates heat, such as a transformer or coil, is arranged in the accommodating recess 73.

[0028] Next, the semiconductor device 10 according to this embodiment will be described in detail with reference to Fig. 2. Fig. 2 is an enlarged view of the semiconductor device 10 shown in Fig. 1. In Fig. 2, the circuit board 3, the terminals 21 of the semiconductor package 2, the water channels 50, and the plate body 70 shown in Fig. 1 are omitted. This also applies to Figs. 3 to 6.

[0029] The semiconductor device 10 includes a semiconductor package 2, a partition wall 71 of a base plate 7, and an adhesive layer 8. As described above, the semiconductor package 2 is fixed (mounted) on the outer surface 71c of the partition wall 71. That is, the outer surface 71c of the partition wall 71 is a mounting surface on which the semiconductor package 2 is mounted. The outer surface 71c is perpendicular to the X direction (first direction). The package body 22 of the semiconductor package 2 has a bottom surface 22b, a top surface 22c, and a side surface 22d. The bottom surface 22b faces the outer surface 71c of the partition wall 71 in the X direction. The top surface 22c is the surface opposite the bottom surface 22b and faces the side opposite the outer surface 71c. The side surface 22d is connected to the bottom surface 22b and the top surface 22c. The side surface 22d is formed over the entire outer periphery of the semiconductor package 2 when viewed from the X direction, for example. The side surface 22d includes the terminal protruding surface 22a described above. The thickness of the package body 22 (semiconductor package 2) in the X direction is, for example, 5 mm.

[0030] The tip surface 71e (side surface) of the partition wall 71 extends from the outer surface 71c along the X direction. The partition wall 71 has a corner 71j formed by the outer surface 71c and the tip surface 71e. As described above, the water channel 50 for cooling the semiconductor package 2 is provided inside the partition wall 71. The partition wall 71 is a heat sink for dissipating heat from the semiconductor package 2.

[0031] The adhesive layer 8 bonds the semiconductor package 2 and the partition wall 71. The adhesive layer 8 is provided on the outer surface 71c of the partition wall 71. The adhesive layer 8 has a surface 8a that contacts the outer surface 71c. The adhesive layer 8 is made of, for example, an insulating material. The adhesive layer 8 is formed, for example, by hardening an adhesive paste made of an insulating material. The adhesive is, for example, an insulating resin such as epoxy resin to which a thermally conductive filler (e.g., aluminum oxide (alumina)) has been added. Alternatively, the adhesive may be a silicon material to which a thermally conductive filler (e.g., boron nitride, aluminum nitride, silicon nitride, etc.) has been added. Note that the adhesive layer 8 is omitted from FIG. 1.

[0032] The adhesive layer 8 has a first portion 81, a second portion 82, and a third portion 83, which are integrally formed. The first portion 81 is disposed between the bottom surface 22b of the package body 22 of the semiconductor package 2 and the outer surface 71c of the partition wall 71. The first portion 81 is formed, for example, in the shape of a rectangular plate. The first portion 81 is formed, for example, in the shape of a rectangle that has the same outer shape as the semiconductor package 2 when viewed, for example, from the X direction. The first portion 81 has a top surface 81a that contacts the bottom surface 22b of the package body 22. The top surface 81a is the surface facing the side opposite to the outer surface 71c of the partition wall 71. The thickness of the first portion 81 in the X direction is, for example, 1 / 10 or less of the thickness of the package body 22 (semiconductor package 2) in the X direction. The thickness of the first portion 81 in the X direction is, for example, 100 to 200 μm.

[0033] The second portion 82 is provided contiguous to the first portion 81 on the outer side of the first portion 81 when viewed from the X direction. The second portion 82 is provided, for example, to surround the first portion 81 when viewed from the X direction. Here, as an example, the second portion 82 continuously surrounds the first portion 81 over the entire periphery of the first portion 81 when viewed from the X direction. However, the second portion 82 may be provided so as to surround the first portion 81 and have a portion missing when viewed from the X direction. The second portion 82 is formed, for example, in the shape of a rectangular frame when viewed from the X direction. The second portion 82 has a top surface 82a and an inner surface 82b. The top surface 82a is a surface facing the opposite side to the outer surface 71c of the partition wall 71. The second portion 82 has a thickness greater than that of the first portion 81 in the X direction, for example. Here, the outer surface 71c is flat. Therefore, the top surface 82a is located on the opposite side of the outer surface 71c in the X direction from the top surface 81a of the first portion 81. That is, the second portion 82 protrudes from the first portion 81 in, for example, the X direction. The thickness of the second portion 82 in the X direction is, for example, not less than 500 μm and not more than 1 mm.

[0034] The top surface 82a is located closer to the outer side surface 71c in the X direction than the top surface 22c of the package body 22. That is, the top surface 82a is located between the top surface 81a of the first portion 81 and the top surface 22c of the package body 22 in the X direction. The inner side surface 82b is the surface on the package body 22 and first portion 81 side when viewed from the X direction. The inner side surface 82b is in contact with a portion of the terminal protruding surface 22a of the package body 22.

[0035] The third portion 83 is provided contiguous to the second portion 82 on the outer side of the second portion 82 when viewed from the X direction. The third portion 83 is provided, for example, to surround the second portion 82 when viewed from the X direction. Here, as an example, the third portion 83 continuously surrounds the second portion 82 over the entire periphery of the second portion 82 when viewed from the X direction. However, the third portion 83 may be provided so as to surround the second portion 82 and have a portion missing when viewed from the X direction. The third portion 83 is formed, for example, in the shape of a rectangular frame when viewed from the X direction. The third portion 83 has a top surface 83a, an inner surface 83b, and an outer surface 83c. The top surface 83a is a surface facing the opposite side to the outer surface 71c of the partition wall 71. The third portion 83 has a thickness greater than that of the second portion 82 in the X direction, for example. Therefore, the top surface 83a is located on the opposite side of the outer surface 71c in the X direction from the top surface 82a of the second portion 82. That is, the third portion 83 protrudes from the second portion 82 in, for example, the X direction. The thickness of the third portion 83 in the X direction may be thicker than the thickness of the second portion 82 by, for example, about 100 μm to 2 mm.

[0036] Furthermore, the top surface 83a is located closer to the outer side surface 71c in the X direction than the top surface 22c of the package body 22. That is, the top surface 83a is located between the top surface 82a of the second portion 82 and the top surface 22c of the package body 22 in the X direction. The inner side surface 83b is the surface on the package body 22, first portion 81, and second portion 82 side when viewed from the X direction. The outer side surface 83c is the surface facing the opposite side to the inner side surface 83b and constitutes the outer side surface of the adhesive layer 8.

[0037] As described above, the thickness of the second portion 82 is greater than the thickness of the first portion 81. Furthermore, the thickness of the third portion 83 is greater than the thickness of the second portion 82. This allows a longer creepage distance (creepage insulation distance) in the path from the semiconductor package 2 to the outer surface 71c of the partition wall 71 via the first portion 81, the second portion 82, and the third portion of the adhesive layer 8, compared to, for example, a case in which the second portion 82 and the third portion 83 have the same thickness as the first portion 81. In this example, the creepage distance is the distance of the shortest path from the terminal protruding surface 22a of the semiconductor package 2 to the outer surface 71c of the partition wall 71, passing through the top surface 82a, the inner surface 83b, the top surface 83a, and the outer surface 83c.

[0038] Next, a method for manufacturing a semiconductor device according to this embodiment will be described. In the method for manufacturing a semiconductor device according to this embodiment, the above-described semiconductor device 10 is manufactured. Figures 3 and 4 are schematic diagrams showing each step of the method for manufacturing a semiconductor device according to this embodiment.

[0039] As shown in FIG. 3A, first, an insulating paste-like adhesive is applied to the outer surface 71c of the partition wall 71 to form an adhesive layer 108 on the outer surface 71c (step S101: first step). The adhesive layer 108 is provided, for example, in an area larger than the area in which the package body 22 of the semiconductor package 2 is disposed when viewed from the X direction. The adhesive layer 108 has, for example, an inner portion 181 and an outer portion 182 formed outside and contiguous to the inner portion 181. The inner portion 181 is a portion for forming the first portion 81 and the second portion 82 of the adhesive layer 8 in S104, which will be described later. The outer portion 182 is provided, for example, to surround the inner portion 181. The outer portion 182 is a portion for forming the third portion 83 of the adhesive layer 8 in S104, which will be described later.

[0040] The adhesive layer 108 is formed, for example, as follows. First, a first layer 191 is formed by applying a paste-like adhesive over the entire area where the adhesive layer 108 is to be formed, for example, by printing or using a flat nozzle. The first layer 191 is a layer including the inner portion 181 and a portion of the outer portion 182 facing the outer surface 71c. Next, a second layer 192 is formed by applying adhesive to the outer periphery of the first layer 191 in a rectangular frame shape, for example, by using printing or a flat nozzle. The second layer 192 is a layer including a portion of the outer portion 182 opposite the outer surface 71c. By forming the first layer 191 and the second layer 192 as described above, the inner portion 181 and the outer portion 182 of the adhesive layer 108 are formed. Note that the adhesive layer 108 does not have to be formed in the above order; for example, the inner portion 181 and the outer portion 182 of the adhesive layer 108 may be formed separately. With any of the above methods, the thickness of the outer portion 182 can be controlled by adjusting the number or amount of adhesive applied.

[0041] 3(b), the semiconductor package 2 is placed on the adhesive layer 108 (step S102: second step). Specifically, in step S102, the semiconductor package 2 is placed on the inner portion 181 of the adhesive layer 108.

[0042] 4A, the semiconductor package 2 is pressed toward the outer surface 71c to thin the adhesive layer 108 between the semiconductor package 2 and the outer surface 71c (step S103: third step). Specifically, in step S103, a portion of the inner portion 181 that overlaps with the semiconductor package 2 when viewed from the X direction is thinned to form a first portion 183 and a second portion 184 in the inner portion 181. The first portion 183 is a portion between the semiconductor package 2 and the outer surface 71c, and is a portion that has been thinned by pressing the semiconductor package 2. The second portion 184 is a frame-shaped portion that is provided outside the first portion 183 and is continuous with the first portion 183. The second portion 184 is provided, for example, so as to surround the first portion 183. The second portion 184 has a thickness greater than that of the first portion 183 in the X direction. The first portion 183, the second portion 184, and the outer portion 182 are portions that will become the first portion 81, the second portion 82, and the third portion 83 of the adhesive layer 8, respectively, by hardening the adhesive layer 108 in S104 described below.

[0043] At this time, because the adhesive layer 108 is in a paste (liquid) state, the thicknesses of the first portion 183, the second portion 184, and the outer portion 182 of the adhesive layer 108 can be adjusted as desired by adjusting (controlling) the pressure. For example, by increasing the pressure, the first portion 183 can be thinned to a predetermined thickness (for example, the minimum thickness that can maintain the insulating properties of the first portion 81 of the adhesive layer 8), and the thicknesses of the second portion 184 and the outer portion 182 can be increased. These thicknesses may be adjusted by the pressure (load) or by using a spacer (adhesive).

[0044] Thereafter, as shown in FIG. 4(b), the adhesive layer 108 is cured to form the adhesive layer 8 including the first portion 81, the second portion 82, and the third portion 83 (step S104: fourth step).

[0045] As described above, in the semiconductor device 10 according to this embodiment, the semiconductor package 2 is bonded to the outer surface 71c of the partition wall 71 by the insulating adhesive layer 8. The adhesive layer 8 includes a first portion 81 disposed between the semiconductor package 2 and the outer surface 71c and a second portion 82 provided contiguous to the first portion 81 on the outer side of the first portion 81. The first portion 81 interposed between the semiconductor package 2 and the partition wall 71 is relatively thin. This allows heat generated from the semiconductor package 2 to be efficiently transferred to the partition wall 71 via the first portion 81, thereby improving heat dissipation. The second portion 82 provided contiguous to the first portion 81 on the outer side of the first portion 81 is relatively thick. This allows a longer creepage distance (creepage insulation distance) in the path from the semiconductor package 2 to the outer surface 71c of the partition wall 71 via the first and second portions 81 and 82 of the adhesive layer 8 compared to a case in which the second portion 82 has the same thickness as the first portion 81. This improves the insulation between the semiconductor package 2 and the partition wall 71. For example, it is possible to improve the insulation when dust or the like adheres to the surface of the adhesive layer 8. Furthermore, since the second portion 82 is relatively thick, it is possible to prevent the second portion 82 from being damaged by external influences and resulting in a decrease in insulation. As described above, the semiconductor device 10 can improve insulation while improving heat dissipation.

[0046] Furthermore, in the semiconductor device 10 according to this embodiment, the adhesive layer 8 is formed by, for example, curing an adhesive paste made of an insulating material. Therefore, the shape of the adhesive layer 8 can be arbitrarily formed. Furthermore, by applying pressure to the adhesive paste toward the outer surface 71c and adjusting the pressure when thinning the adhesive paste layer between the semiconductor package 2 and the outer surface 71c, the thicknesses of the first portion 81 and the second portion 82 of the adhesive layer 8 can be arbitrarily adjusted.

[0047] The semiconductor device manufacturing method according to this embodiment includes step S101 of applying an insulating paste-like adhesive to the outer surface 71c of the partition wall 71 to form an adhesive layer 108 on the outer surface 71c. Because the adhesive layer 108 is formed from the paste-like adhesive, the shape of the adhesive layer 108 can be arbitrarily modified to match the shape of the outer surface 71c. The method also includes step S103 of thinning the adhesive layer 108 between the semiconductor package 2 and the outer surface 71c by pressing the semiconductor package 2 toward the outer surface 71c. By adjusting the pressure applied when pressing the semiconductor package 2 toward the partition wall 71, the thicknesses of the first portion 81 and the second portion 82 of the adhesive layer 8 formed in step S104 can be arbitrarily adjusted. The adhesive layer 8 formed in step S104 includes the first portion 81 and the second portion 82, which has a thickness greater than that of the first portion 81. This allows for a semiconductor device with improved heat dissipation and improved insulation.

[0048] Furthermore, because the adhesive layer 8 is formed by hardening a paste-like adhesive, the pressure applied when pressing the semiconductor package 2 toward the partition wall 71 can be reduced compared to when the adhesive layer is, for example, a resin adhesive sheet. That is, when the adhesive layer is a resin adhesive sheet, a relatively high pressure is required to thicken a portion of the adhesive sheet. However, as described above, this pressure can be reduced in this embodiment. Therefore, damage to, for example, the semiconductor package 2 or the partition wall 71 can be reduced. Furthermore, when the adhesive layer is a resin adhesive sheet, there is a risk that the unpressurized region of the adhesive layer may lift off the outer surface 71c of the partition wall 71. However, in this embodiment, the adhesive layer 8 adheres closely to the outer surface 71c when applied, thereby preventing, for example, the second portion 82 or the third portion 83 from lifting off. Furthermore, when the adhesive layer is a resin adhesive sheet, the area where a thick portion can be formed by applying pressure to the semiconductor package is limited. However, in this embodiment, the adhesive layer 8 is formed by applying a paste-like adhesive, so that, for example, the second portion 82 or the third portion 83 can be formed in any desired area.

[0049] Furthermore, in the semiconductor device 10 according to this embodiment, the top surface 82a of the second portion 82 is located closer to the outer surface 71c of the partition wall 71 than the top surface 22c of the package body 22 of the semiconductor package 2. This prevents the second portion 82 from becoming too thick, thereby preventing the second portion 82 from becoming too large while maintaining insulation properties.

[0050] In the semiconductor device 10 according to this embodiment, the thickness of the second portion 82 in the X direction is 1 mm or less, which makes it possible to reliably prevent the device from becoming large while maintaining insulation properties.

[0051] In the semiconductor device 10 according to this embodiment, the thickness of the first portion 81 in the X direction is 1 / 10 or less of the thickness in the X direction of the package body 22 of the semiconductor package 2. This can further improve heat dissipation.

[0052] In the semiconductor device 10 according to this embodiment, the adhesive layer 8 includes a third portion 83 that is provided contiguous to the second portion 82 on the outer side of the second portion 82 when viewed in the X direction and has a thickness in the X direction that is greater than the thickness of the second portion 82. This makes it possible to effectively increase the creepage distance compared to, for example, a case in which the third portion 83 has the same thickness as the second portion 82. [Variations]

[0053] 5 is a diagram showing a semiconductor device 10A according to a first modification. The semiconductor device 10A differs from the semiconductor device 10 according to the embodiment in that a recess 83d is formed in the top surface 83a of the third portion 83. The recess 83d is formed, for example, in the central portion in the width direction (direction perpendicular to the X direction) of the third portion 83. In a cross section perpendicular to the extension direction of the recess 83d, the recess 83d is formed in a rectangular shape. The bottom surface of the recess 83d may be formed at the position of the top surface 82a of the second portion 82 in the X direction, for example.

[0054] The semiconductor device 10A according to the first modification can improve heat dissipation and insulation, similarly to the above embodiment. Furthermore, the semiconductor device 10A can increase the creepage distance more effectively than when the recess 83d is not formed. That is, the creepage distance can be increased by the distance along the side surface of the recess 83d in the path from the semiconductor package 2 to the outer surface 71c of the partition wall 71 via the first portion 81 and the second portion 82 of the adhesive layer 8, compared to when the recess 83d is not formed. Furthermore, when comparing at the same creepage distance, the width of the adhesive layer 8 in the direction perpendicular to the X direction can be reduced compared to when the recess 83d is not formed in, for example, the third portion 83.

[0055] 6 is a diagram showing a semiconductor device 10B according to a second modification. The semiconductor device 10B differs from the semiconductor device 10 according to the embodiment in that the adhesive layer 8 does not have a third portion 83, but has a fourth portion 84 formed from the second portion 82 of the adhesive layer 8 to the tip surface 71e of the partition wall 71. The fourth portion 84 extends, for example, along the Y direction. The fourth portion 84 is formed in an L-shape in a cross section perpendicular to the Y direction. The fourth portion 84 is in contact with the outer side surface 71c and the tip surface 71e of the partition wall 71. The fourth portion 84 is formed from the outer side surface 71c to the tip surface 71e so as to cover the corner 71j formed by the outer side surface 71c and the tip surface 71e.

[0056] The semiconductor device 10B according to the second modification can improve heat dissipation and insulation, similarly to the above embodiment. Furthermore, since the fourth portion 84 can increase the creepage distance, insulation can be maintained even when the semiconductor package 2 is positioned close to the leading end surface 71e of the partition wall 71. Therefore, the semiconductor package 2 can be positioned close to the leading end surface 71e of the partition wall 71.

[0057] The present invention is not limited to the above-described embodiment and modifications. For example, the materials and shapes of the components are not limited to those described above, and various materials and shapes can be used. The top surface 82a of the second portion 82 of the adhesive layer 8 does not have to be located on the opposite side of the outer surface 71c from the top surface 22c of the package body 22 of the semiconductor package 2. For example, it may be formed at the same position as the top surface 22c of the package body 22 in the X direction. The thickness of the first portion 81 may be greater than 1 / 10 of the thickness of the semiconductor package 2. The thickness of the second portion 82 may be greater than 1 mm. In the semiconductor device 10 according to the embodiment and the semiconductor device 10A according to the first modification, the adhesive layer 8 does not have to have the third portion 83.

[0058] In the semiconductor device 10B according to the second modification, the adhesive layer 8 does not have the third portion 83, but the adhesive layer 8 may have the third portion. In this case, for example, the third portion 83 may be disposed between the second portion 82 and the fourth portion 84, and the fourth portion 84 may be formed from the third portion 83 to the tip surface 71 e of the partition wall 71.

[0059] The following additional notes are provided regarding the above embodiment.

[0060] The semiconductor device according to the appendix may be [1] "a semiconductor device comprising: a semiconductor package including a power semiconductor element; a heat sink having a mounting surface on which the semiconductor package is mounted and for dissipating heat from the semiconductor package; and an adhesive layer formed of an insulating material for bonding the semiconductor package and the heat sink, wherein the adhesive layer includes a first portion arranged between the semiconductor package and the mounting surface; and a second portion provided contiguous to the first portion on the outside of the first portion when viewed from a first direction intersecting the mounting surface, and having a thickness greater than the thickness of the first portion in the first direction."

[0061] The semiconductor device according to the appendix may be [2] "the semiconductor device described in [1] above, in which the top surface of the second part facing the side opposite the mounting surface is located closer to the mounting surface than the top surface of the semiconductor package facing the side opposite the mounting surface."

[0062] The semiconductor device according to the appendix may be [3] "a semiconductor device according to the above [1] or [2], wherein the adhesive layer includes a third portion that is provided outside the second portion and continuous with the second portion when viewed from the first direction, and has a thickness in the first direction that is greater than the thickness of the second portion."

[0063] The semiconductor device according to the appendix may be [4] "the semiconductor device according to the above [3], in which a recess is formed on the top surface of the third portion facing the opposite side to the mounting surface."

[0064] The semiconductor device according to the appendix may be [5] "a semiconductor device according to any one of [1] to [4] above, wherein the heat sink has a side extending from the mounting surface along the first direction, and the adhesive layer includes a fourth portion formed from the second portion to the side."

[0065] The semiconductor device manufacturing method according to the appendix may be [6] "a semiconductor device manufacturing method for manufacturing a semiconductor device including a semiconductor package including a power semiconductor element, a heat sink having a mounting surface on which the semiconductor package is mounted and for dissipating heat from the package, and an adhesive layer formed of an insulating material for adhering the semiconductor package to the heat sink, the method comprising: a first step of placing an insulating paste-like adhesive on the mounting surface to form an adhesive layer on the mounting surface; a second step of, after the first step, placing the semiconductor package on the adhesive layer; a third step of, after the second step, thinning the adhesive layer between the semiconductor package and the mounting surface by pressing the semiconductor package toward the mounting surface; and a fourth step of, after the third step, hardening the adhesive layer to form the adhesive layer including a first portion disposed between the semiconductor package and the mounting surface and a second portion provided outwardly of the first portion and continuous with the first portion when viewed from a first direction intersecting the mounting surface, the second portion having a thickness greater than a thickness of the first portion in the first direction." [Explanation of symbols]

[0066] 10, 10A, 10B...semiconductor device, 2...semiconductor package, 8...adhesive layer, 22c, 81a, 82a, 83a...top surface, 71e...tip surface (side surface), 71...compartment wall (heat sink), 71c...outer surface (mounting surface), 81...first part, 82...second part, 83...third part, 83d...recess, 84...fourth part, 108...adhesive layer.

Claims

1. a semiconductor package including a power semiconductor element; a heat sink having a mounting surface on which the semiconductor package is mounted and configured to dissipate heat from the semiconductor package; an adhesive layer formed of an insulating material for adhering the semiconductor package and the heat sink; Equipped with The adhesive layer is a first portion disposed between the semiconductor package and the mounting surface; a second portion provided contiguous to the first portion and outside the first portion as viewed in a first direction intersecting the mounting surface, the second portion having a thickness greater than a thickness of the first portion in the first direction; Including, Semiconductor device.

2. a top surface of the second portion facing the side opposite to the mounting surface is located closer to the mounting surface than a top surface of the semiconductor package facing the side opposite to the mounting surface; The semiconductor device according to claim 1 .

3. the adhesive layer includes a third portion provided continuously with the second portion on an outer side of the second portion when viewed in the first direction, the third portion having a thickness greater than a thickness of the second portion in the first direction. The semiconductor device according to claim 1 .

4. a recess is formed on a top surface of the third portion facing the opposite side to the mounting surface; The semiconductor device according to claim 3 .

5. The heat sink is a side surface extending from the mounting surface along the first direction; the adhesive layer includes a fourth portion formed from the second portion to the side surface. The semiconductor device according to claim 1 .

6. A semiconductor device manufacturing method for manufacturing a semiconductor device comprising: a semiconductor package including a power semiconductor element; a heat sink having a mounting surface on which the semiconductor package is mounted and for dissipating heat from the package; and an adhesive layer formed of an insulating material and for bonding the semiconductor package and the heat sink, a first step of disposing an insulating paste adhesive on the mounting surface to form an adhesive layer on the mounting surface; a second step of placing the semiconductor package on the adhesive layer after the first step; a third step of thinning the adhesive layer between the semiconductor package and the mounting surface by pressing the semiconductor package toward the mounting surface after the second step; a fourth step of forming the adhesive layer after the third step by hardening the adhesive layer, the adhesive layer including: a first portion disposed between the semiconductor package and the mounting surface; and a second portion provided contiguous to the first portion on the outside of the first portion when viewed in a first direction intersecting the mounting surface, the second portion having a thickness in the first direction greater than a thickness of the first portion; A semiconductor device manufacturing method comprising:

Citation Information

Patent Citations

  • Surface-coated filler, composite adhesive and power module

    JP2009019182A