Quantum computation support method, and information processing apparatus

Abstract

To reduce an error generated in a phase rotation gate.SOLUTION: An information processor 10 causes a quantum computer 1 to execute a first gate operation according to an auxiliary state generation circuit 5 indicating a generation procedure of a code 5b including a logical quantum bit 5c indicating an auxiliary state and a gauge quantum bit 2a indicating redundant degrees of freedom other than the auxiliary state. Next, the information processor 10 causes the quantum computer 1 to execute the second gate operation according to the error detection circuit 6 indicating the detection procedure of the error occurring in the plurality of physical quantum bits 2b to 2a constituting the code 2e generated by the first gate operation. Then, the information processor 10 determines the presence or absence of an error on the basis of a measurement value indicating the state of the gauge quantum bit 5c obtained by the second gate operation.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a quantum computing assistance program, a quantum computing assistance method, and an information processing device. [Background technology]

[0002] In calculations using a quantum computer, quantum calculations are performed according to quantum circuits by performing gate operations on quantum bits. A quantum bit is the smallest unit of information used in calculations, and is equivalent to a bit (classical bit) in a classical computer. However, unlike classical bits, quantum bits can also be in a superposition state of "0" and "1."

[0003] The information in quantum bits can be corrupted (errors can occur) due to interactions with the environment, errors in gate operation, etc. There are two ways to deal with errors: quantum error correction and quantum error mitigation.

[0004] Quantum error correction is a process of detecting and correcting errors by combining and encoding (redundant) multiple quantum bits. Hereafter, unencoded quantum bits are referred to as physical quantum bits, and a set of encoded quantum bits is referred to as logical quantum bits. Quantum error mitigation is a process of proceeding with calculations while including errors, and mitigating the effects of errors by modifying quantum circuits or extrapolating measurement results.

[0005] A quantum computer that performs quantum computations while performing quantum error correction on logical qubits is called a fault-tolerant quantum computer (FTQC). In an FTQC, any quantum computation can be performed by combining certain basic gates. Examples of certain basic gates are the H gate, CNOT gate, S gate, and T gate. The H gate, CNOT gate, and S gate are quantum gates that perform Clifford operations, and the T gate is a quantum gate that performs non-Clifford operations. A set of these basic gates is called Clifford+T.

[0006] Among the basic gates of Clifford+T, the T gate uses a large number of physical qubits for error correction, so a FTQC that can perform useful computations requires a scale of around one million physical qubits.

[0007] As a technology to reduce the number of physical quantum bits used for error correction, for example, a highly efficient phase rotation gate quantum computing architecture called STAR (Space-Time Efficient Analog Rotation quantum computing) architecture has been proposed. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] Yutaro Akahoshi, Kazunori Maruyama, Hirotaka Oshima, Shintaro Sato, and Keisuke Fujii, "Partially Fault-tolerant Quantum Computing Architecture with Error-corrected Clifford Gates and Space-time Efficient Analog Rotations", arXiv:2303.13181v1, 23 Mar 2023 Summary of the Invention [Problem to be solved by the invention]

[0009] The STAR architecture uses phase rotation gates as basic gates instead of T gates, which have high error correction costs. By eliminating the need for T gates, it is possible to reduce the number of physical qubits used in quantum computing and speed up gate operations. However, phase rotation gates have imperfect error correction. Therefore, in order to obtain correct calculation results, it is important to eliminate errors that occur in phase rotation gates as much as possible.

[0010] In one aspect, the present invention aims to reduce errors that occur in a phase rotation gate. [Means for solving the problem]

[0011] In one proposal, a quantum computing assistance program is provided that causes a computer to perform the following processes. The computer causes the quantum computer to perform a first gate operation in accordance with an auxiliary state generation circuit that indicates a procedure for generating a code including a logical qubit indicating an auxiliary state to be input to a gate teleportation circuit for realizing a phase rotation gate and a gauge qubit indicating a redundant degree of freedom other than the auxiliary state. The computer causes the quantum computer to perform a second gate operation in accordance with an error detection circuit that indicates a procedure for detecting an error that has occurred in multiple physical qubits that constitute the code generated by the first gate operation. The computer then determines the presence or absence of an error based on a measurement value indicating the state of the gauge qubit obtained by the second gate operation. [Effects of the Invention]

[0012] According to one aspect, errors occurring in a phase rotation gate can be reduced. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a diagram illustrating an example of a quantum computing assistance method according to a first embodiment. [Figure 2] FIG. 10 illustrates an example of a system configuration according to a second embodiment. [Figure 3] FIG. 1 is a diagram illustrating an example of hardware of a quantum computing system. [Figure 4] FIG. 1 illustrates the characteristics of a quantum bit. [Figure 5] FIG. 1 illustrates an example of quantum error correction. [Figure 6] FIG. 1 is a diagram illustrating an example of a basic gate used in error-tolerant quantum computing. [Figure 7]FIG. 1 is a diagram illustrating an example of a quantum circuit that performs gate operations of arbitrary rotation. [Figure 8] FIG. 1 illustrates an example of a quantum circuit for preparing auxiliary states. [Figure 9] FIG. 10 is a diagram illustrating an example of an error detection circuit. [Figure 10] FIG. 10 is a diagram showing an example of an error that is difficult to remove. [Figure 11] FIG. 10 is a diagram illustrating an example of an output state of an auxiliary state generating circuit. [Figure 12] FIG. 10 is a diagram showing an example of a state change due to measurement. [Figure 13] FIG. 10 is a diagram illustrating an example of an error detection circuit capable of detecting a YY error. [Figure 14] FIG. 10 is a diagram illustrating a comparative example of the measurement order of eigenvalues ​​of a gauge operator in an error detection circuit. [Figure 15] FIG. 10 is a diagram showing an example of state change of the [[4,1,1,2]] code according to the order of measurements of the gauge operator. [Figure 16] FIG. 10 illustrates an example of error detection. [Figure 17] FIG. 10 is a diagram showing an example of enlarging to a surface code. [Figure 18] FIG. 1 is a block diagram showing an example of functions for quantum computing in a quantum computing system. [Figure 19] FIG. 10 is a block diagram showing an example of functions of an arbitrary rotation execution unit. [Figure 20] 1 is a flowchart illustrating an example of a procedure for quantum computing processing in a classical computer. [Figure 21] 10 is a flowchart illustrating an example of a procedure for quantum circuit execution processing. [Figure 22] 10 is a flowchart illustrating an example of a procedure for an auxiliary state generation process. [Figure 23] 10 is a flowchart illustrating an example of a processing procedure of an error determination process. [Figure 24] FIG. 10 is a diagram illustrating an example of a logical error rate when error detection including a YY error is performed. [Figure 25]FIG. 10 is a diagram illustrating an example of a generation failure probability of an auxiliary state. DETAILED DESCRIPTION OF THE INVENTION

[0014] The present embodiment will be described below with reference to the drawings. Note that each embodiment can be implemented in combination with a plurality of other embodiments within a range that does not contradict each other. [First embodiment] The first embodiment is a quantum computing assistance method that can reduce errors that occur in a phase rotation gate.

[0015] Fig. 1 is a diagram illustrating an example of a quantum-assisted computing method according to a first embodiment. Fig. 1 illustrates an information processing device 10 for realizing the quantum-assisted computing method. The information processing device 10 can implement the quantum-assisted computing method by, for example, executing a quantum-assisted computing program.

[0016] The information processing device 10 includes, for example, a storage unit 11 and a processing unit 12. The storage unit 11 is, for example, a memory or a storage device included in the information processing device 10. The processing unit 12 is, for example, a processor or an arithmetic circuit included in the information processing device 10.

[0017] The storage unit 11 stores, for example, a quantum computing support program. The storage unit 11 also stores a quantum circuit that indicates the quantum computing procedure for solving the target problem. The storage unit 11 also stores various quantum circuits that are generally used in quantum computing. For example, the storage unit 11 stores a gate teleportation circuit 4 for implementing a phase rotation gate 3. The storage unit 11 also stores an auxiliary state generation circuit 5 that indicates the procedure for generating a code 2a that includes a logical quantum bit 5b that indicates an auxiliary state to be input to the gate teleportation circuit 4 and a gauge quantum bit 5c that indicates redundant degrees of freedom (gauge degrees of freedom) other than the auxiliary state. The storage unit 11 also stores an error detection circuit 6 that indicates the procedure for detecting errors that occur in the multiple physical quantum bits 2b to 2e that constitute the code 2a generated by the first gate operation in accordance with the auxiliary state generation circuit 5.

[0018] The processing unit 12 causes the quantum computer 1 to perform gate operations in accordance with the quantum circuit. The quantum computer 1 has a quantum bit device 2. The quantum computer 1 performs quantum computations in accordance with instructions from the processing unit 12. For example, the quantum computer 1 performs quantum computations using logical quantum bits that encode the states of quantum bits. For example, a code 2a can be formed by physical quantum bits 2b to 2e, which are some of the quantum bits possessed by the quantum bit device 2.

[0019] For example, when the quantum circuit to be executed includes a phase rotation gate 3, the processing unit 12 causes the quantum computer 1 to execute a first gate operation in accordance with the auxiliary state generation circuit 5 in order to generate an auxiliary state to be input to the gate teleportation circuit 4. The quantum computer 1 executes the first gate operation in accordance with the instruction from the processing unit 12. As a result, a code 2a including a logical quantum bit 5b and a gauge quantum bit 5c is generated.

[0020] Furthermore, the processing unit 12 causes the quantum computer 1 to execute a second gate operation in accordance with the error detection circuit 6. The quantum computer 1 executes the second gate operation in accordance with the instruction from the processing unit 12. The quantum computer 1 transmits the measurement value obtained by executing the second gate operation to the processing unit 12.

[0021] Processing unit 12 determines whether or not an error exists based on a measurement value indicating the state of gauge qubit 5c obtained by the second gate operation. In this way, errors that do not affect the auxiliary state represented by logic qubit 5 b but affect the state of gauge qubit 5 c can be detected. As a result, the auxiliary states used to implement phase rotation gate 3 are less likely to contain errors, and the rate of error occurrence in the gate operation of phase rotation gate 3 is reduced.

[0022] An example of an error that affects the state of the gauge qubit 5c is a YY error that occurs when the two-qubit rotate gate 5a is executed. For example, the auxiliary state generation circuit 5 may include a two-qubit rotate gate 5a that rotates the phase of the first physical qubit and the second physical qubit. In this case, a YY error may occur in which an unnecessary Y operator acts on the first physical qubit and the second physical qubit during the gate operation of the two-qubit rotate gate 5a.

[0023] Such a YY error acts on the state of gauge qubit 5c, changing its state. For example, if there were no YY error, the state of gauge qubit 5c would be "|0> G In this case, if a YY error occurs, the state of gauge qubit 5c becomes "|1> G "

[0024] At this time, processing unit 12 determines that an error has occurred when a measurement value indicating the state of gauge qubit 5c after a change due to a YY error occurring during gate operation by two-qubit rotation gate 5a is obtained.

[0025] When a YY error occurs, the processing unit 12 discards the auxiliary state generated at that time and generates an auxiliary state again, thereby preventing the gate teleportation circuit 4 from executing using an auxiliary state containing an undetected error, and reducing errors occurring in the phase rotation gate 3.

[0026] Error detection circuit 6 includes, for example, a first circuit 6a for measuring eigenvalues ​​of the Z stabilizers of multiple physical qubits 2b to 2e that constitute code 2a, and a second circuit 6b for measuring eigenvalues ​​of the X stabilizers. In this case, executing second circuit 6b would destroy the state of gauge qubit 5c, making it impossible to detect errors based on the state of gauge qubit 5c. Therefore, processing unit 12 causes quantum computer 1 to execute a second gate operation in accordance with error detection circuit 6, in which second circuit 6b is arranged after first circuit 6a.

[0027] Processing unit 12 then determines whether or not an error exists based on the measurement value obtained by executing first circuit 6a. For example, by executing first circuit 6a, the eigenvalue of the gauge degree of freedom represented by gauge qubit 5c can be obtained as a measurement value. When the state of gauge qubit 5c is "|0> G ", then the eigenvalue of the gauge degree of freedom is "+1", and the state of gauge qubit 5c is "|1> G If the eigenvalue of the gauge degree of freedom obtained as a measurement value is "-1", processing unit 12 determines that the state of gauge qubit 5c is "|1> G " and it is determined that a YY error has occurred. This makes it possible to detect errors based on the state of gauge qubit 5c, and also reduces errors that occur in phase rotation gate 3.

[0028] The processing unit 12 also calculates the eigenvalue of the Z stabilizer from the measurement values ​​obtained by executing the first circuit 6a, and determines that an error exists when the eigenvalue of the Z stabilizer is "-1," for example. The processing unit 12 also calculates the eigenvalue of the X stabilizer from the measurement values ​​obtained by executing the second circuit 6b, and determines that an error exists when the eigenvalue of the X stabilizer is "-1," for example.

[0029] The error detection circuit 6 is a circuit that detects the presence or absence of an error using measurement physical qubits (measurement qubits) adjacent to the physical qubits 2b to 2e that constitute the symbol 2a, without affecting the state of the logical qubit 5b. For example, the auxiliary state generation circuit 5 includes a two-qubit rotation gate 5a that rotates the phase of the first physical qubit and the second physical qubit. In this case, the error detection circuit 6 includes the following quantum gate in the first circuit 6a for measuring the eigenvalues ​​of the Z stabilizer as a circuit for detecting an error in the gauge qubit 5c.

[0030] For example, the first circuit 6a has a CNOT gate for measuring the state of the first physical quantum bit and error information of the second physical quantum bit with a measurement quantum bit. The first CNOT gate is a CNOT gate with the first physical quantum bit as the control quantum bit and the measurement quantum bit as the target quantum bit. The second CNOT gate is a CNOT gate with the second physical quantum bit as the control quantum bit and the measurement quantum bit as the target quantum bit.

[0031] The processing unit 12 causes the quantum computer 1 to execute an error detection circuit 6 in which the first circuit 6a is arranged before the second circuit 6b. The processing unit 12 then determines the state of the gauge qubit based on the measurement value in the Z basis of the measurement qubit. For example, the processing unit 12 determines that there is no error if the measurement value is "+1" and that there is an error if the measurement value is "-1." This makes it possible to detect, for example, a YY error occurring in a two-qubit rotation gate 5a included in the auxiliary state generation circuit 5.

[0032] The measurement value of the measurement qubit indicates, for example, the eigenvalue of the gauge degree of freedom represented by gauge qubit 5c. For example, if a YY error occurs in two-qubit rotation gate 5a included in auxiliary state generation circuit 5, the eigenvalue of the gauge degree of freedom represented by gauge qubit 5c is inverted. If the eigenvalue of the gauge degree of freedom represented by gauge qubit 5c does not invert, the measurement value of the measurement qubit will be "+1". If the eigenvalue of the gauge degree of freedom represented by gauge qubit 5c is inverted, the measurement value of the measurement qubit will be "-1".

[0033] An example of a code 2a that includes a logical qubit 5b representing an auxiliary state and a gauge qubit 5c representing gauge degrees of freedom is the [[4,1,1,2]] code. The [[4,1,1,2]] code uses four physical qubits, one logical qubit 5b representing the auxiliary state, one gauge qubit 5c, and a code distance of 2. By using the [[4,1,1,2]] code, a quantum state can be generated using the code 2a that includes the gauge qubit 5c, and error detection based on the state of the gauge qubit 5c is also possible.

[0034] Second Embodiment The second embodiment is a quantum computing system that can reduce errors in phase rotation gates in quantum computing using the STAR architecture.

[0035] FIG. 2 is a diagram showing an example of a system configuration according to the second embodiment. A quantum computing system 30 includes a classical computer 100 and a quantum computer 200. The classical computer 100 is a computer known as a von Neumann computer. The quantum computer 200 is a non-von Neumann computer that applies the principles of quantum mechanics. The classical computer 100 is connected to a terminal 29 via a network 20. The terminal 29 is a von Neumann computer used by a user.

[0036] A user uses terminal 29 to create a quantum circuit for solving a target problem using quantum computing. The created quantum circuit is sent from terminal 29 to quantum computing system 30. In quantum computing system 30, classical computer 100 and quantum computer 200 work together to execute quantum computation according to the acquired quantum circuit. Then, quantum computing system 30 sends the computation result to terminal 29.

[0037] FIG. 3 is a diagram illustrating an example of hardware for a quantum computing system. A classical computer 100 is entirely controlled by a processor 101. A memory 102 and multiple peripheral devices are connected to the processor 101 via a bus 109. The processor 101 may be a multiprocessor. The processor 101 is, for example, a CPU (Central Processing Unit), an MPU (Micro Processing Unit), or a DSP (Digital Signal Processor). At least some of the functions realized by the processor 101 executing a program may be realized by an electronic circuit such as an ASIC (Application Specific Integrated Circuit) or a PLD (Programmable Logic Device).

[0038] The memory 102 is used as a main storage device of the classical computer 100. The memory 102 temporarily stores at least a portion of the OS (Operating System) program and application programs to be executed by the processor 101. The memory 102 also stores various data used in processing by the processor 101. As the memory 102, for example, a volatile semiconductor storage device such as a RAM (Random Access Memory) is used.

[0039] The peripheral devices connected to the bus 109 include a storage device 103, a GPU (Graphics Processing Unit) 104, an input interface 105, an optical drive device 106, a device connection interface 107, and a network interface 108.

[0040] The storage device 103 writes and reads data electrically or magnetically to and from a built-in recording medium. The storage device 103 is used as an auxiliary storage device for the classical computer 100. The storage device 103 stores the OS program, application programs, and various data. Note that the storage device 103 may be, for example, an HDD (Hard Disk Drive) or an SSD (Solid State Drive).

[0041] The GPU 104 is an arithmetic unit that performs image processing. The GPU 104 is an example of a graphics controller. The GPU 104 is connected to a monitor 21. The GPU 104 displays an image on the screen of the monitor 21 in accordance with an instruction from the processor 101. The monitor 21 may be a display device using organic EL (Electro Luminescence) or a liquid crystal display device.

[0042] The input interface 105 is connected to a keyboard 22 and a mouse 23. The input interface 105 transmits signals sent from the keyboard 22 and the mouse 23 to the processor 101. The mouse 23 is an example of a pointing device, and other pointing devices can also be used. Examples of other pointing devices include a touch panel, a tablet, a touch pad, and a trackball.

[0043] The optical drive device 106 uses a laser beam or the like to read data recorded on an optical disc 24 or write data to the optical disc 24. The optical disc 24 is a portable recording medium on which data is recorded so that it can be read by reflected light. The optical disc 24 includes a DVD (Digital Versatile Disc), a DVD-RAM, a CD-ROM (Compact Disc Read Only Memory), a CD-R (Recordable) / RW (Rewritable), and the like.

[0044] The device connection interface 107 is a communication interface for connecting peripheral devices to the classical computer 100. For example, a memory device 25 or a memory reader / writer 26 can be connected to the device connection interface 107. The memory device 25 is a recording medium equipped with a function for communicating with the device connection interface 107. The memory reader / writer 26 is a device for writing data to the memory card 27 or reading data from the memory card 27. The memory card 27 is a card-type recording medium.

[0045] The network interface 108 is connected to the network 20. The network interface 108 transmits and receives data to and from other computers or communication devices via the network 20. The network interface 108 is a wired communication interface connected by a cable to a wired communication device such as a switch or a router. The network interface 108 may also be a wireless communication interface connected by radio waves to a wireless communication device such as a base station or an access point.

[0046] The quantum computer 200 shares a bus 109 with the classical computer 100. The quantum computer 200 can communicate information with each element in the classical computer 100 via the bus 109.

[0047] Quantum computer 200 has quantum processing unit 201 connected to bus 109. Quantum processing unit 201 performs gate operations on quantum bits according to quantum gates shown in the quantum circuit and measures the states of the quantum bits. Quantum processing unit 201 has quantum bit device 202 and quantum bit control signal generator 203. Quantum bit device 202 holds the states of multiple quantum bits and performs gate operations on those quantum bits. Quantum bit control signal generator 203 generates control signals that instruct gate operations or measurements on the quantum bits.

[0048] The quantum computing system 30 can realize the processing functions of the second embodiment by using the hardware described above. Note that the information processing device 10 shown in the first embodiment can also be realized by using the same hardware as the quantum computing system 30 shown in FIG.

[0049] The classical computer 100 realizes the processing functions of the second embodiment by executing a program recorded on, for example, a computer-readable recording medium. The program describing the processing to be executed by the classical computer 100 can be recorded on various recording media. For example, the program to be executed by the classical computer 100 can be stored in a storage device 103. The processor 101 loads at least a portion of the program in the storage device 103 into the memory 102 and executes the program. The program to be executed by the classical computer 100 can also be recorded on a portable recording medium such as an optical disk 24, a memory device 25, or a memory card 27. The program stored on the portable recording medium becomes executable after being installed on the storage device 103, for example, under the control of the processor 101. The processor 101 can also read and execute the program directly from the portable recording medium.

[0050] Next, we will provide an overview of error correction in quantum computing and explain the usefulness of the STAR architecture. FIG. 4 is a diagram showing the characteristics of a quantum bit. A quantum bit 41, which is the smallest unit of information in a quantum computer 200, can be in the state "|0>" and the state "|1>", and can also be in a superposition state between these. In the superposition state, whether the value obtained by measuring the quantum bit 41 is "|0>" or "|1>" is determined probabilistically. For example, if the probability of "|0>" and the probability of "|1>" are the same, the superposition state of the quantum bit 41 is "2>". -1 / 2 (|0>+|1>)".

[0051] The information held by such a quantum bit 41 can be corrupted (an error occurs) due to interactions with the environment or operational errors. For example, if an error destroys the superposition state, the state of the quantum bit 41 changes to a state like "|0>". To improve calculation accuracy, it is necessary to detect quantum bits in which an error has occurred and correct the state of the quantum bit to the correct state.

[0052] To address this issue, a technology called quantum error correction has been proposed. In quantum error correction, multiple qubits are combined and encoded. When encoded, the state of one or more logical qubits is represented by the multiple physical qubits used in the encoding. Based on the overall state of the encoded multiple qubits, the qubit in which an error occurred is detected and corrected.

[0053] FIG. 5 is a diagram illustrating an example of quantum error correction. As shown in FIG. 5, a logical quantum bit 42 is defined by a plurality of physical quantum bits 42a, 42b, . . . , 42n. In the example of FIG. 5, when the states of the plurality of physical quantum bits 42a, 42b, . . . , 42n are all "|0>", an error occurs, and the state of physical quantum bit 42b is inverted to "|1>". In such a case, the error is detected based on information obtained from the respective states of the plurality of physical quantum bits 42a, 42b, . . . , 42n. Then, the physical quantum bit 42b in which the error occurred is identified, and the state of that physical quantum bit 42b is corrected.

[0054] By performing quantum error correction appropriately in this way, even if errors occur in the physical qubits, as long as the number of errors is within the allowable range, the logical qubit 42 will remain in a correct state. Quantum computation with quantum error correction for logical qubits can be realized by combining predetermined basic gates.

[0055] FIG. 6 shows an example of a basic gate used in error-tolerant quantum computing. The basic gates used in quantum computing with quantum error correction are an H gate 43a, a CNOT gate 43b, an S gate 43c, and a T gate 43d. The H gate 43a is called a Hadamard gate and is a quantum gate that rotates a state by 180 degrees around an axis tilted at 45 degrees between the Z axis and the X axis. The CNOT gate 43b is a quantum gate that leaves the state of the target bit unchanged if the state of the control bit is "|0>" and inverts the state of the target quantum bit if the state of the control bit is "|1>". The S gate 43c is a quantum gate that rotates the state by π / 2 around the Z axis. The T gate 43d is a quantum gate that rotates the state by π / 4 around the Z axis.

[0056] Of these, the H gate 43a, CNOT gate 43b, and S gate 43c are called Clifford operators. In contrast, the T gate is called a non-Clifford operator. These basic gates are collectively called Clifford+T. Clifford+T in calculations on the quantum computer 200 corresponds to AND, XOR, and NOT in the classical computer 100. In other words, by combining Clifford+T quantum gates, it is possible to perform any quantum calculation.

[0057] Here, in Clifford+T fault-tolerant quantum computing, typically more than one million physical qubits are used to perform useful calculations. A large proportion (e.g., more than 90%) of the large number of physical qubits is used to rotate the logical qubit by an arbitrary angle. Rotation by an arbitrary angle involves gate operations using a large number of T gates 43d. A large number of physical qubits are used for error correction of the T gates 43d (the error correction cost is high). This is a major factor in increasing the number of physical qubits required to realize FTQC.

[0058] Moreover, in order to realize a rotation operation of an arbitrary angle, in most cases, the gate operation of the T gate 43d must be repeated several tens of times. Therefore, realizing rotation of an arbitrary angle using the T gate 43d leads to a decrease in the execution efficiency of the quantum circuit.

[0059] Therefore, in the STAR architecture, a phase rotation gate 43e is used as a basic gate instead of the T gate 43d of Clifford+T. The phase rotation gate 43e in the STAR architecture is a gate that rotates a predetermined auxiliary state "|m θ > L This can be done using a gated teleportation circuit using the ". Auxiliary states are sometimes called resource states.

[0060] Status "|m θ >" is "|m θ >=R Z (θ)|+>=2 -1 / 2 (e -iθ / 2 |0>+e +iθ / 2 |1>)". θ is an arbitrary rotation angle. Auxiliary state "|m θ > L The subscript L in " indicates that the state is represented by a redundant logical qubit. Similarly, hereafter, the subscript L will be added to the state of a logical qubit.

[0061] 7 is a diagram showing an example of a quantum circuit that performs gate operations for arbitrary rotation. The gate teleportation circuit 50 performs rotation of an angle θ (R Z (θ)). In the gate teleportation circuit 50, the first quantum bit is set to the state of the operation target, "|ψ> L " is input, and the second qubit is given the auxiliary state "|m θ > L " is entered.

[0062] In the gate teleportation circuit 50, first, a CNOT gate 50a is operated with the second quantum bit as the control bit and the first quantum bit as the target bit. Then, a measurement 50b of the first quantum bit is performed, and if the measurement result is "-1", an X gate 50c is operated on the second quantum bit.

[0063] If the measurement result of the first qubit is "+1", the state of the second qubit is "R Z (θ)|ψ> L If the measurement result of the first qubit is "-1", the state of the second qubit is "R Z (-θ)|ψ> L " In this way, after the gate operation of the gate teleportation circuit 50 for any rotation, "R Z (θ)|ψ> L " or "R Z (-θ)|ψ> L " is obtained. In other words, the output state is probabilistically reversed. If the output state is "R Z (θ)|ψ> L " and "R Z (-θ)|ψ> L The probability of each being "1 / 2".

[0064] Since the output state of the gate teleportation circuit 50 will probabilistically result in the desired rotation (forward rotation) or reverse rotation, the quantum computing system 30 repeatedly executes the same gate operation until the desired rotation is successful.

[0065] For example, if a gating operation for a rotation of the desired angle θ fails, resulting in a reverse rotation (-θ), the quantum computing system 30 will perform a rotation of angle 2θ in the next gating operation for the rotation. If the gating operation for a rotation of angle 2θ also fails, resulting in a reverse rotation (-2θ), the sum of the two rotation operations will be -3θ. In this case, the quantum computing system 30 will perform a rotation of angle 4θ, for example, in the next gating operation for the rotation.

[0066] If the probability of a successful spin and the probability of an unsuccessful spin are 1 / 2, then the average number of times until a spin is successful is 1×(1 / 2)+2×(1 / 4)+=Σ n n2 -n =2". In other words, the quantum computing system 30 can realize any rotation by performing the gate operation of the gate teleportation circuit 50 an average of two times.

[0067] The gate teleportation circuit 50 receives the auxiliary state "|m θ > L Therefore, before the gate teleportation is performed, the auxiliary state "|m θ > L " is generated. Then, the generated auxiliary state "|m θ > L The accuracy of " affects the accuracy of the entire arbitrary rotation.

[0068] 8 is a diagram showing an example of a quantum circuit for preparing an auxiliary state. The auxiliary state "|m θ > L " can be generated by applying an error-correcting code called [[4,1,1,2]] code52.

[0069] In general, when written as a [[n,k,r,d]] code, the numbers have the following meanings: n: Number of physical qubits used for encoding k: the number of logical qubits the code has r: the number of gauge qubits the code has d: Code distance of the code A gauge qubit is a quantum state that is independent of logical qubits and exhibits gauge degrees of freedom that are not used (redundant) in calculations.

[0070] The [[4,1,1,2]] code 52 is a code that has one logical qubit and one gauge qubit. By using the [[4,1,1,2]] code 52, error detection can be efficiently performed by utilizing the gauge degrees of freedom of the gauge qubit (see Non-Patent Document 1). Note that there is also a notation method in which the logical qubit and the gauge qubit are collectively written as the [[4,2,2]] code.

[0071] The input states of the four physical quantum bits in the auxiliary state generation circuit 51 are all "|0>". In the auxiliary state generation circuit 51, first, gate operations of H gates 51a and 51b are performed on the second and fourth physical quantum bits of the four physical quantum bits. Next, gate operations of CNOT gate 51c are performed with the second physical quantum bit as the control quantum bit and the first physical quantum bit as the target quantum bit. At the same time, gate operations of CNOT gate 51d are performed with the fourth physical quantum bit as the control quantum bit and the third physical quantum bit as the target quantum bit. Then, a two-qubit rotation gate 51e around the Z axis is executed on the first physical quantum bit and the third physical quantum bit.

[0072] The operation of the two-qubit rotation gate 51e is "R Z0Z2 (θ)=e -i(1 / 2)θZ0Z2 " (The number following Z is a subscript on Z indicating the quantum bit to be operated). The operation of the two-qubit rotation gate 51e can be expressed as a matrix as shown in equation (1) (the subscript indicating the quantum bit to be operated is omitted).

[0073]

number

[0074] The two-qubit rotation gate 51e shown in equation (1) can be easily implemented in the quantum computer 200. For example, in the case of an ion trap type quantum computer, the two-qubit rotation gate 51e can be implemented as an XX rotation gate R XX(θ) and an H gate. In addition, the two-qubit rotation gate 51e can be implemented using, for example, a cross resonant gate R ZX (θ) and H gates. Even if these cannot be used, the two-qubit rotation gate 51e can be implemented using the CNOT gate and the RZ gate (R Z (θ)) can be combined. The output of the auxiliary state generation circuit 51 is the coded auxiliary state "|m θ > L "

[0075] In the auxiliary state generating circuit 51, if there is no error, the state "|m θ > L |0> G " is generated. Here, "|m θ > L " is the state of the logical qubit, and "|0> G " is a gauge qubit.

[0076] In this way, the output of the auxiliary state generation circuit 51 has two degrees of freedom: a logical qubit and a gauge qubit. The state of the logical qubit can be used as an auxiliary state in the gate teleportation circuit 50, while the state of the gauge qubit can be used for error detection.

[0077] The generated auxiliary state is then gated for the coded arbitrary rotation, without passing through the decoded state, thereby avoiding the increased error rate that would occur if the state were decoded.

[0078] The generated auxiliary state "|m θ > L " is subjected to error detection by the [[4,1,1,2]] code 52. If an error is detected, the generated auxiliary state "|m θ > L " and discard the auxiliary state "|m θ > LThis allows the generation of auxiliary states with as few errors as possible.

[0079] Auxiliary state "|m θ > L In error detection for ", the eigenvalues ​​of the following stabilizer operator are measured. Note that the stabilizer operator is an operator that defines the error correction code, and the location of the error can be estimated from the information obtained by measuring this operator. S Z =Z0Z1Z2Z3 S X =X0X1X2X3 The subscripts on the right hand side are the serial numbers of the physical qubits that represent the states of the logical qubits in [[4,1,1,2]]. Z "," "S X " is "+1". Therefore, the stabilizer operator "S Z "," "S X By checking the value of ", you can determine whether an error has occurred.

[0080] The eigenvalues ​​of the stabilizer operator can be decomposed into a product of the eigenvalues ​​of the gauge operators. S Z =(Z0Z1)(Z2Z3) S X =(X0X1)(X2X3) (Z0Z1) and (Z2Z3) are the gauge Z operators, and (X0X1) and (X2X3) are the gauge X operators. The gauge operators can be measured by an error detection circuit using measurement qubits (also called ancillary qubits).

[0081] FIG. 9 is a diagram showing an example of an error detection circuit. In the error detection circuit 61, in addition to four physical qubits (qubit numbers are "0, 1, 2, 3") that represent the state of the logical qubit, four measurement qubits "M0, M1, M2, M3" are used. The initial state of the measurement qubits "M0, M1, M2, M3" is "|0>". Measurement of the gauge X operator is performed using the measurement qubits "M0, M3". Measurement of the gauge Z operator is performed using the measurement qubits "M1, M2". Note that in FIG. 9, elements that indicate quantum gates or measurements that can be operated simultaneously are enclosed in dashed frames.

[0082] In measuring the gauge X operator, Hadamard gates 61a and 61b perform gate operations on the measurement qubits "M0" and "M3," respectively. Next, CNOT gate 61c performs gate operations with measurement qubit "M0" as the control qubit and the physical qubit with qubit number "0" as the target qubit. Next, CNOT gate 61d performs gate operations with measurement qubit "M3" as the control qubit and the physical qubit with qubit number "1" as the target qubit. Next, CNOT gate 61e performs gate operations with measurement qubit "M0" as the control qubit and the physical qubit with qubit number "2" as the target qubit. Next, CNOT gate 61f performs gate operations with measurement qubit "M3" as the control qubit and the physical qubit with qubit number "3" as the target qubit. Finally, Hadamard gates 61g and 61h perform gate operations on the measurement qubits "M0" and "M3," respectively.

[0083] After such gate operations, measurements 61i and 61j (measurements in the Z basis) of the measurement qubits "M0" and "M3" are performed. The measurement result of the measurement qubit "M0" is the gauge X operator (X0X1). The measurement result of the measurement qubit "M3" is the gauge X operator (X2X3). The product of the eigenvalues ​​of the two gauge operators is the eigenvalue of the stabilizer operator, "S X "

[0084] In measuring the gauge Z operator, first, a gate operation is performed by CNOT gate 61k, with the physical qubit with qubit number "0" as the control qubit and the measurement qubit "M1" as the target qubit. Next, a gate operation is performed by CNOT gate 61l, with the physical qubit with qubit number "2" as the control qubit and the measurement qubit "M2" as the target qubit. Next, a gate operation is performed by CNOT gate 61m, with the physical qubit with qubit number "1" as the control qubit and the measurement qubit "M1" as the target qubit. Finally, a gate operation is performed by CNOT gate 61n, with the physical qubit with qubit number "3" as the control qubit and the measurement qubit "M2" as the target qubit.

[0085] After such gate operations, measurements 61o and 61p (measurements in the Z basis) are performed on the measurement qubits M1 and M2. The measurement result of the measurement qubit M0 is the gauge Z operator (Z0Z1). The measurement result of the measurement qubit M3 is the gauge Z operator (Z2Z3).

[0086] By executing such an error detection circuit 61 on the quantum computer 200, it becomes possible to detect errors without affecting the state of the logical qubit for creating the auxiliary state. Z "

[0087] By performing error detection using such an error detection circuit 61, it is possible to suppress errors that occur during gate operation by the error detection circuit 61, and processing can also be performed at high speed. Note that while the error detection circuit 61 shown in Figure 9 can eliminate most errors, it cannot eliminate some errors.

[0088] 10 is a diagram showing an example of an error that is difficult to remove. An example of an error that is difficult to remove is an error that occurs during gate operation of the two-qubit rotation gate 51e in the auxiliary state generation circuit 51. The error that remains in the two-qubit rotation gate 51e is directly linked to an error in the phase rotation gate 43e. The error in the phase rotation gate 43e significantly affects the error rate of the entire quantum computation.

[0089] Consider, for example, the circuit-level noise model. Circuit-level noise is a model in which errors occur in all gate operations, including initialization, gate operation, and measurement, and is widely used as a realistic model to verify the performance of quantum error correction. In the error detection circuit 61 shown in Figure 9, the ZZ error and YY error that occur immediately after the gate operation of the two-qubit rotation gate 51e cannot be detected. Therefore, the ZZ error and YY error cause logical errors.

[0090] In the circuit-level noise model, the probability of occurrence of ZZ errors and YY errors is p / 15 (p is the error occurrence probability of each quantum gate). The leading term of the logical error probability based on ZZ errors and YY errors is 2p / 15. Here, the leading term is the term that has the largest contribution to the whole. If Z errors occur independently in two places, it can also become a logical error, but the contribution of such errors is p 2 , so its contribution is smaller than that of the ZZ error or the YY error.

[0091] Therefore, we will examine the effects of ZZ errors or YY errors. 11 is a diagram showing an example of the output state of the auxiliary state generating circuit. θ > L ” is a logical phase rotation gate “R ZL (θ)". The gauge qubit included in the output state is independent of the auxiliary states, and if there is no error, "|0> G "

[0092] The Z-gate operation of the logical qubits representing the auxiliary states is called "Z L =Z0Z2', and the X gate operation of the gauge qubit is 'X G =X0X2". "Z0" is the Z-basis measurement value of the physical quantum bit with quantum bit number "0". "Z2" is the Z-basis measurement value of the physical quantum bit with quantum bit number "2". "X0" is the X-basis measurement value of the physical quantum bit with quantum bit number "0". "X2" is the X-basis measurement value of the physical quantum bit with quantum bit number "2".

[0093] Here, if a ZZ error occurs, the logical qubit is set to "Z L " acts, and the output state becomes equation (2).

[0094]

number

[0095] Also, if a YY error occurs, the logical qubit is marked with "Z L ” acts on the gauge qubit, generating “X G As a result, the output state becomes the left side of equation (3).

[0096]

number

[0097] The output state when a YY error occurs can be transformed as shown on the right side of equation (3). In this way, the gauge qubit does not invert its state even if a ZZ error occurs, but when a YY error occurs, the gauge qubit state changes to "|0> G " to "|1> G " Therefore, if the state of the inverted gauge qubit can be measured correctly, it is possible to detect the YY error.

[0098] The following describes how the state of the gauge qubit changes when the error detection circuit 61 shown in FIG. 9 is executed. The Pauli operators that change the state of the quantum bit are expressed by the following formulas (4) to (6).

[0099]

number

[0100]

number

[0101]

number

[0102] Equation (4) is the X operator that indicates the gate operation of the X gate. Equation (5) is the Y operator that indicates the gate operation of the Y gate. Equation (6) is the Z operator that indicates the gate operation of the Z gate. These Pauli operators are "XY = -YX", "YZ = -ZY", "ZX = -XZ", and "X 2 =Y 2 =Z 2 =I" (I is the identity operator).

[0103] The states "|0>" and "|1>" are ±1 eigenvectors of the Z operator. Expressed as the formula, they are as follows:

[0104]

number

[0105]

number

[0106] The states "|+>" and "|->" are ±1 eigenvectors of the X operator. Expressed as the formula, they are as follows:

[0107]

number

[0108]

number

[0109] The states "|0>" and "|1>" can be expressed as "|+>" and "|->" as follows:

[0110]

number

[0111]

number

[0112] The states "|+>" and "|->" can be expressed as "|0>" and "|1>" as follows:

[0113]

number

[0114]

number

[0115] Here, we will explain the difference in behavior between a quantum bit in either the "|0>" or "|1>" state when a Z measurement (projection measurement onto the Z basis) is performed and an X measurement (projection measurement onto the X basis) is performed.

[0116] First, let us explain what happens when a Z measurement is performed. As shown in equations (7) and (8), "|0>" and "|1>" are eigenstates of the Z operator. Therefore, when a Z measurement is performed, the eigenvalue corresponding to the state is measured with a 100% probability ("+1" if the state is "|0>", and "-1" if the state is "|1>"). In other words, by checking the measured eigenvalue, it is possible to determine whether the state is "|0>" or "|1>".

[0117] Next, we will explain what happens when an X measurement is performed. As shown in equations (11) and (12), both "|0>" and "|1>" are superposition states of the eigenstates "|+>" and "|->" of the X operator, with equal weighting. Therefore, regardless of whether the state is "|0>" or "|1>", the eigenvalues ​​"+1" or "-1" are measured with a 50% probability. In other words, it is impossible to determine from the measurement results whether the state is "|0>" or "|1>".

[0118] In this way, a Z measurement can determine whether the state is "|0>" or "|1>", but an X measurement cannot determine whether the state is "|0>" or "|1>". For gauge qubits, it is also possible to determine whether the state is "|0>" or "|1>" by measuring the eigenvalues ​​of the gauge Z operator.

[0119] Also, when a measurement is performed, the state of the quantum bit may or may not change. Next, we will explain what state a quantum bit in the ``|0>'' or ``|1>'' state will be in after measurement.

[0120] 12 is a diagram showing an example of a state change due to measurement. The state 62a of the quantum bit to be measured before the measurement is "|i>" (i = 0, 1). When a Z measurement is performed on the quantum bit in state 62a, the state remains unchanged before and after the measurement because "|0>" and "|1>" are eigenstates of the Z operator, and the state 62b after the measurement is "|i>". In other words, the state is not destroyed by the Z measurement.

[0121] On the other hand, when a Z measurement is performed on a quantum bit in state 62a, "|0>" and "|1>" are superposition states of the equally weighted eigenstates "|+>" and "|->" of the X operator. Therefore, state 62b after the measurement is transformed into either "|+>" or "|->" depending on the measurement result. In other words, the original state is destroyed by the X measurement.

[0122] The gauge qubit state |0> G" is an eigenstate of the eigenvalue "+1" of the gauge Z operator. Just as when "|0>" and "|1>" are X-measured, when the state of a gauge qubit is measured with the gauge X operator, the measurement value is "|0> G " and "|1> G " is determined randomly regardless of whether the state is " or ". Therefore, it cannot be used to determine whether an YY error has occurred.

[0123] Furthermore, if the gauge X operator is measured before the gauge Z operator is measured, as in the error detection circuit 61 shown in FIG. 9, the original state is destroyed as a result of the measurement of the gauge X operator, and the state of the gauge qubit becomes "|+> G " or "|-> G Therefore, even if the gauge Z operator is measured after the gauge X operator, as in error detection circuit 61, the state of the gauge qubit will have been destroyed by the time the gauge Z operator is measured, and the YY error cannot be detected.

[0124] Therefore, the quantum computing system 30 makes it possible to detect YY errors by improving the error detection circuit. FIG. 13 is a diagram showing an example of an error detection circuit capable of detecting YY errors. In the error detection circuit 63, in addition to four physical qubits (qubit numbers are "0, 1, 2, 3") that represent the state of the logical qubit, four measurement qubits "M0, M1, M2, M3" are used. The initial state of the measurement qubits "M0, M1, M2, M3" is "|0>". Measurement of the gauge X operator is performed using the measurement qubits "M0, M3". Measurement of the gauge Z operator is performed using the measurement qubits "M1, M2". Note that in FIG. 13, elements that indicate quantum gates or measurements that can be operated simultaneously are enclosed in dashed frames.

[0125] In the error detection circuit 63, after measuring the gauge Z operator, measuring the gauge X operator is performed. In measuring the gauge Z operator, first, a gate operation of the CNOT gate 63a is performed with the physical qubit with qubit number "0" as the control qubit and the measurement qubit "M1" as the target qubit. Next, a gate operation of the CNOT gate 63b is performed with the physical qubit with qubit number "2" as the control qubit and the measurement qubit "M2" as the target qubit. Next, a gate operation of the CNOT gate 63c is performed with the physical qubit with qubit number "1" as the control qubit and the measurement qubit "M1" as the target qubit. Finally, a gate operation of the CNOT gate 63d is performed with the physical qubit with qubit number "3" as the control qubit and the measurement qubit "M2" as the target qubit.

[0126] After such gate operations, measurements 63e and 63f (measurements in the Z basis) of the measurement qubits "M1" and "M2" are performed. The measurement result of the measurement qubit "M0" is the gauge Z operator (Z0Z1). The measurement result of the measurement qubit "M3" is the gauge Z operator (Z2Z3). The product of the eigenvalues ​​of the two gauge Z operators is the eigenvalue of the Z stabilizer operator, "S Z "

[0127] In measuring the gauge X operator, Hadamard gates 63g and 63h are used to perform gate operations on the measurement qubits "M0" and "M3," respectively. Next, CNOT gate 63i is used to perform gate operations on the measurement qubit "M0" as the control qubit and the physical qubit with qubit number "0" as the target qubit. Next, CNOT gate 63j is used to perform gate operations on the measurement qubit "M3" as the control qubit and the physical qubit with qubit number "1" as the target qubit. Next, CNOT gate 63k is used to perform gate operations on the measurement qubit "M0" as the control qubit and the physical qubit with qubit number "2" as the target qubit. Next, CNOT gate 63l is used to perform gate operations on the measurement qubits "M3" as the control qubit and the physical qubit with qubit number "3" as the target qubit. Finally, Hadamard gates 63m and 63n are used to perform gate operations on the measurement qubits "M0" and "M3," respectively.

[0128] After such gate operations, measurements 63o and 63p (measurements in the Z basis) of the measurement qubits "M0" and "M3" are performed. The measurement result of the measurement qubit "M0" is the gauge X operator (X0X1). The measurement result of the measurement qubit "M3" is the gauge X operator (X2X3). The product of the eigenvalues ​​of the two gauge X operators is the eigenvalue of the X stabilizer operator, "S X "

[0129] In the error detection circuit 63, the final gate operation in the measurement of the gauge Z operator for the physical quantum bit indicating the state of the logical quantum bit is the CNOT gate 63d. The first gate operation in the measurement of the gauge X operator for the physical quantum bit indicating the state of the logical quantum bit is the CNOT gate 63i. The gate operation of the CNOT gate 63i is performed after the gate operation of the CNOT gate 63d. That is, in the error detection circuit 63, the measurement of the gauge Z operator is performed before the measurement of the gauge X operator.

[0130] 14 is a diagram showing a comparative example of the order of measurement of the eigenvalues ​​of the gauge operators in the error detection circuit. In the error detection circuit 61, the eigenvalues ​​of the gauge X operator are measured first, and then the eigenvalues ​​of the gauge Z operator are measured. In this measurement order, the state of the gauge qubit is destroyed by the measurement of the eigenvalues ​​of the gauge X operator. Therefore, the state of the gauge qubit cannot be detected in the measurement of the eigenvalues ​​of the gauge Z operator.

[0131] On the other hand, in the error detection circuit 63, the eigenvalues ​​of the gauge Z operator are measured first, and then the eigenvalues ​​of the gauge X operator are measured. This makes it possible to detect whether or not the gauge qubit immediately after execution of the auxiliary state generation circuit 51 has undergone bit inversion in the measurement of the eigenvalues ​​of the gauge Z operator.

[0132] Fig. 15 shows an example of the state change of the [[4,1,1,2]] code 52 depending on the order of measurements of the gauge operators. Fig. 15 shows the state change of the [[4,1,1,2]] code 52 when the eigenvalue measurement of the gauge X operator is performed first and when the eigenvalue measurement of the gauge Z operator is performed first.

[0133] The [[4,1,1,2]] code state transition 52a shows the state transition of the [[4,1,1,2]] code 52 when the eigenvalue measurement of the gauge X operator is performed first (the error detection circuit 61 shown in FIG. 9 is executed).

[0134] The state of the [[4,1,1,2]] code 52 immediately after the execution of the auxiliary state generating circuit 51 is "|m θ > L |i> G If there is no YY error, it is "i=0", and if there is a YY error, it is "i=1".

[0135] First, when we perform the eigenvalue measurement of the gauge X operator, the state of [[4,1,1,2]] code 52 is "|m θ > L |+> G " or "|m θ >L |-> G Which state it is does not depend on the state immediately after the execution of the auxiliary state generation circuit 51. That is, when the gauge qubit is "|0> G ", |1> G ", a random measurement of ±1 is obtained with a 50% probability. Therefore, the eigenvalue measurement of the gauge X operator does not provide information on whether a YY error occurred (when the gauge qubit is "|0> G ", |1> G Furthermore, since the state changes (error information is lost) when measuring the eigenvalues ​​of the gauge X operator, it is not possible to extract information on whether a YY error occurred in the subsequent measurement of the eigenvalues ​​of the gauge Z operator.

[0136] The [[4,1,1,2]] code state transition 52b shows the state transition of the [[4,1,1,2]] code 52 when the eigenvalue measurement of the gauge Z operator is performed first (the error detection circuit 63 shown in FIG. 13 is executed).

[0137] If we first perform the eigenvalue measurement of the gauge Z operator, the state of [[4,1,1,2]] code 52 is "|m θ > L |i> G From the state after measuring the eigenvalues ​​of the gauge Z operator at this time, it is possible to determine whether the gauge degree of freedom has undergone bit inversion in the state immediately after executing the auxiliary state generation circuit 51 (if the gauge qubit is "|0> G ", |1> G " or ". In other words, information on whether a YY error occurred can be extracted without destroying the data.

[0138] Next, the flow for detecting errors including YY errors will be described. 16 is a diagram showing an example of error detection. The error detection circuit 63 is executed twice. In the first execution of the error detection circuit 63, a first measurement and a second measurement are performed. In the second execution of the error detection circuit 63, a third measurement and a fourth measurement are performed.

[0139] In the first measurement, the states of measurement qubits M1 and M2 are measured. The measurement result of the state of measurement qubit M1 at this time (measurement result #1) indicates the eigenvalue of the gauge degree of freedom. Similarly, the measurement result of the state of measurement qubit M2 (measurement result #2) indicates the eigenvalue of the gauge degree of freedom. Measurement result #1 and measurement result #2 are "+1" if there is no YY error. If measurement result #1 or measurement result #2 is "-1", a YY error is detected.

[0140] "Measurement result #1 x Measurement result #2" is the Z stabilizer eigenvalue "S Z,0 " indicates the Z stabilizer eigenvalue "S Z,0 " is "+1" if there is no error. Z stabilizer eigenvalue "S Z,0 If " is "-1", an error is detected.

[0141] In the second measurement, the states of the measurement qubits M0 and M3 are measured. The product of the measurement result of the state of the measurement qubit M0 (measurement result #3) and the measurement result of the state of the measurement qubit M3 (measurement result #4) is the X stabilizer eigenvalue "S X,0 " indicates the X stabilizer eigenvalue "S X,0 " is "+1" if there is no error. X stabilizer eigenvalue "S X,0 If " is "-1", an error is detected.

[0142] In the third measurement, the states of the measurement qubits M1 and M2 are measured. The product of the measurement result of the state of the measurement qubit M1 (measurement result #5) and the measurement result of the state of the measurement qubit M2 (measurement result #6) is the Z stabilizer eigenvalue "S Z,1 ". The product of the Z stabilizer eigenvalues ​​of the first and third measurements, "S Z,0 ×S Z,1 " is the Z stabilizer eigenvalue difference. Z stabilizer eigenvalue difference "S Z,0 ×S Z,1 " is "+1" if there is no error. Z stabilizer eigenvalue difference "S Z,0 ×SZ,1 If " is "-1", an error is detected.

[0143] In the fourth measurement, the states of the measurement qubits M0 and M3 are measured. The product of the measurement result of the state of the measurement qubit M0 (measurement result #7) and the measurement result of the state of the measurement qubit M3 (measurement result #8) is the X stabilizer eigenvalue "S X,1 ". The product of the X stabilizer eigenvalues ​​of the second and fourth measurements, "S X,0 ×S X,1 " is the X stabilizer eigenvalue difference. X stabilizer eigenvalue difference "S X,0 ×S X,1 " is "+1" if there is no error. X stabilizer eigenvalue difference "S X,0 ×S X,1 If " is "-1", an error is detected.

[0144] If an error is detected by executing the error detection circuit 63, the auxiliary state generation circuit 51 redoes the generation of the auxiliary state. If the error detection process passes without error, the [[4,1,1,2]] code 52 is expanded into a surface code of the code distance used in the gate teleportation circuit 50.

[0145] FIG. 17 is a diagram showing an example of extension to a surface code. The surface code 53 is obtained by extending the [[4,1,1,2]] code 52 to a code distance of "5" (d=5). The state prepared with the [[4,1,1,2]] code 52 is set in the upper left of the surface code 53. The other physical quantum bits are initialized to "|0>" or "|+>". In the surface code 53, the shaded circles are physical quantum bits initialized to "|+>", and the double circles are physical quantum bits initialized to "|0>".

[0146] The state represented by the [[4,1,1,2]] code 52 includes a logical qubit and a gauge qubit that represent an auxiliary state, but the gauge degree of freedom disappears when the [[4,1,1,2]] code 52 is extended to the surface code 53. As a result, the state of the surface code 53 is an auxiliary state "|m θ >L " represents the

[0147] The quantum computing system 30 measures the stabilizers of such a surface code 53. The location of the error can be estimated based on the information obtained by measuring the stabilizers. The X stabilizer 53a of the surface code 53 is the lattice surface in the shaded area, and the Z stabilizer 53b is the lattice surface in the open area.

[0148] The quantum computing system 30 detects errors based on the stabilizer measurement results, and if an error is detected, discards the generated auxiliary state and redoes the auxiliary state generation process, thereby enabling the generation of auxiliary states with as few errors as possible.

[0149] 18 is a block diagram showing an example of functions for quantum computation in a quantum computing system. Classical computer 100 has a quantum computation request acceptance unit 110 and a quantum circuit execution control unit 120. Quantum computer 200 has a quantum bit initialization unit 210 and a quantum bit measurement unit 220. Functions realized by the cooperative operation of classical computer 100 and quantum computer 200 include a Clifford computation execution unit 31 and an arbitrary rotation execution unit 32.

[0150] The quantum computing request receiving unit 110 receives a quantum computing request from the terminal 29. The quantum computing request includes, for example, a quantum circuit corresponding to the problem to be solved. The quantum computing request receiving unit 110 transmits an execution command for the quantum circuit corresponding to the problem to be solved, which is indicated in the quantum computing request, to the quantum circuit execution control unit 120. Furthermore, when the quantum computing request receiving unit 110 obtains the result of the quantum computing by the quantum circuit from the quantum circuit execution control unit 120, it transmits the calculation result to the terminal 29.

[0151] The quantum circuit execution control unit 120 transmits quantum gate execution commands to the quantum computer 200 in the order indicated in the quantum circuit acquired as the execution target. When the quantum circuit execution control unit 120 acquires measurement results indicating the states of quantum bits after gate operations according to the quantum circuit from the quantum computer 200, it calculates a solution to the problem to be solved based on the measurement results. The quantum circuit execution control unit 120 then transmits the solution to the problem to be solved to the quantum computation request receiving unit 110 as the result of the quantum computation.

[0152] The quantum bit initialization unit 210 initializes the logical quantum bits in accordance with instructions from the quantum circuit execution control unit 120. For example, the quantum bit initialization unit 210 initializes the physical quantum bits that make up the logical quantum bits in the quantum bit device 202 to a predetermined state.

[0153] The quantum bit measurement unit 220 measures the state of the logical quantum bit. For example, the quantum bit measurement unit 220 measures the state of the physical quantum bits that make up the logical quantum bit, and determines the state of the logical quantum bit based on the measurement result. The quantum bit measurement unit 220 transmits the measured state of the logical quantum bit to the classical computer 100.

[0154] The Clifford operation execution unit 31 executes a Clifford operation on a logical quantum bit in cooperation with the classical computer 100 and the quantum computer 200. For example, in the quantum computer 200, the gate operation of a quantum gate corresponding to the Clifford operation is executed on the physical quantum bits that constitute the logical quantum bit. The Clifford operation execution unit 31 then performs syndrome measurement of the operated physical quantum bit. The Clifford operation execution unit 31 detects an error based on the result of the syndrome measurement. If the Clifford operation execution unit 31 detects an error, it determines the location of the error and performs a gate operation on the physical quantum bit at the error location to correct the error.

[0155] Of the functions of the Clifford operation execution unit 31, error detection and error location determination are executed by the classical computer 100. Gate operation of quantum gates corresponding to the Clifford operation, syndrome measurement, and error correction are executed by the quantum computer 200.

[0156] The arbitrary rotation execution unit 32 executes an arbitrary rotation gate operation on the logical quantum bit in cooperation with the classical computer 100 and the quantum computer 200. 19 is a block diagram showing an example of the functions of the arbitrary rotation execution unit 32. The functions realized by the classical computer 100 in the arbitrary rotation execution unit 32 include a circuit generation unit 32a, an error determination unit 32b, and a gate teleportation success / failure determination unit 32c.

[0157] The circuit generation unit 32a generates an auxiliary state generation circuit and an error detection circuit for detecting errors in the auxiliary state in accordance with an arbitrary rotation command. The arbitrary rotation command is sent, for example, from the quantum circuit execution control unit 120. The arbitrary rotation command indicates a rotation angle θ. The circuit generation unit 32a generates an auxiliary state generation circuit rotated according to the specified rotation angle θ. The circuit generation unit 32a transmits circuit information indicating the generated auxiliary state generation circuit and error detection circuit to the auxiliary state generation circuit execution unit 32d.

[0158] Furthermore, when the circuit generation unit 32a receives an instruction from the gate teleportation success / failure determination unit 32c to double the rotation angle and rotate again, it generates an auxiliary state generation circuit with a doubled rotation angle. Then, the circuit generation unit 32a transmits circuit information indicating the newly generated auxiliary state generation circuit and an error detection circuit for detecting errors in the auxiliary state to the auxiliary state generation circuit execution unit 32d.

[0159] The error determination unit 32b acquires a measurement value obtained by executing the error detection circuit from the first error detection circuit execution unit 32e. The error determination unit 32b determines the presence or absence of various errors, including a YY error, based on the acquired measurement value. If the measurement value acquired from the first error detection circuit execution unit 32e contains an error, the error determination unit 32b transmits an auxiliary state regeneration signal to the auxiliary state generation circuit execution unit 32d. If the measurement value acquired from the first error detection circuit execution unit 32e does not contain an error, the error determination unit 32b transmits an expansion command to the surface code to the quantum state initialization unit 32f.

[0160] The error determination unit 32b also acquires a measurement value obtained by executing the error detection circuit from the second error detection circuit execution unit 32g. The error determination unit 32b determines whether or not there is an error in the enlarged surface code based on the acquired measurement value. If there is an error in the measurement value acquired from the second error detection circuit execution unit 32g, the error determination unit 32b sends an auxiliary state regeneration signal to the auxiliary state generation circuit execution unit 32d. If there is no error in the measurement value acquired from the second error detection circuit execution unit 32g, the error determination unit 32b sends a gate teleportation execution command to the gate teleportation unit 32h.

[0161] The gate teleportation success / failure determination unit 32c determines whether the arbitrary rotation of the logical quantum bit is successful. For example, if the phase of the logical quantum bit to be operated on is rotated in the forward direction as a result of the gate teleportation unit 32h executing the gate teleportation circuit 50, the gate teleportation success / failure determination unit 32c determines that the arbitrary rotation is successful. If the arbitrary rotation is successful, the gate teleportation success / failure determination unit 32c notifies the quantum circuit execution control unit 120 that the arbitrary rotation is successful. Furthermore, if the arbitrary rotation fails (reverse rotation), the gate teleportation success / failure determination unit 32c instructs the circuit generation unit 32a to double the rotation angle and rotate again.

[0162] The functions realized by the quantum computer 200 in the arbitrary rotation execution unit 32 include an auxiliary state generation circuit execution unit 32d, a first error detection circuit execution unit 32e, a quantum state initialization unit 32f, a second error detection circuit execution unit 32g, and a gate teleportation unit 32h.

[0163] The auxiliary state generation circuit execution unit 32d executes the auxiliary state generation circuit based on the circuit information acquired from the circuit generation unit 32a. For example, the auxiliary state generation circuit execution unit 32d sequentially executes gate operations according to the quantum gates indicated in the auxiliary state generation circuit on the logical quantum bit encoded by the [[4,1,1,2]] code 52.

[0164] The first error detection circuit execution unit 32e executes an error detection circuit on the logical quantum bit operated by the auxiliary state generation circuit execution unit 32d. For example, the first error detection circuit execution unit 32e executes the error detection circuit 63 shown in Fig. 13. The first error detection circuit execution unit 32e transmits the measurement value obtained by executing the error detection circuit to the error determination unit 32b.

[0165] When the quantum state initialization unit 32f receives the command to expand to the surface code, it initializes the physical quantum bits in the surface code region so that the [[4,1,1,2]] code 52 becomes a surface code of a predetermined code distance. For example, the quantum state initialization unit 32f initializes the state of the physical quantum bits included in the surface code 53 so that it becomes the surface code 53 shown in Fig. 17. As a result, the logical quantum bit indicating the auxiliary state is expanded from the [[4,1,1,2]] code 52 to the surface code.

[0166] The second error detection circuit execution unit 32g executes the error detection circuit to detect errors in the enlarged surface code, and transmits the measurement value obtained by executing the error detection circuit to the error determination unit 32b.

[0167] When the gate teleportation unit 32h receives a gate teleportation execution command, it inputs the generated auxiliary state and the quantum state of the logical quantum bit to be rotated and executes the gate teleportation circuit 50. The output state of the gate teleportation circuit 50 becomes the quantum state after rotation.

[0168] Next, a detailed description will be given of the processing procedure of the classical computer 100 for causing the quantum computer 200 to execute quantum computation using a phase rotation gate with fewer errors. 20 is a flowchart showing an example of the procedure of quantum computing processing in a classical computer. The processing shown in FIG. 20 will be explained below in order of step number.

[0169] [Step S101] When the quantum computing request receiving unit 110 receives a quantum computing request from the terminal 29, it decomposes the quantum gates (e.g., 3-qubit gates) in the quantum circuit to be computed and converts them into a quantum circuit that combines "Clifford+φ (arbitrary rotation)" quantum gates.

[0170] [Step S102] The quantum circuit execution control unit 120 performs initialization processing on the logical quantum bits. For example, the quantum circuit execution control unit 120 identifies the physical quantum bits to be used in executing the quantum circuit, and sends initialization instructions for those physical quantum bits to the quantum bit initialization unit 210 of the quantum computer 200. The quantum bit initialization unit 210 initializes the states of the physical quantum bits to predetermined states in accordance with the initialization instructions.

[0171] [Step S103] The quantum circuit execution control unit 120 performs quantum circuit execution processing upon receiving a response indicating the completion of initialization from the quantum bit initialization unit 210. The quantum circuit execution processing will be described in detail later (see FIG. 21).

[0172] [Step S104] When the quantum circuit execution control unit 120 completes the execution of the quantum circuit and acquires the measurement result of the final logical qubit state, it calculates a solution to the problem to be solved based on the measurement result. The quantum circuit execution control unit 120 then transmits the calculation result to the quantum computing request receiving unit 110. The quantum computing request receiving unit 110 transmits the calculation result to the terminal 29.

[0173] In this way, quantum computation using the quantum circuit is performed. Next, the quantum circuit execution process will be described in detail. 21 is a flowchart showing an example of the procedure of the quantum circuit execution process. The process shown in FIG. 21 will be explained below in order of step number.

[0174] [Step S201] The quantum circuit execution control unit 120 selects the next operation (gate operation or measurement) to be executed from the quantum circuit. [Step S202] The quantum circuit execution control unit 120 determines whether the selected operation is a gate operation of an arbitrary rotation quantum gate. If the selected operation is a gate operation of a Clifford gate or a measurement, the quantum circuit execution control unit 120 proceeds to step S203. If the selected operation is a quantum gate of arbitrary rotation, the quantum circuit execution control unit 120 proceeds to step S204.

[0175] [Step S203] The quantum circuit execution control unit 120 transmits an execution command for the next Clifford gate operation or measurement to be executed to the quantum computer 200. If the transmitted command is a Clifford gate operation execution command, the Clifford operation execution unit 31 in the quantum computer 200 executes the Clifford gate operation on the logical quantum bit. If the transmitted command is a measurement execution command, the quantum bit measurement unit 220 measures the state of the physical quantum bits that constitute the logical quantum bit. The quantum bit measurement unit 220 transmits the measurement result to the quantum circuit execution control unit 120. The quantum circuit execution control unit 120 then proceeds to step S209.

[0176] [Step S204] The quantum circuit execution control unit 120 obtains the rotation angle in the gate operation of the selected arbitrary rotation quantum gate. Then, the quantum circuit execution control unit 120 transmits an arbitrary rotation command specifying the rotation angle to the arbitrary rotation execution unit 32.

[0177] [Step S205] The arbitrary rotation execution unit 32 executes an auxiliary state generation process, the details of which will be described later (see FIG. 22). [Step S206] The arbitrary rotation execution unit 32 sends a gate teleportation execution command to the quantum computer 200. In response, the quantum state initialization unit 32f provided in the quantum computer 200 initializes the physical quantum bits around the [[4,1,1,2]] code 52 representing the auxiliary state and converts them into a surface code of a predetermined code distance. Then, the gate teleportation unit 32h receives as input the logical quantum bit representing the quantum state to be rotated and the logical quantum bit representing the auxiliary state, and executes gate operations in accordance with the gate teleportation circuit 50.

[0178] [Step S207] The gate teleportation success / failure determination unit 32c determines whether or not the arbitrary rotation using the gate teleportation circuit 50 was successful. If a forward rotation was performed, the gate teleportation success / failure determination unit 32c determines that the arbitrary rotation was successful, and proceeds to step S209. If a reverse rotation was performed, the gate teleportation success / failure determination unit 32c determines that the arbitrary rotation was successful, and proceeds to step S208.

[0179] [Step S208] The gate teleportation success / failure determination unit 32c instructs the circuit generation unit 32a to update the rotation angle to twice the current value. After that, the gate teleportation success / failure determination unit 32c advances the process to step S205.

[0180] [Step S209] The quantum circuit execution control unit 120 determines whether the final operation of the quantum circuit has been completed. If the final operation of the quantum circuit has been completed, the quantum circuit execution control unit 120 terminates the quantum circuit execution process. If there are unprocessed operations, the quantum circuit execution control unit 120 proceeds to step S201.

[0181] Next, the auxiliary state generation process will be described in detail. 22 is a flowchart showing an example of the procedure for the auxiliary state generation process. The process shown in FIG. 22 will be described below in order of step number.

[0182] [Step S301] The circuit generation unit 32a generates an auxiliary state generation circuit for generating an auxiliary state with a specified rotation angle. For example, before the gate teleportation circuit 50 is executed, the circuit generation unit 32a generates an auxiliary state generation circuit with a rotation angle specified by a quantum gate of arbitrary rotation. After the rotation operation by the gate teleportation circuit 50 fails, the circuit generation unit 32a generates an auxiliary state generation circuit with a rotation angle that is twice the previous rotation angle.

[0183] [Step S302] The circuit generation unit 32a sends an execution command for the auxiliary state generation circuit to the auxiliary state generation circuit execution unit 32d of the quantum computer 200. The auxiliary state generation command includes circuit information indicating the auxiliary state generation circuit to be executed. In response to the execution command, the auxiliary state generation circuit execution unit 32d executes the auxiliary state generation circuit.

[0184] [Step S303] The circuit generation unit 32a transmits an execution command for an error detection circuit that detects an error in the auxiliary state to the quantum computer 200. In the quantum computer 200, the first error detection circuit execution unit 32e executes the error detection circuit. Then, the first error detection circuit execution unit 32e transmits a measurement value obtained by executing the error detection circuit to the error determination unit 32b.

[0185] [Step S304] The error determining unit 32b executes an error determination process for the auxiliary state. The error determination process execution process will be described in detail later (see FIG. 23). [Step S305] The error determination unit 32b determines whether an error has been detected by the error determination process. If an error has been detected, the error determination unit 32b sends a regeneration signal to the auxiliary state generation circuit execution unit 32d and proceeds to step S302. If no error has been detected, the error determination unit 32b proceeds to step S306.

[0186] [Step S306] The error determination unit 32b sends an instruction to enlarge to the surface code to the quantum state initialization unit 32f. In response to the instruction to enlarge to the surface code, the quantum state initialization unit 32f enlarges the auxiliary state represented by the [[4,1,1,2] code to a surface code of a predetermined code distance. Then, the second error detection circuit execution unit 32g executes the error detection circuit for the surface code. Then, the second error detection circuit execution unit 32g sends the measurement value obtained by executing the error detection circuit to the error determination unit 32b.

[0187] [Step S307] The error determining unit 32b performs an error detection process for the obverse side code. [Step S308] If there is an error in the obverse side code, the error determination unit 32b sends a regeneration signal to the auxiliary state generation circuit execution unit 32d and proceeds to step S302. If there is no error, the error determination unit 32b ends the auxiliary state generation process.

[0188] Next, the processing procedure for error determination process for auxiliary states will be described in detail. 23 is a flowchart showing an example of the processing procedure of the error determination process. The processing shown in FIG. 23 will be explained below in order of step number.

[0189] [Step S401] The error determining unit 32b acquires a measurement value obtained by executing the error detection circuit for detecting an error in the auxiliary state. [Step S402] The error determination unit 32b determines whether the eigenvalue of the gauge degree of freedom is "-1." The eigenvalue of the gauge degree of freedom is the measurement result (measurement result #1, measurement result #2) of the measurement quantum bit M1 and the measurement quantum bit M2 in the first measurement (see FIG. 16). If a YY error occurs, the eigenvalue of the gauge degree of freedom becomes "-1." If the eigenvalue of the gauge degree of freedom is "-1," the error determination unit 32b proceeds to step S408. If the eigenvalue of the gauge degree of freedom is "+1," the error determination unit 32b proceeds to step S403.

[0190] [Step S403] The error determination unit 32b calculates the Z stabilizer eigenvalue "S Z,0 " and the X stabilizer eigenvalue "S X,0 ” and calculate the Z stabilizer eigenvalue “S Z,0 " is obtained by "Measurement result #1 x Measurement result #2". X stabilizer eigenvalue "S X,0 " is obtained by "measurement result #3 x measurement result #4" using the measurement results (measurement result #3, measurement result #4) of measurement quantum bit M0 and measurement quantum bit M3 in the second measurement (see FIG. 16).

[0191] [Step S404] The error determination unit 32b calculates the stabilizer eigenvalue "S Z,0 " and the X stabilizer eigenvalue "S X,0 If either of the values ​​is "-1", the error determination unit 32b advances the process to step S408. Z,0 " and the X stabilizer eigenvalue "S X,0 If both "+1" and "+1", the process proceeds to step S405.

[0192] [Step S405] The error determination unit 32b calculates the Z stabilizer eigenvalue difference “S Z,0 ×S Z,1 ” and the X stabilizer eigenvalue difference “S X,0 ×S X,1 ” and calculate the Z stabilizer eigenvalue “S Z,1" is obtained by "measurement result #5 × measurement result #6" using the measurement results (measurement result #5, measurement result #6) of measurement qubit M1 and measurement qubit M2 in the third measurement (see Figure 16). The X stabilizer eigenvalue "S X,1 " is obtained by "measurement result #7 x measurement result #8" using the measurement results (measurement result #7, measurement result #8) of measurement quantum bit M0 and measurement quantum bit M3 in the fourth measurement (see Figure 16).

[0193] [Step S406] The error determination unit 32b calculates the Z stabilizer eigenvalue difference “S Z,0 ×S Z,1 ” and the X stabilizer eigenvalue difference “S X,0 ×S X,1 If either value is "-1", the error determination unit 32b advances the process to step S408. Z,0 ×S Z,1 " and "S X,0 ×S X,1 If both " and " are "+1", the process proceeds to step S407.

[0194] [Step S407] The error determining unit 32b outputs "no error" as the error determination result, and then ends the error determination process. [Step S408] The error determining unit 32b outputs the error determination result indicating that an error has occurred, and then ends the error determination process.

[0195] In this way, errors including YY errors that occur during the generation of the auxiliary states are detected. The ability to detect YY errors reduces the probability of logical errors in the auxiliary states. FIG. 24 is a diagram showing an example of the logical error rate when error detection including YY errors is performed. FIG. 24 shows the evaluation results of the logical error rate when modeled using a circuit-level noise model. The circuit-level noise model is a model that assumes that errors occur in all operations (initialization, gate operation, measurement), and is a model that is close to actual quantum computing. Graph 71 shows the change in logical error probability according to the physical error probability when it is assumed that errors occur with a physical error probability p in all initialization, gate operation, and measurement.

[0196] The horizontal axis of graph 71 is the physical error probability p, and the vertical axis is the logical error probability. Line 71a represents the logical Z error rate when YY errors are not detected. Line 71b represents the logical X error rate when YY errors are not detected. Line 71c represents the logical Z error rate when YY errors are detected. Line 71d represents the logical X error rate when YY errors are detected. Line 71e represents the theoretical logical error rate "2p / 15" when YY errors are not detected. Line 71f represents the theoretical logical error rate "p / 15" when YY errors are detected.

[0197] YY errors that occur when generating auxiliary states cause Z errors in logical qubits. Therefore, making YY errors detectable reduces the logical error probability. For example, line 71a, which represents the logical Z error rate when YY errors are not detected, asymptotically approaches the "2p / 15" line. In contrast, line 71c, which represents the logical Z error rate when YY errors are detected, asymptotically approaches the "p / 15" line.

[0198] As shown in Figure 24, the logic error rate of the auxiliary state can be reduced by detecting the YY error that occurs in the process of generating the auxiliary state to realize the phase rotation gate. As a result, it becomes possible to perform gate operation of the phase rotation gate using ideal auxiliary states, and errors that occur in the phase rotation gate can be reduced.

[0199] Next, we explain the evaluation results of the probability of generating a failed auxiliary state by detecting YY errors when modeled using a circuit-level noise model. 25 is a diagram showing an example of the generation failure probability of an auxiliary state. In graph 72, the horizontal axis represents the physical error probability p, and the vertical axis represents the generation failure probability of an auxiliary state. Line 72a represents the generation failure probability of an auxiliary state when an YY error is not detected. Line 72b represents the generation failure probability of an auxiliary state when an YY error is detected.

[0200] As shown in graph 72, when error detection including YY errors is performed (polygonal line 72b), the probability of failure to generate an auxiliary state is slightly higher than when YY errors are not detected (polygonal line 72a). A higher probability of failure to generate an auxiliary state means that the error detection rate is improved.

[0201] Furthermore, even if YY errors are made detectable, the change in the overall error detection rate is minimal, so the frequency of regenerating auxiliary states due to failures in generating auxiliary states does not increase significantly.

[0202] Although the embodiments have been described above, the configuration of each part shown in the embodiments can be replaced with other parts having similar functions. Also, any other components or processes may be added. Furthermore, any two or more configurations (features) of the above-described embodiments may be combined. [Explanation of symbols]

[0203] 1. Quantum computers 2 qubit device 2a sign 2b~2e Physical qubits 3-phase rotating gate 4 Gate Teleportation Circuit 5 Auxiliary State Generator 5a Two-qubit rotation gate 5b Logical qubit 5c gauge qubit 6 Error detection circuit 6a First Circuit 6b Second Circuit 10. Information processing equipment 11 Storage section 12 Processing section

Claims

1. causing a quantum computer to perform a first gate operation in accordance with an auxiliary state generation circuit that indicates a procedure for generating a code including a logic qubit indicating an auxiliary state to be input to a gate teleportation circuit for realizing a phase rotation gate and a gauge qubit indicating a redundant degree of freedom other than the auxiliary state; causing the quantum computer to perform a second gate operation in accordance with an error detection circuit that indicates a procedure for detecting an error that has occurred in a plurality of physical quantum bits that constitute the code generated by the first gate operation; determining whether or not an error exists based on a measurement value indicating the state of the gauge qubit obtained by the second gate operation; A quantum computing support program that causes a computer to perform processing.

2. In the process of causing the quantum computer to perform the second gate operation, the quantum computer is caused to perform the second gate operation in accordance with the error detection circuit, in which a first circuit for measuring eigenvalues ​​of Z stabilizers of the plurality of physical qubits is followed by a second circuit for measuring eigenvalues ​​of X stabilizers; the process of determining whether or not there is an error determines whether or not there is an error based on a measurement value obtained by executing the first circuit; The quantum computing support program according to claim 1.

3. In the process of causing the quantum computer to perform the first gate operation, the quantum computer is caused to perform the first gate operation in accordance with the auxiliary state generation circuit, the auxiliary state generation circuit including a two-qubit rotation gate that phase-rotates a first physical quantum bit and a second physical quantum bit; In the process of causing the quantum computer to perform the second gate operation, the quantum computer is caused to perform the second gate operation in accordance with the error detection circuit in which the first circuit and the second circuit are arranged, the first circuit including a first CNOT gate having the first physical quantum bit as a control quantum bit and a measurement quantum bit as a target quantum bit, and a second CNOT gate having the second physical quantum bit as a control quantum bit and the measurement quantum bit as a target quantum bit, In the process of determining whether or not there is an error, the presence or absence of the error is determined based on a measurement value in the Z basis of the measurement quantum bit. The quantum computing support program according to claim 2.

4. the process of determining whether or not there is an error comprises determining whether or not there is an error based on a measurement value indicating an eigenvalue of the degree of freedom indicated by the gauge qubit. The quantum computing support program according to claim 1.

5. In the process of causing the quantum computer to perform the first gate operation, the quantum computer is caused to perform the first gate operation in accordance with the auxiliary state generation circuit, the auxiliary state generation circuit including a two-qubit rotation gate that phase-rotates a first physical quantum bit and a second physical quantum bit; In the process of determining whether or not an error exists, if a measurement value indicating a state after a change in the gauge qubit due to a YY error occurring in the third gate operation by the two-qubit rotation gate is obtained, it is determined that an error exists. The quantum computing support program according to claim 1.

6. In the process of causing the quantum computer to execute the first gate operation, the quantum computer is caused to execute the first gate operation that indicates a procedure for generating a [[4, 1, 1, 2]] code in which the number of physical quantum bits used is four, the logical quantum bit indicating the auxiliary state is one bit, the gauge quantum bit is one bit, and the code distance is two. The quantum computing support program according to claim 1.

7. causing a quantum computer to perform a first gate operation in accordance with an auxiliary state generation circuit that indicates a procedure for generating a code including a logic qubit indicating an auxiliary state to be input to a gate teleportation circuit for realizing a phase rotation gate and a gauge qubit indicating a redundant degree of freedom other than the auxiliary state; causing the quantum computer to perform a second gate operation in accordance with an error detection circuit that indicates a procedure for detecting an error that has occurred in a plurality of physical quantum bits that constitute the code generated by the first gate operation; determining whether or not an error exists based on a measurement value indicating the state of the gauge qubit obtained by the second gate operation; A quantum computing-assisted method in which processing is performed by a computer.

8. a processing unit that causes a quantum computer to perform a first gating operation in accordance with an auxiliary state generation circuit that indicates a procedure for generating a code including a logical quantum bit that indicates an auxiliary state to be input to a gate teleportation circuit for realizing a phase rotation gate and a gauge quantum bit that indicates a redundant degree of freedom other than the auxiliary state, causes the quantum computer to perform a second gating operation in accordance with an error detection circuit that indicates a procedure for detecting an error that has occurred in a plurality of physical quantum bits that constitute the code generated by the first gating operation, and determines whether or not an error is present based on a measurement value that indicates the state of the gauge quantum bit obtained by the second gating operation; An information processing device having the above.

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