Interface apparatus and automatic test equipment
The interface device improves positional accuracy and reduces signal loss by aligning the contact surface of the interposer with a reference surface, addressing the precision issues in the electrical connection between the socket board and front-end module in ATE, enabling high-speed semiconductor testing.
Patent Information
- Application Number
- JP2024112815
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-12
- Publication Date
- 2026-01-23
AI Technical Summary
The existing electrical connection between the socket board and the front-end module in automatic test equipment (ATE) lacks precision due to cumulative assembly tolerances, making it difficult to achieve high accuracy in signal transmission and power supply for high-speed semiconductor devices.
An interface device is introduced with a socket board, a front-end module, an interposer, and a frame, where the interposer forms a contact surface on a flexible substrate, allowing the contact surface to be aligned with a reference surface by fixing the frame to the front-end module, and the socket board is assembled to the frame, thereby improving positional accuracy.
This configuration enhances the precision of signal transmission and power supply, enabling accurate testing of high-speed semiconductor devices by minimizing cumulative tolerances and reducing signal loss, thus supporting testing speeds exceeding 20 Gbps.
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Figure 2026011869000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to an interface device. [Background technology]
[0002] Automatic test equipment (ATE) is used to test various semiconductor devices such as memories, CPUs (Central Processing Units), etc. The ATE supplies test signals to the semiconductor device under test (hereafter referred to as the device under test (DUT)), measures the response of the DUT to the test signals, and determines whether the DUT is good or bad, or identifies any defects.
[0003] In recent years, the speed of DRAM (Dynamic Random Access Memory) has been increasing. The GDDR (Graphics Double Data Rate) memory installed in graphics cards has achieved a transmission speed of 21 Gbps using the NRZ (Non Return to Zero) method in the GDDR6X standard.
[0004] The next generation GDDR7 will use PAM4 (Pulse Amplitude Modulation 4), which will increase transmission speeds to 40Gbps. The NRZ method is also becoming faster every year, and in the next generation it will be increased to around 28Gbps.
[0005] Patent Document 1 discloses an interface device and an automatic test device that can test high-speed devices with high precision. In this interface device, the socket board and the pin electronics circuit are connected via an interposer and wiring. [Prior art documents] [Patent documents]
[0006] [Patent Document 1] Japanese Patent Application Publication No. 2024-014522 Summary of the Invention [Problem to be solved by the invention]
[0007] The present inventors have studied the electrical connection between the socket board and the front-end module and have come to recognize the following problems.
[0008] 18(a) and 18(b) are diagrams for explaining the connection between the socket board and the front-end module, which has been studied by the present inventors.
[0009] 18(a) shows the connection between a front-end module 600 and a board 640 mounted on a motherboard or tester body. An electrical connection means 610 for connecting to a socket board 650 is provided on the upper side of the front-end module 600, and the connection means 610 has a contact surface 612.
[0010] The socket board 600 and the substrate 640 have a connector 620, and are electrically connected via this connector 620 to transmit and receive signals and to supply power.
[0011] The socket board 600 is provided with a stopper 630, and the substrate 640 is provided with a fixing member 632 that fits with the stopper 630.
[0012] 18(b) shows a state in which the front-end module 600 and the substrate 640 are electrically and mechanically connected. Now, the surface of the substrate 640 is set at a reference height h=0. At this time, the height h of the contact surface 612 is c is determined by the sizes and assembly positions of the fixing member 632, the stopper 430, the front end module 600, and the connecting means 610. Therefore, the height h c is determined by the dimensional tolerances of the mechanical parts and the cumulative assembly tolerances (cumulative tolerance), and because there are many tolerance items, it is difficult to achieve high precision in the height direction.
[0013] The present disclosure has been made in light of this situation, and one exemplary purpose of an embodiment thereof is to provide an interface device with improved positional accuracy between a front-end module and a socket board. [Means for solving the problem]
[0014] An aspect of the present disclosure is an interface apparatus provided between a test head and a device under test (DUT), the interface apparatus comprising: a socket board, a front-end module including a pin electronics circuit and flexible substrate wiring, an interposer mounted on the flexible substrate and forming a contact surface with the socket board, and a frame assembled to the front-end module. The frame has a reference surface and is assembled to the front-end module with the reference surface abutting the contact surface, and the socket board is assembled to the frame.
[0015] Any combination of the above elements, or mutual substitution of elements or expressions between methods, devices, systems, etc., are also valid aspects of the present invention or the present disclosure. Furthermore, the description in this section (Means for Solving the Problems) does not explain all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. [Brief explanation of the drawings]
[0016] [Figure 1] FIG. 1 is a diagram illustrating an ATE according to an embodiment. [Figure 2] 1 is a cross-sectional view of an interface device according to one embodiment. [Figure 3] FIG. 2 illustrates a front-end module according to one embodiment. [Figure 4] FIG. 4 is a perspective view showing an example of the configuration of the FEU in FIG. 3. [Figure 5] 4 is a cross-sectional view showing an example of the configuration of the FEU in FIG. 3. [Figure 6]FIG. 1 is a cross-sectional view showing an example of connection between a pin electronics IC and a socket (DUT). [Figure 7] FIG. 2 is a cross-sectional view of a socket board according to the embodiment. [Figure 8] FIG. 10 is a diagram showing the layout of a plurality of second pads on the second surface of the socket PCB. [Figure 9] 10A and 10B are diagrams showing modified layouts of a plurality of second pads on the second surface of the socket PCB. [Figure 10] FIG. 2 is a perspective view showing the layout of a socket board according to the embodiment; [Figure 11] FIG. 2 is a plan view showing the layout of a socket board according to the embodiment. [Figure 12] FIG. 10 is a plan view showing the layout of a socket board according to a comparative technique. [Figure 13] FIG. 10 is a plan view showing the layout of a socket board according to a modified example. [Figure 14] FIG. 2 illustrates a socket board according to an embodiment. [Figure 15] 1 is an exploded perspective view of an interface device according to an embodiment. [Figure 16] FIG. 2 is an exploded perspective view of the interface device. [Figure 17] FIG. 2 is a cross-sectional view of the interface device in an assembled state. [Figure 18] 18(a) and 18(b) are diagrams for explaining the connection between the socket board and the front-end module, which has been studied by the present inventors. [Figure 19] 1 is an exploded cross-sectional view of an interface device according to an embodiment of the present invention. FIG. [Figure 20] FIG. 20 is a cross-sectional view of the interface device of FIG. DETAILED DESCRIPTION OF THE INVENTION
[0017] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.
[0018] An interface apparatus according to one embodiment is provided between a test head and a device under test (DUT). The interface apparatus includes a socket board, a front-end module including a pin electronics circuit and flexible substrate wiring, an interposer mounted on the flexible substrate and forming a contact surface with the socket board, and a frame assembled to the front-end module. The frame has a reference surface and is assembled to the front-end module with the reference surface abutting the contact surface, and the socket board is assembled to the frame.
[0019] In this configuration, the interposer that forms the contact surface is placed on a flexible substrate that is soft and elastic, and the height of the contact surface is determined by the degree of deformation of the flexible substrate. By fixing the frame to the front end module while pressing the flexible substrate, the contact surface can be aligned with the reference surface of the frame.
[0020] An automatic test equipment according to an embodiment may include any of the interface devices described above.
[0021] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.
[0022] In addition, the dimensions (thickness, length, width, etc.) of each component shown in the drawings may be enlarged or reduced as appropriate for ease of understanding. Furthermore, the dimensions of multiple components do not necessarily represent their relative sizes, and even if a component A is depicted as being thicker than another component B in the drawings, it is possible that component A is thinner than component B.
[0023] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.
[0024] Similarly, "a state in which component C is connected (provided) between component A and component B" includes not only a case in which component A and component C, or component B and component C, are directly connected, but also a case in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.
[0025] 1 is a diagram showing an ATE 100 according to an embodiment. The ATE 100 includes a tester 120, a test head 130, a handler 150, and an interface device 200.
[0026] The tester 120 performs overall control of the ATE 100. Specifically, the tester 120 executes a test program, controls the test head 130 and the handler 150, and collects measurement results.
[0027] The handler 150 supplies (loads) the DUT1 to the interface device 200, and unloads the tested DUT1 from the interface device 200. The handler 150 also separates the DUT1 into good and bad products.
[0028] The test head 130 includes hardware for generating test signals to be supplied to the DUT 1 and detecting signals (called device signals) from the DUT. It may also include a power supply circuit for generating a power supply voltage to be supplied to the DUT 1 and the interface device 200.
[0029] The interface device 200 includes a socket board 210 , wiring 220 and a front-end module 300 .
[0030] In this embodiment, the pin electronics IC (PE-IC) 400 is provided in the interface device 200, not in the test head 130. The pin electronics IC 400 is an application specific integrated circuit (ASIC) that integrates a driver that generates a test signal and a comparator that receives a device signal. The test signal and the device signal are NRZ signals or PAM4 signals.
[0031] More specifically, the pin electronics IC 400 is modularized, and this module is called a front-end module 300.
[0032] The socket board 210 is provided with a plurality of sockets 212. The DUT 1 is attached to the socket 212. The front-end module 300 and the socket 212 are connected via wiring 220.
[0033] The above is the configuration of ATE100.
[0034] According to this ATE 100, by incorporating a front-end module 300, which is a modularized pin electronics IC 400, into the interface device 200, it is possible to place the pin electronics IC 400 in close proximity to the DUT 1. This makes it possible to significantly shorten the transmission distance of test signals and device signals compared to conventional methods.
[0035] For example, in conventional ATE, the pin electronics IC and the socket board are connected by a coaxial cable approximately 500 mm to 600 mm in length, but in this embodiment, the length of the wiring 220 can be shortened to approximately 100 mm to 150 mm. This significantly reduces the loss of high-frequency components, making it possible to transmit high-speed test signals and device signals. The ATE 100 equipped with this interface device 200 is capable of testing high-speed memories exceeding 20 Gbps.
[0036] Fig. 2 is a cross-sectional view of an interface device 200A according to one embodiment. Fig. 2 shows only the configuration related to one DUT. In this embodiment, the interface device 200A includes a motherboard 230 and a socket board 210 that is detachable from the motherboard 230. The socket board 210 includes a socket (also called a socket guide) 212, which is a mechanical component, a socket printed circuit board (socket PCB) 214, and a socket board-side connector 216. The socket PCB itself is sometimes referred to as a socket board, and the entire socket PCB on which the socket guide is mounted is sometimes referred to as a DSA (Device Specific Adapter) or a device board.
[0037] The front-end module 300A includes a plurality of printed circuit boards (pin electronics PCBs) 310 on which pin electronics ICs 400 are mounted. The pin electronics PCBs 310 are arranged in a direction perpendicular to the surfaces (front and back surfaces) of the DUT, in other words, the surface S1 of the socket board 210. In this embodiment, the socket board 210 is horizontal to the ground, and therefore the pin electronics PCBs 310 are arranged parallel to the direction of gravity.
[0038] The front-end module 300A further includes a plate-shaped cooling device (hereinafter referred to as a cold plate) 320. The cold plate 320 has a flow path through which a coolant flows.
[0039] The pin electronics PCBs 310 a , 310 b and the cold plate 320 are stacked such that the pin electronics IC 400 is thermally coupled to the cold plate 320 .
[0040] The motherboard 230 includes a socket board-side connector 232, a spacing frame 234, and a relay connector 236. The front-end module 300A is fixed to the spacing frame 234. The relay connector 236 is electrically and mechanically coupled to the test head-side connector 132.
[0041] As will be described in detail later, the wiring 220 can be a cable (also called an FPC cable) made up of a flexible printed circuit (FPC) instead of a conventional coaxial cable.
[0042] On the other hand, only control signals for the pin electronics IC 400 are transmitted through the wiring 224 between the pin electronics PCB 310 and the relay connector 236, and test signals and device signals are not transmitted through the wiring 224. Therefore, a coaxial cable may be used for the wiring 224.
[0043] FIG. 3 illustrates a front-end module 300B according to one embodiment.
[0044] One DUT 1 is assigned 2×M (M≧1) pin electronics ICs 400. Multiple DUTs and pin electronics ICs 400 are assigned subscripts A to D to distinguish them as needed. In this example, if DUT 1 has 192 I / Os and the pin electronics IC 400 has 24 I / Os, 192 / 24=8 (i.e., M=4) pin electronics ICs 400 are assigned per DUT.
[0045] The front-end module 300B is configured by dividing it into multiple N (N≧2) DUTs 1, and each division unit is called a front-end unit (FEU). In this example, blocks corresponding to four DUTs make up one FEU, and one FEU has 2×M×N=2×4×4=32 pin electronics ICs 400.
[0046] 3 shows two FEUs, the front-end module 300B can actually have more than two FEUs. For example, an ATE capable of 64 simultaneous measurements would have 64 / 4=16 FEUs, and the front-end module 300B as a whole would have 64×192 I / O=12288 I / O.
[0047] Fig. 4 is a perspective view showing an example of the configuration of the FEU in Fig. 3. Sockets 212A-212D corresponding to four DUTs are arranged in a matrix of two rows and two columns. Focusing on one DUT 1A, the eight pin electronics ICs 400A assigned to it are mounted in pairs on four pin electronics PCBs 310a-310d aligned in the X direction. The socket PCB 214 on which the sockets 212 are mounted may be divided for each DUT, or the socket PCBs 214 corresponding to the four DUTs may be integrally configured as a single board.
[0048] Two pin electronics ICs 400A mounted on one pin electronics PCB 310 are arranged side by side in the Y direction. The two pin electronics ICs 400A are arranged at equal distances from the DUT 1A.
[0049] 5 is a cross-sectional view showing an example of the configuration of the FEU of FIG. 3. As shown in FIG. 2, a cold plate 320 is provided between two pin electronics PCBs 310a and 310b. Similarly, a cold plate 320 is provided between two pin electronics PCBs 310c and 310d. As described above, the pin electronics IC 400 is mounted on the pin electronics PCB 310 at a location close to the socket board 210. To improve cooling efficiency, the pin electronics IC 400 can be a bare chip, and the pin electronics IC 400 and the cold plate 320 are thermally coupled via a thermal interface material (TIM) 322.
[0050] When the FEU is viewed in plan along the Y axis, the center of the DUT, that is, the socket 212A, is located at the center of the four (M) pin electronics PCBs 310a to 310d stacked in the X direction.
[0051] This is the composition of the FEU.
[0052] The advantages of this FEU will be explained below. Focus on the DUT1A, which is given the subscript A. By mounting multiple (eight in this example) pin electronics ICs 400A corresponding to one DUT1A, two on each of the four pin electronics PCBs 310a to 310d, it is possible to equalize the distance from each of the eight pin electronics ICs 400A to the socket 212A. This makes it possible to equalize the loss in the transmission line from each pin electronics IC 400A to the socket 212A (DUT1A), enabling accurate testing.
[0053] Next, the electrical connection between the pin electronics IC 400 and the socket 212 will be described.
[0054] 6 is a cross-sectional view showing an example of the connection between a pin electronics IC and a socket (DUT1). An FPC cable 222 is used as the transmission path for transmitting the test signal and device signal, i.e., the wiring 220 between the pin electronics PCB 310 and the socket board 210.
[0055] If a coaxial cable is used as the wiring 220 between the pin electronics PCB 310 and the socket board 210, the rigidity of the coaxial cable restricts the shortest distance between the pin electronics PCB 310 and the socket board 210. In contrast, by using an FPC cable 222, the flexibility of the FPC cable allows the distance h between the pin electronics PCB 310 and the socket board 210 to be shorter than when a coaxial cable is used, thereby shortening the transmission distance of test signals and device signals.
[0056] In conventional test equipment, when a detachable socket board 210 is required, an LIF (Low Insertion Force) connector has generally been used. This LIF connector has a non-negligible loss of about -3 dB in frequency bands higher than 14 GHz, which causes waveform distortion in high-speed transmissions of 28 Gbps or 40 Gbps. By using an FPC cable 222 for the wiring 220, the LIF connector is no longer necessary, and waveform distortion caused by loss (attenuation in the high-frequency band) can be suppressed, enabling accurate testing.
[0057] More specifically, the socket board 210 includes a socket 212 and a socket PCB 214. The socket PCB 214 is a multilayer board including a wiring layer and an insulating layer. Wiring that moves the signal path horizontally is formed in the wiring layer, and via holes VH that move the signal path vertically are formed in the insulating layer. It is preferable that the paths through which the test signals and device signals are transmitted be drawn to the back surface of the socket board 210 without moving horizontally (in the X and Y directions) as much as possible. Conversely, power supply signals and low-frequency control signals may be routed horizontally inside the socket PCB 214.
[0058] The FPC cable 222 and the socket board 210 are connected by a socket board connector 216. The socket board connector 216 includes an interposer 218 and a cable clamp 219.
[0059] The interposer 218 and the socket PCB 214 are detachable. The electrodes exposed on the surface of the interposer 218 are electrically connected to the electrodes exposed on the back surface of the socket PCB 214. The FPC cable 222 is clamped by the cable clamp 219 while in contact with the back surface electrodes of the interposer 218.
[0060] 7 is a cross-sectional view of a socket board 210 according to an embodiment. The socket board 210 has a socket 212 provided on a first surface of a socket PCB 214, which is connected to a DUT. A second surface of the socket board 210 is detachably connected to an interposer 218.
[0061] Furthermore, surface mount devices (SMDs) 213 are mounted on the second surface of the socket board 210. Examples of the SMDs 213 include chip capacitors, chip resistors, and chip inductors. A plurality of first pads (lands) P1 for mounting the SMDs 213 are formed on the second surface of the socket PCB 214.
[0062] Additionally, a plurality of second pads P2 are formed on the second surface of the socket PCB 214, which serve as electrical contacts with the interposer 218. The second pads P2 are electrically connected to corresponding contacts (pins) P3 of the interposer 218.
[0063] The first pad P1 has a thickness t1, and the second pad P2 has a thickness t2, and the thicknesses t1 and t2 of the two types of pads P1 and P2 are different (t1≠t2). Specifically, the relationship t2>t1 holds.
[0064] Preferably, the thickness t2 of the second pad P2 is at least twice the thickness t1 of the first pad P1. More preferably, the thickness t2 of the second pad P2 is at least five times the thickness t1 of the first pad P1. Even more preferably, the thickness t2 of the second pad P2 is at least eight times the thickness t1 of the first pad P1.
[0065] For example, the thickness t1 of the first pad P1 is 0.03 microns with a dimensional tolerance of ±30%. In contrast, the thickness t2 of the second pad P2 is 0.5 microns with a dimensional tolerance of ±30%. In this case, the thickness t2 of the second pad P2 is 16 times the thickness t1 of the first pad P1.
[0066] With this socket board 210, the first pad P1 for component mounting and the second pad P2 that serves as electrical contact with the interposer 218 have different thicknesses, which increases the peel strength of the SMD 213 and increases the wear resistance of the electrical contact with the interposer 218, thereby improving long-term reliability.
[0067] 8 is a diagram showing the layout of a plurality of second pads P2 on the second surface of the socket PCB 214. A plurality of positioning pins (P3 in FIG. 78) arranged in a matrix are provided on the surface of the interposer 218, and a plurality of second pads P2 are arranged in a matrix on the second surface of the socket PCB 214 corresponding to the plurality of positioning pins P3.
[0068] The second pads P2 are assigned signal pins SIG and ground pins GND alternately in the row direction (vertical direction on the paper) and column direction (horizontal direction on the paper). From another perspective, each signal pin SIG is assigned so that a ground pin GND is adjacent to it in the row and column directions, and the signal pins SIG are adjacent to each other in the diagonal directions. From yet another perspective, the minimum unit PU can be understood as two rows and two columns of second pins SIG, which are arranged in rows and columns. The minimum unit PU includes two signal pins SIG arranged diagonally and two ground pins GND arranged diagonally.
[0069] The above is the layout of the second pads P2 on the socket PCB 214. This layout allows for a higher density of signal pins and a smaller area for the socket printed circuit board compared to a layout in which the signal pins are surrounded by ground pins in all row, column, and diagonal directions.
[0070] 9 is a diagram showing a modified layout of the plurality of second pads P2 on the second surface of the socket PCB 214. In this modified example, the ground pins GND among the plurality of second pads P2 are formed contiguously.
[0071] According to this modification, the impedance of the ground pin GND can be reduced.
[0072] Next, the layout of the DUT and signals on the socket board will be explained.
[0073] Fig. 10 is a perspective view showing the layout of the socket board 210 according to the embodiment, and Fig. 11 is a plan view showing the layout of the socket board 210 according to the embodiment.
[0074] The socket board 210 includes a socket PCB 214 and N socket guides (simply referred to as sockets) 212_1 to 212_N, where N=2 in this example.
[0075] N sockets 212_1 to 212_N are provided on a first surface (top surface in the drawing) of a socket PCB 214.
[0076] A plurality of pads P2 are formed on the second surface (the lower surface in the drawing) of the socket PCB 214, separated into a first region RGN1 and a second region RGN2. The plurality of pads P2 serve as electrical contacts with the interposer 218.
[0077] The first region RNG1 and the second region RGN2 are rectangular with the same shape and dimensions and with the long side in the first direction (y), and are spaced apart from each other in the second direction (x).
[0078] Each of the N sockets 212_1 to 212_N is arranged adjacent to the third region RNG3 in the y direction, the third region RNG3 being sandwiched between the first region RGN1 and the second region RNG2 in the x direction.
[0079] Each of the sockets 212_1 to 212_N is electrically connected to some of the pads P2 included in the first region RGN1 and some of the pads P2 included in the second region RNG2. Each pin of the socket 212 is connected to its corresponding pad P2 through wiring provided in the socket PCB 214 and a via hole.
[0080] One socket 212_1 is arranged between y0 and y1 in the y direction, and the other socket 212_2 is arranged between y1 and y2 in the y direction. y0 is the coordinate of one end of the rectangular regions RGN1 and RGN2, y2 is the coordinate of the other end of the regions RGN1 and RGN2, and y1 is the coordinate of the center.
[0081] In the layout of FIG. 11, Pa represents the pad that is farthest from the pads connected to the socket 212_1, and Pb represents the pad that is closest to the pads connected to the socket 212_1.
[0082] The above is the layout of the socket board 210. The advantages of this socket board 210 become clear when compared with comparative techniques.
[0083] FIG. 12 is a plan view showing the layout of a socket board 210R according to the comparative technique.
[0084] In this comparative technique, one socket 212_1 is connected to a pad P2 included in a first region RNG1, and the other socket 212_2 is connected to a pad P2 included in a second region RNG2.
[0085] In the layout of FIG. 12, Pc represents the pad that is farthest from the pads that are connected to the socket 212_1, and Pd represents the pad that is closest to the pads that are connected to the socket 212_1.
[0086] Comparing Figure 11 (embodiment) with Figure 12 (comparison technology), it can be seen that Figure 11 (embodiment) allows for a shorter wiring length connecting the socket and the farthest pad. This reduces parasitic impedance, allowing for a wider bandwidth and faster signal testing.
[0087] 11 (embodiment) and 12 (comparative technology), the difference between the distance Pa to the farthest pad and the distance Pb to the closest pad in Fig. 11 (embodiment) is smaller than the difference between the distance Pc to the farthest pad and the distance Pd to the closest pad in Fig. 12 (comparative technology). In other words, according to the embodiment, the wiring lengths to the multiple positioning pins P2 can be made more uniform than in the comparative technology.
[0088] 13 is a plan view showing the layout of a socket board 210 according to a modified example. In this modified example, the number N of sockets 212 is 4. In this layout, the two central sockets 212_2 and 212_3 are contained within the range y0 to y2 of rectangular regions RGN1 and RGN2 in the y direction. Therefore, the same advantages as those of the layout in FIG. 10 can be enjoyed.
[0089] Next, management of the socket board will be explained.
[0090] 14 is a diagram showing a socket board 210A according to one embodiment. In addition to a socket PCB 214 and sockets 212, this socket board 210A includes a nonvolatile memory 240. The nonvolatile memory 240 is readable from the tester main body. The nonvolatile memory 240 is an EEPROM (Electrically Erasable Programmable Read-Only Memory) or a flash memory.
[0091] The nonvolatile memory 240 can be arranged at a position along the periphery of the socket PCB 214, for example, at one of the four corners. A ground pattern 242 is formed along the periphery of the socket PCB 214, and the nonvolatile memory 240 may be arranged adjacent to the ground pattern 242.
[0092] Generally, multiple (e.g., 16) socket boards are connected by a mechanical part called a socket frame to form a single unit. This unit is sometimes called a DSA or device board. Conventionally, each DSA was provided with non-volatile memory to store information specific to the DSA.
[0093] The inventors have studied conventional DSA and independently recognized the following problem. In conventional ATEs that handle relatively slow signals, individual differences between socket boards could be ignored or did not pose a significant problem. However, when testing high-speed memories exceeding 20 Gbps, individual differences between socket boards cannot be ignored.
[0094] Therefore, in this embodiment, a nonvolatile memory 240 is provided for each socket board 210A, and the nonvolatile memory 240 is capable of storing information specific to each socket board 210. For example, the nonvolatile memory 240 can store the following information:
[0095] (i) Information about the sockets 212 provided on the socket board 210A. Specifically, examples include the position of the socket board and the pin arrangement. The tester main body reads this information from the socket board 210A and transmits it to the handler. This allows the handler to place the DUT in the correct position on the socket board 210A.
[0096] Furthermore, the accuracy of mechanical parts changes due to temperature changes and aging. By comparing the actual position where the handler placed the DUT, i.e., the actual socket position, with the position information of the socket 212 stored in the non-volatile memory 240, the operator of the ATE 100 can observe how the actual position of the socket 212 shifts over time or due to temperature changes.
[0097] (ii) serial number and control number of the socket board 210A
[0098] (iii) Information relating to the contact of the handler with the socket board, such as the number of contacts and the depth of contact, can be managed for each socket board.
[0099] The above is the configuration of the socket board 210A. With this socket board 210A, it is possible to manage various information on a per-socket-board basis, rather than on a per-DSA basis. This enables test operations that take into account individual differences between socket boards, enabling accurate testing of high-speed memory devices exceeding 20 Gbps.
[0100] Next, the structure relating to the connection between the socket board (also called DSA or device board) and the front-end module will be explained.
[0101] 15 is an exploded perspective view of an interface device 200C according to an embodiment. The interface device 200C includes a front-end module 300C, a DSA 210C, and an FPC frame 500.
[0102] The front end module 300 is attached from below to the FPC frame 500, and is supported and fixed thereto. In this example, two front end modules 300 are attached to one FPC frame 500.
[0103] The DSA 210C includes a socket PCB 214 and a mechanical frame 215. The DSA 210C further includes a socket (not shown). The frame 215 is attached to the FPC frame 500 from above.
[0104] The front-end module 300 includes an FPC cable 222. The FPC cable 222 is electrically connected to pads on the back surface of the socket PCB 214 of the DSA 210C via the interposer 218.
[0105] 16 is an exploded perspective view of the interface device 200C. The front-end module 300C has a connection surface 302. In this example, the connection surface 302 is formed by the FPC cable 222. The front-end module 300C has a plurality of positioning pins 502 that are perpendicular to the connection surface 302.
[0106] Specifically, a positioning pin 502 is press-fitted into the rigid cable clamp 219. The positioning pin 502 passes through the FPC cable 222.
[0107] The interposer 218 has positioning holes 504 that mate with the positioning pins 502. The socket PCB 214 has positioning holes 506 that mate with the positioning pins 502.
[0108] The interposer 218 and the DSA 210C are positioned in the in-plane direction by fitting a plurality of positioning pins 502 into a plurality of positioning holes 504, 506.
[0109] FIG. 17 is a cross-sectional view of the interface device 200C in an assembled state.
[0110] The above is the configuration of interface device 200C. In this interface device 200, by providing positioning pins 502 on connection surface 302 of front-end module 300C and providing corresponding positioning holes 504, 506 in interposer 218 and socket PCB 214, it is possible to minimize the cumulative tolerance of the pads of FPC cable 222, interposer 218, and pads on the back surface of DSA 210C, thereby improving contact position accuracy.
[0111] No positioning jigs are required during assembly. Also, because the interposer 218 (contactor) is separate for each front-end module 300, even if a pin is damaged, it can be easily replaced by simply replacing the front-end module 300. In addition, because error factors due to cumulative tolerances are minimized, the diameter of the gold pads can be made smaller.
[0112] So far, we have explained the horizontal alignment between the socket board 210 and the front-end module 300. Next, we will explain the vertical alignment between the socket board 210 and the front-end module 300.
[0113] 19 is an exploded cross-sectional view of an interface device 200D according to an embodiment, showing a front-end module 300, an interposer 218, and an FPC frame 500.
[0114] The front-end module 300 has an FPC cable 222. The interposer 218 is placed on the FPC cable 222, and its upper surface becomes a contact surface 512 with a socket board (not shown in FIG. 19 ). Due to the flexibility of the FPC cable 222, before assembly with the frame 500, the contact surface 512 can move in the directions of the arrows up and down on the page in response to deformation of the FPC cable 222.
[0115] The frame 500 has a reference surface 510 at a position corresponding to the interposer 218 on the front-end module 300 side.
[0116] Fig. 20 is a cross-sectional view of the interface device 200D of Fig. 19. The frame 500 is assembled to the front-end module 300 while pushing the FPC cable 222 downward, so that the frame 500 is assembled to the front-end module 300 with the reference surface 510 abutting against the contact surface 512.
[0117] This allows the contact surface 512 to be aligned with the reference surface 510 of the frame 500 .
[0118] Then, after the FPC frame 500 is mechanically coupled to the front-end module 300, the socket board 210 is attached from above the FPC frame 500. This brings the pads on the back surface of the socket board 210 into contact with the contacts of the interposer located on the reference surface 510.
[0119] According to the interface device 200D of the embodiment, variations in height of the front-end module 300 can be absorbed by the flexibility of the FPC cable 222.
[0120] This allows the height of the contact surface 512 to be aligned with high precision, improving the contact reliability of the contact portion. Furthermore, it becomes possible to use a contactor with a small contact stroke.
[0121] The interface device 200 may take a variety of forms, and the present disclosure is applicable to any of them.
[0122] SBC (Socket Board Change) type The SBC type is an interface device in which the socket board 210 is replaced depending on the type of DUT.
[0123] CLS (Cable Less) type The CLS type is an interface device in which the interface device 200 can be separated into an upper DSA (Device Specific Adapter) and a lower motherboard, and the DSA is replaced depending on the type of DUT. When the interface device 200 according to this embodiment is applied to the CLS type, two methods are possible.
[0124] One is to place the front-end module 300 on the motherboard side, which is advantageous from the viewpoint of cost because the front-end module 300 can be shared for testing different DUTs.
[0125] Another option is to place the front-end module 300 on the DSA side. In this case, a front-end module 300 is provided for each DSA, which increases the cost of the device. However, this allows the front-end module 300 to be placed closer to the DUT, which is advantageous from the perspective of high-speed testing.
[0126] CCN (Cable Connection) type The CCN type is an interface device in which the entire interface device 200 is replaced depending on the type of DUT. When the interface device 200 according to the present embodiment is applied to the CCN type, it becomes possible to bring the front-end module 300 as close as possible to the DUT, which is advantageous from the viewpoint of high-speed testing.
[0127] Wafer motherboard The interface device 200 may be a wafer motherboard used for wafer-level testing, in which case the interface device 200 may include a probe card instead of a socket board.
[0128] The above-described embodiment is merely an example, and it will be understood by those skilled in the art that various modifications are possible in the combination of the components and the processing steps. Such modifications will be described below.
[0129] (Variation 1) In the embodiment, the pin electronics IC 400 electrically connects the FPC and the printed circuit board using an interposer, but the present disclosure is not limited thereto. A printed circuit board or other wiring may be used as the wiring 220 instead of the FPC cable 222.
[0130] (Variation 2) In the embodiment, the interface device 200 has been described in which the socket board 210 is parallel to the ground, but the present disclosure is not limited thereto. For example, the socket board 210 may be perpendicular to the ground. In this case, the Y direction in Figures 4, 5, etc. is the direction of gravity.
[0131] Although the embodiments of the present disclosure have been described using specific terms, this description is merely an example to facilitate understanding and does not limit the scope of the present disclosure or the claims. The scope of the present invention is defined by the claims, and therefore, embodiments, examples, and modifications not described herein are also included in the scope of the present invention. [Explanation of symbols]
[0132] 1 DUT 100 ATE 120 Tester 130 Test Head 200 Interface Device 210 Socket Board 212 sockets 214 Socket PCB P1 1st pad P2 2nd pad SIG signal pin GND Ground pin 216 Socket board side connector 218 Interposer 219 Cable Clamp 220 Wiring 222 FPC cable 230 motherboard 240 Non-volatile memory 300 Front End Module 400 pin electronics IC 500 FPC Frame 210C DSA 502 Locating pin 504 Positioning hole 506 Positioning hole 510 Reference plane 512 Contact surface
Claims
1. An interface device provided between a test head and a device under test (DUT), A socket board; a front-end module including a pin electronics circuit and a flexible substrate wiring; an interposer mounted on the flexible substrate and forming a contact surface with the socket board; a frame assembled to the front end module; Equipped with the frame has a reference surface, and is assembled to the front end module with the reference surface abutting against the contact surface; The interface device is characterized in that the socket board is assembled to the frame.
2. An automatic test equipment comprising the interface device according to claim 1.
Citation Information
Patent Citations
Automatic test device and interface device thereof
JP2024014522A