Display device

The integration of a pixel and driver circuit on the same surface using unipolar metal oxide transistors with a laminated structure addresses the challenge of narrow frame design, achieving low power consumption and high visibility in display devices.

JP2026016563APending Publication Date: 2026-02-03SEMICON ENERGY LAB CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2025179228
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2016-07-21
Filing Date
2025-10-24
Publication Date
2026-02-03

AI Technical Summary

Technical Problem

Existing display devices face challenges in achieving a narrow frame design while incorporating a drive circuit, high visibility, and incorporating a transparent transistor, which are not adequately addressed by current technologies.

Method used

The display device integrates a pixel circuit and a driver circuit on the same surface, utilizing unipolar transistors made of metal oxide, with a laminated structure that includes a selection circuit and a buffer circuit, where transistors overlap to reduce the area occupied by the driver circuit, and employs a conductive layer to supply low potential and reduce noise.

Benefits of technology

This configuration enables a display device with a narrow frame, low power consumption, and high visibility, while allowing for a novel electronic device with improved operational accuracy and reduced power consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026016563000001_ABST
    Figure 2026016563000001_ABST
Patent Text Reader

Abstract

To provide a display device with a narrow frame.SOLUTION: A display device includes a pixel circuit and a driver circuit that are provided on the same surface, in which the driver circuit includes a selection circuit and a buffer circuit, the selection circuit includes a first transistor, the buffer circuit includes a second transistor, the first transistor and the second transistor have an overlapping region, one of a source and a drain of the first transistor is electrically connected to a gate of the second transistor, and one of a source and a drain of the second transistor is electrically connected to the pixel circuit.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, relating to the manufacture or composition of matter, especially One embodiment of the present invention is a semiconductor device, a light-emitting device, a display device, an electronic device, a lighting device, or any of them. The present invention relates to a driving method or a manufacturing method thereof, and in particular to a display device (display panel). Alternatively, the present invention relates to an electronic device, a light-emitting device, a lighting device, or a manufacturing method thereof, which are provided with a display device. do.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are examples of semiconductor devices. Furthermore, a light-emitting device, a display device, a lighting device, and an electronic device each have a semiconductor device. There are cases where this happens. [Background technology]

[0003] Display devices such as liquid crystal display devices and EL display devices used in electronic devices are becoming smaller and more sophisticated in design. To improve the flexibility of the display, it is necessary to narrow the frame. It is effective to provide a pixel portion and a part or all of the driver circuits on one substrate.

[0004] The driving circuit is a CMOS (Complementary Metal Oxide It is common to configure a unipolar transformer circuit. For example, in Patent Document 1, a circuit such as a shift register is A technique for configuring transistors of the same conductivity type is disclosed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-211621 Summary of the Invention [Problem to be solved by the invention]

[0006] An object of one embodiment of the present invention is to provide a display device with a narrow frame. It is an object of the present invention to provide a display device having a drive circuit with a single-pole structure. It is an object of the present invention to provide a display device having a driver circuit including a transparent transistor. Another object is to provide a display device with high visibility. One of the objects is to provide a display device of the above. Or, to provide a novel display device. Another object of the present invention is to provide an electronic device equipped with the above-mentioned display device (display panel). Another object of the present invention is to provide a novel electronic device.

[0007] Note that the description of these problems does not preclude the existence of other problems. It is not necessary to solve all of these problems. It is clear from the description of the specification, etc. that the problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0008] One embodiment of the present invention relates to a driver circuit that enables a display device to have a narrower frame.

[0009] One embodiment of the present invention is a display device having a pixel circuit and a driver circuit provided on the same surface. The driving circuit has a selection circuit and a buffer circuit, and the selection circuit selects the first transistor. the buffer circuit has a second transistor, and the first transistor and the second transistor The transistors have an overlapping region, and one of the source or drain of the first transistor is connected to the second transistor. The gate of the transistor is electrically connected to the source or drain of the second transistor. One of them is a display device electrically connected to the pixel circuit.

[0010] Another embodiment of the present invention is a display device having a pixel circuit and a driver circuit provided on the same surface. a driver circuit having a selection circuit and a buffer circuit, the selection circuit the buffer circuit has a second transistor, and the pixel circuit has a third transistor. a fourth transistor and a fourth transistor, and the first transistor and the second transistor are overlapped. the third transistor and the fourth transistor have an overlapping region; Either the source or the drain of one transistor is electrically connected to the gate of the second transistor. The source or drain of the second transistor is connected to the The display device is electrically connected to the gate.

[0011] The transistors included in the driver circuit and the pixel circuit are unipolar, and for example, It has a metal oxide.

[0012] A conductive layer may be provided between the first transistor and the second transistor. It is preferable to supply the lowest potential used in the drive circuit to the .

[0013] The pixel circuit may include a first display element, the first display element having a function of emitting visible light. Alternatively, it has a function of transmitting visible light.

[0014] The pixel circuit may further include a second display element that reflects visible light. It has the function of shooting.

[0015] In this specification, a connector, such as an FPC (Flexible Printed Circuit) printed circuit) or TCP (Tape Carrier Packet a module with a TCP (transmitter / receiver) attached, and a module with a printed wiring board attached to the TCP. COG (Chip On Glass) method on a substrate on which a module or display element is formed A module in which an IC (integrated circuit) is directly mounted may also be included in the display device. [Effects of the Invention]

[0016] By using one embodiment of the present invention, a display device with a narrow frame can be provided. It is possible to provide a display device having a drive circuit with a stack structure. It is possible to provide a display device having a driver circuit including a transistor. Alternatively, a display device with low power consumption can be provided. Alternatively, a novel display device can be provided. It is possible to provide an electronic device equipped with a device for controlling a power supply. Alternatively, it is possible to provide a new electronic device. can be done.

[0017] The description of these effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of these effects. , the specification, drawings, claims, etc., and It is possible to extract other effects from the claims and other descriptions. [Brief explanation of the drawings]

[0018] [Figure 1] 1A and 1B are diagrams illustrating a display device. [Figure 2] FIG. 2 is a diagram illustrating a driver circuit. [Figure 3] FIG. [Figure 4] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 5] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 6] 1A and 1B are a top view and a cross-sectional view illustrating a driver circuit. [Figure 7] FIG. [Figure 8] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 9] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 10] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 11] FIG. 2 is a cross-sectional view illustrating a driver circuit. [Figure 12] 1A and 1B are a block diagram and a circuit diagram illustrating a driver circuit; [Figure 13] 1A and 1B illustrate a structure of a display device. [Figure 14] FIG. 2 is a diagram illustrating a pixel unit. [Figure 15] 1A and 1B are a block diagram illustrating a display device and a diagram illustrating electrodes included in a pixel. [Figure 16] FIG. 2 is a diagram illustrating a pixel circuit. [Figure 17] 1A and 1B are a diagram illustrating a pixel circuit and a top view of a pixel. [Figure 18] 1A and 1B illustrate a structure of a display device. [Figure 19] FIG. 1 is a cross-sectional view illustrating a structure of a display device. [Figure 20] 1A to 1C illustrate electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0019] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention may be modified in various forms and details without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that the present invention can be modified in various ways. The present invention is not to be construed as being limited to the description in the form of

[0020] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0021] In each drawing described in this specification, the size of each component, the thickness of a layer, or the area is not clearly indicated. The figures may be exaggerated for clarity and are not necessarily limited to that scale. .

[0022] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limit.

[0023] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention will be described with reference to drawings.

[0024] A display device according to one embodiment of the present invention includes a display device having a pixel circuit and a driver circuit provided on the same surface. In the display device, the driving circuit has a selection circuit and a buffer circuit. Alternatively, a buffer circuit is provided on the selection circuit.

[0025] The signal output from the selection circuit is input to a buffer circuit, which divides the signal into a plurality of The pixels are connected in parallel to the gate lines with large capacitance. A transistor with a large channel width is used for This interferes with the narrow frame.

[0026] In one embodiment of the present invention, a transistor used in a buffer circuit and a transistor included in a selection circuit are By stacking the transistors, the area occupied by the driver circuit can be reduced. The frame width of the display device can be narrowed.

[0027] FIG. 1 is a perspective schematic diagram of a display device 10 according to one embodiment of the present invention, which includes a display provided on a substrate 20. The display unit 31, the drive circuit 40, and the drive circuit 50 are shown. The display unit 31 is arranged in a matrix. The pixel circuit 30 is electrically connected to the driving circuit 40 via wiring 41. The pixel circuits 30 are electrically connected to a drive circuit 50 via wiring 51. For example, the driving circuit 40 can be operated as a gate driver. 50 can be operated as a source driver.

[0028] In one embodiment of the present invention, the driving circuit 40 has a laminated structure of the layer 40a and the layer 40b. In this embodiment, the driving circuit 40 has a laminated structure. The drive circuit 50 can also have a similar laminated structure.

[0029] The driving circuit 40 will be described with reference to the schematic diagrams of FIGS. 2(B) and 2(C). 0 has a shift register circuit 60 and a buffer circuit 70, and the buffer circuit 70 The wiring 21 is an output line of the shift register circuit 60, and the wiring 22 is a signal line. The wiring 41 is a gate line connected to the pixel. Although (A) and (B) are schematic cross-sectional views, the transistors are shown in order to clarify the wiring connections. The positional relationship between the source and drain of the capacitor is illustrated in a different form from the actual one.

[0030] 2A is a schematic diagram of a conventional driver circuit. The gate of a transistor 71 is connected to a wiring 21. One of the source and drain is connected to the wiring 22, and the other of the source and drain is connected to the wiring 23. The other end is connected to the wiring 41. The source and drain are connected to the transistor. shall be replaced by

[0031] Here, the channel width of the transistor 71 is W, the width of the driver circuit 40 is W GD As mentioned above, As mentioned above, the buffer circuit 70 requires a transistor with a large channel width. Here is an example of a transistor having a metal oxide in the channel forming region. In a 3.3-inch 8K x 4K pixel organic EL panel, the transistors used in the shift register circuit The channel width of a transistor is approximately 300 μm at most, while the transistor used in a buffer circuit is The channel width of the transistor is about 2000 μm. GD The ratio of W in It turns out to be very large.

[0032] FIG. 2B is a schematic diagram of a driver circuit 40 according to one embodiment of the present invention. By providing the soft resistor circuit 60, the area occupied by the drive circuit 40 is reduced. GD In other words, the frame width of the display device can be narrowed.

[0033] As shown in FIG. 2C, a buffer circuit 70 may be provided on the shift register circuit 60. As in FIG. 2(B), GD can be made smaller.

[0034] 2B and 2C, the widths of the shift register circuit 60 and the buffer circuit 70 are the same. However, as shown in FIGS. 2(D) and 2(E), the shift register circuit 60 and the buffer circuit The width of 70 may be different. A shown in FIGS. 2(D) and 2(E) is the shift register circuit 60 Or, B is one of the buffer circuits 70, and B is the other. Since the area occupied by the operating circuit 40 is small, GD can be made smaller.

[0035] FIG. 3 shows a part of the shift register circuit 60 shown in FIG. 2B and the buffer circuit 70. 4A is a cross-sectional view of the transistor taken along the line Y1-Y2 in FIG. 4(B) shows a cross section of X1-X2 shown in FIG. 3. Note that for clarity, some insulating Layers and the like are not shown or not designated by reference numerals.

[0036] As part of the shift register circuit 60, a transistor 61 for outputting a signal is shown. The transistor 61 includes a gate electrode 63, a gate insulating film 69, a semiconductor layer 62, a source electrode 64 and a drain electrode 65 .

[0037] The buffer circuit 70 is shown as a transistor 71. The transistor 71 is , gate electrode 73, gate insulating film 79, semiconductor layer 72, source electrode 75, drain electrode 7 It has 4.

[0038] By overlapping the transistor 61 and the transistor 71, the area occupied by the driving circuit 40 is reduced. The transistor is not limited to a bottom gate type, but may be a top gate type. In addition, the planarization film 25 provided between the transistor 61 and the transistor 71 is omitted. It may be composed of

[0039] The source electrode 75 of the transistor 71 is electrically connected to the wiring 22 at a connection portion 76b. The drain electrode 74 of the transistor 71 is connected to the wiring 41 at a connection portion 76a. are electrically connected.

[0040] The gate electrode 73 of the transistor 71 is connected to the drain of the transistor 61 at the connection 66. 4B, the connection portion 66 is electrically connected to the source electrode 75. 10 shows a structure having a conductive layer 77 that can be formed in the same process as the drain electrode 74. However, the conductive layer 77 may not be provided.

[0041] Transistors 61, 71 may have a conductive layer that acts as a second gate electrode. 5A and 5B show a configuration in which the transistors 61 and 71 are provided with conductive layers 68 and 78, respectively. Shows.

[0042] The second gate electrode has a function of supplying a low potential to control the threshold voltage of the transistor. In addition, it has a function to increase the on-current by supplying the same potential as the gate electrode on the front side of the transistor. In this example, in order to give the latter function to the transistor 71, As shown, the gate electrode 73 and the conductive layer 78 are electrically connected at the connection portion 66. In addition, in the transistor 61, the gate electrode 63 and the conductive layer 68 are electrically connected in a region not shown. Just connect it electrically.

[0043] As shown in FIGS. 6(A) and 6(B), a conductive layer 27 is provided between the layer 40a and the layer 40b. 6A is a top view of the transistor 71 and the conductive layer 27 (transistor 61). 6B is a cross-sectional view taken along line X1-X2 of FIG. 6A (transistor 61 is not shown), and FIG. The conductive layer 27 is a shift register circuit as shown in FIGS. The wiring 60 and the buffer circuit 70 are spaced apart from the connection 66 by a certain distance so as not to come into contact with the connection 66. and place them.

[0044] The conductive layer 27 is adapted to reduce the influence of noise generated in the shift register circuit 60 and the buffer circuit 70. The conductive layer 27 functions as a shield layer to reduce the noise. In addition, it can be used for the gate electrode, source electrode, and drain electrode of a transistor. Alternatively, a conductive material such as a metal oxide may be used.

[0045] The conductive layer 27 reduces the parasitic capacitance between the shift register circuit 60 and the buffer circuit 70. To reduce the thickness, it is preferable to sandwich the semiconductor device between a relatively thick interlayer insulating film. By adjusting the thickness of the planarization film 25 that functions as a film, the conductive layer 27 can be formed on the layer 40a. The conductive layer 27 can also function as a back gate of a transistor. For example, a GND potential or a fixed potential may be applied to the shift register circuit 60. It is preferable to apply the lowest potential among the potentials supplied to the buffer circuit 70.

[0046] 7, 8(A), (B), 9(A), (B) are the same as those shown in FIGS. 3 to 5(A), (B). The bottom-gate transistor in this configuration is replaced with a self-aligned top-gate transistor. 7 is a top view, and FIG. 8(A) shows the Y 8(B) is a cross-sectional view taken along line X1-X2 in FIG. 7. A) and B) show the transistors 61 and 71 with the conductive layer 68 acting as the second gate electrode. , 78.

[0047] 3 to 5(A) and 5(B) and the configuration shown in FIGS. 7 to 9(A) and 9(B). For example, as shown in FIGS. 10(A) and 10(B), 1 is a bottom gate transistor, and transistor 61 is a top gate transistor. Alternatively, as shown in FIGS. 11A and 11B, the transistor 61 may be and transistor 71 may be a top-gate transistor. stomach.

[0048] By using the above configuration, the width of the driving circuit such as the gate driver can be narrowed, A picture frame display can be formed.

[0049] A semiconductor device such as a transistor used in a pixel circuit and a driver circuit of a display device In the above case, it is preferable to use an oxide semiconductor using a metal oxide for the semiconductor layer. As a semiconductor, for example, CAC-OS (Cloud-Aligned Computing System) Posite-Oxide Semiconductor) can be used.

[0050] In particular, it is preferable to use an oxide semiconductor having a larger band gap than silicon. If a semiconductor material with a wider band gap and lower carrier density than silicon is used, The current in the off state of the transistor can be reduced.

[0051] In addition, due to its low off-state current, the charge stored in the capacitor can be released over a long period of time via the transistor. By applying such a transistor to the pixel, It is also possible to stop the driving circuit while maintaining the gradation of the image displayed in the display area. As a result, electronic devices with extremely reduced power consumption can be realized.

[0052] Furthermore, the pixels provided in the display device 10 and semiconductors such as transistors used in each driving circuit are The semiconductor device may be made of a polycrystalline semiconductor. For example, polycrystalline silicon may be used. Polycrystalline silicon can be formed at a lower temperature than single crystal silicon, and amorphous silicon is preferable. Compared to silicon, it has high field-effect mobility and high reliability. By applying this to the pixels, the aperture ratio of the pixels can be improved. Even if the pixel has a gate driver circuit and a source driver circuit, the gate driver circuit and the source driver circuit are formed on the same substrate as the pixel. This makes it possible to reduce the number of parts that make up the electronic device.

[0053] This embodiment may be appropriately combined with at least a part of other embodiments described in this specification. It can be implemented in combination.

[0054] (Embodiment 2) In this embodiment, a driver circuit of a display device that can be used in one embodiment of the present invention will be described. This will be explained using Figures 12(A) to 12(C).

[0055] The driving circuit of the display device described in this embodiment includes a shift register circuit and a buffer circuit. The buffer circuit may be included in a shift register circuit.

[0056] The shift register circuit shown in this embodiment includes a pulse signal output circuit 90 ( 90_1 to pulse signal output circuit 90_ n , n is a natural number greater than or equal to 2) and a clock signal The signal line 81 has a clock signal. A clock signal CLK1 is applied to the signal line 81, a clock signal CLK2 is applied to the signal line 82, and a clock signal CLK3 is applied to the signal line 83. A clock signal CLK3 is applied to the signal line 83, and a clock signal CLK4 is applied to the signal line 84. can be done.

[0057] A clock signal is a signal that repeats an H signal (high potential) and an L signal (low potential) at regular intervals. Here, the clock signals CLK1 to CLK4 are delayed by 1 / 4 cycle. In this embodiment, the clock signal is used to generate a pulse signal. 90 control etc.

[0058] The pulse signal output circuit 90 has an input terminal 91, an input terminal 92, an input terminal 93, and an input 12B, the input terminal 94, the input terminal 95, the output terminal 96, and the output terminal 97. .

[0059] The input terminal 91, the input terminal 92, and the input terminal 93 are connected to any one of the signal lines 81 to 84. For example, the pulse signal output circuit 90_1 has an input terminal 91 that is electrically connected to a signal The input terminal 92 is electrically connected to the signal line 82, and the input terminal 9 3 is electrically connected to the signal line 83. In addition, the pulse signal output circuit 90_2 has an input The terminal 91 is electrically connected to the signal line 82, and the input terminal 92 is electrically connected to the signal line 83. The input terminal 93 is electrically connected to the signal line 84. Output circuit 90_ n When the signal lines connected to the signal line 82, the signal line 83, and the signal line 84 are Although the pulse signal output circuit 90_ n The signal line connected to is determined by the value of n. Therefore, please note that the configuration shown here is merely an example. do.

[0060] In addition, the pulse signal output circuit 90 of the shift register shown in this embodiment m (m is 2 or more In the natural number), the input terminal 94 is a pulse signal output circuit 90_ m-1 Output terminal 96 and The input terminal 95 is electrically connected to the pulse signal output circuit 90_ m+2 Output terminal 96 and electrical and the output terminal 96 is connected to the pulse signal output circuit 90_ m+1 Input terminal 94 and electrical and the output terminal 97 outputs a signal to OUT(m).

[0061] For example, in the pulse signal output circuit 90_3, the input terminal 94 is connected to the pulse signal output circuit 90_2. The input terminal 95 is electrically connected to the output terminal 96 of the pulse signal output circuit 90_5. The output terminal 96 is electrically connected to the input terminal 9 of the pulse signal output circuit 90_4. 4 and an input terminal 95 of the pulse signal output circuit 90_1.

[0062] In addition, in the pulse signal output circuit 90_1, a start pulse from the wiring 85 is input to an input terminal 94. (SP1) is input to the pulse signal output circuit 90_ k (k is a natural number between 2 and n In the pulse signal output circuit 9, the output pulse of the previous stage is input to the input terminal 94. 0 (n-1) In this example, a start pulse (SP2) is input to the input terminal 95. signal output circuit 90 n In this example, a start pulse (SP3) is input to input terminal 95. The start pulse (SP2) and start pulse (SP3) are input from the outside. The signal may be a signal generated by the circuit or may be a signal generated within the circuit.

[0063] Next, the pulse signal output circuits 90_1 to 90_ n Regarding the specific configuration of and explain.

[0064] Pulse signal output circuit 90_1 to pulse signal output circuit 90_ n Each of the transistors A pulse signal generating circuit 200 configured with transistors 101 to 104 and a transistor 1 an input signal generating circuit 201 configured with transistors 105 to 107; 8 to the input signal generating circuit 202 configured by the transistor 111 (FIG. 12(C )). In addition to the above-mentioned input terminals 91 to 95, a power supply line 98 and a power supply A signal is supplied from line 99 to transistors 101 to 111 .

[0065] The transistors 103 and 104 included in the pulse signal generating circuit 200 are used as a buffer circuit. The buffer circuit 203 is the same as that described in FIGS. 2(B) to 2(E) of the first embodiment. This corresponds to the buffer circuit 70, and is a part of the pulse signal generating circuit 200 excluding the buffer circuit 203. The input signal generating circuit 201 and the input signal generating circuit 202 correspond to the shift register circuit 60. Correct.

[0066] That is, the transistor 61 shown in FIG. 3 of the first embodiment is a transistor 106, This corresponds to the transistor 107, the transistor 108, or the transistor 109. The transistor 71 corresponds to the transistor 103 or the transistor 104 .

[0067] A specific example of the configuration of the pulse signal generating circuit 200 is as follows.

[0068] A first terminal (one of the source terminal and the drain terminal, the same applies below) of the transistor 101 and a The first terminal of the transistor 102 is electrically connected to the output terminal 96. The first terminal of the resistor 103, the first terminal of the transistor 104, and the output terminal 97 are electrically connected. The gate terminal of the transistor 101 and the gate terminal of the transistor 103 are electrically connected. The output terminal of the input signal generating circuit 201 is electrically connected to the output terminal of the input signal generating circuit 201. a gate terminal of the transistor 102, a gate terminal of the transistor 104, and an input signal generating circuit The output terminal of 202 is electrically connected.

[0069] A second terminal (the other of the source terminal and the drain terminal, the same applies hereinafter) of the transistor 101 and The second terminal of the transistor 103 is electrically connected to the node 104, and the clock signal CLK1 is applied to the node 104. The second terminal of the transistor 101 and the second terminal of the transistor 103 are connected to each other. The transistor 102 also functions as an input terminal 91 of the pulse signal output circuit 90. A first potential (for example, a low potential VSS) is applied to the second terminal via a power supply line 98. A first potential is applied to a second terminal of the transistor 104 via a power supply line 98 .

[0070] A specific example of the configuration of the input signal generating circuit 201 is as follows.

[0071] a first terminal of the transistor 105, a first terminal of the transistor 106, and a transistor The first terminal of the transistor 107 is electrically connected to the second terminal of the transistor 107. This functions as the output terminal of the input signal generating circuit 201. The output terminal functions as a first input terminal of the input signal generating circuit 201 and also outputs a pulse signal. It also functions as an input terminal 94 of the signal output circuit 90.

[0072] A second potential is applied to the second terminal of the transistor 105 via the power supply line 99. A first potential is applied to the second terminal of the transistor 106 via the power supply line 98, and the transistor The gate terminal of the first stage 105 receives a pulse signal from the previous stage (the pulse signal output circuit 90 of the first stage). The gate terminal of the transistor 106 receives an input signal (start pulse signal). The output signal of the generating circuit 202 is input to the gate terminal of the transistor 106. The gate terminal of the transistor 107 functions as the second input terminal of the output signal generating circuit 201. The element is supplied with a second potential via a power supply line 99 .

[0073] In this embodiment, the transistor 107 is provided. When the transistor 107 is provided, the bootstrap operation This can suppress a rise in the potential of the first terminal of the transistor 105 that may occur due to the above. The area between the gate and source (or gate and drain) of transistor 105 is large. Since it is possible to prevent an excessive voltage from being applied, it is possible to suppress deterioration of the transistor 105. do.

[0074] A specific example of the configuration of the input signal generating circuit 202 is as follows.

[0075] The second terminal of the transistor 110 and the first terminal of the transistor 108 are electrically connected. In addition, the second terminal of the transistor 108 and the second terminal of the transistor 111 are connected to each other. The first terminal of the transistor 109 is electrically connected to the output terminal of the input signal generating circuit 202. It functions as a power terminal.

[0076] The first terminal of the transistor 111 and the first terminal of the transistor 110 are connected to the power supply line 99. The second terminal of the transistor 109 is connected to the power supply line 98. The gate terminal of the transistor 111 is supplied with a first potential via the The gate terminal of the transistor 111 is connected to the input signal generating circuit 2. 02 and also serves as the input terminal 95 of the pulse signal output circuit 90. The clock signal CLK2 is input to the gate terminal of the transistor 108. The gate terminal of the transistor 108 is connected to the second input terminal of the input signal generating circuit 202. It also functions as an input terminal 92 of the pulse signal output circuit 90. The gate terminal of the transistor 109 receives a pulse signal from the previous stage (the first stage pulse signal output circuit 9 0, a start pulse signal is input. The gate terminal of the transistor 109 is It functions as the third input terminal of the input signal generating circuit 202 and also functions as the pulse signal output circuit 9 The gate terminal of transistor 110 also functions as an input terminal 94 for clock signal 0. The gate terminal of the transistor 110 is connected to the input signal generating circuit 2. 02 and also serves as the input terminal 93 of the pulse signal output circuit 90. It still works.

[0077] The components of the pulse signal output circuit 90 described above (pulse signal generating circuit 200, input signal The configuration examples of the generation circuit 201 and the input signal generation circuit 202 are merely examples, and the disclosure The invention is not limited to this.

[0078] In the following description of this embodiment, the pulse signal output circuit 90 shown in FIG. 12(C) is The gate terminal of the transistor 101, the gate terminal of the transistor 103, and the input signal generating circuit The node formed by the connection between the output terminal of the circuit 201 and the a gate terminal of the transistor 102, a gate terminal of the transistor 104, and an input signal generating circuit The node formed by connecting the output terminal of 202 and is called node B.

[0079] Between the node A and the output terminal 96, a capacitance is provided to suitably perform the bootstrap operation. In order to maintain the potential of the node B, an element may be provided. A connected capacitive element may also be provided.

[0080] Note that the transistors 101 to 111 are oxide semiconductors using metal oxides. By using an oxide semiconductor, the off-state current of a transistor can be reduced. In addition, compared to amorphous silicon, the on-current and field effect can be reduced. As a result, the mobility can be increased. Furthermore, the deterioration of the transistor can be suppressed. This has resulted in electronic circuits that consume less power, are capable of high-speed operation, and have improved operational accuracy. Be realized.

[0081] This embodiment may be appropriately combined with at least a part of other embodiments described in this specification. It can be implemented in combination.

[0082] (Embodiment 3) In this embodiment, a display device that can be used in one embodiment of the present invention and a driving method for the display device will be described. This section explains how it works.

[0083] A display device according to one embodiment of the present invention includes a pixel provided with a first display element that reflects visible light. Alternatively, the display device may have a pixel provided with a second display element that emits visible light. Alternatively, a pixel provided with a third display element that transmits visible light can be provided. Alternatively, a first display element and a second or third display element may be provided. The pixel may have a pixel structure.

[0084] In this embodiment, a first display element that reflects visible light and a second display element that emits visible light are used. A display device having the above will be described.

[0085] The display device is configured to display a first light reflected by a first display element and a second light emitted by a second display element. Either one or both of these have the function of displaying images. The device is configured to detect the amount of first light reflected by the first display element and the amount of second light emitted by the second display element. By controlling the amount of light, it has the function of expressing gradation.

[0086] The display device also expresses gradation by controlling the amount of light reflected by the first display element. A first pixel and a second display element are controlled to express gradation by controlling the amount of light emitted from the first pixel and the second display element. It is preferable that the first pixel and the second pixel have a structure in which, for example, A plurality of these are arranged in a matrix to form the display unit.

[0087] The first pixels and the second pixels are arranged in the display area in equal numbers and at equal pitches. In this case, it is preferable that the adjacent first pixel and second pixel are combined to form a pixel unit. This allows an image displayed only by a plurality of first pixels to be generated, as will be described later. and an image displayed only by a plurality of second pixels, and an image displayed only by a plurality of first pixels and a plurality of second pixels. Each of the two pixel-displayed images can be displayed in the same display area.

[0088] The first display element of the first pixel can be an element that reflects external light to display an image. Since such elements do not have a light source, power consumption during display is extremely low. This becomes possible.

[0089] The first display element can typically be a reflective liquid crystal element. As a display element, a shutter-type MEMS (Micro Electro Mechanical Systems) MEMS elements, optical interference type MEMS elements, microcapsules, electrophoresis, electrowetting, electronic liquid powder (registered trademark), etc. An element to which the above is applied can be used.

[0090] The second display element of the second pixel has a light source and displays using light from the light source. In particular, a device that can extract light from a luminescent material by applying an electric field can be used. It is preferable to use electroluminescent elements that can emit light. The brightness and chromaticity of light are not affected by external light, so color reproducibility is high (the color gamut is wide). ) and provides high contrast, i.e., a vivid display.

[0091] The second display element may be, for example, an OLED (Organic Light Emitting Diode), LED(Light Emitting Diode), QLED(Q uantum-dot Light Emitting Diode), semiconductor laser, etc. Any self-luminous light-emitting element can be used. The backlight is the light source, and the transmission layer controls the amount of light transmitted from the backlight. A combination of a liquid crystal element of this type may also be used.

[0092] The first pixel may be a sub-pixel that exhibits, for example, white (W), or a sub-pixel that exhibits, for example, red (R), green (G), The pixel may have sub-pixels that emit light of three colors, i.e., blue (B), green (C), and blue (B). Similarly, the second pixel may have a sub-pixel that exhibits, for example, white (W), or a sub-pixel that exhibits, for example, red (R), green (G), or The pixel may have sub-pixels that respectively emit light of three colors: red (G), blue (B), and green (G). The sub-pixels of each of the first pixel and the second pixel may have four or more colors. The more types of sub-pixels there are, the more power consumption can be reduced and color reproducibility can be improved. It is possible.

[0093] One aspect of the present invention is a first mode in which an image is displayed by a first pixel, and a second mode in which an image is displayed by a second pixel. a second mode in which an image is displayed by the first pixel and the second pixel; and a third mode in which an image is displayed by the first pixel and the second pixel. You can switch between them.

[0094] The first mode is a mode in which an image is displayed using light reflected by the first display element. Mode 1 is a driving mode with extremely low power consumption because it does not require a light source. This is effective when the illuminance of the light is sufficiently high and the external light is white light or light of a similar color. Mode 1 is a display mode suitable for displaying text information such as books and documents. In addition, because it uses reflected light, it is easy on the eyes and reduces eye fatigue. It has an effect.

[0095] The second mode is a mode in which an image is displayed by utilizing light emitted by the second display element. Therefore, it is possible to achieve extremely vivid (high contrast and color reproduction) images regardless of the illuminance or chromaticity of external light. For example, it is possible to display images in situations where the external light is extremely bright, such as at night or in a dark room. This is effective when the external light is dark and the display is bright, making it difficult for the user to see clearly. To prevent this, the second mode reduces the brightness. This not only reduces glare but also power consumption. The second mode is suitable for displaying vivid images and smooth videos. It is a mode.

[0096] In the third mode, both the reflected light from the first display element and the emitted light from the second display element are used. Specifically, the light emitted by the first pixel and the light emitted by the first pixel are used to perform display. The light emitted by the adjacent second pixel is mixed to produce a single color. It provides a more vivid display than the first mode, while consuming less power than the second mode. For example, under indoor lighting or in the early morning or evening hours when the illuminance of external light is relatively low, This is effective when the chromaticity of the external light is not white. By using colored light, it displays images that make you feel as if you are looking at a painting. This becomes possible.

[0097] Hereinafter, a more specific example of one embodiment of the present invention will be described with reference to the drawings.

[0098] [Example of display device configuration] FIG. 13A illustrates a display device 11 according to one embodiment of the present invention. The display device includes a display unit 31, a drive circuit 42a, a drive circuit 42b, and a drive circuit 50. The device 11 may have a photometry unit that acquires the illuminance of external light, etc.

[0099] The display unit 31 has a plurality of pixel units 45 arranged in a matrix. The pixel 45 has a first pixel circuit 46 and a second pixel circuit 47 .

[0100] In FIG. 13A, the first pixel circuit 46 and the second pixel circuit 47 are respectively configured as red (R 1 shows an example in which the display device has display elements corresponding to three colors: red (A), green (G), and blue (B).

[0101] The first pixel circuit 46 has a display element 46R corresponding to red (R), a display element 46B corresponding to green (G), and a The display elements 46R and 46G correspond to blue (B), and the display element 46B corresponds to blue (B). , 46B are display elements that utilize reflection of external light.

[0102] The second pixel circuit 47 includes a display element 47R corresponding to red (R), a display element 47R corresponding to green (G), and a The display elements 47R and 47G correspond to blue (B), and the display element 47B corresponds to blue (B). , 47B are display elements that utilize light from a light source.

[0103] The driving circuits 42a, 42b and the driving circuit 50 drive a plurality of pixel units 45 in the display unit 31. Specifically, the pixel unit 45 includes a first pixel circuit 46 and a and the second pixel circuit 47 is supplied with a signal including a gray scale value, a scanning signal, a power supply potential, etc. The circuit 42a may be, for example, a gate driver that selects the first pixel circuit 46. The driving circuit 42b is, for example, a gate driver that selects the second pixel circuit 47. The driving circuit 50 may, for example, drive the selected first pixel circuit 46 and the second pixel circuit 47. The circuit 47 may be a source driver that inputs a video signal.

[0104] Each of the drive circuits 42a and 42b is similar to the drive circuit 40 shown in the first embodiment. A shift register circuit formed on one of the layers 40a and 40b, and a shift register circuit formed on the other of the layers 40a and 40b. 0b has a buffer circuit formed on the other side.

[0105] Also, the pixel unit 45 is configured to be provided on the layer 40a as shown in FIG. 13(B). Alternatively, as shown in FIG. 13(C), the layer 40a and the layer 40b may be provided with a In the latter case, the layer 40a may have a first pixel circuit 46 or a second pixel circuit 47. The layer 40b is provided with one of the first pixel circuits 46 and the second pixel circuit 47, and the layer 40c is provided with the other of the first pixel circuit 46 and the second pixel circuit 47. In this case, the transistor of the first pixel circuit 46 The second pixel circuit 47 can be provided on either the layer 40a or the layer 40b. The first transistor having the first gate electrode 42 may be provided in layer 40a, and the second pixel circuit 47 may have the second gate electrode 42. The second transistor may be provided in layer 40b, and the first and second transistors may be The transistors can have overlapping regions. The area occupied by the pixels can be reduced, making it easier to increase pixel density.

[0106] The above is a description of an example of the configuration of the display device.

[0107] [Pixel unit configuration example] Next, the pixel unit 45 will be described with reference to FIGS. 14(A), (B), and (C). 14(A), 14(B), and 14(C) are schematic diagrams showing configuration examples of the pixel unit 45.

[0108] The first pixel circuit 46 has a display element 46R, a display element 46G, and a display element 46B. The display element 46R reflects external light and outputs a first gradation value included in the first gradation value input to the first pixel circuit 46. The display element emits red light R1 having a brightness according to the gradation value corresponding to the red color to be displayed on the display surface side. Similarly, the display element 46G and the display element 46B respectively transmit green light G1 and blue light B1 to the display surface. Shoots to the side.

[0109] The second pixel circuit 47 has a display element 47R, a display element 47G, and a display element 47B. The display element 47R has a light source and is included in the second gradation value input to the second pixel circuit 47. The red light R2 having a luminance corresponding to the gradation value corresponding to red is emitted toward the display surface. Similarly, the display element 47B also emits green light G2 or blue light B2 on the display surface side. Inject into.

[0110] [Third mode] FIG. 14A shows a display element 46R, a display element 46G, and a display element 46B that reflect external light, The light-emitting display elements 47R, 47G, and 47B are all driven to display an image. 14A shows an example of an operation mode in which the pixel unit 45 By mixing six lights, R1, G1, B1, R2, G2, and B2, This allows light 55 of a predetermined color to be emitted toward the display surface.

[0111] At this time, the luminance of each of the display elements 47R, 47G, and 47B is reduced. For example, the display element 47R, the display element 47G, and the display element 47 The maximum brightness of the light that each of B can emit is called the maximum brightness. The brightness of the light emitted by the display element 47R, the display element 47G, and the display element 47B is The maximum value of the brightness should be 5% to 50% of the maximum brightness, preferably 1% to 60%. This allows for display with low power consumption and also makes it possible to display images more clearly. This makes it possible to create a pictorial display that is easy on the eyes.

[0112] [First mode] FIG. 14B shows a display device that drives a display element 46R, a display element 46G, and a display element 46B that reflect external light. As shown in FIG. 14(B), the pixel unit The unit 45 drives the second pixel circuit 47 when, for example, the illuminance of external light is sufficiently high. Only the light from the first pixel circuit 46 (light R1, light G1, and light B1) is mixed. By doing so, it is possible to emit light 55 of a predetermined color toward the display surface. This allows for extremely low power consumption driving.

[0113] [Second mode] FIG. 14C shows a state in which the display elements 47R, 47G, and 47B are driven to display an image. As shown in FIG. 14(C), the pixel unit 45 For example, when the illuminance of external light is extremely low, the first pixel circuit 46 is not driven, and the second pixel circuit 47 is not driven. By mixing only the light from the second pixel circuit 47 (light R2, light G2, and light B2), It is also possible to emit light 55 of a predetermined color onto the display surface side. In addition, by lowering the brightness when the illuminance of external light is low, the user can This reduces glare and power consumption.

[0114] In this case, it is preferable to increase the brightness of the display element that emits visible light more than in the third mode. For example, in the second mode, the display elements 47R, 47G, and 47B are The maximum brightness of the light emitted by the lamp shall be 100% of the maximum brightness, or 50% or more and 100% or less. % or less, preferably 60% to 100%. It can display vivid images even in dark places.

[0115] Here, the brightness of the light emitted by each of the display elements 47R, 47G, and 47B is The maximum value of can be replaced by the dynamic range, i.e., in the third mode The second mode is different from the first mode in that the display elements 47R, 47G, and 47B are ...B are different from the first mode in that the display elements 47R, 47G, and 47B are different from the first The dynamic range can be narrowed. For example, the display element 47R, the display element 4 The dynamic range of the third mode in the display element 47G or the display element 47B is Set the dynamic range to 5% or more and 50% or less, preferably 1% or more and 60% or less. It is possible.

[0116] The above is a description of an example of the configuration of the pixel unit 45.

[0117] This embodiment may be appropriately combined with at least a part of another embodiment described in this specification. It can be implemented in combination.

[0118] (Fourth embodiment) An example of a display panel that can be used in a display device of one embodiment of the present invention will be described below. The display panel exemplified below has both a reflective liquid crystal element and a light-emitting element, and The display panel is capable of displaying in both reflective and reflective modes.

[0119] [Configuration example] 15A is a block diagram showing an example of the configuration of the display device 400. The display device 4 has a plurality of pixels 410 arranged in a matrix on the display unit 362. 00 has a circuit GD and a circuit SD. Also, a plurality of pixels 410 arranged in a direction R, A plurality of wirings G1, a plurality of wirings G2, a plurality of wirings ANO electrically connected to the circuit GD, and It also has a plurality of wirings CSCOM. It also has a plurality of pixels 410 arranged in a direction C, a circuit SD, and It has a plurality of wirings S1 and a plurality of wirings S2 that are electrically connected.

[0120] For simplicity, a configuration having one circuit GD and one circuit SD is shown here. Circuits GD and SD for driving elements, and circuits GD and SD for driving light-emitting elements and may be provided separately.

[0121] The pixel 410 includes a reflective liquid crystal element and a light-emitting element. and the light-emitting element have overlapping portions.

[0122] 15B1 shows a structural example of the conductive layer 311b included in the pixel 410. The conductive layer 311b functions as a reflective electrode of the liquid crystal element in the pixel 410. An opening 451 is provided.

[0123] In FIG. 15(B1), the light emitting element 360 located in the area overlapping with the conductive layer 311b is indicated by a broken line. The light emitting element 360 is disposed so as to overlap the opening 451 of the conductive layer 311b. As a result, the light emitted by the light emitting element 360 is emitted to the display surface side through the opening 451. do.

[0124] In FIG. 15(B1), pixels 410 adjacent in the direction R correspond to different colors. In this case, as shown in FIG. 15(B1), the openings 45 are formed in two pixels adjacent to each other in the direction R. 1 are preferably provided at different positions on the conductive layer 311b so as not to be arranged in a line. This allows the two light emitting elements 360 to be spaced apart, and the light emitted by the light emitting elements 360 This phenomenon (also known as crosstalk) occurs when light from a pixel 410 is incident on the colored layer of an adjacent pixel 410. ) can be suppressed. In addition, by arranging two adjacent light emitting elements 360 apart from each other, Therefore, even when the EL layer of the light emitting element 360 is separately formed by shielding or the like, A high-definition display device can be realized.

[0125] Alternatively, the arrangement may be as shown in FIG. 15(B2).

[0126] If the ratio of the total area of ​​the openings 451 to the total area of ​​the non-openings is too large, it is difficult to obtain a satisfactory image using a liquid crystal element. In addition, the ratio of the total area of ​​the openings 451 to the total area of ​​the non-openings is If the value is too small, the display using the light emitting element 360 will be too dark.

[0127] Furthermore, if the area of ​​the opening 451 provided in the conductive layer 311b functioning as a reflective electrode is too small, Therefore, the efficiency of light extraction from the light emitted by the light emitting element 360 decreases.

[0128] The shape of the opening 451 may be, for example, a polygon, a rectangle, an ellipse, a circle, a cross, or the like. It may also be in the form of thin stripes, slits, or a checkered pattern. The apertures 451 may be arranged close to adjacent pixels. Preferably, the apertures 451 are arranged so that they display the same color. This arrangement makes it possible to suppress crosstalk.

[0129] [Circuit configuration example] 16 is a circuit diagram showing a configuration example of a pixel 410. In FIG. 16, two adjacent pixels 4 It shows 10.

[0130] The pixel 410 includes a switch SW1, a capacitance element C1, a liquid crystal element 340, a switch SW2, a transistor The pixel 410 includes a transistor M, a capacitance element C2, and a light emitting element 360. Wire G1, wire G2, wire ANO, wire CSCOM, wire S1, and wire S2 are electrically 16, the wiring VCOM electrically connected to the liquid crystal element 340 is 1 and a wiring VCOM2 electrically connecting to the light emitting element 360.

[0131] FIG. 16 shows an example in which transistors are used for the switches SW1 and SW2. It shows.

[0132] The switch SW1 has a gate connected to the wiring G1 and a source or drain connected to the wiring S 1, and the other of the source or drain is connected to one electrode of the capacitance element C1 and the liquid crystal element The other electrode of the capacitance element C1 is connected to the wiring CSCOM. The other electrode of the liquid crystal element 340 is connected to the wiring VCOM1.

[0133] The switch SW2 has a gate connected to the wiring G2 and a source or drain The other of the source and drain is connected to one electrode of the capacitance element C2. The other electrode of the capacitance element C2 is connected to the gate of the transistor M. The transistor M is connected to either the source or the drain and the wiring ANO. The other of the source and the drain is connected to one electrode of the light-emitting element 360. The other electrode of 360 is connected to the wiring VCOM2.

[0134] In FIG. 16, a transistor M has two gates that sandwich a semiconductor, and these are connected. This increases the current that the transistor M can pass. This can be done.

[0135] A signal that controls the switch SW1 to be in a conducting or non-conducting state is applied to the wiring G1. A predetermined potential can be applied to the wiring VCOM1. A signal for controlling the alignment state of the liquid crystal in the element 340 can be applied. M can be given a predetermined potential.

[0136] A signal that controls the switch SW2 to be in a conductive state or a non-conductive state is applied to the wiring G2. A potential difference that causes the light emitting element 360 to emit light is generated between the wiring VCOM2 and the wiring ANO. The wiring S2 can be connected to a potential that controls the conduction state of the transistor M. A signal to control the

[0137] In the pixel 410 shown in FIG. 16, for example, when a reflective mode display is performed, the wiring G1 and It is driven by a signal given to the wiring S1 and displays using optical modulation by the liquid crystal element 340. In addition, when displaying in a transmissive mode, the voltage applied to the wiring G2 and the wiring S2 is The light emitting element 360 can be driven by a signal to emit light for display. When driving in the mode, the wiring G1, the wiring G2, the wiring S1 and the wiring S2 are It can be driven by a signal provided.

[0138] In FIG. 16, one pixel 410 includes one liquid crystal element 340 and one light emitting element 360. 17A shows an example in which one pixel 410 has one The liquid crystal element 340 and four light-emitting elements 360 (light-emitting elements 360r, 360g, 360b, 360r) 0w).

[0139] In FIG. 17A, in addition to the example of FIG. 16, a line G3 and a line S3 are connected to the pixel 410. are.

[0140] In the example shown in FIG. 17(A), for example, four light emitting elements 360 are arranged to emit red (R), green (G), and blue light. Light-emitting elements that emit green (G), blue (B), and white (W) colors can be used. A reflective liquid crystal element that exhibits white color can be used as the liquid crystal element 340. In the case of display in reflective mode, white color with high reflectivity can be displayed. When display is performed in the transmissive mode, display with high color rendering can be performed with low power consumption.

[0141] 17B shows an example of the configuration of a pixel 410. The pixel 410 has an electrode 311 The light emitting element 360w overlaps with the opening of the electrode 311, and the light emitting element 360w is disposed around the electrode 311. The light emitting element 360r, the light emitting element 360g, and the light emitting element 360b. The light emitting element 360g and the light emitting element 360b preferably have approximately the same light emitting area. .

[0142] [Display panel configuration example] 18 is a perspective schematic diagram of a display panel 300 according to an embodiment of the present invention. 18, the substrate 351 and the substrate 361 are bonded together. It is indicated by a dashed line.

[0143] The display panel 300 includes a display unit 362, a circuit 364, wiring 365, etc. For example, the circuit 364, the wiring 365, and the conductive layer 311b functioning as a pixel electrode are included. In addition, in FIG. 18, an IC 373 and an FPC 372 are mounted on a substrate 351. Therefore, the configuration shown in FIG. 18 is a display panel 300, an FPC 372, and It can also be said to be a display module having IC373.

[0144] The circuit 364 can be, for example, a circuit that functions as a scanning line driver circuit.

[0145] The wiring 365 has a function of supplying signals and power to the display portion 362 and the circuit 364. Signals and power are input from the outside via FPC372 or from IC373 to wiring 365. .

[0146] In addition, in FIG. 18, a substrate 351 is provided with a COG (Chip On Glass) method or the like. The example in which the IC 373 is provided is shown. The IC 373 is, for example, a scanning line driving circuit or Alternatively, an IC having a function as a signal line driver circuit or the like can be applied. In some cases, the scanning line driver circuit and the signal line driver circuit are provided. The circuit that functions as the signal line driver circuit is provided externally, and the display panel is connected via FPC372. When inputting a signal to drive the module 300, the IC373 is not provided. In addition, IC373 may be mounted on F by a COF (Chip On Film) method or the like. It may be implemented in PC372.

[0147] 18 shows an enlarged view of a part of the display unit 362. The display unit 362 has a plurality of displays. The conductive layer 311b of the element is arranged in a matrix. It has a function of reflecting light and functions as a reflective electrode of the liquid crystal element 340, which will be described later.

[0148] 18, the conductive layer 311b has an opening. The plate 351 has a light emitting element 360. The light from the light emitting element 360 is incident on the conductive layer 311b. The light is emitted to the substrate 361 side through the opening.

[0149] [Cross-section example] FIG. 19 shows a part of the area including the FPC 372, the circuit 364, and the like of the display panel shown in FIG. 3A and 3B are cross sections obtained by cutting a part of the area including the display unit 362. An example is shown below.

[0150] The display panel has an insulating layer 220 between a substrate 351 and a substrate 361. and the insulating layer 220, the light emitting element 360, the transistor 201a, the transistor 201b , a transistor 205, a transistor 206, a transistor 207, a colored layer 134, etc. In addition, the liquid crystal element 340, the colored layer 131, etc. are disposed between the insulating layer 220 and the substrate 361. The substrate 361 and the insulating layer 220 are bonded via the adhesive layer 141, and the substrate 351 and the insulating layer 220 are bonded via the adhesive layer 141. Layer 220 is adhered via adhesive layer 142 .

[0151] The transistor 206 is electrically connected to the liquid crystal element 340. is electrically connected to the transistor 207, and the transistor 207 is electrically connected to the light-emitting element 360. Both the transistor 205 and the transistor 206 are connected to the substrate of the insulating layer 220. Since they are formed on the surface of the 351 side, they can be manufactured using the same process. In addition, since the transistor 207 is formed to overlap with the transistor 205, The element size can be reduced. a layer on which the gate insulating film extends, and a layer on which one of the source electrode and the drain electrode extends. The capacitance element C2 can be formed using the above.

[0152] The substrate 361 is provided with a colored layer 131, a light-shielding layer 132, an insulating layer 121, and a common electrode for the liquid crystal element 340. The conductive layer 113, which functions as an electrode, the alignment film 133b, the insulating layer 117, etc. are provided. The edge layer 117 functions as a spacer to maintain the cell gap of the liquid crystal element 340. .

[0153] On the substrate 351 side of the insulating layer 220, there are an insulating layer 211a, an insulating layer 212a, an insulating layer 213a, Insulating layer 214a, insulating layer 215, insulating layer 211b, insulating layer 212b, insulating layer 213b, insulating Insulating layers such as edge layer 214b and insulating layer 216 are provided.

[0154] The insulating layer 211a has a portion that functions as a gate insulating layer for the transistors 205 and 206. The insulating layer 212a, the insulating layer 213a, and the insulating layer 214a are It is installed to cover 06.

[0155] A part of the insulating layer 211b functions as a gate insulating layer of the transistor 207. Layer 212b, insulating layer 213b, and insulating layer 214b are provided over transistor 207. It is being done.

[0156] The insulating layer 214a and the insulating layer 214b function as planarizing layers. Although the figure shows a case where the insulating layer covering the transistor etc. is three layers, it is not limited to this. It may be four or more layers, or may be a single layer or two layers. The insulating layer 214a and the insulating layer 214b may not be provided if they are not necessary. 2 shows a case where an insulating layer 215 is provided between the edge layer 214a and the insulating layer 211b. However, the insulating layer 215 does not have to be provided.

[0157] In addition, the transistors 205, 206, and 207 are partially gate-coupled. a conductive layer 221 which functions as a gate, a conductive layer 222 which functions as a source or a drain, 22, has a semiconductor layer 231.

[0158] The liquid crystal element 340 is a reflective liquid crystal element. The liquid crystal element 340 is made up of a conductive layer 311a, a liquid crystal 1 12, and the conductive layer 113. The conductive layer 311a has a laminated structure. A conductive layer 311b that reflects visible light is provided in contact with the opening 2. 51. The conductive layer 311a and the conductive layer 113 contain a material that transmits visible light. An alignment film 133a is provided between the liquid crystal 112 and the conductive layer 311a. An alignment film 133b is provided between the substrate 361 and the substrate 362. It has a plate 130.

[0159] In the liquid crystal element 340, the conductive layer 311b has a function of reflecting visible light, and the conductive layer 113 The light incident from the substrate 361 side is polarized by the polarizing plate 130. The light is polarized, passes through the conductive layer 113 and the liquid crystal 112, and is reflected by the conductive layer 311b. The light passes through the conductive layer 112 and the conductive layer 113 again and reaches the polarizer 130. The orientation of the liquid crystal 112 is controlled by applying a voltage between 11b and the conductive layer 113, and the optical conversion of light is performed. That is, the intensity of the light emitted through the polarizing plate 130 can be controlled. In addition, the colored layer 131 absorbs light outside a specific wavelength range. As a result, the extracted light is, for example, red light.

[0160] The light emitting element 360 is a bottom emission type light emitting element. A laminated layer in which a conductive layer 191, an EL layer 192, and a conductive layer 193b are laminated in this order from the 220 side. The conductive layer 193a is provided to cover the conductive layer 193b. The conductive layer 191 and the conductive layer 193a contain a material that reflects visible light. The light emitted by the light emitting element 360 passes through the colored layer 134, the insulating layer 220, the opening 2 51, and is emitted to the substrate 361 side through the conductive layer 113 and the like.

[0161] As shown in FIG. 19, the opening 251 is provided with a conductive layer 311a that transmits visible light. In this way, even in the area overlapping with the opening 251, the other area Since the liquid crystal 112 is oriented in the same manner as in the other regions, poor alignment of the liquid crystal occurs at the boundary between these regions. This can prevent unintended light leakage.

[0162] Here, a linear polarizer may be used as the polarizer 130 disposed on the outer surface of the substrate 361. However, a circular polarizer can also be used. For example, a linear polarizer and a 1 / 4 wavelength polarizer can be used as a circular polarizer. A laminate of retardation films can be used, which can suppress external light reflection. In addition, the cell gap of the liquid crystal element used in the liquid crystal element 340 can be adjusted depending on the type of polarizer. By adjusting the orientation, driving voltage, etc., a desired contrast can be achieved. stomach.

[0163] Moreover, an insulating layer 217 is provided on the insulating layer 216 that covers the end portion of the conductive layer 191 . The insulating layer 217 is a spacer that prevents the insulating layer 220 and the substrate 351 from getting closer than necessary. The EL layer 192 and the conductive layer 193a function as a shielding mask (metal mask). When forming the mask using a masking mask, it is necessary to prevent the mask from coming into contact with the surface on which the mask is to be formed. The insulating layer 217 may not be provided if it is not necessary.

[0164] One of the source and drain of the transistor 207 is connected to the light-emitting element 3 through the conductive layer 191. The light emitting diode 60 is electrically connected to the EL layer 192 of the light emitting diode 60 .

[0165] One of the source and drain of transistor 206 is connected to conductive layer 31 via connection 208. The conductive layer 311b and the conductive layer 311a are provided in contact with each other, and this These are electrically connected. Here, the connection portion 208 is an opening provided in the insulating layer 220. This is a portion that connects the conductive layers provided on both sides of the insulating layer 220 together via the holes.

[0166] A connection portion 204 is provided in the area where the substrate 351 and the substrate 361 do not overlap. The connecting portion 204 has the same structure as the connecting portion 208. In the connecting portion 204, the conductive layer 311 The conductive layer obtained by processing the same conductive film as in a is exposed. and the FPC 372 can be electrically connected via the connection layer 242.

[0167] A connecting portion 252 is provided in a portion of the area where the adhesive layer 141 is provided. 2, a conductive layer obtained by processing the same conductive film as the conductive layer 311a, and a conductive layer 113 A part of the wiring is electrically connected by the connector 243. A signal input from an FPC 372 connected to the substrate 351 side is input to the formed conductive layer 113. or a potential can be supplied via connection 252.

[0168] The connectors 243 may be, for example, conductive particles. The surface of particles such as organic resin or silica coated with a metal material can be used. It is preferable to use nickel or gold as the metal material, as this can reduce the contact resistance. It uses particles coated with layers of two or more metal materials, such as nickel coated with gold. It is preferable that the connector 243 is made of a material that undergoes elastic or plastic deformation. In this case, the connectors 243, which are conductive particles, are preferably arranged as shown in FIG. In this way, the connector 243 and the electrical This increases the contact area with the conductive layer that is directly connected, reducing contact resistance and preventing connection failures. The occurrence of defects can be suppressed.

[0169] The connector 243 is preferably disposed so as to be covered with the adhesive layer 141. For example, The connectors 243 may be dispersed in the previous adhesive layer 141 .

[0170] FIG. 19 shows an example of a circuit 364 in which transistors 201a and 201b are provided. For example, the transistor 201a is the same as the transistor 201 in the buffer circuit described in the first embodiment. The transistor 201b corresponds to the transistor 71 included in the embodiment 70. 1. It corresponds to the transistor 61 included in the shift register circuit 60 described in 1.

[0171] The transistor 201a can be manufactured in the same process as the transistors 205 and 206. The transistor 201b can be manufactured in the same process as the transistor 207. Cut.

[0172] Note that the transistors included in the circuit 364 and the transistors included in the display portion 362 are the same. The plurality of transistors included in the circuit 364 may all have the same structure. Alternatively, transistors of different structures may be used in combination. The plurality of transistors in 62 may all have the same structure, or may have different structures. A combination of transistors may also be used.

[0173] At least one of the insulating layer 212a and the insulating layer 213a covering the transistor and the insulating layer At least one of the insulating layer 212b and the insulating layer 213b is resistant to diffusion of impurities such as water and hydrogen. In other words, it is preferable to use a material that is less than the insulating layer 212a and the insulating layer 213a. At least one of the insulating layers 212b and 213b is a barrier film. With this configuration, the transistor can be controlled from the outside. This effectively prevents impurities from diffusing from the substrate, resulting in a highly reliable display panel. This can be achieved.

[0174] On the substrate 361 side, an insulating layer 121 is provided to cover the colored layer 131 and the light-shielding layer 132. The insulating layer 121 may also function as a planarization layer. Since the surface of the conductive layer 113 can be made approximately flat, the alignment state of the liquid crystal 112 can be made uniform.

[0175] [About each component] Each of the above components will be described below.

[0176] 〔substrate〕 A material having a flat surface can be used for the substrate of the display panel. The substrate on the side from which the light is extracted is made of a material that transmits the light. For example, glass, quartz, ceramic Materials such as aramic, sapphire, and organic resins can be used.

[0177] By using a thin substrate, it is possible to reduce the weight and thickness of the display panel. By using a substrate with a thickness that allows flexibility, a flexible display panel can be realized. can.

[0178] In addition, the substrate on the side from which light is not extracted does not need to be light-transmitting. In addition to the substrate, a metal substrate or the like can also be used. A metal substrate has high thermal conductivity, and the entire substrate Since heat can be easily conducted to the display panel, local temperature rises in the display panel can be suppressed. To obtain flexibility and bendability, the thickness of the metal substrate is preferably 10 μm or more and 200 μm or less. It is more preferable that the thickness is 20 μm or more and 50 μm or less.

[0179] The material for forming the metal substrate is not particularly limited, but examples thereof include aluminum, copper, and nickel. Metals such as aluminum alloys or stainless steel alloys are preferably used. It is possible.

[0180] In addition, insulating treatment is performed by oxidizing the surface of the metal substrate or forming an insulating film on the surface. For example, a substrate that has been subjected to a coating process such as spin coating or dipping, or an electrodeposition process may be used. The insulating film may be formed by deposition, evaporation, sputtering, or the like. In addition to leaving it in an atmosphere or heating it, an oxide film is formed on the surface of the substrate by anodizing or other methods. It may be done.

[0181] As a material that is flexible and transparent to visible light, for example, polyethylene television is used. Polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), Acrylonitrile resin, polyimide resin, polymethyl methacrylate resin, polycarbonate Polycarbonate (PC) resin, Polyethersulfone (PES) resin, Polyamide resin, Cyclohexyl Ether olefin resin, polystyrene resin, polyamide-imide resin, polyvinyl chloride resin, polytetrafluoroethylene Polytetrafluoroethylene (PTFE) resin, etc. In particular, materials with a low thermal expansion coefficient are It is preferable to use, for example, a material having a thermal expansion coefficient of 30×10 -6 / K or less polyamide Imide resin, polyimide resin, PET, etc. can be suitably used. Also, glass fiber Substrates impregnated with organic resin or substrates with inorganic fillers mixed into organic resin to reduce the coefficient of thermal expansion A substrate made of such a material is light in weight, so that the substrate can be used. This also makes it possible to reduce the weight of the display panel.

[0182] When the above materials contain fibrous bodies, the fibrous bodies are made of high strength organic or inorganic compounds. High-strength fibers are specifically fibers with high tensile modulus or Young's modulus. Representative examples include polyvinyl alcohol fibers, polyester fibers, polyamide fibers, etc. Fibers based on cellulose, polyethylene fibers, aramid fibers, polyparaphenylene benzobisoxa Examples of the fiber include sol fiber, glass fiber, and carbon fiber. Glass fiber includes E-glass. Examples of glass fibers include those made of S-glass, D-glass, Q-glass, etc. The fiber is impregnated with resin and the resin is hardened to form a structure. As a flexible substrate, a substrate made of a fiber body and a resin may be used. The use of a structure is preferable because it improves reliability against damage due to bending or local pressure. stomach.

[0183] Alternatively, glass, metal, or the like that is thin enough to be flexible can also be used as the substrate. Alternatively, a composite material in which glass and a resin material are bonded together with an adhesive layer may be used.

[0184] A hard coat layer (e.g., , silicon nitride, aluminum oxide, etc.), or a layer of material that can distribute pressure (e.g., In addition, the display element may be laminated with other materials such as a polymer resin (e.g., a methyl methacrylate resin). In order to suppress this, an insulating film with low water permeability may be laminated on a flexible substrate. For example, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, nitride An inorganic insulating material such as aluminum can be used.

[0185] The substrate may be formed by laminating a plurality of layers. In particular, when the substrate has a glass layer, This improves the barrier properties against water and oxygen, making it possible to provide a highly reliable display panel.

[0186] [Transistor] A transistor includes a conductive layer that functions as a gate electrode, a semiconductor layer, and a gate electrode that functions as a source electrode. a conductive layer acting as a drain electrode; a conductive layer acting as a gate insulating layer; The above describes the case where a bottom gate structure transistor is applied. There are.

[0187] Note that the structure of a transistor included in a display device of one embodiment of the present invention is not particularly limited. For example, a planar type transistor or a staggered type transistor may be used. Alternatively, a top-gate or bottom-gate transistor may be used. Alternatively, gate electrodes may be provided above and below the channel. It may also be used.

[0188] The crystallinity of the semiconductor material used in the transistor is not particularly limited. A semiconductor with crystallinity (microcrystalline semiconductor, polycrystalline semiconductor, single crystal semiconductor, or semiconductor with a partially crystalline region) If a semiconductor having crystallinity is used, This is preferable because it can suppress deterioration of the resistor characteristics.

[0189] In addition, the semiconductor material used for the transistor has an energy gap of 2 eV or more, and is preferably Preferably, a metal oxide having a conductivity of 2.5 eV or more, more preferably 3 eV or more can be used. A typical example is an oxide semiconductor containing indium, and for example, the CAC -OS etc. can be used.

[0190] Using oxide semiconductors with a wider band gap and lower carrier density than silicon The transistor has a low off-state current, which is The accumulated charge can be maintained for a long period of time.

[0191] The semiconductor layer may be, for example, indium, zinc, and M (aluminum, titanium, gallium, Al, yttrium, zirconium, lanthanum, cerium, tin, neodymium or halide The film can be a film represented by an In-M-Zn oxide containing a metal such as fluorine.

[0192] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of the metal elements in the sputtering target used to form the oxide film is In≧ It is preferable that M and Zn satisfy the condition M. The metal elements of such a sputtering target The atomic ratios of In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, I n:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4 .1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5 The atomic ratio of the metal elements in the semiconductor layer to be formed is preferably 1:1:8. The atomic ratio of the metal elements contained in the sputtering target is within ±40%. Includes fluctuations.

[0193] The bottom-gate transistor exemplified in this embodiment can reduce the manufacturing process. In addition, by using an oxide semiconductor, it is possible to form the oxide semiconductor at a lower temperature than polycrystalline silicon. This allows for the use of materials with low heat resistance as wiring and electrode materials below the semiconductor layer, as well as substrate materials. For example, it is possible to use a very large area A glass substrate such as the above can be suitably used.

[0194] For example, an oxide semiconductor film having a low carrier density is used as the semiconductor layer. Carrier density is 1×10 17 / cm 3 Less than 1 × 10 15 / cm 3 Below, further Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than 10 ... Such oxide semiconductors can be used as high-purity intrinsic or substantially high-purity semiconductors. This results in a low impurity concentration and a low defect state density, It can be said that this is an oxide semiconductor with stable characteristics.

[0195] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer must be carefully considered. It is preferable to appropriately set the density, atomic ratio of metal element to oxygen, interatomic distance, density, etc. stomach.

[0196] In the oxide semiconductor that constitutes the semiconductor layer, silicon and carbon, which are group 14 elements, If it is included, oxygen vacancies increase in the semiconductor layer, causing it to become n-type. The silicon and carbon concentrations in the layer (obtained by secondary ion mass spectrometry) were calculated by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0197] In addition, alkali metals and alkaline earth metals generate carriers when bonded with oxide semiconductors. This may result in an increase in the off-state current of the transistor. Alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry in body layers. The concentration of 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0198] In addition, if nitrogen is contained in the oxide semiconductor that constitutes the semiconductor layer, electrons, which are carriers, This increases the carrier density and makes it easier to become n-type. Transistors using conductors tend to be normally-on. The nitrogen concentration obtained by secondary ion mass spectrometry is 5×1018 atoms / cm 3 It is preferably made as follows. It is preferably made as follows.

[0199] Also, the semiconductor layer may have, for example, a non-single crystal structure. The non-single crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor, or C-Axis Aligned and A-B-plane Anchored Crystalline Oxide Semiconductor) having a crystal oriented along the c-axis, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and the CAAC-OS has the lowest density of defect levels. ne Oxide Semiconductor, or C-Axis Aligned d and A-B-plane Anchored Crystalline Oxi de Semiconductor), a polycrystalline structure, a microcrystalline structure, or an amorphous structure. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and the CAAC-OS has the lowest density of defect levels. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and the CAAC-OS has the lowest density of defect levels. The amorphous oxide semiconductor film has, for example, a disordered atomic arrangement and no crystal component.

[0200] <00|01449>The amorphous oxide semiconductor film has, for example, a disordered atomic arrangement and no crystal component. Or, the amorphous oxide film is, for example, a completely amorphous structure and has no crystal part. Or, the amorphous oxide film is, for example, a completely amorphous structure and has no crystal part.

[0201] Note that the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, a single layer structure or a laminated structure including any two or more of the above-described regions. Note that the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, a single layer structure or a laminated structure including any two or more of the above-described regions. Note that the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, a single layer structure or a laminated structure including any two or more of the above-described regions. Note that the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, a single layer structure or a laminated structure including any two or more of the above-described regions. <00|)1459> <Configuration of CAC-OS> Hereinafter, the configuration of CAC (Cl oud-Aligned Composite)-OS that can be used for the transistor disclosed in one aspect of the present invention will be described. Hereinafter, the configuration of CAC (Cl oud-Aligned Composite)-OS that can be used for the transistor disclosed in one aspect of the present invention will be described.

[0203] CAC-OS is a type of oxide semiconductor in which the elements constituting the oxide semiconductor are 0.5 nm to 10 nm thick. Preferably, the material is unevenly distributed in a size range of 1 nm to 2 nm or in the vicinity thereof. In the following, it is assumed that one or more metal elements are contained in the oxide semiconductor. The region containing the metal element is unevenly distributed and has a size of 0.5 nm to 10 nm, preferably 1 nm A mixed state of particles with sizes of 2 nm or less or close to that size is called a mosaic or patch state. It is also called.

[0204] Note that the oxide semiconductor preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more selected from tantalum, tungsten, magnesium, etc. It may be included.

[0205] For example, CAC-OS made of In-Ga-Zn oxide (In-Ga-Zn oxide among CAC-OS) α-Zn oxide may be specifically referred to as CAC-IGZO. (Hereinafter, InO X1 (X1 is a real number greater than 0) or indium zinc oxide In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0) . ), or gallium zinc oxide (Ga X4 Zn Y4 OZ4 (X4, Y4, and Z4 is a real number greater than 0.) The material is separated into two parts, forming a mosaic pattern. Mosaic InO X1 , or In X2 Zn Y2 O Z2 is uniformly distributed in the film This is a cloud-like configuration (hereinafter also referred to as "cloud-like").

[0206] In other words, CAC-OS is X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Compared to region 2, the concentration of In is higher.

[0207] IGZO is a common name and refers to a compound of In, Ga, Zn, and O. A typical example is InGaO3(ZnO) m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include:

[0208] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. is a non-oriented connected crystal structure.

[0209] On the other hand, CAC-OS refers to the material structure of an oxide semiconductor. In a material composition containing Ga, Zn, and O, some nanoparticles with Ga as the main component were observed. The region where the In nanoparticles are observed is shown in part. It refers to a structure in which the crystals are randomly dispersed in a mosaic pattern. Structure is a secondary factor.

[0210] It should be noted that the CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, is not included. do not have.

[0211] In addition, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 but In some cases, a clear boundary between the main component region and the main component region cannot be observed.

[0212] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium can be used. , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected elements such as sodium are included, CAC-OS will In the region, nanoparticles containing the metal element as the main component are observed, and in a part, In is the main component. The nanoparticle-like regions are randomly dispersed in a mosaic pattern. say.

[0213] CAC-OS is formed by sputtering without intentionally heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the deposition gas is The gas is selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. One or more of these may be used. The lower the flow rate ratio of the gas, the more preferable. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%. It is more preferable to set the content to 0% or more and 10% or less.

[0214] CAC-OS is a type of X-ray diffraction (XRD) measurement method. When measured using the θ / 2θ scan by the out-of-plane method, In other words, from the X-ray diffraction, the measurement region It can be seen that no orientation in the ab plane direction or the c axis direction is observed.

[0215] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron diffraction pattern obtained by irradiating the sample, a ring-shaped region with high brightness and the corresponding Several bright spots are observed in the ring region. Therefore, the electron diffraction pattern indicates that CAC-OS The crystal structure of nc (nano- It can be seen that it has a crystal structure.

[0216] For example, in the CAC-OS of In-Ga-Zn oxide, energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) EDX mapping obtained using scopy revealed that GaO X3 The region where is the principal component And, In X2 Zn Y2 O Z2 , or InOX1 The area where the main component is unevenly distributed and mixed It can be confirmed that the compound has a structure similar to that of the compound shown in FIG.

[0217] CAC-OS has a structure different from that of IGZO compounds, in which metal elements are uniformly distributed. CAC-OS has different properties from ZO compounds. X3 The main ingredients are In a certain area, X2 Zn Y2 O Z2 , or InO X1 The region where is the principal component and The phases are separated into two, and the regions containing each element as the main component are arranged in a mosaic pattern.

[0218] Here, In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component is GaO X3 This region has higher conductivity than the region where In is the main component. X2 Zn Y 2O Z2 , or InO X1 The carriers flow through the region where the main component is oxidized. Therefore, the conductivity of In is expressed as a semiconductor. X2 Zn Y2 O Z2 , or InO X The cloud-like distribution of the region where 1 is the main component in the oxide semiconductor results in a high field effect. Mobility (μ) can be achieved.

[0219] On the other hand, GaO X3 The region where the main components are In X2 Zn Y2 O Z2 , or InO X This region has higher insulating properties than the region where GaO is the main component.X3 etc. The distribution of the main component in the oxide semiconductor suppresses leakage current and provides good switching. Switching operation can be realized.

[0220] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation caused by And, In X2 Zn Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ) and high field-effect mobility (μ) This can be done.

[0221] Furthermore, semiconductor devices using CAC-OS are highly reliable. It is ideal for a variety of semiconductor devices, including displays.

[0222] Alternatively, silicon may be used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as the silicon, silicon having crystallinity is particularly preferred. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon can be formed at a lower temperature than single-crystalline silicon, It also has higher field effect mobility and higher reliability than amorphous silicon.

[0223] The bottom-gate transistor exemplified in this embodiment can reduce the manufacturing process. In this case, the use of amorphous silicon is preferable because it is lower than polycrystalline silicon. Because it can be formed at low temperatures, it is suitable for use as a material for wiring and electrodes below the semiconductor layer, as well as for substrates. This allows for the use of materials with low thermal conductivity, which broadens the range of material choices. On the other hand, a top gate type Since the impurity region of a transistor is easily formed in a self-aligned manner, variations in characteristics can be reduced. This is particularly preferable since it can reduce the amount of silicon used. It is suitable for use in

[0224] [Conductive Layer] In addition to the gate, source, and drain of the transistor, various wiring and Materials that can be used for conductive layers such as electrodes include aluminum, titanium, chromium, and the like. , nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten Examples of such materials include metals such as tin and tin, and alloys containing these as the main component. Films containing silicon can be used as single layers or as laminated structures. a single layer structure of aluminum film containing titanium, a two-layer structure of aluminum film laminated on titanium film, Two-layer structure with aluminum film laminated on stainless steel film, copper-magnesium-aluminum alloy Two-layer structure with copper film laminated on top of titanium film, two-layer structure with copper film laminated on top of titanium film, tungsten film A two-layer structure with a copper film laminated on top, a titanium film or titanium nitride film laminated on top of that, and an aluminum film laminated on top of that. A three-layer structure in which an aluminum or copper film is laminated and a titanium or titanium nitride film is formed on top of that. Structure: Molybdenum film or molybdenum nitride film with aluminum film or copper film on top Three-layer structure in which a film is laminated and then a molybdenum film or molybdenum nitride film is formed on top of that It is also possible to use oxides such as indium oxide, tin oxide, or zinc oxide. The use of copper containing manganese is preferable because it improves the controllability of the shape by etching.

[0225] Examples of the light-transmitting conductive material include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as gallium zinc oxide, zinc oxide, and gallium-doped zinc oxide, or gallium-doped zinc oxide Alternatively, gold, silver, platinum, magnesium, nickel, titanium Gold, such as copper, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium Metallic materials and alloy materials containing such metallic materials can be used. Alternatively, nitrided metallic materials can be used. It is also possible to use a material such as a metal material or an alloy material (or When using a material such as a nitride, it is sufficient to make it thin enough to have light transmission properties. For example, a laminated film of an alloy of silver and magnesium and an indium alloy can be used as the conductive layer. It is preferable to use a laminated film of tungsten oxide or the like, since this can increase the conductivity. These include conductive layers such as various wirings and electrodes that constitute the display device, and conductive layers of the display element. The conductive layer may also be used as a pixel electrode or a common electrode.

[0226] [Insulating layer] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic and epoxy. In addition to resins with siloxane bonds, silicon oxide, silicon oxynitride, and silicon nitride oxide Inorganic insulating materials such as silicon, silicon nitride, and aluminum oxide can also be used.

[0227] Furthermore, it is preferable that the light emitting element is provided between a pair of insulating films with low water permeability. This prevents impurities such as water from entering the light emitting element, and prevents a decrease in the reliability of the device. It can be controlled.

[0228] Insulating films with low water permeability include those containing nitrogen and silicon, such as silicon nitride film and silicon nitride oxide film. and films containing nitrogen and aluminum, such as an aluminum nitride film. Alternatively, a silicon nitride film, a silicon oxynitride film, an aluminum oxide film, or the like may be used.

[0229] For example, the water vapor permeation rate of a low-permeability insulating film is 1×10 -5 [g / (m 2 ·day)] Less than 1 × 10 -6 [g / (m 2 ·day)] or less, more preferably 1 × 10 -7 [g / (m 2 ·day)] or less, more preferably 1 × 10 -8 [g / (m 2 ·da y)] or less.

[0230] [Liquid Crystal Element] As the liquid crystal element, for example, a vertical alignment (VA) model A liquid crystal element to which a vertical alignment mode is applied can be used. ulti-Domain Vertical Alignment) mode, PVA(P atterned Vertical Alignment) mode, ASV (Adva nced Super View) mode can be used.

[0231] In addition, the liquid crystal element may be one that employs various modes. In addition to the VA mode, there are also TN (Twisted Nematic) and IPS (In- Plane-Switching mode, FFS (Fringe Field Switching) mode tching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optically Compensated) d Birefringence mode, FLC (Ferroelectric Li quid Crystal) mode, AFLC(AntiFerroelectric) mode A liquid crystal element in which a liquid crystal mode or the like is applied can be used.

[0232] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of the liquid crystal is due to the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal used in the liquid crystal element is Thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, polymer dispersed liquid crystal (PDLC) Polymer Dispersed Liquid Crystal, Ferroelectric Liquid Crystal These liquid crystal materials can be used as cholesteric liquid crystals depending on the conditions. The phases include nematic, smectic, cubic, chiral nematic, and isotropic phases.

[0233] The liquid crystal material may be either a positive type liquid crystal or a negative type liquid crystal. The optimum liquid crystal material may be used depending on the mode and design to be applied.

[0234] In addition, an alignment film can be provided to control the alignment of the liquid crystal. When using a liquid crystal, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of a cholesteric liquid crystal is increased, the phase transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range. To improve this, a liquid crystal composition containing several weight percent or more of a chiral agent is used in the liquid crystal layer. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response time and optically isotropic In addition, the liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent does not require alignment treatment. The viewing angle dependency is small. Also, no alignment film is required, so rubbing treatment is not required. Therefore, electrostatic breakdown caused by the rubbing treatment can be prevented. This reduces defects and damage to the liquid crystal display device during the manufacturing process.

[0235] The liquid crystal element may be a transmissive liquid crystal element, a reflective liquid crystal element, or a semi-transmissive liquid crystal element. Children, etc. can be used.

[0236] In one embodiment of the present invention, a reflective liquid crystal element can be used in particular.

[0237] When using a transmissive or semi-transmissive liquid crystal element, two polarizing plates are placed between a pair of substrates. A backlight is provided on the outside of one of the polarizing plates. The backlight may be a direct type or an edge-lit type. Direct backlight with LED (Light Emitting Diode) Using light makes local dimming easier and increases contrast. In addition, when an edge-light type backlight is used, the This is preferable because it allows the thickness of the module to be reduced.

[0238] When a reflective liquid crystal element is used, a polarizing plate is provided on the display surface side. It is preferable to place a light diffusion plate on the display surface side, since this improves visibility.

[0239] In addition, when using a reflective or semi-transmissive liquid crystal element, the front A front light may be provided. An edge light type front light is used. It is preferable to use a flashlight equipped with an LED (Light Emitting Diode). The use of a front light is preferable because it reduces power consumption.

[0240] [Light-emitting element] The light emitting element can be a self-luminous element that can be illuminated by current or voltage. This category includes elements whose intensity can be controlled. For example, LEDs, organic EL elements, inorganic EL elements An element or the like can be used.

[0241] The light emitting element is available in top emission, bottom emission, and dual emission types. The electrode on the light extraction side uses a conductive film that transmits visible light. It is preferable to use a conductive film that reflects visible light for the electrode on the non-exposed side.

[0242] The EL layer has at least a light-emitting layer. The EL layer has a layer other than the light-emitting layer that has a high hole injection property. materials with high hole transporting properties, hole blocking materials, materials with high electron transporting properties, and electron injecting properties materials with high electron transporting and hole transporting properties, or bipolar materials (materials with high electron transporting and hole transporting properties), etc. The film may further include a layer containing

[0243] The EL layer can be made of either low molecular weight compounds or high molecular weight compounds. The layers constituting the EL layer may each be formed by a deposition method (including a vacuum deposition method). The layer can be formed by a method such as a transfer method, a printing method, an ink jet method, or a coating method.

[0244] When a voltage higher than the threshold voltage of the light-emitting element is applied between the cathode and anode, the EL layer is charged from the anode side. Holes are injected from the cathode side and electrons are injected from the cathode side. The injected electrons and holes are Upon recombination, the light-emitting material contained in the EL layer emits light.

[0245] When a white light emitting element is used as the light emitting element, two or more types of light emitting materials are used in the EL layer. For example, the light emitted from two or more luminescent materials has a complementary color relationship. White light can be obtained by selecting a light-emitting material so that These are luminescent materials that emit light in R (red), G (green), B (blue), Y (yellow), O (orange), etc. Among luminescent materials that emit light containing spectral components of two or more colors of R, G, and B, It is preferable that the spectrum of light emitted from the light-emitting element includes wavelengths in the visible light region. A light-emitting element having two or more peaks in a wavelength range (for example, 350 nm to 750 nm) is used. It is preferable to use a material having a peak in the yellow wavelength region. Preferably, the material has spectral components in the green and red wavelength regions as well.

[0246] The EL layer is made up of a light-emitting layer containing a light-emitting material that emits one color and a light-emitting layer containing a light-emitting material that emits another color. For example, a plurality of light-emitting layers in the EL layer may be stacked. The light-emitting materials may be stacked in contact with each other or may be stacked with an area that does not contain any light-emitting material interposed therebetween. For example, a fluorescent-emitting layer or a phosphorescent-emitting layer may be layered between the fluorescent-emitting layer and the phosphorescent-emitting layer. The phosphorescent layer contains the same materials as those of the phosphorescent layer (for example, a host material and an assist material) and A region that does not contain the material may be provided. This makes it easier to manufacture the light-emitting element. Also, the driving voltage is reduced.

[0247] The light-emitting element may be a single element having one EL layer, or a light-emitting element having multiple EL layers. A tandem element may be used in which the charge generating layers are stacked one on top of the other.

[0248] The conductive film that transmits visible light is made of, for example, indium oxide, indium tin oxide, or indium It can be formed using zinc oxide, zinc oxide, zinc oxide doped with gallium, etc. Also, gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, Metallic materials such as iron, cobalt, copper, palladium, or titanium, and alloys containing these metallic materials Gold or nitrides of these metal materials (for example, titanium nitride) can also be used to a degree that they have translucency. It can be used by forming it thin. Also, a laminated film of the above materials can be used as a conductive layer. For example, a laminated film of an alloy of silver and magnesium and indium tin oxide can be used. In this case, it is preferable to use graphene or the like, since the conductivity can be increased. .

[0249] The conductive film that reflects visible light is made of, for example, aluminum, gold, platinum, silver, nickel, or tungsten. Metallic materials such as zinc, chromium, molybdenum, iron, cobalt, copper, or palladium, or In addition, the above metal materials and alloys may contain lanthanum. Titanium, neodymium, germanium, etc. may be added. Alternatively, an alloy containing neodymium and aluminum (aluminum alloy) may be used. Alternatively, an alloy containing copper, palladium, magnesium, and silver may be used. is preferable because of its high heat resistance. By laminating a metal film or a metal oxide film on the surface, oxidation can be suppressed. Examples of materials for such metal films and metal oxide films include titanium and titanium oxide. Alternatively, the conductive film that transmits visible light and a film made of a metal material may be laminated. For example, silver and Indium tin oxide laminated film, silver-magnesium alloy and indium tin oxide laminated film, etc. etc. can be used.

[0250] The electrodes may be formed by evaporation or sputtering. It is formed using a discharge method such as the ink jet method, a printing method such as the screen printing method, or a plating method. It can be achieved.

[0251] The above-mentioned light-emitting layer, the substance having a high hole injection property, the substance having a high hole transport property, and the electron The layer containing a substance having a high transport property, a substance having a high electron injection property, a bipolar substance, or the like is These include inorganic compounds such as quantum dots and polymer compounds (oligomers, dendrimers, polymers, etc.). For example, by using quantum dots in the light-emitting layer, It can also function as

[0252] The quantum dot materials include colloidal quantum dot materials, alloy quantum dot materials, and A shell-type quantum dot material, a core-type quantum dot material, etc. can be used. Materials containing elements from groups 12 and 16, 13 and 15, or 14 and 16 are used. Alternatively, cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead Quantum dot materials containing elements such as gallium, arsenic, and aluminum may also be used.

[0253] [Adhesive layer] The adhesive layer may be a photo-curable adhesive such as an ultraviolet curable adhesive, a reaction-curable adhesive, or a heat-curable adhesive. Various curing adhesives such as elastomeric adhesives and anaerobic adhesives can be used. epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide Resin, PVC (Polyvinyl Chloride) Resin, PVB (Polyvinyl Butyral) Resin, EV A (ethylene vinyl acetate) resins, etc. In particular, epoxy resins, etc., which have high moisture permeability, A material with low viscosity is preferable. Two-component resin may also be used. An adhesive sheet or the like may also be used. It's fine.

[0254] The resin may also contain a desiccant. For example, an alkaline earth metal oxide (oxide Use a substance that absorbs water by chemical adsorption, such as calcium or barium oxide. Alternatively, materials such as zeolite and silica gel can absorb moisture by physical adsorption. If a desiccant is included, impurities such as moisture may penetrate into the element. This is preferable because it can prevent the occurrence of such a problem and improve the reliability of the display panel.

[0255] In addition, by mixing a filler with a high refractive index or a light scattering material into the resin, it is possible to improve the light extraction efficiency. For example, titanium oxide, barium oxide, zeolite, silica Co, etc. can be used.

[0256] [Connection layer] The connection layer is made of anisotropic conductive film (ACF). tive Film) and Anisotropic Conductive Paste (ACP) Inductive Paste) can be used.

[0257] [Colored layer] Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples of such materials include resin materials.

[0258] [Light blocking layer] Materials that can be used for the light-shielding layer include carbon black, titanium black, gold, Examples of the light-shielding layer include metals, metal oxides, and composite oxides including solid solutions of multiple metal oxides. The film may be a film containing a resin material, or may be a thin film made of an inorganic material such as a metal. For example, a laminated film of a film containing a material of a colored layer may be used as the light-shielding layer. A film containing a material used for a color layer that transmits light of a certain color and a material used for a color layer that transmits light of another color are used. By using the same material for the colored layer and the light-shielding layer, This is preferable because it allows the equipment to be standardized and the process to be simplified.

[0259] This embodiment may be appropriately combined with at least a part of another embodiment described in this specification. It can be implemented in combination.

[0260] (Embodiment 5) Examples of electronic devices that can use the display device according to one embodiment of the present invention include display devices, personal computers, and the like. a personal computer, an image storage device or image reproduction device equipped with a recording medium, a mobile phone, a mobile phone Game consoles, including those with a camcorder, portable data terminals, e-book terminals, video cameras, digital still cameras Cameras such as cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio players, etc.), copying machines, fax machines, printers, printer-combined machines, automated teller machines (ATMs), Examples of such electronic devices include vending machines. Specific examples of these electronic devices are shown in Figure 20.

[0261] FIG. 20A shows a video camera, which includes a first housing 971, a second housing 972, a display unit 973, The operation key 974, the lens 975, the connection part 976, etc. 975 is provided in the first housing 971, and the display unit 973 is provided in the second housing 972. The display device of one embodiment of the present invention is provided in the display portion 973 of the video camera. This improves outdoor visibility and reduces power consumption.

[0262] FIG. 20B shows a portable game machine, which includes a housing 901, a housing 902, a display unit 903, and a display unit 904, microphone 905, speaker 906, operation keys 907, stylus 908, camera 9 9. Note that the portable game machine shown in FIG. 20(B) has two display units 903 and Although the portable game machine has a display unit 904, the number of display units that the portable game machine has is not limited to this. The display device of one embodiment of the present invention is provided in the display portion 903 of the portable game console. This improves outdoor visibility and reduces power consumption.

[0263] FIG. 20C shows a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, and a microphone 964. 63, a speaker 967, a display unit 965, operation keys 966, etc. By providing the display device of one embodiment of the present invention in the display portion 965 in the This allows for higher speeds and lower power consumption.

[0264] FIG. 20D shows a wristwatch-type information terminal, which includes a housing 931, a display unit 932, a wristband 9 33, operation buttons 935, a crown 936, a camera 939, etc. The display unit 932 of the information terminal may be a touch panel. By providing a display device, visibility can be improved even outdoors. This allows for improved design.

[0265] FIG. 20(E) shows an example of a mobile phone, which includes a housing 951, a display unit 952, an operation button 953, It has an external connection port 954, a speaker 955, a microphone 956, a camera 957, etc. The mobile phone has a touch sensor on the display unit 952. All operations such as touching the display 952 with a finger or a stylus are performed. The display device of one embodiment of the present invention can be provided in the display portion 952 of the mobile phone. This improves visibility outdoors. The ink-in property can be improved.

[0266] FIG. 20F shows a portable data terminal, which includes a housing 911, a display portion 912, a camera 919, and the like. The display portion 912 has a touch panel function that allows input and output of information. When the display unit 912 of the portable data terminal is provided with the display device of one embodiment of the present invention, This improves visibility even outdoors. It also allows for a narrower frame, making the display more compact. It is possible.

[0267] This embodiment may be appropriately combined with at least a part of another embodiment described in this specification. It can be implemented in combination. [Explanation of symbols]

[0268] 10 Display device 11 Display device 20 PCB 21 Wiring 22 Wiring 25 Planarization film 27 Conductive layer 30 pixel circuit 31 Display section 40 Drive circuit 40a layer 40b layer 41 Wiring 42a Drive circuit 42b Drive circuit 45 pixel units 46 pixel circuit 46B Display element 46G display element 46R display element 47 Pixel Circuit 47B Display element 47G display element 47R display element 50 Drive circuit 51 Wiring 55 light 60 Shift register circuit 61 Transistor 62 Semiconductor layer 63 gate electrode 64 Source electrode 65 Drain electrode 66 Connection 68 Conductive Layer 69 Gate insulating film 70 Buffer circuit 71 Transistor 72 Semiconductor layer 73 Gate electrode 74 Drain electrode 75 Source electrode 76a Connection 76b Connection 77 Conductive Layer 78 Conductive Layer 79 Gate insulating film 81 Signal line 82 signal line 83 Signal Line 84 signal line 85 Wiring 90 Pulse signal output circuit 91 Input terminal 92 input terminals 93 Input terminal 94 input terminals 95 Input terminal 96 Output terminal 97 Output terminal 98 Power line 99 Power line 101 Transistor 102 transistor 103 Transistor 104 transistors 105 transistors 106 transistors 107 Transistor 108 transistors 109 Transistor 110 Transistor 111 Transistor 112 LCD 113 Conductive Layer 117 Insulating Layer 121 Insulating layer 130 Polarizing Plate 131 Colored layer 132 Light blocking layer 133a Alignment film 133b Alignment film 134 Colored layer 141 Adhesive layer 142 Adhesive layer 191 Conductive layer 192 EL layer 193a conductive layer 193b Conductive layer 200 Pulse signal generation circuit 201 Input signal generation circuit 201a Transistor 201b Transistor 202 Input signal generation circuit 203 Buffer Circuit 204 Connection 205 Transistor 206 Transistor 207 Transistor 208 Connection 211a Insulating layer 211b insulating layer 212a Insulating layer 212b insulating layer 213a Insulating layer 213b insulating layer 214a Insulating layer 214b insulating layer 215 Insulating Layer 216 Insulating Layer 217 Insulating Layer 220 Insulating layer 221 Conductive layer 222 Conductive layer 231 Semiconductor layer 242 Connection Layer 243 Connectors 251 Aperture 252 Connection 300 Display Panel 311 Electrode 311a conductive layer 311b Conductive layer 340 Liquid Crystal Devices 351 Circuit Board 360 Light-emitting element 360b Light-emitting element 360g light emitting element 360r light emitting element 360w light emitting element 361 Circuit Board 362 Display section 364 circuits 365 Wiring 372 FPC 373 IC 400 display device 410 pixels 451 Aperture 901 Case 902 Case 903 Display section 904 Display section 905 Microphone 906 Speaker 907 Operation Key 908 Stylus 909 Camera 911 chassis 912 Display section 919 Camera 931 Case 932 Display section 933 Wristband 935 Button 936 Crown 939 Camera 951 Case 952 Display section 953 Operation Button 954 External connection port 955 Speaker 956 Mike 957 Camera 961 Case 962 Shutter button 963 Mike 965 Display section 966 Operation Key 967 Speaker 971 Case 972 case 973 Display section 974 Operation Key 975 Lens 976 Connection

Claims

[Claim 1] A display device having a pixel circuit and a drive circuit provided on the same surface, the drive circuit has a selection circuit and a buffer circuit; the selection circuit includes a first transistor; the buffer circuit has a second transistor; the first transistor and the second transistor have an overlapping region; one of the source and the drain of the first transistor is electrically connected to the gate of the second transistor; a display device in which one of a source and a drain of the second transistor is electrically connected to the pixel circuit;

Citation Information

Patent Citations

  • Pulse generation circuit and semiconductor device

    JP2014211621A