Display panel and display device

Abstract

The present application improves the performance of the display panel.SOLUTION: The display panel includes a display area and a non-display area, an array substrate, an isolation structure, a plurality of sub-pixels, a plurality of virtual pixels and a touch component, the array substrate includes a base substrate and a driving circuit layer, the driving circuit layer is disposed on one side of the base substrate and includes a driving circuit line, the isolation structure is disposed on the array substrate and includes a first isolation structure located in the display area and a second isolation structure located in the non-display area, a plurality of isolation openings are provided in the first isolation structure and the second isolation structure, and each sub-pixel includes a light-emitting structure and a first electrode that are located in the display area and that are stacked. The light-emitting structure is located in the isolation opening of the first isolation structure, each virtual pixel is located in the non-display area and includes a first virtual electrode, the driving circuit line on the base substrate at least partially overlaps with an orthographic projection of the virtual pixel on the base substrate, and at least a part of the touch component is located on a side of the first electrode and the first virtual electrode away from the array substrate.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present application relates to the field of display technology, and in particular to display panels and display devices. [Background technology]

[0002] Flat panel displays based on technologies such as organic light-emitting diodes (OLEDs) and light-emitting diodes (LEDs) have become the mainstream display device, being widely used in a variety of consumer electronic products such as mobile phones, televisions, laptop computers, and desktop computers due to their advantages such as high image quality, low power consumption, thinness, and wide range of applications.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention [Problem to be solved by the invention]

[0004] The present application provides a display panel and a display device that can improve the performance of the display panel. [Means for solving the problem]

[0005] A first aspect of an embodiment of the present application provides a display panel, the display panel having a display area and a non-display area, the display panel including an array substrate, an isolation structure, a plurality of sub-pixels, a plurality of virtual pixels, and a touch component, the isolation structure including a first isolation structure located in the display area and a second isolation structure located in the non-display area, the first isolation structure and the second isolation structure both being provided on the array substrate, and a plurality of isolation openings being provided in the first isolation structure and the second isolation structure, each sub-pixel being located in the display area and including a light-emitting structure and a first electrode that are stacked, the light-emitting structure being located in the isolation opening of the first isolation structure, each virtual pixel being located in the non-display area and including a first virtual electrode, and at least a portion of the touch component being located on a side of the first electrode and the first virtual electrode that is away from the array substrate.

[0006] In some embodiments, the second isolation structure includes a conductive material, the first virtual electrode is electrically connected to the conductive material of the second isolation structure, and the second isolation structure is electrically connected to a first voltage power supply signal line of the display panel; Preferably, the first isolation structure includes a conductive material, the first isolation structure is electrically connected to the second isolation structure, and the second isolation structure is electrically connected to the first voltage power supply signal line via the first isolation structure; Alternatively, the first isolation structure and the second isolation structure are insulated from each other, and the second isolation structure is connected to the first voltage power supply signal line.

[0007] In some embodiments, each virtual pixel further includes a virtual light-emitting portion located within the isolation opening of the second isolation structure, the virtual light-emitting portion located on a side of the first virtual electrode closer to the array substrate; Preferably, the subpixel further includes a second electrode, and the second electrode, the light-emitting structure, and the first electrode are stacked in order along a direction away from the array substrate; Preferably, the virtual pixel further includes a second virtual electrode, and the second virtual electrode, the virtual light-emitting portion, and the first virtual electrode are stacked in order along a direction away from the array substrate, and in the second electrode and the second virtual electrode, a second voltage power supply signal line of the display panel is electrically connected only to the second electrode; Preferably, the first electrode and the first virtual electrode are co-located.

[0008] In some embodiments, the non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, the display area is arranged around at least a part of the hole frame area, and the virtual pixel is located in the hole frame area; or the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged along the periphery of the display area, and the virtual pixels are located in the display frame area of ​​the display panel; Optionally, the second isolation structure is disposed around the light-transmitting hole in a circumferential direction; Optionally, a first gap exists between the second isolation structure and an edge of the light-transmitting hole.

[0009] In some embodiments, the display panel further includes a shielding structure located in the non-display area, the shielding structure being disposed on a side of the second isolation structure away from the first isolation structure in a direction parallel to the array substrate; Optionally, the isolation opening is provided only in the first isolation structure and the second isolation structure; Optionally, the third virtual electrode is disposed on a side of the shielding structure away from the array substrate, the third virtual electrode and the first virtual electrode being disposed on the same layer; Optionally, an orthogonal projection of an outer contour of the touch component on the array substrate is located within a range of an orthogonal projection of an outer contour of the shielding structure on the array substrate; Optionally, the non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, and the shielding structure is located in the hole frame area and arranged around the light-transmitting hole; Optionally, the second isolation structure is disposed around and along a periphery of the shielding structure; Optionally, there is a second gap between the shielding structure and an edge of the light-transmitting hole; Optionally, the display panel further includes a first bank, the first bank being located in the aperture frame region and arranged around the light-transmitting aperture, and an orthogonal projection of the shielding structure on the array substrate being located outside the area surrounded by the first bank, or a part of the orthogonal projection of the shielding structure on the array substrate being located within the area surrounded by the first bank; Optionally, the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged around the periphery of the display area, and the shielding structure is located in the display frame area and is arranged around the periphery of the second separation structure; Optionally, the display panel further includes second banks, the second banks being located in the display frame region and arranged around the periphery of the display region, and an orthogonal projection of the shielding structure on the array substrate being located within the region surrounded by the second banks, or a part of the orthogonal projection of the shielding structure on the array substrate being located outside the region surrounded by the second banks; Optionally, the first isolation structure, the second isolation structure and the shielding structure are disposed in the same layer.

[0010] In some embodiments, a first groove located in a non-display area is provided on the array substrate, and an orthogonal projection of the first groove on the array substrate is located within a range of an orthogonal projection of the shielding structure on the array substrate; Optionally, a second groove is provided on the array substrate, the second groove being located in the non-display area, the second groove being farther away from the display area than the first groove; Optionally, the orthogonal projection of the second groove on the array substrate is located outside the range of the orthogonal projection of the shielding structure on the array substrate.

[0011] In some embodiments, the array substrate further includes a base substrate, wherein the driving circuit layer is disposed on one side of the base substrate, the driving circuit layer includes driving circuit lines, and the orthogonal projections of the driving circuit lines on the base substrate and the orthogonal projections of the virtual pixels on the base substrate at least partially overlap; Optionally, an orthogonal projection of the drive circuit line on the base substrate is located within a range of an orthogonal projection of the virtual pixel and the second isolation structure on the base substrate; Optionally, the display panel includes a shielding structure located in the non-display area, the shielding structure being disposed on a side of the second isolation structure away from the first isolation structure in a direction parallel to the array substrate, and the driving circuit lines being provided in a region of the array substrate corresponding to the second isolation structure; Optionally, the isolation opening is provided only in the first isolation structure and the second isolation structure; Optionally, the orthogonal projection of the shielding structures on the array substrate is located outside the orthogonal projection of the drive circuit lines on the array substrate.

[0012] In some embodiments, the first isolation structure and the second isolation structure are disposed in the same layer; Optionally, both the first isolation structure and the second isolation structure include a support layer and a shielding layer sequentially arranged in a direction away from the substrate; Optionally, an orthogonal projection of the support layer on the array substrate is located within a range of an orthogonal projection of the shielding layer on the array substrate, and a projected area of ​​the support layer on the array substrate is smaller than a projected area of ​​the shielding layer on the array substrate; Optionally, a cross-sectional area of ​​the support layer gradually increases in a direction perpendicular to and pointing towards the array substrate; Optionally, the cross-sectional area of ​​the shielding layer gradually increases in directions perpendicular to and pointing towards the array substrate.

[0013] In some embodiments, the display panel further includes a first encapsulating layer, the first encapsulating layer being disposed on a side of the isolation structure away from the array substrate; Optionally, the first encapsulation layer covers at least a portion of a sidewall surface of the isolation structure; Optionally, the first encapsulating layer comprises an inorganic material; Optionally, the display panel further comprises a second encapsulating layer, the second encapsulating layer being disposed on a side of the first encapsulating layer remote from the array substrate; Optionally, the second encapsulation layer comprises an organic material; Optionally, the display panel further includes a bank, the bank being provided on the array substrate and located in the non-display area, the bank being arranged around the periphery of the second sealing layer; Optionally, the non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, and the bank includes a first bank, the first bank being located in the hole frame area and arranged around the light-transmitting hole; and / or the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged around the periphery of the display area, the bank includes a second bank, the second bank is located in the display frame area and is arranged around the periphery of the display area, Optionally, the orthogonal projection of the second isolation structure on the array substrate is located within the orthogonal projection of the second bank on the array substrate.

[0014] A second aspect of an embodiment of the present application provides a display device, the display device including the display panel of any of the above embodiments.

[0015] An embodiment of the present application provides a display panel and a display device. The isolation structure of the display panel in this embodiment includes a first isolation structure located in the display area and a second isolation structure located in the non-display area. By providing a virtual pixel in the non-display area, the virtual pixel includes a virtual light-emitting portion and a first virtual electrode stacked together, and the virtual light-emitting portion is located within the isolation opening of the second isolation structure. The second isolation structure and the virtual pixel can shield signals between the touch component in the non-display area and the array substrate. Furthermore, the isolation opening of the second isolation structure allows unreleased water vapor in the lower film layer to be fully released before deposition, thereby avoiding peeling of the film layer structure due to expansion and deformation of the film layer structure caused by water vapor. Second, during fabrication of the light-emitting structure, the light-emitting material deposited within the isolation opening of the second isolation structure forms the virtual light-emitting portion, eliminating the need to separately remove the virtual light-emitting portion by a process such as etching. This simplifies the process and improves production efficiency. [Brief explanation of the drawings]

[0016] In order to more clearly describe the technical solutions in the embodiments of the present application, the following briefly describes the drawings that need to be used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. Those skilled in the art can obtain other drawings from these drawings without any creative efforts. [Figure 1] FIG. 2 is a top view of a display panel provided by some embodiments of the present application. [Figure 2] 1 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application. [Figure 3] 3 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application from another angle. [Figure 4] 1 is a top view of a portion of a display panel provided by some embodiments of the present application. [Figure 5] FIG. 10 is a schematic cross-sectional view of a display panel provided by another embodiment of the present application. [Figure 6] 1 is a schematic cross-sectional view of a display panel provided by some further embodiments of the present application. [Figure 7] 1 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application. [Figure 8] FIG. 10 is a top view of another portion of a display panel provided by some embodiments of the present application. [Figure 9] 1 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application. [Figure 10] 1 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application. [Figure 11] FIG. 10 is a top view of another portion of a display panel provided by some embodiments of the present application. [Figure 12] 1 is a schematic cross-sectional view of a display panel provided by some embodiments of the present application. [Figure 13] FIG. 10 is a top view of a display panel provided by another embodiment of the present application. [Figure 14]FIG. 10 is a top view of a portion of a display panel provided by another embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0017] The embodiments of the present application will be described in more detail below in conjunction with the accompanying drawings and embodiments. The detailed description of the following embodiments and the accompanying drawings are used to explain the principles of the present application, but are not used to limit the scope of the present application. That is, the present application is not limited to the described embodiments.

[0018] In the description of this application, "plurality" means two or more unless otherwise clearly and specifically defined. Directions or positional relationships indicated by terms such as "upper," "lower," "left," "right," "inner," and "outer" are for convenience and simplicity of description only and are not intended to suggest or imply that the referenced devices or elements must have a particular orientation or be constructed or operated in a particular orientation, and therefore should not be construed as limitations on this application. Furthermore, terms such as "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. "Perpendicular" does not mean perpendicular in the strict sense, but is perpendicular within a margin of error. "Parallel" does not mean parallel in the strict sense, but is parallel within a margin of error.

[0019] Reference to an "embodiment" herein means that a particular feature, structure, or characteristic described in connection with that embodiment may be included in at least one embodiment of the present application. The appearances of this phrase in various places in the specification do not necessarily all refer to the same embodiment, nor are they separate or alternative embodiments mutually exclusive from other embodiments. Those skilled in the art will understand, either explicitly or implicitly, that the embodiments described herein can be combined with other embodiments.

[0020] The directional terms used in the following description refer to the directions shown in the drawings and are not intended to limit the specific configuration of the present application. It should be noted that in the description of the present application, unless otherwise clearly specified and limited, the terms "attached," "connected," and "connected" should be understood in a broad sense, and may refer to, for example, a fixed connection, a detachable connection, an integral connection, a direct connection, or an intermittent connection via an intermediate medium. Those skilled in the art will understand the specific meanings of the above terms depending on the specific circumstances.

[0021] In some display panels, the presence of an isolation structure allows for the omission of a precision mask when depositing the light-emitting structure. However, to fabricate subpixels of different colors, subpixels of a specific color must first be deposited on the entire surface of the display panel. Then, an etching process is performed on the pixel openings on the display panel for setting the subpixels to other colors, removing the cathodes and light-emitting structures of the subpixels set to the other colors. The above process is then repeated for each subpixel set to a different color to form subpixels of different colors. Since no isolation structure is installed in the non-display area of ​​the display panel, when the cathodes of the subpixels set to other colors are removed, the cathodes in the non-display area are also etched and removed, resulting in signal interference from the array substrate to the touch component and degrading the performance of the display panel.

[0022] An embodiment of the present application provides a display panel, which may be an organic light emitting diode (OLED) display panel, or other types of display panels such as a micro light emitting diode (Micro-LED) or quantum light emitting diode (QLED) display panel.

[0023] 1 to 4 , a first embodiment of the present application provides a display panel 100. The display panel 100 has a display area AA and a non-display area NA. The display area AA includes an array substrate 10, an isolation structure 20, a plurality of subpixels 30, a plurality of virtual pixels 40, and a touch component 60. The array substrate 10 includes a driving circuit layer 12. The isolation structure 20 includes a first isolation structure 21 located in the display area AA and a second isolation structure 22 located in the non-display area NA. Both the isolation structure 21 and the second isolation structure 22 are provided on the array substrate 10, and a plurality of isolation openings 20a are provided in the isolation structure 21 and the second isolation structure 22. Each sub-pixel 30 is located in the display area AA and includes a stacked light-emitting structure 31 and a first electrode E1. The light-emitting structure 31 is located in the isolation opening 20a of the first isolation structure 21. Each virtual pixel 40 is located in the non-display area NA and includes a first virtual electrode C1. At least a portion of the touch component 60 is located on the side of the first electrode E1 and the first virtual electrode C1 away from the array substrate 10.

[0024] The array substrate 10 includes a base substrate 11 and a drive circuit layer 12 provided on the base substrate 11. The base substrate 11 may be a rigid substrate 11 made of glass, plastic, or the like, or a flexible substrate 11 made of polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP). The drive circuit layer 12 is provided with a drive circuit for controlling the light emission of the light-emitting structure 31. The drive circuit layer 12 is generally composed of inorganic film layers such as a metal layer, a semiconductor layer (active layer), and an insulating layer. The drive circuit for controlling the light emission of the light-emitting structure 31 can be formed by patterning these inorganic film layers. There are many methods for implementing specific circuit structures, but these will not be described in detail here.

[0025] Each subpixel 30 further includes a second electrode E2. The second electrode E2, the light-emitting structure 31, and the first electrode E1 are sequentially arranged away from the array substrate 10. A plurality of first electrodes E1 may be continuously formed as one layer, or the plurality of first electrodes E1 may be spaced apart. A thin film transistor TFT is provided on the driving circuit layer 12 of the array substrate 10, and the second electrode E2 is electrically connected to the thin film transistor TFT. After the second electrode E2 and the first electrode E1 are energized, the second electrode E2 functions as an anode, and the first electrode E1 functions as a cathode, and the thin film transistor TFT drives the light-emitting structure 31 to emit light.

[0026] The light-emitting structure 31 can be formed by stacking multiple film layer structures, and for example, the light-emitting structure 31 can include a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer, an electron injection layer (EIL), and an electron transport layer (ETL) arranged in a stacked manner.

[0027] In some embodiments, the display panel 100 further includes a pixel definition layer 50 disposed on one side of the array substrate 10. The pixel definition layer 50 includes a pixel definition portion 51 and a pixel opening 52 surrounded by the pixel definition portion 51. The light-emitting structure 31 and the virtual light-emitting portion 41 are each disposed within the pixel opening 52, and the isolation structure 20 is disposed on the opposite side of the pixel definition portion 51 from the array substrate 10. The display area AA refers to an area capable of displaying an image, and subpixels 30 are disposed in the display area AA. The non-display area NA refers to an area not capable of displaying an image, and is typically used for arranging wiring, cameras, binding terminals, test terminals, etc. For example, the non-display area NA may be surrounded along the periphery of the display area AA as an outer frame of the display panel 100, or the non-display area NA may be surrounded by the display area AA as an area of ​​the display panel 100 corresponding to a camera.

[0028] The isolation structure 20 may have a wide top and a narrow bottom, or may have a concave sidewall, as long as the evaporation material can be continuously deposited on the sidewall of the isolation structure 20. For example, the vertical cross section of the isolation structure 20 may be an inverted trapezoid, an X-shape, a T-shape, an I-shape, or the like.

[0029] The isolation structure 20 may extend to the non-display area NA and includes a first isolation structure 21 and a second isolation structure 22. The non-display area NA includes a first sub-area NA3, and the isolation structure 20 located in the display area AA is the first isolation structure 21, while the isolation structure 20 located in the first sub-area NA3 is the second isolation structure 22. A separation opening 20a is formed in the isolation structure 20, and the light emitting structure 31 is located in the separation opening 20a of the first isolation structure 21. The plurality of separation openings 20a formed by being surrounded by the first isolation structure 21 may correspond one-to-one to the plurality of light emitting structures 31, or the separation opening 20a formed by being surrounded by the first isolation structure 21 may correspond to the plurality of light emitting structures 31, i.e., the plurality of light emitting structures 31 are disposed in the separation opening 20a formed by being surrounded by the first isolation structure 21.

[0030] In some embodiments, each virtual pixel 40 further includes a virtual light-emitting portion 41 located in the separation opening of the second isolation structure, where the virtual light-emitting portion 41 is located on a side of the first virtual electrode C1 closer to the array substrate 10. The virtual light-emitting portion 41 is located in the separation opening 20a of the second isolation structure 22. The plurality of separation openings 20a formed by being surrounded by the second isolation structure 22 may correspond one-to-one to the plurality of virtual light-emitting portions 41, or the plurality of separation openings 20a formed by being surrounded by the second isolation structure 22 may correspond to the plurality of virtual light-emitting portions 41, that is, the plurality of virtual light-emitting portions 41 are provided in the separation opening 20a formed by being surrounded by the second isolation structure 22.

[0031] Specifically, in the manufacturing process of the display panel 100, the isolation structure 20 is typically formed first, and then the light-emitting structure 31 can be directly deposited without using a mask. In this process, due to the presence of the isolation structure, a portion of the light-emitting structure 31 is evaporated into the isolation opening 20a, and a portion of the light-emitting material is evaporated on the side of the isolation structure 20 away from the array substrate 10. As a result, the light-emitting material on different sides of the isolation structure 20 in the direction parallel to the plane of the array substrate 10 is discontinuous, and the light-emitting structures 31 can be separated from each other without the need for a mask. The deposition of the light-emitting structure 31 does not require the use of a precision mask, which reduces costs, lowers the requirements for mask processing precision, avoids the shadow effect caused by the deposition of the light-emitting layer with a precision mask, and reduces the spacing between subpixels 30, thereby improving the brightness of the display panel 100. Furthermore, because the electron transport layer, electron injection layer, hole transport layer, hole injection layer, etc. of the light-emitting structure 31 are all separated by the isolation structure 20, crosstalk between the subpixels 30 can be prevented, improving the display effect of the display panel 100. Because the virtual pixels 40 and the subpixels 30 can be simultaneously manufactured in the same manufacturing process, there is no need to add additional masks, simplifying the manufacturing process of the display panel 100 and improving manufacturing efficiency of the display panel. When preparing the light-emitting structure 31, the light-emitting material deposited in the separation openings 20a of the second isolation structure 22 forms the virtual light-emitting portions 41, eliminating the need to remove the virtual light-emitting portions 41 by a separate process such as etching, simplifying the process and improving production efficiency.

[0032] The second isolation structure 22 and the virtual pixel 40 can shield signals between the touch component 60 located in the non-display area NA and the array substrate 10, not only reducing interference with touch signals, but also the isolation openings 20a of the second isolation structure 22 can completely release unreleased water vapor in the lower film layer before evaporation, preventing the film layer structures from being separated from each other due to expansion and deformation of the film layer structures caused by water vapor, thereby improving the performance of the display panel 100.

[0033] In some embodiments, the first isolation structure 21 includes a conductive material. The first isolation structure 21 is connected to a first voltage power supply signal line of the display panel 100.

[0034] Each first electrode E1 is electrically connected via the first isolation structure 21, thereby achieving electrical connection to a first voltage power supply signal line via the first isolation structure 21. For example, if the first electrode E1 is a cathode, the first voltage power supply signal line is a Vss signal line connected to a Vss pad, which can be connected to a Vss pin on a driver chip via a flexible circuit board to receive a negative voltage power supply signal provided by the driver chip. Because the first electrode E1 of the subpixel 30 is connected to the first voltage power supply signal line of the display panel 100, the first electrode E1 can better shield signals between the touch component 60 and the array substrate 10. The combination of the first electrode E1 and the first isolation structure 21 can better reduce interference with touch signals and improve the performance of the display panel 100.

[0035] Preferably, all the second isolation structures 22 include a conductive material, and the first virtual electrodes C1 are electrically connected to the conductive material of the second isolation structures 22. The first virtual electrodes C1 can be electrically connected through the second isolation structures 22 to form one overall electrode layer, which further improves the shielding effect for the touch component 60.

[0036] In some embodiments, the second isolation structure 22 is electrically connected to the first voltage power supply signal line; specifically, the first isolation structure 21 is electrically connected to the second isolation structure 22, and the second isolation structure 22 is electrically connected to the first voltage power supply signal line via the first isolation structure 21.

[0037] Each first virtual electrode C1 is electrically connected via the second isolation structure 22 and further electrically connected to a first voltage signal line via the second isolation structure 22 and the first isolation structure 21. Because the first virtual electrode C1 of the virtual pixel 40 is connected to the first voltage power signal line of the display panel 100, the first virtual electrode C1 can better shield signals between the touch component 60 and the array substrate 10. In combination with the second isolation structure 22, the first virtual electrode C1 can better reduce interference with touch signals and improve the performance of the display panel 100. The first electrode E1 and the first virtual electrode C1 are connected to the same voltage power signal line, and a potential is formed across the entire surface through the isolation structure 20, shielding the touch signals and driving signals, thereby achieving a better shielding effect. Furthermore, in this embodiment of the present invention, it is not necessary to electrically connect the second isolation structure 22 separately to the first voltage power signal line, thereby reducing costs.

[0038] Alternatively, in another embodiment, the first isolation structure 21 and the second isolation structure 22 are insulated from each other, and the second isolation structure 22 is connected to the first voltage power supply signal line. Since the first isolation structure 21 and the second isolation structure 22 are each independently connected to the first voltage power supply signal line, signal crosstalk can be reduced.

[0039] 6, in some embodiments, the subpixel 30 further includes a second electrode E2, where the second electrode E2, the light-emitting structure 31, and the first electrode E1 are stacked in this order away from the array substrate 10. A thin-film transistor TFT is provided on the driving circuit layer 12 of the array substrate 10. The second electrode E2 is electrically connected to the thin-film transistor TFT and connected to a second voltage power signal line via the thin-film transistor TFT. For example, the second voltage power signal line is a positive voltage power signal line (VDD). After the second electrode E2 and the first electrode E1 are energized, the second electrode E2 functions as an anode and the first electrode E1 functions as a cathode, allowing the subpixel 30 to emit light. The virtual pixel 40 does not need to include a second virtual electrode C2. Since the virtual pixel 40 is composed only of the virtual light-emitting portion 41 and the first virtual electrode C1, the virtual pixel 40 does not emit light.

[0040] 7, in another embodiment, each virtual pixel 40 may further include a second virtual electrode C2. The second virtual electrode C2, the virtual light-emitting portion 41, and the first virtual electrode C1 are stacked in order in a direction away from the array substrate 10. In the second electrode E2 and the second virtual electrode C2, the second voltage power supply signal line of the display panel 100 is electrically connected only to the second electrode E2.

[0041] The second electrode E2 is connected to a second voltage power supply signal line of the display panel 100, and the second virtual electrode C2 is not connected to the second voltage power supply signal line. Because the second electrode E2 is connected to an electrical signal and the second virtual electrode C2 is not connected to an electrical signal, the subpixel 30 can emit light, but the virtual pixel does not emit light.

[0042] Specifically, the second electrode E2 and the second virtual electrode C2 may be disposed on the same layer, made of the same material, and fabricated using the same process. The light-emitting structure 31 and the virtual light-emitting portion 41 may be disposed on the same layer, made of the same material, and fabricated using the same process. The first electrode E1 and the first virtual electrode C1 may be disposed on the same layer, made of the same material, and fabricated using the same process. Since the second virtual electrode C2 is not connected to the thin-film transistor TFT of the array substrate 10, the virtual pixel 40 does not emit light. That is, except that the virtual pixel 40 is not connected to a driving circuit, the virtual pixel 40 and the sub-pixel 30 have the same structure and are fabricated using the same fabrication process.

[0043] 1 and 8, in some embodiments, the display area AA is disposed along at least a portion of the periphery of the non-display area NA, and the non-display area NA includes a light-transmitting hole NA1 and a hole frame area NA2 that surrounds the light-transmitting hole NA1 along the periphery. The virtual pixel 40 is located within the hole frame area NA2.

[0044] The non-display area NA is disposed in correspondence with the camera in the direction perpendicular to the array substrate 10, and the light-transmitting hole NA1 allows external light to enter and reach the camera. The virtual pixel 40 is disposed in the hole frame area NA2, so that the virtual pixel 40 and the second isolation structure 22 can reduce the interference of the driving signal in the array substrate 10 with the touch signal of the upper touch component 60.

[0045] 8, optionally, a second isolation structure 22 is arranged around the periphery of the light-transmitting hole NA1. The second isolation structure 22 has a ring-like structure, and the virtual pixels 40 can be distributed at intervals along the periphery of the light-transmitting hole NA1, which can better shield signals between the array substrate 10 and the touch component 60 in the hole frame region NA2.

[0046] Optionally, there is a first gap between the second isolation structure 22 and the edge of the light-transmitting hole NA1, that is, there is a certain distance between the second isolation structure 22 and the edge of the light-transmitting hole NA1, which can prevent water vapor from entering the virtual pixel 40 and even the sub-pixel 30 and affecting the light-emitting efficiency of the light-emitting structure 31.

[0047] Alternatively, in another embodiment, the non-display area NA includes a display frame area NA5 of the display panel 100. The display frame area NA5 is arranged around the periphery of the display area AA, for example, on the upper, lower, left, and right sides of the display area AA. Since the virtual pixels 40 are arranged in the non-display area NA, the virtual pixels 40 and the second isolation structure 22 can reduce interference between the driving signals of the array substrate 10 and the touch signals of the upper touch component 60.

[0048] 2, 8 and 9, in some embodiments, the display panel includes a shielding structure 23 located in the aperture frame region NA2. In a direction parallel to the array substrate 10, the shielding structure 23 is disposed on a side of the second isolation structure 22 that is away from the first isolation structure 21. The shielding structure 23 has a signal shielding effect on the touch component 60 located above it, and further reduces signal interference to the touch component 60.

[0049] Optionally, the separation openings 20a are provided only in the first separation structure 21 and the second separation structure 22, and no separation openings 20a are provided in the shielding structure 23. Since the shielding structure 23 is closer to the light-transmitting hole NA1 than the second separation structure 22 and no separation openings 20a are provided in the shielding structure 23, it is possible to further prevent water vapor from entering the display area AA.

[0050] Optionally, a third virtual electrode C3 is provided on the shielding structure 23 opposite to the array substrate 10. The third virtual electrode C3 and the first virtual electrode C1 are disposed on the same layer. The shielding structure 23 and the third virtual electrode C3 disposed on the shielding structure 23 can further reduce the interference of the driving signal with the touch signal of the upper touch component 60. The third virtual electrode C3 and the first virtual electrode C1 are fabricated in the same process, which improves fabrication efficiency.

[0051] Optionally, the orthogonal projection of the contour of the touch component 60 on the array substrate 10 is located within the range of the orthogonal projection of the contour of the shielding structure 23 on the array substrate 10 .

[0052] The touch component 60 may include a touch electrode and several signal lines connected to the touch electrode. The signal lines may include a touch ground signal line, a touch drive signal line, a touch receiving signal line, etc. The outermost edge of the touch component 60 in a direction parallel to the array substrate 10 is the outer edge of the touch component 60. The outermost edge of the shielding structure 23 in a direction parallel to the array substrate 10 is the outer edge of the shielding structure 23. When the orthogonal projection of the outer edge of the touch component 60 on the array substrate 10 is set within the range of the orthogonal projection of the outer edge of the shielding structure 23 on the array substrate 10, the outer portion of the touch component 60 can be completely covered by the shielding structure 23. The shielding structure 23 can also reduce touch radio frequency interference, thereby further improving the performance of the display panel 100.

[0053] Optionally, the non-display area NA includes a light-transmitting hole NA1 and a hole frame area NA2 arranged around the light-transmitting hole NA1, and the shielding structure 23 is located in the hole frame area NA2 and arranged around the hole frame area NA2. The shielding structure 23 is arranged in an annular shape around the light-transmitting hole NA1, which can comprehensively prevent water vapor from entering the display area AA from all directions.

[0054] Optionally, the second isolation structure 22 is arranged around the periphery of the shielding structure 23. The second isolation structure 22 is annularly arranged in the hole frame region NA2, which can better block signals between the array substrate 10 and the touch component 60 in the hole frame region NA2.

[0055] Optionally, there is a second gap between the shielding structure 23 and the edge of the light-transmitting hole NA1. The gap between the shielding structure 23 and the edge of the light-transmitting hole NA1 prevents water vapor from entering the display area AA through the crack in the isolation structure 20 after the shielding structure 23 is cut and a crack is formed when forming the light-transmitting hole NA1.

[0056] 10 and 11 , the display panel 100 optionally also includes a first bank 81. The first bank 81 is located in the aperture frame region NA2 and is arranged around the light-transmitting aperture NA1. The orthogonal projection of the shielding structure 23 on the array substrate 10 is located outside the area surrounded by the first bank 81. The first bank 81 is arranged around the second encapsulating layer 72. By providing the first bank 81, the second encapsulating layer 72 is positioned within the first bank 81, preventing the encapsulating material of the second encapsulating layer 72 from flowing outward and overflowing. The phrase "the orthogonal projection of the shielding structure 23 on the array substrate 10 is located outside the area surrounded by the first bank 81" means that the shielding structure 23 is positioned within the first bank 81. This allows the top of the shielding structure 23 to be protected by multiple encapsulating film layers, such as the first encapsulating layer 71 and the second encapsulating layer 72, improving the reliability of the display panel.

[0057] 12, a part of the orthogonal projection of the shielding structure 23 on the array substrate 10 is located within the area surrounded by the first bank 81. That is, a part of the shielding structure 23 is located below the first bank 81, and another part of the shielding structure 23 is positioned within the first bank 81. This provides some protection to the shielding structure 23, thereby improving the reliability of the display panel.

[0058] 10 and 13 , optionally, the non-display area NA includes a display frame area NA5 of the display panel 100. The display frame area NA5 is arranged to surround the periphery of the display area AA. The shielding structure 23 is located in the display frame area NA5 and is arranged to surround the periphery of the second separation structure 22.

[0059] Optionally, the display panel 100 further includes second banks 82. The second banks 82 are located in the display frame region NA5 and are arranged around the periphery of the display region AA. The orthogonal projection of the shielding structure 23 on the array substrate 10 is located within the area surrounded by the second banks 82. By providing the second banks 82, the second encapsulating layer 72 is positioned within the second banks 82, preventing the encapsulating material of the second encapsulating layer 72 from flowing outward and overflowing. "Located outside the area surrounded by the second banks 82" means that the shielding structure 23 is positioned within the second banks 82. This allows the top of the shielding structure 23 to be protected by multiple encapsulating film layers, such as the first encapsulating layer 71 and the second encapsulating layer 72, improving the reliability of the display panel.

[0060] 12, a part of the orthogonal projection of the shielding structure 23 on the array substrate 10 is located outside the area surrounded by the second bank 82. That is, a part of the shielding structure 23 is located below the second bank 82, and another part of the shielding structure 23 is positioned outside the second bank 82, which can protect the shielding structure 23 to a certain extent and improve the reliability of the display panel.

[0061] Optionally, the first isolation structure 21, the second isolation structure 22, and the shielding structure 23 are disposed on the same layer. The second isolation structure 22 and the shielding structure 23 can be manufactured using the same manufacturing process, but the second isolation structure 22 and the shielding structure 23 have different shapes. When the second isolation structure 22 has the isolation opening 20a formed therein through an exposure and development process, the shielding structure 23 does not have the isolation opening 20a. Exemplarily, the first isolation structure 21, the second isolation structure 22, and the shielding structure 23 are disposed on the same layer and manufactured using the same manufacturing process. The aperture frame region NA2 includes a first sub-region NA3 and a second sub-region NA4. The isolation structure located in the display region AA is the first isolation structure 21, the isolation structure located in the first sub-region NA3 is the second isolation structure 22, and the isolation structure located in the second sub-region NA4 is the third isolation structure. According to an embodiment of the present invention, the production efficiency of the display panel 100 can be improved.

[0062] 10 and 14 , in some embodiments, a first groove 14 located in the non-display area NA is provided in the array substrate 10, and the orthogonal projection of the first groove 14 on the array substrate is located within the range of the orthogonal projection of the shielding structure 23 on the array substrate 10. For example, if the first groove 14 has an arc shape, the portion of the shielding structure 23 within the first groove 14 also has an arc shape. By providing the first groove 14, the length of the shielding structure 23 can be increased, and the path for water vapor to enter the display area AA can be lengthened.

[0063] Optionally, second grooves 15 are provided in the array substrate 10, located in the non-display area NA, and the second grooves 15 are farther away from the display area AA than the first grooves 14. By adding the second grooves 15, the path for water vapor to penetrate into the display area AA can be further lengthened.

[0064] Optionally, the orthogonal projection of the second groove 15 on the array substrate 10 is located outside the range of the orthogonal projection of the shielding structure 23 on the array substrate 10. That is, the second groove 15 is located relatively close to the edge of the light-transmitting hole NA1, and the shielding structure 23 is not located within the second recess 15, which to some extent prevents moisture from entering the shielding structure 23 and further reduces the probability of moisture entering the display area AA from the shielding structure 23.

[0065] When the display panel 100 is viewed from above, the first grooves 14 and the second grooves 15 are arranged in a circular shape, which further reduces the probability of water vapor entering the display area AA.

[0066] In some embodiments, the array substrate 10 includes a base substrate 11 and a driving circuit layer 12 disposed on one side of the base substrate 11. The driving circuit layer 12 includes driving circuit lines 13. The orthogonal projections of the driving circuit lines 13 on the base substrate 11 and the orthogonal projections of the virtual pixels 40 on the base substrate 11 at least partially overlap.

[0067] The driving circuit lines 13 may be data lines, gate in panel (GIP) wiring, etc. The orthogonal projections of the driving circuit lines 13 on the base substrate 11 and the orthogonal projections of the virtual pixels 40 on the base substrate 11 at least partially overlap, and the orthogonal projections of the touch components 60 on the base substrate 11 and the virtual pixels 40 on the base substrate 11 at least partially overlap, and the virtual pixels 40 are disposed between the touch components 60 and the driving circuit lines 13, thereby shielding signal interference to the touch components 60 caused by the driving circuit lines 13.

[0068] Optionally, the orthogonal projection of the driving circuit lines 13 on the base substrate 11 is located within the range of the orthogonal projection of the virtual pixels 40 and the second isolation structures 22 on the base substrate 11. The virtual pixels 40 and the second isolation structures 22 cover the driving circuit lines 13 to minimize interference of the driving circuit lines 13 with the touch signals.

[0069] In some embodiments, the display panel 100 further includes a shielding structure 23 located in the non-display area NA. The shielding structure 23 is disposed on one side of the second isolation structure 22, away from the first isolation structure 21, in a direction parallel to the array substrate 10. The driving circuit lines 13 are disposed in a region of the array substrate 10 corresponding to the second isolation structure 22.

[0070] The shielding structure 23 is configured to shield signals to the touch component 60 located above it, thereby further reducing signal interference to the touch component 60. The second isolation structure 22 is provided between the touch component 60 and the driving circuit line 13, which can ensure that signal interference to the touch component 60 caused by the driving circuit line 13 is shielded.

[0071] Optionally, the isolation openings 20a are provided only in the first isolation structure 21 and the second isolation structure 22, and the shielding structure 23 is not provided with isolation openings 20a.

[0072] That is, the shielding structure 23 is disposed in an area having no driving circuit lines 13 below and having touch components 60 above. Because this area is relatively close to the light-transmitting hole NA1, the shielding structure 23 without the separating openings 20a is disposed in this area, which can prevent water vapor from entering the display area AA.

[0073] Optionally, the orthogonal projection of the shielding structure 23 on the array substrate 10 is located outside the orthogonal projection of the driving circuit lines 13 on the array substrate 10, and the driving circuit lines 13 are not arranged in the area of ​​the array substrate 10 corresponding to the shielding structure 23, and neither the driving circuit wiring 13 nor the planarization layer 16 is arranged in this area, so there is no risk of the driving circuit wiring 13 and the planarization layer 16 peeling off from each other, and there is no need to provide a separation opening 20a for releasing water vapor from the planarization layer 16, which reduces costs.

[0074] Optionally, a third virtual electrode C3 is provided on the side of the shielding structure 23 away from the array substrate 10. The third virtual electrode C3 and the first virtual electrode C1 are disposed on the same layer, which reduces signal interference from the driving circuit line 13 to the touch component 60 located diagonally above.

[0075] In some embodiments, the first isolation structure 21 and the second isolation structure 22 are disposed in the same layer. The first isolation structure 21 and the second isolation structure 22 can be fabricated in the same manufacturing process, and the second isolation structure 22 and the shielding structure 23 may also have the same shape.

[0076] Optionally, the first isolation structure 21, the second isolation structure 22, and the shielding structure 23 are all disposed in the same layer and prepared through the same preparation process steps. The first isolation structure 21 and the second isolation structure 22 have the same shape, and both are provided with isolation openings 20 a. The shielding structure 23 has a shape different from the shapes of the first isolation structure 21 and the second isolation structure, respectively, and the shielding structure 23 is not provided with isolation openings 20 a.

[0077] 3 , in some embodiments, both the first isolation structure 21 and the second isolation structure 22 include a support layer 24 and a shielding layer 25 sequentially stacked along a direction away from the array substrate 10. Adjacent light-emitting structures 31 can be well separated by the support layer 24 and the shielding layer 25. Furthermore, the support layer 24 and the shielding layer 25 can be made of different materials to meet different needs.

[0078] Optionally, the orthogonal projection of the support layer 24 on the array substrate 10 is located within the orthogonal projection of the shielding layer 25 on the array substrate 10, and the projected area of ​​the support layer 24 on the array substrate 10 is smaller than the projected area of ​​the shielding layer 25 on the array substrate 10. The edges of the shielding layer 25 are protruded and extended along the periphery of the support layer 24, and the first electrodes E1 are separated by the support layer 24. The height of the support layer 24 can be increased, and the width of the shielding layer 25 can be increased. The combination of the support layer 24 and the shielding layer 25 forms a T-shaped cross section of the isolation structure 20. Compared to an embodiment in which the entire isolation structure 20 is an inverted trapezoidal structure, the isolation structure 20 in this embodiment can separate the first electrodes E1 more deeply, and the upper shielding layer 25 can provide better reflection and refraction effects, resulting in a clearer and brighter display.

[0079] Optionally, the cross-sectional area of ​​the support layer 24 gradually increases along a direction perpendicular to and pointing toward the array substrate 10. The material of the support layer 24 may be a metal material, and the longitudinal cross section of the support layer 24 may be set to a regular trapezoid, which facilitates the preparation process of the support layer 24. If the isolation structure 20 includes a conductive material, the wrapping effect of the first electrode E1 is improved, and it is easy to realize that the first electrode E1 is electrically connected through the isolation structure 20 and connected to the same voltage power supply signal terminal, thereby simplifying the structure and reducing costs.

[0080] Optionally, the cross-sectional area of ​​the shielding layer 25 is gradually increased in the direction perpendicular to and pointing towards the array substrate 10. That is, the longitudinal cross section of the shielding layer 25 is a regular trapezoid, which not only facilitates the process preparation but also reduces the shielding against the deposition of the first electrode E1.

[0081] 10 , in some embodiments, the display panel 100 further includes a first encapsulating layer 71, which is disposed on a side of the isolation structure 20 away from the array substrate 10. The first encapsulating layer 71 protects the subpixels 30 and prevents them from being affected by the external environment (e.g., air and moisture), and can prevent air and moisture from penetrating into the display panel 100, thereby extending the service life and stability of the light-emitting structure 31. The encapsulating layer also prevents impurities and harmful substances from entering the display panel 100, thereby ensuring the performance and quality of the display panel 100.

[0082] Optionally, the first sealing layer 71 covers at least a portion of the sidewall surface of the isolation structure 20, which can better protect the isolation structure 20 and more effectively prevent external moisture, oxygen, and other harmful substances from entering the inside of the subpixel 30.

[0083] Optionally, the first encapsulating layer 71 includes an inorganic material. For example, the first encapsulating layer 71 may be made of a material such as silicon oxide, silicon nitride, or silicon oxynitride, which can provide good mechanical support and sealing protection to protect the display panel 100 from environmental influences. At the same time, the first encapsulating layer 71 can effectively block harmful substances such as moisture and oxygen from the outside from entering the interior of the display panel 100, thereby improving the service life and stability of the display panel 100.

[0084] In some embodiments, the display panel 100 further includes a second encapsulating layer 72. The second encapsulating layer 72 is disposed on the side of the first encapsulating layer 71 that is away from the array substrate 10. The second encapsulating layer 72 can further block external moisture, oxygen, etc. from entering the interior of the display panel 100.

[0085] Optionally, the second encapsulating layer 72 includes an organic material. The second encapsulating layer 72 may be formed of an organic substance such as a polymer. The thickness of the second encapsulating layer 72 is greater than the thickness of the first encapsulating layer 71, and the second encapsulating layer 72 is more flexible than the first encapsulating layer 71, so that the second encapsulating layer 72 can better adapt to the bending and curvature of the display panel 100. In addition, the organic material also serves to buffer external forces.

[0086] In some embodiments, the display panel 100 further includes a bank 80. The bank 80 is disposed on the array substrate 10 and is located in the non-display area NA. The bank 80 is disposed around the periphery of the second sealing layer 72. By providing the bank 80, the second sealing layer 72 is positioned within the dam 80, and the sealing material of the second sealing layer 72 can be prevented from flowing outward and overflowing.

[0087] Optionally, the non-display area NA includes a light-transmitting hole NA1 and a hole frame area NA2 arranged around the light-transmitting hole NA1. The bank 80 includes a first dam 81, which is located in the hole frame area NA2 and arranged around the light-transmitting hole NA1, and / or the non-display area NA includes a display frame area NA5 of the display panel 100, which is arranged around the display area AA. The bank 80 includes a second bank 82, which is located in the display frame area NA5 and arranged around the display area AA.

[0088] Optionally, the orthogonal projection of the second isolation structure 22 on the array substrate 10 is located within the range of the orthogonal projection of the bank 80 on the array substrate 10. By arranging the bank 80 outside the second isolation structure 22, the orthogonal projection of the second sealing layer 72 on the array substrate 10 can cover the orthogonal projection of the second isolation structure 22 on the array substrate 10, thereby better protecting the virtual pixels 40 and further preventing water vapor from entering the display area AA from the virtual pixels 40 through the isolation structure 20.

[0089] A second aspect of the present application provides a display device, which includes the display panel 100 of any of the above embodiments.

[0090] A second aspect of the present invention provides a display device, which includes the display panel 100 of any of the above embodiments or the display panel 100 manufactured by the above manufacturing method. This display device adopts all the technical solutions of all the above embodiments, and therefore has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described again here.

[0091] The display device may be any device with a display capability, for example, a mobile device such as a mobile phone, tablet computer, notebook computer, palmtop computer, in-vehicle electronics, wearable device, ultra mobile personal computer (UMPC), netbook, personal digital assistant (PDA), or a non-mobile device such as a personal computer (PC), television (TV), teller machine, or self-service machine.

[0092] Although the embodiments disclosed in this application have been described above, the described contents are merely embodiments adopted to facilitate understanding of this application and do not limit this application. A person skilled in the art to which this application pertains may make any modifications and changes to the embodiments and details without departing from the spirit and scope disclosed in this application, but the scope of protection of this application must still comply with the scope defined by the appended claims.

[0093] The above is merely an embodiment of the present application. Those skilled in the art will clearly understand that for the sake of convenience and simplicity, the replacement of the above other connection methods will refer to the corresponding connection methods in the above method embodiments, and will not be described again here. This does not limit the patent scope of the present application. Those skilled in the art can easily think of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and it should be understood that these modifications or substitutions are included in the protection scope of the present application. [Explanation of symbols]

[0094] 10 Array board 11 Base board 12 Drive circuit layer 13 Drive circuit line 20 Separation structure 21 1st separation structure 22 Second separation structure 23 Shielding structure 60 Touch Components 100 Display Panel

Claims

1. A display panel having a display area and a non-display area, The display panel includes an array substrate, an isolation structure, a plurality of sub-pixels, a plurality of virtual pixels, and a touch component; the array substrate includes a base substrate and a driving circuit layer, the driving circuit layer is disposed on one side of the base substrate, and the driving circuit layer includes driving circuit lines; the isolation structure includes a first isolation structure located in the display area and a second isolation structure located in the non-display area, the first isolation structure and the second isolation structure are both provided on one side of the array substrate, and a plurality of isolation openings are provided in the first isolation structure and the second isolation structure; each of the subpixels is located in the display area and includes a light-emitting structure and a first electrode stacked together, the light-emitting structure is located in an isolation opening of the first isolation structure, each of the virtual pixels is located in the non-display area and includes a first virtual electrode, and an orthogonal projection of the driving circuit line on the base substrate and an orthogonal projection of the virtual pixel on the base substrate at least partially overlap; At least a portion of the touch sensitive component is located on a side of the first electrode and the first virtual electrode away from the array substrate.

2. The display panel according to claim 1 , wherein an orthogonal projection of the driving circuit line on the base substrate is located within an orthogonal projection of the virtual pixel and the second isolation structure on the base substrate.

3. 2. The display panel of claim 1, further comprising a shielding structure located in the non-display area, the shielding structure being disposed on one side of the second isolation structure away from the first isolation structure in a direction parallel to the array substrate.

4. The display panel of claim 3 , wherein the orthogonal projection of the shielding structure on the array substrate is located outside the orthogonal projection of the driving circuit lines on the array substrate.

5. The display panel of claim 3 , wherein an orthogonal projection of an outer contour of the touch sensitive component on the array substrate is located within a range of an orthogonal projection of an outer contour of the shielding structure on the array substrate.

6. 4. The display panel of claim 3, wherein the non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, and the shielding structure is located in the hole frame area and arranged around the light-transmitting hole.

7. 7. The display panel of claim 6, wherein the display panel further includes a first bank, the first bank being located in the hole frame region and surrounding the periphery of the light-transmitting hole, and the orthogonal projection of the shielding structure on the array substrate is located outside the region surrounded by the first bank, or a portion of the orthogonal projection of the shielding structure on the array substrate is located within the region surrounded by the first bank.

8. 4. The display panel of claim 3, wherein the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged to surround the display area along a periphery thereof, and the shielding structure is located in the display frame area and is arranged to surround the second separation structure along a periphery thereof.

9. 9. The display panel of claim 8, wherein the display panel further includes a second bank, the second bank being located in the display frame region and arranged around the periphery of the display region, and wherein a projection of the shielding structure on the array substrate is located within a region formed by the second bank, or a portion of the projection of the shielding structure on the array substrate is located outside the region formed by the second bank.

10. The display panel of claim 3 , wherein the first isolation structure, the second isolation structure, and the shielding structure are disposed in the same layer.

11. the second isolation structure includes a conductive material, the first virtual electrode is electrically connected to the conductive material of the second isolation structure, and the second isolation structure is electrically connected to a first voltage power supply signal line of the display panel; the first isolation structure includes a conductive material, the first isolation structure is electrically connected to the second isolation structure, and the second isolation structure is electrically connected to the first voltage power supply signal line through the first isolation structure; Alternatively, the first isolation structure and the second isolation structure are insulated from each other, and the second isolation structure is connected to the first voltage power supply signal line.

12. The non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, the display area is arranged around at least a part of the hole frame area, and the virtual pixel is located in the hole frame area; or 2. The display panel according to claim 1, wherein the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged around the periphery of the display area, and the virtual pixels are located in the display frame area of ​​the display panel.

13. a first groove located in the non-display area is provided on the array substrate, and an orthogonal projection of the first groove on the array substrate is located within a range of an orthogonal projection of the shielding structure on the array substrate; a second groove located in the non-display area is provided on the array substrate, the second groove being farther away from the display area than the first groove; The display panel of claim 3 , wherein the orthogonal projection of the second groove on the array substrate is located outside the range of the orthogonal projection of the shielding structure on the array substrate.

14. each of the first and second isolation structures includes a support layer and a shielding layer disposed sequentially in a direction away from the array substrate; The display panel of claim 1 , wherein an orthogonal projection of the support layer on the array substrate is located within an orthogonal projection of the shielding layer on the array substrate.

15. The display panel of claim 1 , wherein the first isolation structure and the second isolation structure are disposed in the same layer.

16. 2. The display panel of claim 1, wherein the display panel further includes a first sealing layer and a second sealing layer, the first sealing layer being disposed on a side of the isolation structure away from the array substrate, and the second sealing layer being disposed on a side of the first sealing layer away from the array substrate.

17. the display panel further includes a bank, the bank being provided on the array substrate and located in the non-display area, the bank being arranged around the periphery of the second sealing layer; 17. The display panel of claim 16, wherein the non-display area includes a light-transmitting hole and a hole frame area arranged around the light-transmitting hole, and the bank includes a first bank, the first bank being located in the hole frame area and arranged around the light-transmitting hole.

18. the display panel further includes a bank, the bank being provided on the array substrate and located in the non-display area, the bank being arranged around the periphery of the second sealing layer; 17. The display panel of claim 16, wherein the non-display area includes a display frame area of ​​the display panel, the display frame area is arranged around the periphery of the display area, and the bank includes a second bank, the second bank is located in the display frame area and is arranged around the periphery of the display area.

19. The display panel of claim 18 , wherein an orthogonal projection of the second isolation structure on the array substrate is located within a range of an orthogonal projection of the second bank on the array substrate.

20. A display device comprising the display panel according to any one of claims 1 to 19.

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