Display device

Abstract

To provide a semiconductor device which suppresses variation in characteristics of a driving transistor and corrects image data.SOLUTION: A semiconductor device includes an image data storage portion, a correction data storage portion, a driver circuit portion, a display element, and a threshold voltage correction circuit portion. The image data storage portion has a function of storing first image data, and the correction data storage portion has a function of storing correction data and a function of generating second image data corresponding to the first image data and the correction data when the image data storage portion stores the first image data. The driver circuit portion has a function of generating a current corresponding to the second image data and a function of supplying the current to the display element. The threshold voltage corrector circuit portion has a function of correcting the threshold voltage of the driving transistor in the driver circuit portion. With the above structure, the semiconductor device can correct the image data, correct the threshold voltage of the driving transistor, and perform display based on the second image data.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device, a display device, an electronic device, and an operating method thereof.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. Therefore, one aspect of the present invention disclosed in this specification more specifically relates to The technical fields of the present invention include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, power storage devices, and imaging devices. Device, storage device, processor, electronic device, system, driving method thereof, and manufacturing method thereof Examples include methods for detecting the presence of fluorine, and methods for inspecting the same. [Background technology]

[0003] In recent years, mobile phones such as smartphones, tablet-type information terminals, and notebook PCs (personal computers) have become increasingly Improvements are being made in various aspects of the display devices used in personal computers, portable game consoles, etc. For example, increasing the resolution, improving color reproducibility, and reducing the size of the driver circuit are In addition, for example, display devices that can reduce power consumption are being developed. To improve display quality, the variation in the characteristics of the drive transistors contained in the pixels is reduced. Development of circuits such as those for correcting the threshold voltage of the drive transistor is also progressing. Patent Document 1 discloses an invention of a pixel circuit having a path.

[0004] In addition, a display device using an oxide semiconductor as a switching element included in a pixel circuit is Examples include technology that applies transistors made of semiconductor thin films.

[0005] Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as other materials. For example, not only oxides of single metals such as indium oxide and zinc oxide, but also oxides of multi-component metals Among the oxides of multi-component metals, In-Ga-Zn oxide (hereinafter referred to as In-Ga-Zn oxide) is particularly Research into IGZO (Inorganic Glycerol, also known as IGZO) is currently being actively conducted.

[0006] Research on IGZO has revealed that, among oxide semiconductors, it is neither single crystal nor amorphous. AAC (c-axis aligned crystalline) structure and nc(n A crystalline structure was found (see Non-Patent Documents 1 to 3). In Non-Patent Documents 1 and 2, oxide semiconductors having a CAAC structure are used. Furthermore, a technique for fabricating a transistor using a CAAC structure and an nc structure has also been disclosed. Even oxide semiconductors with lower crystallinity than those described above have minute crystals, as reported in Non-Patent Document 4 and and Non-Patent Document 5.

[0007] Furthermore, transistors using IGZO as the active layer have extremely low off-state current (non- See Patent Document 6.) LSIs and display devices that utilize these characteristics have been reported (Non-Patent Document 6). See Patent Document 7 and Non-Patent Document 8.) Patent Document 2 also describes a semiconductor device containing IGZO in the active layer. An invention has been disclosed in which a transistor is used in a pixel circuit of a display device. [Prior art documents] [Patent documents]

[0008]

Patent Document 1

Patent document 2

Non-licensed literature

[0009]

Non-licensed literature 1

Non-licensed Document 2

Non-licensed Document 4

Non-licensed Document 5

Non-licensed Document 6

Non-licensed Document 7

[0010] The conditions for a display device to display a high-quality image are, for example, high resolution, multi-layer For example, organic EL (Electro Luminescence) In a display device including a light-emitting element such as a nescence element, a high-quality image is displayed. To display the image, it is necessary to suppress the variation in the characteristics of the driving transistor and to minimize the image data transmitted to the pixels. The data must be appropriately corrected.

[0011] According to one aspect of the present invention, there is provided a method for correcting image data while suppressing variations in characteristics of a driving transistor. To provide a pixel circuit (referred to as a semiconductor device in this specification) capable of performing Another object of one embodiment of the present invention is to provide a display device including the semiconductor device. Another object of one embodiment of the present invention is to provide an electronic device including the display device. Another object of one embodiment of the present invention is to provide the semiconductor device and the display device. It is another object of the present invention to provide a method for operating the electronic device.

[0012] Note that the problems of one embodiment of the present invention are not limited to the above-listed problems. This does not preclude the existence of other problems. Problems not mentioned in this section are problems that a person skilled in the art would be able to solve by understanding the specification or can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the above-listed objects and other objects. One aspect of the present invention is to solve the above-listed problems and other problems. You don't need to solve all of them. [Means for solving the problem]

[0013] (1) One aspect of the present invention is a display device including an image data storage unit, a correction data storage unit, a drive circuit unit, and a display element. a first transistor having a back gate and a threshold voltage correction circuit section; a first terminal of the first transistor electrically connected to an input terminal of the display element; The image data storage unit has a function of storing the first image data, and the correction data storage unit The function of storing the correction data and the function of storing the first image data in the image data storage unit are the same. and a function of generating second image data according to the first image data and the correction data. The driving circuit applies a first potential corresponding to the second image data to the gate of the first transistor. This generates a first current between the first terminal and the second terminal of the first transistor. and a function of causing a first current to flow through the display element, and the threshold voltage correction circuit unit A semiconductor having a function of correcting the threshold voltage of a first transistor included in a drive circuit unit. It is a device.

[0014] (2) Alternatively, one embodiment of the present invention is a semiconductor device having the structure (1) described above, further including first to third capacitors, The image data storage unit has a second transistor, and the correction data storage unit has a third transistor. the threshold voltage correction circuit has a fourth transistor, and the first terminal of the second transistor The first terminal of the third transistor is electrically connected to the first terminal of the first capacitance element. a gate of the first transistor, a second terminal of the first capacitance element, and a first terminal of the second capacitance element; The first terminal of the first transistor is electrically connected to the second terminal of the second capacitance element and the third capacitance element. the back gate of the first transistor is electrically connected to the first terminal of the second transistor; a semiconductor device electrically connected to the first terminal of the transistor and the second terminal of the third capacitance element; It is a location.

[0015] (3) Alternatively, one embodiment of the present invention is a semiconductor device having the structure (2) in which the first to fourth transistors are Each of them is a semiconductor device having either a metal oxide or silicon in a channel forming region. be.

[0016] (4) Alternatively, in one aspect of the present invention, in the configuration (2) or (3), the drive circuit unit is a fifth transistor, and a first terminal of the third transistor and an input terminal of the display element are connected to a fifth It is a semiconductor device electrically connected between the first and second terminals of a transistor.

[0017] (5) Alternatively, in one aspect of the present invention, in the configuration (4), the fifth transistor has a channel The semiconductor device has a formation region made of either metal oxide or silicon.

[0018] (6) Alternatively, one aspect of the present invention is a sixth aspect in any one of the above-described structures (2) to (5). a first terminal of the sixth transistor electrically connected to the gate of the first transistor; and the second terminal of the sixth transistor is electrically connected to the first terminal of the first transistor. This is a semiconductor device.

[0019] (7) Alternatively, in one aspect of the present invention, in the configuration (6), the sixth transistor The semiconductor device has a formation region made of either metal oxide or silicon.

[0020] (8) Alternatively, one aspect of the present invention is a first device in any one of the configurations (2) to (7) above. The first function is to turn on the third transistor and turn on the first transistor. A first initialization terminal is connected to the gate of the capacitor, the second terminal of the first capacitance element, and the first terminal of the second capacitance element. The function of applying a potential and turning on the fourth transistor to back up the first transistor a function of applying a second initialization potential to the gate of the first transistor; a first terminal of the first transistor; and a second capacitance element. a function of applying a third initialization potential to the second terminal of the third capacitance element and the first terminal of the third capacitance element; The transistor is turned off, and the first initialization potential and the third initialization potential are applied by the second capacitance element. The function of maintaining the potential difference between the first terminal of the first transistor and the input terminal of the display element is The current of the first transistor is cut off, and a voltage is applied between the first terminal and the second terminal of the first transistor. The first transistor is turned on, and then the potential at the first terminal of the first transistor becomes the second potential. When the first transistor is turned off, the third capacitance element provides the second initialization potential and the third initialization potential. and a function of maintaining a potential difference between the first and second potentials, and the second function is to turn on the third transistor. The gate of the first transistor, the second terminal of the first capacitance element, and the first terminal of the second capacitance element are connected to each other. a function of writing a third potential corresponding to the correction data to the terminal, and a function of turning the third transistor off; The gate of the first transistor, the second terminal of the first capacitance element, and the first terminal of the second capacitance element are connected to each other. a terminal and a function of holding a third potential by the second transistor, By turning on the first capacitor, a fourth potential corresponding to the first image data is written to the first terminal of the first capacitor. The fourth potential is written to the first terminal of the first capacitance element, and The gate of the capacitor, the second terminal of the first capacitance element, and the first terminal of the second capacitance element are connected to each other. and a function of changing the third potential to a first potential according to second image data. It is a device.

[0021] (9) Another embodiment of the present invention is a semiconductor device having any one of the above structures (1) to (8), and a peripheral circuit.

[0022] (10) Another embodiment of the present invention is an electronic device including the display device having the structure described in (9) above and a housing. It is a vessel.

[0023] (11) Alternatively, one embodiment of the present invention is a liquid crystal display device including: an image data holding unit; a correction data holding unit; and a driver circuit unit. A method for operating a semiconductor device having a display element and a threshold voltage correction circuit unit, comprising: The circuit section has a first transistor having a back gate, and the method of operating the semiconductor device is A threshold voltage correction period, a correction data writing period, an image data writing period, and an image display period. and a threshold voltage correction period during which the threshold voltage correction circuit section detects the first transistor. A period during which the threshold voltage of the first transistor is corrected by applying a potential to the back gate of the second transistor. The correction data writing period includes a period during which correction data is written to the correction data holding unit. During the image data writing period, the first image data is written to the image data storage unit, and the correction A period during which the data holding unit generates second image data according to the first image data and the correction data is During an image display period, a first potential corresponding to second image data is applied to the gate of the first transistor. is applied, the drive circuit section applies a voltage between the first terminal and the second terminal of the first transistor. a period during which a first current is generated and the first current flows through a display element; This is how it is made.

[0024] (12) Alternatively, one aspect of the present invention is the operating method according to (11) above, further comprising an initialization period, The image data storage unit includes a first capacitor element, a second capacitor element, a third capacitor element, and a second transistor. the correction data holding unit has a third transistor, and the threshold voltage correction circuit has a a first terminal of the second transistor electrically connected to a first terminal of the first capacitance element; a first terminal of the third transistor connected to the gate of the first transistor and the first capacitor; a first transistor electrically connected to the second terminal of the element and the first terminal of the second capacitive element; The first terminal of the second capacitance element, the first terminal of the third capacitance element, and the input terminal of the display element the back gate of the first transistor is electrically connected to the terminal of the fourth transistor. The first terminal and the second terminal of the third capacitance element are electrically connected, and the initialization period is The first transistor is turned on, and the gate of the first transistor and the second terminal of the first capacitance element are connected to each other. a period during which a first initialization potential is applied to the first terminal of the second capacitance element; is turned on, and the back gate of the first transistor, the second terminal of the third capacitance element, and a period during which the second initialization potential is applied to the first terminal of the first transistor and the second capacitance element; a period during which a third initialization potential is applied to the second terminal and the first terminal of the third capacitance element; During the threshold voltage correction period, a current is cut off from the first terminal of the first transistor to the display element. the third transistor is turned off, and the second capacitance element is set to the first initialization potential and the third initialization potential. A period during which a potential difference with the initialization potential is maintained and a period during which a high potential is applied to the second terminal of the first transistor. As a result, the potential of the first terminal of the first transistor is turned off. A second current flows between the first terminal and the second terminal of the first transistor until the second potential is reached. During this time, the fourth transistor is turned off, and the third capacitance element is set to the second potential and the second initialization potential. and a correction data writing period during which the third transistor When the transistor is turned on, the gate of the first transistor, the second terminal of the first capacitance element, and the second capacitance element are connected to each other. a period during which a third potential corresponding to the correction data is applied to the first terminal of the element; The capacitor is turned off, and the gate of the first transistor, the second terminal of the first capacitance element, and the second a period during which the third potential is held by the first terminal of the capacitance element; During the loading period, the second transistor is turned on, and the first image is applied to the first terminal of the first capacitance element. A period during which the fourth potential according to the data is applied and a period during which the fourth potential is written to the first terminal of the first capacitance element By incorporating the first transistor, the second terminal of the first capacitance element, and the second The third potential held at the first terminal of the capacitance element is a first potential corresponding to the second image data. and a period during which the voltage is varied.

[0025] (13) Alternatively, one aspect of the present invention is the method of operating the first to fourth transistors in the above (12). Each of the display devices has a channel forming region made of either metal oxide or silicon. This is how the device works.

[0026] (14) Alternatively, one aspect of the present invention is the method of operating the semiconductor device according to (12) or (13), further comprising: a fifth transistor, a first terminal of the third transistor, an input terminal of the display element; is electrically connected between the first terminal and the second terminal of the fifth transistor, and During the correction data writing period and the image data writing period, the fifth transistor is turned off. the image display period includes a period during which the fifth transistor is in an on state; This is a method of operating a semiconductor device.

[0027] (15) Alternatively, in one aspect of the present invention, in the operating method of (14), the fifth transistor is a transistor A method for operating a semiconductor device having either a metal oxide or silicon in a channel forming region. do.

[0028] (16) Alternatively, one aspect of the present invention is the operation method of any one of (12) to (15) above. The semiconductor device has a sixth transistor, and a first terminal of the sixth transistor is connected to a first terminal of the first transistor. the second terminal of the sixth transistor is electrically connected to the gate of the first transistor; and the sixth transistor is electrically connected to the first terminal of the sixth transistor during the threshold voltage correction period. The present invention relates to a method for operating a semiconductor device, which includes a period during which the semiconductor device becomes in a non-volatile state.

[0029] (17) Alternatively, in the operating method of (16), the sixth transistor is A method for operating a semiconductor device having either a metal oxide or silicon in a channel forming region. do.

[0030] (18) Another embodiment of the present invention is the semiconductor device according to any one of (11) to (17). a display device including a plurality of semiconductor devices in a matrix; The display unit has a display section arranged in a box shape, and some of the semiconductor devices are first pixels and second pixels. The first pixel and the second pixel are located in different rows in the display section, and the first pixel and the second pixel function as a pixel. When one pixel is performing the threshold voltage correction period, the second pixel writes correction data. and an image data writing period. . [Effects of the Invention]

[0031] According to one embodiment of the present invention, it is possible to suppress variations in the characteristics of a driving transistor and to According to one embodiment of the present invention, a semiconductor device capable of correcting the above-mentioned problem can be provided. Therefore, a display device including the semiconductor device can be provided. In this manner, an electronic device having the display device can be provided. According to an embodiment, a method for operating the semiconductor device, the display device, and the electronic device is provided. can be done.

[0032] Alternatively, according to one embodiment of the present invention, a display device having a source driver circuit with a small circuit area can be provided. Alternatively, according to one embodiment of the present invention, a source device with low power consumption can be provided. A display device having a driver circuit can be provided.

[0033] The effects of one embodiment of the present invention are not limited to the effects listed above. This does not preclude the existence of other effects. Other effects may be affected by this item, as described below. The effects not mentioned in this section are obvious to a person skilled in the art from the description or can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the effects listed above and other effects. Therefore, one aspect of the present invention may have the above-listed effects. In some cases, the [Brief explanation of the drawings]

[0034] [Figure 1] FIG. 1 is a block diagram illustrating an example of a display device. [Figure 2] FIG. 2 is a block diagram illustrating an example of the configuration of a pixel. [Figure 3] FIG. 2 is a block diagram illustrating an example of the configuration of a pixel. [Figure 4] FIG. 2 is a circuit diagram showing an example of the configuration of a pixel. [Figure 5] FIG. 2 is a block diagram illustrating an example of the configuration of a pixel. [Figure 6] FIG. 2 is a circuit diagram showing an example of the configuration of a pixel. [Figure 7] FIG. 2 is a circuit diagram showing an example of the configuration of a pixel. [Figure 8] 4 is a timing chart showing an example of the operation of a pixel. [Figure 9] 10A and 10B are diagrams illustrating an example of timing of pixel operation and voltage application to wirings. [Figure 10] FIG. 2 is a block diagram showing a configuration example of a display unit and its peripheral circuits. [Figure 11] FIG. 1 is a top view illustrating an example of a display device. [Figure 12] FIG. 1 is a perspective view showing an example of a touch panel. [Figure 13] FIG. 1 is a cross-sectional view showing an example of a display device. [Figure 14] FIG. 1 is a cross-sectional view illustrating a structural example of a transistor. [Figure 15] FIG. 1 is a cross-sectional view illustrating a structural example of a transistor. [Figure 16] FIG. 1 is a perspective view showing an example of an electronic device. [Figure 17] FIG. 1 is a perspective view showing an example of an electronic device. [Figure 18] 10 is a graph showing the rate of change in current due to correction of the threshold voltage. [Figure 19] A graph showing the relationship between image data (voltage) and the amount of current flowing through a transistor. [Figure 20] A graph showing the drain current and gate-source voltage characteristics of a transistor. [Figure 21] A photo of the prototype display device. DETAILED DESCRIPTION OF THE INVENTION

[0035] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the active layer of a transistor, the metal Oxides are sometimes called oxide semiconductors. In other words, metal oxides have amplifying and rectifying properties. and a channel forming region of a transistor having at least one of a switching function and a gate electrode. When the metal oxide can be formed, the metal oxide is called a metal oxide semiconductor. It can also be called OS FET or O When referring to an S transistor, it refers to a transistor having a metal oxide or oxide semiconductor. This can be rephrased as a transistor.

[0036] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides (metal ox). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0037] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention or a display device including the semiconductor device will be described. This section explains the location.

[0038] <Display device configuration> First, an example of the configuration of a display device will be described. 1 is a block diagram showing an example of a display device having light-emitting elements such as the above. A display unit PA and a source driver circuit SD and a gate driver circuit as peripheral circuits of the display unit PA. and a circuit GD.

[0039] The display unit PA has a plurality of pixels PIX. Only one of the several pixels PIX is shown, and the other pixels PIX are omitted. In addition, the plurality of pixels PIX of the display unit PA are arranged in a matrix. preferable.

[0040] In FIG. 1, the pixel PIX is electrically connected to the source driver circuit SD via a wiring DL. In addition, the pixel PIX is electrically connected to the gate driver circuit GD via the wiring GL. Since the display unit PA has a plurality of pixels PIX, the wiring DL Similarly, the number of pixels PIX electrically connected to the wiring GL may be plural. The number of pixels PIX to be displayed may be plural. A plurality of such circuits may be provided according to the number of pixels PIX included in the section PA. Depending on the circuit configuration, multiple wirings DL or multiple wirings GL may be connected to one pixel PIX. An electrical connection may also be used.

[0041] The pixel PIX can be configured to have one or more sub-pixels. For example, the pixel PI X has a configuration with one sub-pixel (red (R), green (G), blue (B), white (W), etc. any one of the colors), a structure having three sub-pixels (red (R), green (G), and blue (B)), or a configuration with four sub-pixels (red (R), green (G), blue Four colors: red (R), green (G), blue (B), yellow (Y) The color elements applied to the sub-pixels are not limited to the above, and may be any of the following: If necessary, cyan (C) and magenta (M) may be combined.

[0042] The source driver circuit SD outputs image data to be input to the pixels PIX included in the display unit PA. The image data is generated by the image processing unit 100 and transmitted to the pixel PIX.

[0043] The source driver circuit SD includes, for example, a shift register SR, a latch circuit LAT, and a A bell shift circuit LVS, a digital-to-analog conversion circuit DAC, an amplifier circuit AMP, and In FIG. 1, the output terminal of the shift register SR is is electrically connected to the clock input terminal of the latch circuit LAT, and the input terminal of the latch circuit LAT The terminal is electrically connected to the data bus wiring DB, and the output terminal of the latch circuit LAT is connected to the level shifter The output terminal of the level shift circuit LVS is electrically connected to the input terminal of the digital The digital-to-analog conversion circuit DAC is electrically connected to the input terminal of the digital-to-analog conversion circuit DAC. The output terminal of the DAC is electrically connected to the input terminal of the amplifier circuit AMP. The output terminal of the display unit PA is electrically connected to the display unit PA.

[0044] The latch circuit LAT, level shift circuit LVS, and digital The analog conversion circuit DAC and the amplifier circuit AMP are provided for one wiring DL. That is, the latch circuit LAT and the level shift circuit LVS are connected in accordance with the number of lines DL. a plurality of digital-to-analog conversion circuits DAC and a plurality of amplifier circuits AMP are provided; In this case, the shift register SR is required to synchronize the clocks of the multiple latch circuits LAT. The pulse signal may be transmitted sequentially to each of the clock input terminals.

[0045] The data bus wiring DB transmits digital signals including image data to be input to the display unit PA. The image data has a gradation, and the larger the gradation, the It can express changes in color or brightness with smooth gradation, and displays images that are close to nature. However, the larger the gradation, the larger the data volume of the image data. becomes large, and a high-resolution digital-to-analog conversion circuit must be used.

[0046] The input terminal of the latch circuit LAT receives a digital signal including image data from the data bus line DB. Then, the latch circuit LAT receives the signal transmitted from the shift register SR. The image data is stored or the stored image data is output from the output terminal according to the signal. Perform one of the following operations.

[0047] The level shift circuit LVS shifts the input signal to a higher or lower amplitude voltage. In Figure 1, the image data sent from the latch circuit LAT is converted into an output signal. The amplitude voltage of the digital signal including the data is converted to an analog signal by the digital-to-analog converter DAC. It has the role of converting the amplitude into voltage.

[0048] The digital-to-analog conversion circuit DAC converts the digital signal containing the input image data into an analog signal. and a function of converting the analog signal into a log signal and outputting the analog signal from an output terminal. In particular, when displaying multi-gradation image data on the display unit PA, the digital-to-analog conversion circuit D The AC needs to be a high-resolution digital-to-analog conversion circuit.

[0049] The amplifier circuit AMP amplifies the analog signal input to the input terminal and converts the analog signal The digital-to-analog conversion circuit DAC and the display unit PA have a function to output from the output terminal. By providing an amplifier circuit AMP between the two, image data can be sent stably to the display unit PA. The amplifier circuit AMP is a voltage follower circuit with an operational amplifier. It is possible to apply the following. In addition, when a circuit having a differential input circuit is used as an amplifier circuit, In this case, it is preferable to make the offset voltage of the differential input circuit as close to 0V as possible.

[0050] By performing the above-mentioned operation, the source driver circuit SD The digital signal containing the image data is converted into an analog signal and sent to the display unit PA. It is possible.

[0051] The gate driver circuit GD selects image data from among the multiple pixels PIX included in the display area PA. It has the function of selecting the pixel PIX to which the data is input.

[0052] As a method for inputting image data to the display unit PA, for example, the gate driver circuit GD , a selection signal is sent to a plurality of pixels PIX electrically connected to a certain wiring GL. , the write switching elements for the image data included in the plurality of pixels PIX are turned on, Then, the source driver circuit SD transmits image data to multiple pixels PIX via wiring DL. All you have to do is send the data and write it.

[0053] Note that one embodiment of the present invention is not limited to the configuration of the display device DD shown in FIG. In one embodiment, the components of the display device DD are appropriately selected depending on the circumstances such as design specifications and purposes. It can be a modified one.

[0054] <Pixel configuration example 1> Next, an example of the configuration of the pixel PIX will be described. ) can be applied. To show the electrical connection relationship with IX, the gate driver circuit GD and the source driver circuit The diagram also shows the path SD, the display unit PA, the wiring DL, and the wiring GL.

[0055] The pixel PIX shown in FIG. 2A includes an image data holding unit 101, a driving circuit unit 102, and a display and a display element 103.

[0056] The image data storage unit 101 is electrically connected to the drive circuit unit 102. is electrically connected to the display element 103.

[0057] The image data holding unit 101 receives the image data sent from the source driver circuit SD via the wiring DL. The image data storage unit 101 also has a function of storing image data. For holding, a write switching element, a capacitive element, etc. may be provided.

[0058] The display element 103 has a function of controlling the light emitted from the pixel PIX. The image data storage unit 101 stores the image data (which can be expressed as brightness, gradation level, etc.). It depends on the image data held.

[0059] The display element 103 may be, for example, an inorganic EL element, an organic EL element, or other light-emitting element; A liquid crystal element of a reflective type, a liquid crystal element, or the like can be applied.

[0060] The drive circuit unit 102 controls the display in accordance with the image data stored in the image data storage unit 101. It has a function of driving the element 103. For example, the display element 103 may be an organic EL element. When an element whose luminance is determined by a current is used, the drive circuit unit 102 determines the luminance by the current. The driving transistor may be a display element. It has a function of supplying a driving current to the transistor 103 .

[0061] The wiring VA is electrically connected to the pixel PIX. The holding unit 101 has a capacitance line for holding image data, and the driving circuit unit 102 has a capacitance line for driving the driving circuit unit 102. Therefore, the wiring VA can be one or more wirings. The configuration of the wiring VA is not limited to the above, and may be changed as appropriate depending on the configuration of the pixel PIX. For example, when the display element 103 is a light-emitting element such as an organic EL element, In this case, the wiring VA can be a current supply line for driving the light emitting element. Furthermore, for example, when the display element 103 is a liquid crystal element, unlike a light emitting element, the wiring VA is connected to the power It is not necessary to use a current supply line.

[0062] In the description of the display device DD in FIG. 1, the wiring GL is , has the function of transmitting a selection signal in advance. In the display device DD having the above, the wiring GL is connected between the pixel PIX and the wiring VA in FIG. The device may have a function of transmitting a signal to switch between a conductive state and a non-conductive state. Therefore, the wiring GL can be made into a plurality of wirings to transmit a plurality of signals. This allows the voltage and / or current supplied from the wiring VA to be temporarily stopped.

[0063] <Pixel configuration example 2> The pixel PIX may also have a function to correct image data. The configuration of the pixel PIX is shown in the block diagram of FIG. 2(A) is provided with a correction data holding unit 104.

[0064] The correction data storage unit 104 electrically connects the image data storage unit 101 and the drive circuit unit 102. are actively connected.

[0065] The correction data holding unit 104 receives the correction data sent from the circuit WSD via the wiring WDL. and a function of storing the image data stored in the image data storage unit 101 based on the correction data. and a function for correcting the image data.

[0066] In this case, the drive circuit unit 102 stores the image data corrected in the correction data storage unit 104. The display element 103 is driven in accordance with the data.

[0067] The correction data holding unit 104 also includes a write switch for holding the correction data. The semiconductor device may include a capacitance element, a capacitance element, and the like.

[0068] As a method for correcting image data, for example, a method using a capacitive element can be mentioned. In the correction data holding unit 104, the correction data is stored in one of the pair of terminals of the capacitance element. The first potential corresponding to the capacitance element is held at the first potential, and then one of the pair of terminals of the capacitance element is set in an electrically floating state. In this state, in the image data holding unit 101, image data is stored in the other terminal of the pair of the capacitive elements. As a result, the first potential of one of the pair of terminals of the capacitance element is held. The potential is assumed to rise and fall according to the second potential due to capacitive coupling, and become a third potential. The third potential corresponds to the corrected image data. 2, the drive circuit unit 102 drives the display element 103 in accordance with the third potential. It can be done.

[0069] The circuit WSD is a correction circuit for correcting an image displayed by the pixels PIX included in the display unit PA. The function of generating the correction data and the function of transmitting the correction data to the pixel PIX are as follows: In FIG. 2B, both the circuit WSD and the source driver circuit SD are shown. However, for example, the source driver circuit SD may have a configuration including the functions of the above-mentioned circuit WSD. Specifically, it may be possible to use a demultiplexer or the like inside the source driver circuit SD or at the output destination. By providing the above, image data and correction data are sent from one circuit to each of the wiring DL and wiring WDL. The data may be transmitted.

[0070] By applying the pixel PIX shown in FIG. 2B to the display device DD, the image data can be stored. The image data stored in the correction data storage unit 101 is corrected by the correction data stored in the correction data storage unit 104. Image correction can be performed according to the data. Image correction here means, for example, increasing brightness. Examples include conversion to width and multi-tone images.

[0071] In FIG. 2B, the correction data sent from the circuit WSD to the pixel PIX is If the signal driver circuit SD can generate the signal, the circuit WSD can be omitted and the wiring WDL can be used as the software. The circuit may be electrically connected to the source driver circuit SD. The pixel PIX and its peripheral circuits shown in Figure 3 are driven by a source driver circuit SD. The image data is generated and sent to the image data holding unit 101 via the wiring DL. The source driver circuit SD generates correction data and transmits the correction data to the wiring W. The circuit configuration shown in FIG. 3 is such that the correction data is transmitted to the correction data holding unit 104 via DL. By applying this to the display device DD, the circuit area of ​​the display device DD can be reduced. do.

[0072] <<Pixel circuit configuration example 1>> Next, a specific circuit configuration of the pixel PIX shown in FIG. 2(B) will be described. 2B shows an example of the circuit configuration of the pixel PIX shown in FIG.

[0073] The pixel PIX shown in FIG. 4 includes transistors Tr1 to Tr5 and a capacitor. The light emitting element LD includes a capacitor C1, a capacitor C2, and a light emitting element LD. L, wiring GL1 to wiring GL3, wiring VL, wiring AL, and wiring CAT are electrically connected to the pixel PIX. are actively connected.

[0074] Transistor Tr1, transistor Tr2, transistor Tr4, and transistor T r5 function as a switching element. It functions as a drive transistor that controls the current flowing through the LD. The transistors Tr1 to Tr5 have the transistor configurations described in Embodiment 3 below. It is possible.

[0075] The wiring DL is a wiring for transmitting image data to the pixel PIX, and is shown in FIG. The wiring WDL can be a wiring corresponding to the image data. This is the wiring for transmitting the correction data, and corresponds to the wiring WDL shown in Figure 2(B). In addition, each of the wirings GL1 to GL3 can be a line. The signal line GL is a selection signal line for the corresponding signal line GL, and can be a wiring corresponding to the wiring GL shown in FIG. 2B. .

[0076] The wiring VL is a wiring for applying a predetermined potential to a specific node in the pixel PIX. In addition, the wiring AL is a wiring for supplying a current to the light emitting element LD. L and the wiring AL can be wirings corresponding to the wiring VA shown in FIG. 2(B).

[0077] The wiring CAT is a wiring for applying a predetermined potential to the output terminal of the light emitting element LD. The potential may be, for example, a reference potential, a low-level potential, or a potential lower than these. In addition, the wiring CAT can be the wiring equivalent to the wiring VA shown in Figure 2(B). The wiring CAT supplies a common potential to the plurality of pixels PIX included in the display area PA. It is preferable that the wiring function as a wiring for providing the signal.

[0078] The first terminal of the transistor Tr1 is electrically connected to the first terminal of the capacitance element C1. The second terminal of the transistor Tr1 is electrically connected to the wiring DL, and the gate of the transistor Tr1 is The first terminal of the transistor Tr2 is electrically connected to the wiring GL1. A voltage is applied to the gate of the transistor Tr3, the second terminal of the capacitance element C1, and the first terminal of the capacitance element C2. The second terminal of the transistor Tr2 is electrically connected to the wiring WDL. The gate of the transistor Tr2 is electrically connected to the wiring GL2.

[0079] In this embodiment, the first terminal of the transistor Tr1 and the first terminal of the capacitance element C1 The electrical connection point between the first terminal of the transistor Tr2 and the second terminal of the transistor Tr3 is called a node ND1. The voltage between the gate of the transistor Tr3, the second terminal of the capacitance element C1, and the first terminal of the capacitance element C2 is The electrical connection point is called node ND2.

[0080] The first terminal of the transistor Tr3 is electrically connected to the line AL. The second terminal of the transistor Tr4 is connected to the first terminal of the transistor Tr5, and the second terminal of the capacitor The second terminal of the transistor Tr4 is electrically connected to the second terminal of the capacitor C2. , the gate of the transistor Tr4 is electrically connected to the wiring GL1. The second terminal of the transistor Tr5 is electrically connected to the input terminal of the light-emitting element LD. The gate of the transistor Tr5 is electrically connected to the wiring GL3. The output terminal of the element LD is electrically connected to the wiring CAT.

[0081] The second terminal of the transistor Tr3 and the light emitting element LD are connected to the first terminal of the transistor Tr5. Since the transistor Tr5 is electrically connected between the first terminal and the second terminal, The second terminal of the transistor Tr3 and the input terminal of the light-emitting element LD are connected in either a conductive or non-conductive state. It functions as a switching element that can be switched between

[0082] The capacitance element C1 has a function of holding the potential difference between the node ND1 and the node ND2. The capacitor C2 has the function of maintaining the potential difference between the second terminal and gate of the transistor Tr3. It has.

[0083] In the pixel PIX of FIG. 4, at least one of the transistors Tr1 to Tr5 The first transistor is preferably an OS transistor. In particular, the OS transistor has a channel type In the composition region, indium, element M (element M is aluminum, gallium, yttrium, or It is preferable that the oxide contains at least one of tin and zinc. Such OS transistors are transistors Tr1 to Tr2. By applying this to at least one of the transistors Tr5, the off-state current of the applied transistor is reduced. The first terminal (node ​​ND1) of the capacitance element C1 can be kept low. In this case, by using the OS transistor as the transistor Tr1, the This prevents the data stored in ND1 from being destroyed. the second terminal of the capacitance element C1, the first terminal of the capacitance element C2 (node ​​ND2), and the When data is to be retained, the transistor Tr2 is an OS transistor, so that the off-current This prevents the data stored in the node ND2 from being destroyed. When the light emission of the ON / OFF switch is temporarily stopped, the ON / OFF switch can be turned on by using the OS transistor Tr5. It is possible to prevent the light emitting element LD from emitting light due to the current. By applying OS transistors to all of the transistors Tr5, Since the transistor can be formed simultaneously with the display area PA, the manufacturing process for the display area PA can be shortened. In other words, the production time of the display unit PA can be shortened, so It is possible to increase the number of units produced.

[0084] In addition, at least one of the transistors Tr1 to Tr5 may be provided with a channel A transistor having silicon in the transistor formation region can be applied (hereinafter, referred to as a Si transistor). Silicon is, for example, hydrogenated amorphous silicon, microcrystalline silicon, Crystalline silicon, polycrystalline silicon, single crystal silicon, etc. can be used. Some of the transistors Tr1 to Tr5 are Si transistors. The remaining transistors may be OS transistors.

[0085] The image data holding unit 101 shown in FIG. 2B includes, for example, a transistor Tr1 shown in FIG. The driving circuit unit 102 may include, for example, a transistor T The display element 103 may include, for example, transistors r3 to Tr5. The correction data storage unit 104 may have the light emitting element LD shown in FIG. 4. The image data holding unit 101, the drive The drive circuit unit 102 and the correction data holding unit 104 are respectively configured with the capacitance element C1 and the capacitance Since the function of holding the potential of each of the capacitance elements C1 and C2 is shared, It is not possible to uniquely determine which circuit each C2 is included in. In this case, the capacitance element C1 and the capacitance element C2 are respectively connected to the image data holding unit 101 and the driving circuit unit 102. 102, or correction data holding unit 104.

[0086] In FIG. 2, the display quality of the display device DD is determined by the driving circuit unit 102. In particular, the display element 103 may be affected by variations in the characteristics of the driving transistor. When a light emitting element LD is used, the influence becomes large. In order to increase the voltage, the threshold voltage of the transistor Tr3, which functions as a drive transistor, is If the threshold voltage is corrected by an external circuit of the display unit PA, The external circuit acquires the current flowing between the first terminal and the second terminal of the drive transistor. Since it is necessary to sequentially calculate image data using the current, the threshold voltage is compensated. This may take a long time and consume a lot of power.

[0087] <Pixel configuration example 3> One aspect of the present invention has been made in consideration of the above, and comprises an image data holding unit 101, a correction data The pixel PIX including the holding unit 104 is connected to the threshold of the driving transistor included in the driving circuit unit 102. The configuration is provided with a threshold voltage correction circuit section that corrects the low voltage. The external circuit of the display unit PA controls the image data according to the threshold voltage of the driving transistor. Since there is no need to perform calculations, the external circuit can be omitted in the display device DD. In addition, the threshold voltage correction circuit section is configured to apply a predetermined potential to the back gate of the driving transistor. In addition, by using a method for correcting the threshold voltage, the threshold voltage of the driving transistor can be corrected. It is possible to omit the calculation processing of the image data for performing the above.

[0088] An example of a circuit configuration of a pixel PIX, which is a semiconductor device of one embodiment of the present invention, is shown in block diagram form in FIG. The figure below shows the process.

[0089] The pixel PIX shown in FIG. 5A includes an image data holding unit 101 and a driving circuit unit 10 2, a display element 103, a correction data holding unit 104, and a threshold voltage correction circuit unit 105. The pixel PIX shown in FIG. 5A has a threshold voltage compensation value different from that of the pixel PIX shown in FIG. 2B. A positive circuit section 105 is provided.

[0090] The threshold voltage correction circuit section 105 is electrically connected to the drive circuit section 102 .

[0091] The threshold voltage correction circuit section 105 is a circuit for correcting the threshold voltage of the driving transistor included in the driving circuit section 102. The threshold voltage correction circuit 105 has a function of correcting the threshold voltage. It may have a switching element, a capacitance element, etc. to hold the voltage correction content. can.

[0092] The threshold voltage correction circuit unit 105 is electrically connected to the wiring GL, the wiring VA, etc. The selection signal sent from the wiring GL and the voltage and / or current sent from the wiring VA are used to So it can work.

[0093] By applying the pixel PIX shown in FIG. 5(A) to the display device DD, image data can be stored. In addition to the image data correction by the correction data holding unit 104 and the threshold voltage correction Correction of the threshold voltage of the driving transistor included in the driving circuit unit by the circuit unit This can be done.

[0094] Furthermore, the display device DD to which the pixel PIX shown in FIG. 5A is applied may be, for example, an organic EL element The light-emitting element such as an organic EL element is suitable for a display device using the light-emitting element as a display element. Since the brightness is determined by the magnitude of the current flowing through the light emitting element, the driving transistor that flows the current If there is variation in the characteristics of the resistors, it will lead to a decrease in the display quality of the display device. By applying the pixel PIX shown in FIG. 5(A) to the device, the threshold voltage of the driving transistor Since the voltage can be corrected, the current flowing through the driving transistor is The display quality of the display device can be prevented from deteriorating because the display does not fluctuate due to variations in characteristics. In addition, the correction data storage unit 104 included in the pixel PIX shown in FIG. By correcting the data, the display quality of the display device can be improved. In the case of display devices of this type, the characteristics of the driving transistors tend to vary greatly, By applying the pixel PIX shown in FIG. 5(A) to the display device, the variation in the characteristics can be reduced. In addition, the threshold voltage is corrected inside the pixel PIX. This eliminates the need for an external circuit to correct the threshold voltage, reducing costs. .

[0095] 5A and its peripheral circuit configuration is the same as that of FIG. The WSD is omitted, and the correction data is generated by the source driver circuit SD. The correction data may be transmitted to the correction data holding unit 104 via the wiring WDL. The configuration is shown in Fig. 5(B). By applying the circuit configuration shown in Fig. 5(B) to the display device DD, Therefore, the circuit WSD can be omitted, and the circuit area of ​​the display device DD can be reduced. can be done.

[0096] <<Pixel circuit configuration example 2>> Next, a specific circuit configuration of the pixel PIX shown in FIGS. 5(A) and 5(B) will be described. 6(A) illustrates an example of the circuit configuration of the pixel PIX shown in FIGS. 5(A) and 5(B).

[0097] The pixel PIX shown in FIG. 6A has a transistor Tr 7 and a capacitance element C3. IX is the pixel PIX shown in FIG. 4 in that the transistor Tr3 has a back gate. is different from.

[0098] The back gate of the transistor Tr3 is connected to the first terminal of the transistor Tr7 and the capacitance element C The second terminal of the transistor Tr7 is electrically connected to the wiring B The gate of the transistor Tr7 is electrically connected to the wiring GL4. The second terminal of the capacitance element C3 is connected to the second terminal of the transistor Tr3. A first terminal of the transistor Tr4, a first terminal of the transistor Tr5, and a second terminal of the capacitance element C2 are connected to each other. are electrically connected.

[0099] In this embodiment, the second terminal of the transistor Tr3 and the first terminal of the transistor Tr4 a first terminal of the transistor Tr5, a second terminal of the capacitance element C2, and a third terminal of the capacitance element C3. The electrical connection point between the two terminals is called node ND3, and the back gate of transistor Tr3 The electrical connection point between the first terminal of the transistor Tr7 and the first terminal of the capacitance element C3 is This is called ND4.

[0100] The wiring GL4 is a selection wiring for the pixel PIX, similar to each of the wirings GL1 to GL3. This is a selection signal line and corresponds to the line GL shown in FIGS. 5(A) and 5(B).

[0101] The wiring BGL is a wiring for applying a predetermined potential to a specific node in the pixel PIX. Moreover, the wiring BGL can be a wiring equivalent to the wiring VA shown in FIGS. 5(A) and 5(B). do.

[0102] The transistor Tr7 functions as a switching element. The structure of the transistor described in Embodiment 3 can be applied to the transistor. Transistor Tr7 is the same as transistor Tr1, transistor Tr2, and transistor Tr5. It is preferable that the transistor Tr7 is an OS transistor. Please refer to the description of the transistors Tr1 to Tr5.

[0103] The threshold voltage correction circuit unit 105 shown in FIGS. 5A and 5B includes, for example, a transistor Tr 7. The driver circuit unit 102 and the threshold voltage correction circuit unit 105 may include: Since the function of holding the potential of the capacitor C3 shown in FIG. 6A is shared, the capacitor C3 It is not possible to determine uniquely which circuit contains C3 is provided in either the drive circuit unit 102 or the threshold voltage correction circuit unit 105. It can be said that.

[0104] The transistors Tr1, Tr2, and Tr shown in FIG. 4. Transistor Tr5 and transistor Tr7 are transistors with back gates. The pixel PIX shown in FIG. 6(B) may have the same transistor as the pixel PIX shown in FIG. 6(A). Transistor Tr1, transistor Tr2, transistor Tr4, transistor Tr5, Each transistor Tr7 has a back gate. , transistor Tr1, transistor Tr2, transistor Tr4, transistor Tr5 , and transistor Tr7 have their gates and back gates electrically connected to each other. A transistor in which the gate and the back gate are electrically connected is Since the on-state current can be increased, the pixel P The pixel PIX shown in FIG. 6B can be operated quickly. Tr1, transistor Tr2, transistor Tr4, transistor Tr5, transistor All Tr7s are configured with gates and back gates connected, but the back gates have separate The pixel PIX shown in FIG. Transistor Tr1, transistor Tr2, transistor Tr4, transistor Tr5, Although all transistors Tr7 have back gates, some transistors A configuration in which a back gate is provided only on the semiconductor substrate may be used.

[0105] <<Pixel circuit configuration example 3>> In FIG. 7(A), the image shown in FIG. 5(A)(B) is different from the PIX shown in FIG. 6(A). 1 illustrates an example of the circuit configuration of a PIX.

[0106] The pixel PIX shown in FIG. 7A has a transistor structure different from the pixel PIX shown in FIG. The configuration is provided with a transistor Tr6.

[0107] The first terminal of the transistor Tr6 is connected to the second terminal of the transistor Tr2 and the second terminal of the transistor T The gate of r3 is electrically connected to the second terminal of the capacitance element C1 and the first terminal of the capacitance element C2. The second terminal of the transistor Tr6 is connected to the second terminal of the transistor Tr3. a first terminal of the transistor Tr4, a first terminal of the transistor Tr5, and a second terminal of the capacitance element C2; , and the second terminal of the capacitance element C3, and the gate of the transistor Tr6 is electrically connected to It is electrically connected to line GL4.

[0108] The transistor Tr6 functions as a switching element. The configuration described in the third embodiment can be applied to the transistor Tr6. Like transistor Tr1, transistor Tr2, and transistor Tr5, the OS transistor It is preferable that the other components of the transistor Tr6 are transistors. Please refer to the description of transistors Tr1 to Tr5.

[0109] The correction of the threshold voltage of the driving transistor Tr3 is shown in FIG. If it is desired to perform the process with higher accuracy than the pixel PIX, as shown in FIG. It is preferable to provide a transistor Tr6. When correcting the threshold voltage, The potentials of the second terminal (node ​​ND3) of the transistor Tr3 and the node ND2 are It is better to make them as equal as possible, so by applying the pixel PIX shown in FIG. 7(A), the threshold The potential difference between the node ND3 and the node ND2 when correcting the value voltage is shown in FIG. It can be brought closer to 0V than the original PIX.

[0110] By the way, the switching function of the transistor Tr6 is controlled by the drive circuit unit 102 and the correction data. Since the data holding unit 104 and the transistor Tr6 are shared, it is possible to determine which circuit the transistor Tr6 is included in. In other words, it is not possible to determine whether the transistor Tr6 is being driven. It can be said that the correction data is included in either the operation circuit unit 102 or the correction data holding unit 104. do.

[0111] <<Pixel circuit configuration example 4>> In FIG. 7(B), different from the PIX shown in FIGS. 6(A)(B) and 7(A), 5A and 5B show examples of the circuit configuration of the pixel PIX.

[0112] The pixel PIX shown in FIG. 7B is different from the pixel PIX shown in FIG. 6A in that the transistor The pixel PIX shown in FIG. 7B is the same as that shown in FIG. 6A and FIG. 6B. Since the number of transistors is smaller than that of the pixel PIX shown in FIG. 7(A), the area of ​​the pixel circuit is reduced. In addition, in the pixel PIX shown in FIG. When the light emitting element LD is not to emit light, no current should be passed through the input terminal of the light emitting element LD. Therefore, the potential applied to the wiring AL is lowered according to this timing, or the A voltage that turns off the transistor Tr3 can be applied to the gate of the transistor Tr3. In addition, when the potential applied to the wiring AL is lowered, the potential of the wiring AL is set lower than the potential of the wiring CAT. It is preferable to make it lower than that.

[0113] <Pixel operation example> Next, an example of the operation of the pixel circuit described above, particularly the pixel PIX shown in FIG. 6(A), will be described. do.

[0114] FIG. 8 is a timing chart showing an example of the operation of the pixel PIX shown in FIG. 6(A). The timing chart shown in FIG. 8 includes the time periods before time T1, time T1 to time T7, and time T 7 and thereafter, the wiring DL, the wiring WDL, the wiring VL, the wiring BGL, the wiring GL1 to the wiring G L4 and L5 show the changes in the potentials of the nodes ND1 to ND4. The "high" in the figure indicates a high level potential, and the "low" indicates a low level potential. V GND refers to the reference potential.

[0115] Before time T1, from time T1 to time T7, and after time T7, V1 is always applied to the wiring BGL, and V0 is always applied to the wiring BGL. The potential V1 is a potential lower than the voltage applied by the wiring AL, and the potential V0 is a potential higher than V1. Let's say.

[0116] In this example of operation, the transistors Tr1, Tr2, and Unless otherwise specified, transistors Tr4, Tr5, and Tr7 are In the ON state, the transistors Tr1 and Tr2 operate in the linear region. Transistor Tr2, transistor Tr4, transistor Tr5, and transistor Tr 7 and the gate voltage, source voltage, and drain voltage are the voltages in the range operating in the linear region. The voltage shall be appropriately biased.

[0117] In this example of operation, the transistor Tr3 operates in the saturated region unless otherwise specified. That is, the gate voltage, source voltage, and drain voltage of the transistor Tr3 are The drain voltage must be properly biased to a voltage within the range that operates in the saturation region. Even if the operation of transistor Tr3 deviates from the ideal operation in the saturation region, the output If the accuracy of the input current is within the desired range, the gate of transistor Tr3 can be The gate, source, and drain voltages are assumed to be appropriately biased.

[0118] [Just before time T1] Just before time T1, the wiring GL1 and the wiring GL3 are at a high level potential, and the wiring GL2 and A low level potential is applied to the wiring GL1 and the wiring GL4. When this occurs, a high level potential is applied to the gates of the transistors Tr1 and Tr4. is applied, the transistors Tr1 and Tr4 are turned on. Therefore, the line DL and the node ND1 are in a conductive state, and the line VL and the node ND3 are in a conductive state. When the potential of the wiring GL2 is at a low level, the transistor A low level potential is applied to the gate of Tr2, turning the transistor Tr2 off. That is, the wiring WDL and the node ND2 are in a non-conductive state. When the potential of GL3 is at a high level, a high level potential is applied to the gate of the transistor Tr5. is applied, the transistor Tr5 is turned on. The line GL4 is electrically connected to the first terminal of the transistor Tr5. When the potential of the transistor Tr7 is at a low level potential, a low level potential is applied to the gate of the transistor Tr7. Therefore, the transistor Tr7 is turned off. There is a non-conductive state between

[0119] Just before time T1, the wiring DL is at a potential V GND is applied to the wiring WDL, The potential V1 is applied to the node N The potential of D1 is V GND Also, since the transistor Tr4 is in the on state, The node ND3 and the wiring VL that applies the potential V1 are in a conductive state. Since Tr5 is also in the on state, the potential of node ND3 becomes lower than V1. A potential V1 is applied to the wiring WDL.

[0120] By the way, the difference between the potential of the node ND2 and the potential of the source of the transistor Tr3 (gate If the threshold voltage of transistor Tr3 is higher than the threshold voltage of transistor Tr3, Tr3 is turned on, and the transistor Tr3 is turned on according to the gate-source voltage of the transistor Tr3. The current flowing between the source and drain of transistor Tr3 is determined. When the second terminal of the transistor Tr1 is the source, the line AL is connected to the transistor Tr2 and the transistor T A current flows to the input terminal of the light emitting element LD via r5. In this example of operation, the potential of the node ND2 is In the timing chart shown in FIG. 8, the potential of the node ND2 is VGND It states:

[0121] [From time T1 to time T2 (first initialization period)] Between time T1 and time T2, the wiring GL2 and the wiring GL4 are applied with a high-level potential. As a result, the gates of the transistors Tr2 and Tr7 are Since a high level potential is applied to the transistor Tr2, the transistor Tr7 This causes the potential of the node ND2 to become V1, and the potential of the node ND4 to become V2. The potential at node ND3 is V0. Meanwhile, the transistor Tr5 is in the on state. Therefore, the potential remains lower than the potential V1 since before time T1.

[0122] [From time T2 to time T3 (second initialization period)] Between time T2 and time T3, a low-level potential is applied to the line GL3. As a result, a low level potential is applied to the gate of the transistor Tr5, Therefore, the node ND3 is connected to the transistor Tr5. Therefore, no current flows through the input terminal of the light emitting element LD.

[0123] The transistor Tr5 is in the off state and the transistor Tr4 is in the on state. Therefore, the potential of the node ND3 rises to V1. Since the transistor Tr4 is connected between the node ND3 and D3, the potential of the node ND3 is higher than V1. At this time, the node ND2 (the gate of the transistor Tr3) The potential at node ND3 (the second terminal of transistor Tr3) is approximately V Since the potential between the first terminal and the second terminal of the capacitance element C2 is 1, the potential between the first terminal and the second terminal of the capacitance element C2 is approximately 0V.

[0124] By the way, when the pixel PIX shown in FIG. 7A is applied, from time T2 to time T3, During this period, a high level potential is applied to the wiring GL4, so that the transistor Tr6 This causes a conduction state between the gate of the transistor Tr3 and the second terminal. Therefore, the potential between the first terminal and the second terminal of the capacitance element C2 becomes approximately 0V.

[0125] [From time T3 to time T4 (threshold voltage correction period)] Between time T3 and time T4, the wiring GL1 and the wiring GL2 are supplied with a low-level potential. This causes the transistors Tr1, Tr2, and Since a low level potential is applied to the gates of transistors Tr1 and Tr4, When the transistor Tr2 is turned on, the transistor Tr4 is turned off. When r1 is turned off, the first terminal (node ​​ND1) of the capacitance element C1 is supplied with a potential V GND is held, and the transistor Tr2 is turned off, so that the capacitance element C1 The second terminal, the first terminal of the capacitance element C2, and the gate (node ​​ND2) of the transistor Tr3 are connected to the Position V1 is maintained.

[0126] Here, the potential V1 of the node ND3 and the potential of the wiring AL determine the potential of the transistor Tr3. Assume that a high bias is applied between the first and second terminals. At this time, the transistor Tr3 is turned on, and current flows from the first terminal to the second terminal of transistor Tr3. can be.

[0127] However, since the transistors Tr4 and Tr5 are in the off state, The potential of the node ND3 is boosted by this current. The voltage between the second terminals is almost 0V, and the transistor Tr2 is in the off state (node Since ND2 is electrically floating, the gate-source voltage of transistor Tr3 is The potential of the node ND3 is increased, but remains at approximately 0 V.

[0128] The potential of the node ND3 is increased until the transistor Tr3 is turned off. Since the gate-source voltage of transistor Tr3 is almost 0V, the threshold voltage of transistor Tr3 When the voltage becomes equal to or exceeds 0, transistor Tr3 turns off. In other words, the back gate-source voltage of the transistor Tr3 is When the voltage reaches a value that makes the threshold voltage of transistor Tr3 zero, transistor Tr3 is turned off. The back gate-source of transistor Tr3 is set to 0. The voltage between the gates is V C When this is done, the potential of node ND3 is V0-V C This becomes:

[0129] Since the node ND2 is electrically floating, the potential of the node ND3 changes from V1 to V0- V C At the same time, the potential at the node ND2 is also boosted. The voltage boosted by this is determined by the capacitance coupling coefficient between the node ND2 and the node ND3. .

[0130] Also, since the transistor Tr1 is in the off state, the node ND1 is also electrically floating. Therefore, when the potential of the node ND2 is boosted, the potential of the node ND1 The voltage at node ND1 is also boosted. It is determined by the capacitive coupling coefficient between

[0131] When the pixel PIX shown in FIG. 7A is applied, the time from time T3 to time T4 During this time, the gate of transistor Tr3 and the second terminal are in a conductive state. The pixel PIX shown in FIG. 7A operates in the same manner as the pixel PIX shown in FIG. 6A. The operation of the pixel PIX shown in FIG. 7A after time T4 is the same as that shown in FIG. Please refer to the explanation of the operation of pixel PIX shown in A).

[0132] [From time T4 to time T5 (correction data writing period)] Between time T4 and time T5, a high-level potential is applied to the wiring GL1 and the wiring GL2. A low level potential is applied to the wiring GL4, and a low level potential is applied to the wiring GL5. A high level potential is applied to the gates of the transistors Tr2 and Tr4. Since a voltage is applied to the transistors Tr1, Tr2, and Tr4, , is turned on, and a low level potential is applied to the gate of the transistor Tr7. The transistor Tr7 is turned off, and the node ND4 is electrically floating. The potential of the node ND4 is held by the first terminal of the capacitive element C3.

[0133] In this operation example, at time T4, the wiring GL1, the wiring GL2, and the wiring GL4 Although the signals are input simultaneously, in the actual circuit, there is a delay between the signals sent from each wire. Therefore, each signal may not be input to the pixel PIX at the same time. When signal delay is taken into consideration, the high-level signal to the wiring GL1 and the wiring GL2 at time T4 is It is preferable to apply the potential to the node ND4 after making sure that the node ND4 is in an electrically floating state. In other words, it is preferable to apply a low-level potential to the wiring GL4 before time T4. .

[0134] In addition, between time T4 and time T5, the potential V corresponding to the correction data W Wiring It is applied to the WDL.

[0135] Since the transistor Tr1 is in the on state, there is no conduction between the wiring DL and the node ND1. Therefore, the potential V GND is applied. Since the transistor Tr2 is in the on state, the line WDL and the node ND2 are connected as follows: Therefore, the potential V W is applied.

[0136] Since the transistor Tr4 is in the on state, there is no conduction between the wiring VL and the node ND3. Therefore, the potential V1 is applied to the node ND3 from the wiring VL. Since the transistor Tr7 is in the off state (the node ND4 is in an electrically floating state), The potential of the node ND4 also changes due to the change in the potential of the node ND3. If the capacitance coupling coefficient between node ND3 and node ND4 is 1, the potential of node ND4 will change from V0 to V1 +V C At this time, the back gate-source voltage of the transistor Tr3 changes to From the voltage between time T3 and time T4, V C Since it has not changed, at time T4 Therefore, the threshold voltage of the transistor Tr3 becomes 0 at time T5.

[0137] [From time T5 to time T6 (image data writing period)] Between time T5 and time T6, a low level potential is applied to the line GL2. As a result, a low level potential is applied to the gate of the transistor Tr2, When the transistor Tr2 is turned off, the capacitance element The second terminal of C1, the first terminal of the capacitance element C2, the gate of the transistor Tr3 (node ​​ND2 ) to the potential V W is maintained.

[0138] In addition, between time T5 and time T6, the potential V corresponding to the image data DATA is applied to the wiring DL.

[0139] Since the transistor Tr1 is in the on state, there is no conduction between the wiring DL and the node ND1. Therefore, the potential V DATA is applied. However, since the transistor Tr2 is in the off state (the node ND2 is in an electrically floating state), ), the potential of the node ND2 also changes with the change in the potential of the node ND1. When the capacitance value of the node C1 is sufficiently larger than the capacitance value of the capacitance element C2, Since the capacitance coupling coefficient between ND1 and node ND2 approaches 1, The amount of change in potential is approximately equal to the amount of change in potential of node ND2. 2 is V DATA +V W This becomes:

[0140] [From time T6 to time T7 (image display period)] Between time T6 and time T7, a low level potential is applied to the line GL1. As a result, a low level potential is applied to the gate of the transistor Tr1, When the transistor Tr1 is turned off, the capacitance element The first terminal of C1 (node ​​ND1) is connected to the potential V DATA is maintained.

[0141] After a low-level potential is applied to the wiring GL1, a high-level potential is applied to the wiring GL3. As a result, a high level potential is applied to the gate of the transistor Tr5. When transistor Tr5 is turned on, wiring A The current flowing from L passes through transistors Tr3 and Tr5 and flows to the light-emitting element L Since the signal is input to the input terminal D, the light emitting element LD emits light.

[0142] At this time, the luminance of the light emitting element LD is determined by the current flowing through the light emitting element LD. According to Hoff's law, the current flowing through the light emitting element LD is The luminance of the light emitting element LD is approximately equal to the current flowing between the gate of the transistor Tr3 and the gate of the transistor Tr4. The gate and source of transistor Tr3 are each determined by the gate-source voltage. Since the first terminal and the second terminal of the element C2 are electrically connected, the luminance of the light-emitting element LD is , the potential V of the gate of transistor Tr3 DATA +V W Therefore, The light element LD emits light at a luminance according to the correction data and image data.

[0143] At this time, a voltage is applied between the input terminal and the output terminal of the light emitting element LD. Since a predetermined potential is applied to the wiring CAT, the second terminal of the transistor Tr3 a first terminal of the transistor Tr4, a first terminal of the transistor Tr5, and a capacitance element C The potential at the electrical connection point between the second terminal of capacitor C2 and the second terminal of capacitor C3 becomes high. , because each of the nodes ND1, ND2, and ND4 is in an electrically floating state. As the potential at the electrical connection point increases, the potential at the node ND1, the node ND2, and the node The potential of each of the nodes ND4 may also increase due to capacitive coupling. In the chart, the potentials of the nodes ND1 and ND2 after time T7 are between time T1 and time T2 and time T3. It shows.

[0144] As described above, for the pixel PIX shown in FIG. 6(A), Correction to image data is performed by performing operations at times T1 to T7 and times around those times. and correction of the threshold voltage of the drive transistor.

[0145] <Example of display device operation> Incidentally, when the display device DD including the pixel PIX shown in FIG. 6(A) is large, The resistance of the wiring electrically connected to the IX increases, and the threshold voltage of the drive transistor It may take time to process the image on the display device. When displaying, the operating frequency of the display device may become low.

[0146] Therefore, an example of operation that takes the above into consideration will be described. In this example of operation, The display device is applied to a display unit PA in which a plurality of pixels PIX are arranged in a matrix. It will be explained as such.

[0147] FIG. 9 shows the i-th, i+1-th, and i+2-th rows (i is an integer of 3 or more) included in the display unit PA. The order of operation of the pixels PIX included in each of the lines DL and the transmission of data from the lines DL are 1 shows the timing of data transmission from the wiring WDL. .

[0148] The times T1 to T6 shown in FIG. 9 are the same as the times T1 to T6 shown in the timing chart of FIG. That is, the periods PD1 to PD5 written in the i-th row correspond to the time T6. The "first initialization period," "second initialization period," and "threshold voltage correction period" in the above-mentioned pixel circuit operation example In Figure 9, For example, the durations of the periods PD1 to PD5 are set to 0.5 μs, 1.5 μs, and 1 The settings are 9μs, 2.0μs, and 2.0μs.

[0149] In particular, as described above, when the display device including the pixel PIX is large, the driving transistor It may take time to correct the threshold voltage of the capacitor. The time is set longer than the other periods (PD1, PD2, PD4, PD5).

[0150] Furthermore, the operation of the pixel PIX shown in FIG. 9, particularly the period PD4 and the period PD5, In this operation, each pixel PIX in the i-th row, the i+1-th row, and the i+2-th row has Appropriate correction data and image data are written to each of them. In the above description, among the plurality of pixels PIX in the i-th row, the i+1-th row, and the i+2-th row, The pixels PIX in the same column will now be described.

[0151] As shown in FIG. 9, in addition to the pixel PIX in the i-th row, those in the i+1-th and i+2-th rows are also included. For each pixel PIX, the operations for the periods PD1 to PD5 are performed. In the i+1th row, the i+2th row, and the i+3th row, the periods PD1, PD2, and PD3 are In other words, the pixel PIX of a certain row is When the period is PD1, PD2, PD4, or PD5, The pixel PIX is set to be in the period PD3.

[0152] In the operation example of the display device shown in FIG. 9, the operation of transmitting data from the line DL is as follows: Period PD GND and period PD DATA [i-2]~Period PD DATA [i+2] and Period PD GND is applied to the wiring DL. GND is applied. PD DATA [k] (k is an integer between i-2 and i+2) is the wiring DL. A potential corresponding to the image data to be written is applied to the node ND1 of the pixel PIX in the second row. This is the period in which

[0153] In addition, in the operation example of the display device shown in FIG. 9, Operation is period PD V1 and period PD W [i-2]~Period PD W [i+2] and Period PD V1 is the period during which the potential V1 is applied to the wiring WDL. W [k ] is the correction data to be written to the node ND2 of the pixel PIX in the k-th row of the wiring WDL. The potential according to the pixel circuit (V W) is applied. It is between.

[0154] In the operation of the pixel PIX of one of the rows, the period PD1 (first initialization During this period, the potential V of node ND1 GND To achieve this, the wiring DL is connected to a potential V GND is applied That is, when the pixel PIX of the row is operating during the period PD1, ,In the wiring DL, the period PD GND In addition, during the period PD1, In order to set the potential of the node ND2 to V1, the potential V1 is applied to the wiring WDL. When the pixel PIX of the row is operating during the period PD1, , period PD V1 The operation is being performed.

[0155] In the operation of the pixel PIX of one of the multiple rows, During the write period, the correction data is written to the node ND2, and the wiring WDL is A potential corresponding to positive data is applied. That is, in the I-th row (I is an integer equal to or greater than 1), When the pixel PIX operates during the period PD4, the wiring WDL operates during the period PD W [I] action is being performed.

[0156] In the operation of the pixel PIX of one of the rows, during the period PD5 (image data During the write period, image data is written to the node ND1, and the wiring DL is That is, in the pixel PIX in the I-th row, a potential corresponding to the data is applied. When the operation is performed, the line DL is DATA [I] action is performed There are.

[0157] As shown in FIG. 9, the threshold voltage of the driving transistor in the pixel PIX on the (i+1)th row is When performing the correction, the pixel PIX of the row performs the operation for the period PD3. In the first pixel PIX, a potential is written to the node ND1 via the wiring DL, and a potential is written to the wiring W Since there is no need to write a potential to the node ND2 via the wiring DL, Therefore, the pixel PIX in the (i+1)th row is turned on during the period PD During the operation of 3, in the pixel PIX of the i-th row, The potential of the wiring DL and the potential of the wiring WDL can be changed by each of these operations. That is, while the threshold voltage of the driving transistor of the pixel PIX in the (i+1)th row is being corrected, Image data and correction data can be written to the pixels PIX in the i-th row. Also, as shown in FIG. 9, the threshold voltage of the driving transistor of the pixel PIX in the (i+2)th row is Similarly, when correction is being performed, the potential of the wiring DL and the potential of the wiring WDL are changed. Therefore, image data and correction data are written to the pixel PIX in the (i+1)th row. It is possible.

[0158] In FIG. 9, correction data is applied to the pixels PIX in each row in the order of the i-th row to the i+2-th row. The correction data and image data are written to the pixel PIX. The order of writing correction data and image data to pixel PIX is not limited to that shown in FIG. For example, first, the odd-numbered pixels PIX are written sequentially, and then the even-numbered pixels PIX are written sequentially. The order may be such that the data is written to the first address in the first address sequence.

[0159] Note that the operation method according to one embodiment of the present invention is not limited to the above-described periods PD1 to PD5. In this specification, the operation periods shown in FIG. 9 are classified by function and are independent of each other. However, in actual operation, the operation period of the pixel PIX It is difficult to separate operations by function, and one operation may involve multiple other operations, or multiple operations may be involved. There may be cases where one operation is involved over several operations. Therefore, the operation period shown in FIG. is not limited to each operation period described in the specification, but may be rephrased appropriately depending on the situation. Specifically, depending on the situation, the order of each operation period can be changed, an operation can be added, For example, in this specification, the movement of pixel PIX shown in FIG. In this operation, the period PD1 and the period PD2 are respectively referred to as a first initialization period and a second initialization period. Although the first and second initialization periods are described separately, they are actually performed simultaneously. Therefore, the first initialization period and the second initialization period are collectively called the initialization period. It can be written as:

[0160] As described above, the threshold voltage of the driving transistor of the pixel PIX in a certain row is corrected. While the image data and correction data are being written to the pixels PIX in another row, Therefore, the reduction in the operating frequency due to the correction of the threshold voltage of the driving transistor of the display device is This allows the operating frequency to be higher than in the conventional operating method.

[0161] <Example of circuit configuration of source driver circuit SD and circuit WSD> Here, the pixel PIX and its peripheral circuit have the configuration shown in FIG. 5(A), and the pixel PI When X performs the operation of the timing chart shown in FIG. 8, the source driver circuit SD and the circuit An example of a circuit configuration with WSD will be explained.

[0162] FIG. 10A shows the relationship between the source driver circuit SD and the circuit WSD in FIG. 5A. The circuit configuration examples of each are shown. Note that FIG. 10(A) shows the connection configuration with the pixel PIX. For this reason, a display unit PA is also shown.

[0163] The source driver circuit SD includes a transistor Tr11, a transistor Tr12, and a circuit The circuit WSD also includes a transistor Tr13 and a transistor Tr 14 and a circuit WSDa.

[0164] In FIG. 10, transistors Tr11 to Tr14 are n-channel transistors. Although the transistors Tr11 to Tr14 are all of the transistors Tr11 to Tr14, Alternatively, some of the transistors may be p-channel transistors. The transistor Tr14 is preferably an OS transistor with a low off-state current.

[0165] FIG. 10 shows transistors Tr11 to Tr14 with their back gates Although the transistors Tr11 to Tr All or part of the transistors 14 may be transistors without a back gate. Each of the transistors Tr11 to Tr14 has a gate in order to increase the on-current. The gate and back gate of the transistor Tr11 are electrically connected. A given potential is applied to all or part of the back gates of the transistors Tr1 to Tr14. The light emitting device may be electrically connected to a wiring that can be obtained.

[0166] In the source driver circuit SD, the first terminal of the transistor Tr11 is connected to the circuit SDa. The second terminal of the transistor Tr11 is electrically connected to the first terminal of the transistor Tr12. The gate of the transistor Tr11 is electrically connected to the wiring DL. The second terminal of the transistor Tr12 is electrically connected to the wiring GNDL. The gate of the transistor Tr12 is electrically connected to the wiring SELG. do.

[0167] In order to display an image on the display unit PA, the circuit SDa generates a potential V DATA to generate a potential V DATA to the first terminal of transistor Tr11. The circuit SDa can have the configuration of the source driver circuit SD shown in FIG. That is, the circuit SDa has a shift register SR and a latch to generate image data. A circuit LAT, a level shift circuit LVS, a digital-to-analog conversion circuit DAC, and an amplifier In this case, the amplifier circuit A If the output terminal of MP is electrically connected to the first terminal of transistor Tr11, good.

[0168] In the circuit WSD, the first terminal of the transistor Tr13 is electrically connected to the circuit WSDa. The second terminal of the transistor Tr13 is connected to the first terminal of the transistor Tr14 by a wiring. The gate of the transistor Tr13 is electrically connected to the wiring SELW The second terminal of the transistor Tr14 is electrically connected to the wiring V1L. The gate of the transistor Tr14 is electrically connected to the wiring SELV.

[0169] The circuit WSDa corrects the image to be displayed on the display unit PA using the correction data. The potential V according to the correction data W to generate a potential V W the first terminal of transistor Tr13 The circuit WSDa has a function of outputting the shift register, for example, in the same way as the circuit SDa. a latch circuit LAT, a level shift circuit LVS, and a digital-to-analog conversion circuit It can be configured to have a DAC, an amplifier circuit AMP, and a data bus line DB. In this case, the output terminal of the amplifier circuit AMP is connected to the first terminal of the transistor Tr13. The configuration may be such that the signal line is electrically connected to the

[0170] The wiring SELD, wiring SELG, wiring SELW, and wiring SELV are transistors. The wiring is for applying a potential to the gates of the transistors Tr11 to Tr14. The on and off states of the transistors Tr11 to Tr14 are controlled by the You can switch between states.

[0171] The wiring GNDL has a reference potential V GND This is the wiring that gives the V1L is a wiring that applies a potential V1 to the wiring WDL.

[0172] Here, when the operation of the pixel PIX is the operation example shown in the timing chart of FIG. The operation of the source driver circuit SD and circuit WSD of 10(A) will now be described in detail.

[0173] Before time T4 and after time T5, the potential of the wiring WDL is V1. In the circuit WSD before time T4 and after time T5, the wiring SELW is at a low level. A potential is applied to turn off the transistor Tr13, and a high-level voltage is applied to the wiring SELV. A potential is applied to turn on the transistor Tr14. Since the wiring V1L and the wiring WDL are electrically connected, the potential of the wiring WDL becomes V1.

[0174] Between time T4 and time T5, the potential of the wiring WDL is V W It has become In the circuit WSD between time T4 and time T5, a high level potential is applied to the wiring SELW. When this voltage is applied, transistor Tr13 is turned on, and a low-level potential is applied to the wiring SELV. The transistor Tr14 is turned off by the application of a voltage to the circuit WSDa. From the potential V according to the correction data W is output, so the potential of the wiring WDL is V W This becomes:

[0175] Before time T5 and after time T6, the potential of the wiring DL is V GND It has become Before time T5 and after time T6, in the source driver circuit SD, the line SEL A low level potential is applied to D, turning off the transistor Tr11, and the wiring SELG A high level potential is applied to the terminal Tr12, causing the transistor Tr12 to be turned on. This brings the line GNDL and line DL into a conductive state, so the potential of line DL is V GND This becomes:

[0176] In addition, between time T5 and time T6, the potential of the wiring DL is V DATA Became Between time T5 and time T6, the source driver circuit SD has a line SELD. A high level potential is applied to the line SELG to turn on the transistor Tr11. A low level potential is applied to turn off the transistor Tr12. The circuit SDa outputs a potential V according to the image data. DATA is output, so the potential of the wiring DL is V DATA This becomes:

[0177] When the pixel PIX shown in FIG. 5A operates as shown in the timing chart of FIG. By configuring the source driver circuit SD and the circuit WSD as shown in FIG. 10(A), An appropriate potential can be applied to each of the line DL and the wiring WDL at the appropriate time.

[0178] The pixel PIX and its peripheral circuitry are configured as shown in FIG. 5B, and the pixel PIX is configured as shown in FIG. When performing the operation of the timing chart shown in FIG. The circuit configuration shown in (B) can be used.

[0179] The source driver circuit SD shown in FIG. 10B includes transistors Tr11 to Tr14. The transistors Tr11 to Tr14 and the circuit SDa are also included. Tr14 and the circuit SDa are the same as the transistors Tr11 to Tr14 in FIG. Please refer to the description of starter Tr14 and circuit SDa.

[0180] The circuit SDa is connected to the first terminal of the transistor Tr11 and the first terminal of the transistor Tr13. The second terminal of the transistor Tr11 is electrically connected to the 12 and the wiring DL, and the second terminal of the transistor Tr13 is electrically connected to the first terminal of the transistor Tr14 and the wiring WDL. The second terminal of the transistor Tr12 is electrically connected to the wiring GNDL. The second terminal of the transistor Tr14 is electrically connected to the wiring V1L. The gate of the transistor Tr12 is electrically connected to the wiring SELD. G, and the gate of transistor Tr13 is electrically connected to wiring SELW. The gate of the transistor Tr14 is electrically connected to the wiring SELV.

[0181] Wiring SELD, wiring SELG, wiring SELW, wiring SELV, wiring V1L, and wiring G Regarding each of NDL, the wiring SELD, the wiring SELG, and the wiring SEL Please refer to the descriptions of W, wiring SELV, wiring V1L, and wiring GNDL.

[0182] The connection configuration of transistor Tr11, transistor Tr13, and circuit SDa is as shown in Figure 5. The source driver circuit SD shown in (B) selects either the wiring DL or the wiring WDL. The circuit SDa is configured to apply a potential to the selected wiring. potential V according to the image data DATA and the complementary voltage to be applied to the wiring WDL. Potential V according to positive data W Therefore, the circuit SDa generates a potential V DATA When generating and outputting, the transistor Tr11 is turned on, and the transistor Tr 13 is turned off, the potential V DATA can be applied to the circuit S Potential V in Da W When generating and outputting, transistor Tr11 is in the off state, and transistor By turning on transistor Tr13, a potential V W can be applied.

[0183] Also, the reference potential V GND When applying a voltage to the transistor Tr11, the transistor Tr11 is turned off. The transistor Tr12 is turned on by applying a reference potential V1 When applying a voltage, the transistor Tr13 is turned off and the transistor Tr14 is turned on. This should be considered as such.

[0184] Here, when the operation of the pixel PIX is the operation example shown in the timing chart of FIG. 8, The operation of the source driver circuit SD in FIG. 10(B) will be specifically described.

[0185] Before time T4 and after time T5, the potential of the wiring WDL is V1. In the source driver circuit SD before time T4 and after time T5, the wiring SELW A low level potential is applied to the line SELV to turn off the transistor Tr13. A high level potential is applied to the transistor Tr14, causing it to turn on. As a result, the line V1L and the line WDL are electrically connected, and the potential of the line WDL is It becomes V1.

[0186] Between time T4 and time T5, the potential of the wiring WDL is V W It has become In the source driver circuit SD between time T4 and time T5, the line SELW is A level potential is applied to turn on transistor Tr13, and a low level potential is applied to wiring SELV. A bell potential is applied to turn off the transistor Tr14. The circuit SDa outputs a potential V according to the correction data. W is output, the potential of the wiring WDL is V W This becomes:

[0187] Before time T5 and after time T6, the potential of the wiring DL is V GND It has become Before time T5 and after time T6, in the source driver circuit SD, the line SEL A low level potential is applied to D to turn off the transistor Tr11, and a low level potential is applied to the wiring SELG. A high level potential is applied to turn on the transistor Tr12. As a result, the line GNDL and the line DL are in a conductive state, and the potential of the line DL becomes V G ND This becomes:

[0188] In addition, between time T5 and time T6, the potential of the wiring DL is V DATA Became Between time T5 and time T6, the source driver circuit SD has a line SELD. A high level potential is applied to the line SELG to turn on the transistor Tr11. A bell potential is applied to turn off the transistor Tr12. From SDa, a potential V according to the image data is generated. DATA is output, the potential of the wiring WDL is V DATA This becomes:

[0189] When the pixel PIX shown in FIG. 5B operates as shown in the timing chart of FIG. By configuring the source driver circuit SD as shown in FIG. 10(B), the wiring DL and the wiring Appropriate potentials can be applied to each of the WDLs at the appropriate time.

[0190] In this specification and the like, in the block diagrams, the components are classified by function and are shown as being independent of each other. However, in actual circuits, components are divided into blocks according to their functions. It is difficult to separate them, and there are cases where multiple functions are involved in one circuit, or where multiple circuits are involved. Therefore, the blocks shown in the block diagram are The components are not limited to those described above, but may be rephrased appropriately depending on the situation.

[0191] Note that one embodiment of the present invention is the above-described structure shown in FIGS. 2(A) and 2(B), 3, and 5(A) and 5(B). 2(A)(B), 3, 5(A) and 6(B) are not limited to the pixel PIX. The configuration of the pixel PIX shown in (B) may be modified as appropriate. For example, The pixel PIX shown in A) and (B) includes an image data holding unit 101, a driving circuit unit 102, and an auxiliary circuit. The image data holding unit 101 and the original data holding unit 104 are electrically connected to each other. The electrical connection between the image data storage unit 102 and the drive circuit unit 102 may be omitted. The image data is transmitted from the image sensor 101 to the drive circuit unit 102 via the correction data storage unit 104. For example, between the drive circuit unit 102 and the correction data holding unit 104, In other words, the electrical connection from the correction data storage unit 104 to the image data storage unit 105 may be omitted. The correction data is sent to the image data storage unit 101, and the corrected image data is generated in the image data storage unit 101. The signal may be transmitted to the driver circuit unit 102.

[0192] Note that this embodiment mode may be appropriately combined with other embodiment modes and / or examples shown in this specification. It can be combined.

[0193] (Embodiment 2) In this embodiment, a configuration example of a display device using an EL element as a display element will be described. In this embodiment, the driving circuit unit and the threshold voltage The explanation of the pressure correction circuit section will be omitted.

[0194] In FIG. 11A, a display portion 215 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided, and the display portion 215 is attached to the sealant 4005 and the second substrate. It is sealed by 4006.

[0195] The display unit 215 is provided with a pixel array having the pixels PIX described in the first embodiment. .

[0196] In FIG. 11A, a scanning line driving circuit 221a, a signal line driving circuit 231a, a signal line driving circuit The circuit 232a and the common line driving circuit 241a are each provided on a printed circuit board 4041. The integrated circuits 4042 are made of a single crystal semiconductor or a polycrystalline semiconductor. The signal line driving circuit 231a and the signal line driving circuit 232a are made of a crystalline semiconductor. This has the function of the source driver circuit SD shown in the first embodiment. The common line driver circuit 24 has the function of the gate driver circuit GD shown in the first embodiment. 1a is a circuit for applying a predetermined potential to a predetermined circuit element of the pixel PIX shown in the first embodiment. In particular, the common line driver circuit 241a and the pixel PIX have the function of: Electrical connection can be achieved through the wiring VA shown in the first embodiment.

[0197] The scanning line driving circuit 221a, the common line driving circuit 241a, the signal line driving circuit 231a, and Various signals and potentials are applied to the signal line driving circuit 232a via an FPC (Flexible Printed Circuit) The power supply is supplied via a 4018 printed circuit.

[0198] The integrated circuit 4042 included in the scanning line driver circuit 221a and the common line driver circuit 241a is The signal line driver circuit 231a has a function of supplying a selection signal to the display unit 215. The integrated circuit 4042 included in the driver circuit 232a has a function of supplying an image signal to the display unit 215. The integrated circuit 4042 is surrounded by a sealant 4005 on the first substrate 4001. It is implemented in a different area from the area where it is installed.

[0199] The method of connecting the integrated circuit 4042 is not particularly limited, and may be wire bonding. COG (Chip On Glass) method, TCP (Tape Carrier Package method, COF (Chip On Film) method, etc. can be used. do.

[0200] FIG. 11B shows the integrated circuit included in the signal line driver circuit 231a and the signal line driver circuit 232a. This shows an example in which an integrated circuit 4042 is implemented by the COG method. The entire device can be formed integrally on the same substrate as the display unit 215 to form a system-on-panel. can.

[0201] In FIG. 11B, the scanning line driver circuit 221a and the common line driver circuit 241a are 215. The driving circuit is formed on the same substrate as the pixel circuit in the display section 215. By forming them simultaneously, the number of parts can be reduced, thereby increasing productivity. can be done.

[0202] In addition, in FIG. 11B, the display portion 215 and the scanning line A sealant 400 is provided to surround the drive circuit 221a and the common line drive circuit 241a. 5 is provided. In addition, a display unit 215, a scanning line driving circuit 221a, and a common line driving circuit The second substrate 4006 is provided on the path 241a. The drive circuit 221a and the common line drive circuit 241a are mounted on the first substrate 4001 and the seal material 4 The display element is sealed by the second substrate 4006 and the second substrate 4005 .

[0203] In addition, in FIG. 11B, the signal line driver circuit 231a and the signal line driver circuit 232a are separately 4001 and mounted on the first substrate 4001, but the present invention is not limited to this configuration. The scanning line driver circuit may be formed separately and mounted, or may be mounted as part of the signal line driver circuit or the scanning line driver circuit. A part of the line driver circuit may be formed separately and mounted.

[0204] The display device includes a panel in which a display element is sealed, and a controller for the panel. This may also include modules in which ICs, etc., including lasers, are mounted.

[0205] The display portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor is an OS transistor or a transistor having a silicon dioxide layer in a channel formation region. A transistor having a capacitor can be applied.

[0206] Structure of a transistor included in a peripheral driver circuit and a transistor included in a pixel circuit of a display unit The transistors in the peripheral driver circuit may be the same or different. They may all have the same structure, or two or more types of structures may be used in combination. Similarly, the transistors in the pixel circuit may all have the same structure, or may have two or more types of structures. A combination of structures may also be used.

[0207] In addition, an input device 4200 (described later) can be provided on the second substrate 4006 . The display device shown in FIGS. 11(A) and 11(B) provided with an input device 4200 is configured as a touch panel. This can be used to make it function.

[0208] There is no limitation on the detection element (also referred to as a sensor element) included in the touch panel of one embodiment of the present invention. Various sensors that can detect the proximity or contact of a finger, stylus, or other object. can be applied as a sensing element.

[0209] The sensor type may be, for example, a capacitance type, a resistive film type, a surface acoustic wave type, or an infrared type. Various methods can be used, such as a conventional method, an optical method, or a pressure-sensitive method.

[0210] In this embodiment, a touch panel having a capacitance type detection element will be described as an example. do.

[0211] The capacitance type includes the surface capacitance type and the projected capacitance type. The shadow capacitance method includes the self-capacitance method and the mutual capacitance method. This is preferable because it enables simultaneous multi-point detection.

[0212] The touch panel according to one embodiment of the present invention is formed by bonding a display device and a sensing element that are separately manufactured. A structure in which a detection element is formed on one or both of a substrate supporting a display element and an opposing substrate. Various configurations can be applied, such as a configuration in which an electrode or the like is provided.

[0213] 12(A) and (B) show examples of touch panels. FIG. 12(A) shows a touch panel. 12(B) is a perspective view of the input device 4200. ,For clarity, only representative components are shown.

[0214] The touch panel 4210 is constructed by bonding a display device and a sensing element that are separately manufactured. is.

[0215] The touch panel 4210 has an input device 4200 and a display device, which are set up in a stacked manner. It is being used.

[0216] The input device 4200 includes a substrate 4263, an electrode 4227, an electrode 4228, and a plurality of wirings 423. 7, a plurality of wirings 4238 and a plurality of wirings 4239. For example, the electrode 4227 has wirings The electrode 4228 can be electrically connected to the line 4237 or the wiring 4239. The FPC 4272b can be electrically connected to the wiring 4239. 7 and each of the plurality of wirings 4238. 73b may be provided.

[0217] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. A touch sensor may be provided between the first substrate 4001 and the second substrate 4006. In this case, in addition to the capacitive touch sensor, there are also optical touch sensors that use photoelectric conversion elements. may be applied.

[0218] FIG. 13 is a cross-sectional view of the portion indicated by the chain line N1-N2 in FIG. 11(B). The display device shown has an electrode 4015, which is connected to a terminal of an FPC 4018. 13, the electrode 4 is electrically connected to the anisotropic conductive layer 4019. 015 is inserted into the openings formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110. The wiring 4014 is electrically connected to the wiring 4014.

[0219] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030. The source and drain electrodes of the transistor 4010 and the transistor 4011 They are formed from the same conductive layer.

[0220] The display unit 215 and the scanning line driver circuit 221a provided on the first substrate 4001 are The display unit 215 includes a plurality of transistors. In FIG. 13, the display unit 215 includes a transistor 40. 10 and a transistor 4011 included in the scan line driver circuit 221a are illustrated. In FIG. 13, the transistors 4010 and 4011 are bottom gate Although a gate-type transistor is shown as an example, a top-gate transistor may also be used. The transistor 4010 may be the transistor Tr5 described in the first embodiment. The transistor 4011 can be implemented in the gate driver circuit described in the first embodiment. The transistors may be included in the GD.

[0221] In FIG. 13, an insulating layer 4112 is formed on the transistor 4010 and the transistor 4011. In addition, a partition wall 4510 is formed over the insulating layer 4112.

[0222] The transistor 4010 and the transistor 4011 are provided over an insulating layer 4102. The transistor 4010 and the transistor 4011 are formed by insulating layers 411. The electrode 4017 functions as a back gate electrode. It is possible.

[0223] The display device shown in FIG. 13 further includes a capacitor 4020. An electrode 4021 formed in the same process as the gate electrode of the transistor 4010, and a source electrode and and an electrode formed in the same process as the drain electrode. The capacitor 4020 overlaps with the capacitor described in the first embodiment. It can be either the capacitance element C2 or the capacitance element C3.

[0224] Generally, the capacitance of a capacitor provided in a pixel portion of a display device is determined by the capacitance of a transistor disposed in the pixel portion. The resistor is set to be able to hold charge for a specified period, taking into consideration factors such as leakage current. The capacitance of the capacitor may be set in consideration of the off-state current of the transistor and the like.

[0225] The transistor 4010 provided in the display portion 215 is electrically connected to a display element.

[0226] 13 also includes an insulating layer 4111 and an insulating layer 4102. The insulating layer 4102 is an insulating layer that is difficult for impurity elements to penetrate. By sandwiching the transistor between the insulating layer 4102 and the semiconductor layer 11, impurities from the outside can be prevented from penetrating into the semiconductor layer. This can be prevented.

[0227] As a display element included in the display device, a light-emitting element using electroluminescence ( An EL element can be applied. An EL element contains a light-emitting compound between a pair of electrodes. A layer (also referred to as an "EL layer") containing a voltage higher than the threshold voltage of the EL element is provided between a pair of electrodes. When a threshold potential difference is generated, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the light-emitting material contained in the EL layer It glows.

[0228] EL elements are also distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element.

[0229] When a voltage is applied to an organic EL element, electrons are emitted from one electrode and positive electrons are emitted from the other electrode. The holes are injected into the EL layer, and then the carriers (electrons and holes) recombine. By this, the light-emitting organic compound is excited and returns to the ground state. Due to this mechanism, such a light-emitting element is a current-excited light-emitting element. is called an element.

[0230] In addition to the light-emitting compound, the EL layer may contain a material with high hole injection properties and a material with high hole transport properties. materials, hole blocking materials, high electron transport materials, high electron injection materials, or bipolar The insulating layer may contain a photosensitive substance (a substance having high electron-transporting and hole-transporting properties).

[0231] The EL layer can be produced by a variety of methods, including vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating. It can be formed by the following method.

[0232] Inorganic EL elements are classified into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The emission mechanism is a donor- The thin-film inorganic EL element is an acceptor recombination type luminescence element. The luminescent layer is sandwiched between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism is the inner shell electron transition of the metal ion. This is a localized light emission that utilizes organic EL elements. do.

[0233] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. A transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. There are two types of structures: top emission (top emission) where light is extracted from the top surface of the substrate, and bottom emission (bottom emission) where light is extracted from the bottom surface of the substrate. bottom emission structure and dual emission structure that emits light from both sides. There are light emitting elements with a light-emitting (emission) structure, and light emitting elements with any of the emission structures can be applied.

[0234] FIG. 13 shows a light-emitting display device (also called an "EL display device") that uses light-emitting elements as display elements. The light-emitting element 4513, which is a display element, is a transistor provided in the display portion 215. The light-emitting element 4513 is electrically connected to the first transistor 4010. The laminated structure is made up of a polar layer 4030, a light-emitting layer 4511, and a second electrode layer 4031. The light emitting element 451 may be arranged in accordance with the direction of light to be extracted from the light emitting element 4513. The structure of the light-emitting element 4513 described in Embodiment 1 can be changed as appropriate. The light emitting element LD can be formed as such.

[0235] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030 using a resin material, and the side of the opening is continuous. It is preferable to form the inclined surface with a certain curvature.

[0236] The light-emitting layer 4511 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's

[0237] The light emitting element 4513 emits light in a variety of colors, including white, red, green, and blue, depending on the material that makes up the light emitting layer 4511. It can be blue, cyan, magenta, or yellow, for example.

[0238] To achieve color display, a white light-emitting element (4513) is combined with a colored layer. There are two methods: one is to combine the two, and the other is to provide a light emitting element 4513 with a different luminescent color for each pixel. The former method has higher productivity than the latter method. Since it is necessary to separately produce 1, the productivity is lower than the former method. In addition to the latter method, the emission color can be obtained with higher color purity than the former method. By adding a microcavity structure to the optical element 4513, color purity can be further improved. This can be done.

[0239] The light-emitting layer 4511 may contain an inorganic compound such as quantum dots. By using quantum dots in the light-emitting layer, they can also function as a light-emitting material.

[0240] The second electrode is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4513. A protective layer may be formed on the layer 4031 and the partition wall 4510. The protective layer may be formed of silicon nitride. Silicon, silicon oxide nitride, aluminum oxide, aluminum nitride, aluminum oxide nitride , aluminum oxide nitride, DLC (Diamond Like Carbon), etc. In addition, the first substrate 4001, the second substrate 4006, and the sealing material The space sealed by 4005 is sealed with a filler 4514. In order to prevent exposure to the outside air, a protective film (lamination) with high airtightness and low outgassing is used. It can be packaged (enclosed) in a protective film (film, UV curable resin film, etc.) or a cover material. preferable.

[0241] Filler 4514 can be inert gas such as nitrogen or argon, or ultraviolet curing resin. Alternatively, thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. A desiccant may also be included.

[0242] Sealant 4005 is made of glass materials such as glass frit and two-component resin. Use resin materials such as room temperature curing resin, photocuring resin, and thermosetting resin. Furthermore, the sealing material 4005 may contain a desiccant.

[0243] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. ), retardation plates (λ / 4 plate, λ / 2 plate), color filters, and other optical films are provided as needed. Alternatively, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. This allows for anti-glare treatment to be applied, which can diffuse reflected light and reduce glare.

[0244] In addition, by using a microcavity structure for the light-emitting element, it is possible to extract light with high color purity. In addition, by combining a microcavity structure with a color filter, This reduces interference and improves the visibility of the displayed image.

[0245] A first electrode layer and a second electrode layer (a pixel electrode layer and a common electrode layer) that apply a voltage to the display element , counter electrode layer, etc.), the direction of the light to be extracted, the location of the electrode layer, The light transmission property or reflectivity can be selected depending on the pattern structure of the electrode layer.

[0246] The first electrode layer 4030 and the second electrode layer 4031 are made of indium containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide oxide, indium tin oxide, indium tin oxide with titanium oxide, indium zinc oxide A conductive material with light-transmitting properties, such as indium tin oxide with silicon oxide added, is used. It is possible.

[0247] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum (Mo). Mo, Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium ( Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Metals such as tungsten (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) It can be formed using one or more of metals, their alloys, or their metal nitrides. do.

[0248] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For this purpose, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives Conductor, or copolymer consisting of two or more of aniline, pyrrole and thiophene, or and derivatives thereof.

[0249] In addition, since transistors are easily damaged by static electricity, etc., a protective circuit for protecting the drive circuit is It is preferable to provide a path. The protection circuit is preferably constructed using a non-linear element.

[0250] Note that this embodiment mode may be appropriately combined with other embodiment modes and / or examples shown in this specification. It can be combined.

[0251] (Embodiment 3) In this embodiment, a semiconductor device or a display device according to one embodiment of the present invention can be used. The structure of the transistor will be described.

[0252] The semiconductor device or the display device of one embodiment of the present invention includes a bottom-gate transistor or a The transistors can be fabricated using various types of transistors, such as top-gate transistors. Therefore, the semiconductor layer material and transistor structure to be used can be adjusted to suit the existing production line. can be easily replaced.

[0253] [Bottom-gate transistor] FIG. 14(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 14A1 is a cross-sectional view of a transistor 810. In FIG. 14A1, the transistor 810 is The transistor 810 is formed on a substrate 771 with an insulating layer 772 formed on the substrate 771. The semiconductor layer 742 is formed on the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer. It can function as such.

[0254] In addition, an insulating layer 741 is provided over a channel formation region of the semiconductor layer 742. Electrodes 744a and 744b are provided on the insulating layer 726 in contact with a portion of the insulating layer 742. Electrode 744a can function as either a source electrode or a drain electrode. , which can function as the other of the source electrode and the drain electrode. A portion of the electrode 744 b is formed on the insulating layer 741 .

[0255] The insulating layer 741 can function as a channel protection layer. By providing the insulating layer 1, the insulating layer 100 of the semiconductor layer 742 generated when the electrodes 744a and 744b are formed can be effectively prevented. Therefore, when the electrodes 744a and 744b are formed, the semiconductor This can prevent the channel formation region of the layer 742 from being etched. According to this method, a transistor with good electrical characteristics can be realized.

[0256] The transistor 810 has an insulating layer 744 a, an insulating layer 744 b, and an insulating film 741. It has an edge layer 728 and an insulating layer 729 on top of the insulating layer 728 .

[0257] When an oxide semiconductor is used for the semiconductor layer 742, the electrode 744a and the electrode 744b At least in the area in contact with the semiconductor layer 742, oxygen is taken from a part of the semiconductor layer 742, and oxygen deficiency is formed. It is preferable to use a material that can generate oxygen vacancies in the semiconductor layer 742. The carrier concentration in the region where this occurs increases, and the region becomes n-type, forming an n-type region (n + layer) Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, oxygen is taken from the semiconductor layer 742, and oxygen vacancies occur. Examples of materials that can generate this include tungsten and titanium. Cut.

[0258] The source and drain regions are formed in the semiconductor layer 742, forming an electrode 744. Therefore, the contact resistance between the electrode 744a and the semiconductor layer 742 can be reduced. To improve the electrical characteristics of transistors, such as field effect mobility and threshold voltage. can be done.

[0259] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744 a, and between the semiconductor layer 742 and the electrode 744b, an n-type semiconductor or a p-type semiconductor is It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. , can function as the source or drain region of a transistor.

[0260] The insulating layer 729 has a function of preventing or reducing the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 729 using a material having the insulating properties. It can also be omitted.

[0261] The transistor 811 shown in FIG. 14A2 has a back gate electrode over the insulating layer 729. The transistor 810 differs from the transistor 810 in that it has an electrode 723 that can function as a It can be made of the same materials and methods as pole 746 .

[0262] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or any other potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor The threshold voltage can be varied.

[0263] Both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 each serve as a gate insulating layer. The electrode 723 is provided between the insulating layer 728 and the insulating layer 729. It is okay to do so.

[0264] When one of the electrodes 746 and 723 is referred to as a "gate electrode," the other is referred to as a "bar For example, in the transistor 811, the electrode 723 is called a "gate electrode." When referring to "electrodes," the electrode 746 is referred to as a "back gate electrode." When the transistor 811 is used as a top gate electrode, In addition, either the electrode 746 or the electrode 723 can be considered as a type of The first gate electrode may be referred to as the "first gate electrode" and the other as the "second gate electrode."

[0265] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 sandwiched therebetween, the electrode 7 By setting the potential of the electrode 46 and the electrode 723 at the same potential, carriers flow in the semiconductor layer 742. The area becomes larger in the film thickness direction, and the amount of carrier movement increases. As the on-state current of the transistor 811 increases, the field-effect mobility also increases.

[0266] Therefore, the transistor 811 is a transistor having a large on-current relative to its area. That is, the area occupied by the transistor 811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It is possible.

[0267] In addition, the gate electrode and back gate electrode are formed from a conductive layer, so that the external The function of preventing the electric field generated by the The back gate electrode has a function of shielding the electric field against vapors and other harmful substances. By forming the semiconductor layer in a thin film and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0268] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, This prevents light from entering the semiconductor layer from the electrode side, thereby preventing light degradation of the semiconductor layer. This prevents deterioration of electrical characteristics such as a shift in the threshold voltage of a transistor. do.

[0269] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0270] FIG. 14(B1) shows a channel protection transistor, which is one of bottom gate transistors. 8 shows a cross-sectional view of transistor 820. Transistor 820 is similar to transistor 810. 7, except that an insulating layer 741 covers the edge of the semiconductor layer 742. In addition, a portion of the insulating layer 741 overlapping the semiconductor layer 742 is selectively removed to form an opening. In this case, the semiconductor layer 742 and the electrode 744a are electrically connected to each other. In another opening formed by selectively removing a part of the insulating layer 741 overlapping the semiconductor layer The insulating layer 741 overlaps the channel forming region and is electrically connected to the electrode 744b. This region can function as a channel protection layer.

[0271] The transistor 821 illustrated in FIG. 14B2 has a back gate electrode over the insulating layer 729. The transistor 820 differs from the transistor 820 in that it has an electrode 723 that can function as a transistor.

[0272] By providing the insulating layer 741, the semiconductor generated when the electrodes 744a and 744b are formed can be prevented. Therefore, the formation of the electrode 744a and the electrode 744b can be prevented. In some cases, it is possible to prevent the semiconductor layer 742 from becoming thin.

[0273] Also, the transistors 820 and 821 are the same as the transistors 810 and 821. The distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 744c are smaller than the distance between the electrode 744a and the electrode 746 and the electrode 744b. Therefore, the distance between the electrodes 744a and 746 is increased. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. can.

[0274] The transistor 825 shown in FIG. 14C1 is a bottom-gate transistor. The transistor 825 is a channel-etched transistor. The electrodes 744a and 744b are formed without using the A part of the semiconductor layer 742 that is exposed when the electrode 744b is formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be increased.

[0275] The transistor 826 shown in FIG. 14C2 has a back gate electrode over the insulating layer 729. The transistor 724 differs from the transistor 825 in that it has an electrode 723 that can function as a transistor.

[0276] [Top-gate transistor] The transistor 842 illustrated in FIG. 15A1 is a top-gate transistor. The transistor 842 is formed by forming the insulating layer 729 and then The points forming 744b are transistors 810, 811, 820, 821, 825, and 826. The electrode 744a and the electrode 744b are formed on the insulating layer 728 and the insulating layer 729. The insulating film 742 is electrically connected to the semiconductor layer 742 through the opening.

[0277] Also, a part of the insulating layer 726 that does not overlap with the electrode 746 is removed, and the electrode 746 and the remaining insulating layer 726 are separated. Impurities 755 are introduced into the semiconductor layer 742 using the layer 726 as a mask, thereby forming a semiconductor Impurity regions can be formed in a self-aligned manner in layer 742 ( 15A3). In the transistor 842, the insulating layer 726 does not extend beyond the edge of the electrode 746. The semiconductor layer 742 has an area extending from the insulating layer 726. The impurity concentration in the region where the insulating layer 726 is introduced is higher than that in the region where the impurity 755 is introduced without the insulating layer 726 being interposed. Therefore, the semiconductor layer 742 has an LDD (Light Diode) in the region that does not overlap with the electrode 746. A highly doped drain region is formed.

[0278] The transistor 843 shown in FIG. 15A2 has the electrode 723. 42. The transistor 843 has an electrode 723 formed on a substrate 771. The electrode 723 has a region overlapping with the semiconductor layer 742 with the insulating layer 772 interposed therebetween. 3 can function as a back gate electrode.

[0279] In addition, the transistor 844 shown in FIG. 15B1 and the transistor 845 shown in FIG. 15B2 As in the case of the sta 845, the insulating layer 726 in the area not overlapping with the electrode 746 may be entirely removed. In addition, the transistor 846 shown in FIG. 15(C1) and the transistor 848 shown in FIG. 15(C2) The insulating layer 726 may remain, as may the sta 847.

[0280] The transistors 842 to 847 are also formed by forming the electrode 74 after forming the electrode 746. 6 as a mask, an impurity 755 is introduced into the semiconductor layer 742, and the semiconductor layer 74 According to one aspect of the present invention, an impurity region can be formed in a self-aligned manner in the semiconductor substrate. A transistor with good characteristics can be realized. A highly integrated semiconductor device can be realized.

[0281] Note that this embodiment mode may be appropriately combined with other embodiment modes and / or examples shown in this specification. It can be combined.

[0282] (Fourth embodiment) In this embodiment, the semiconductor device can be used for the OS transistor described in the above embodiment. CAC-OS (Cloud-Aligned Composite Silicon Oxide) Oxide Semiconductor), and CAAC-OS (c-axis Al Ignition Crystalline Oxide Semiconductor In the specification, CAC is used to describe an example of the function or material configuration. CAAC represents an example of a crystal structure.

[0283] <Metal oxide composition> CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. The material has insulating properties in some parts and semiconductor properties in the whole material. Note that CAC-OS or CAC-metal oxide is used as the active material for the transistor. When used in a layer, the conductive function is to allow electrons (or holes) to flow as carriers. The insulating function is to prevent the flow of electrons, which act as carriers. By making the functions of the two complementary to each other, the switching function (On / Off) is realized. CAC-OS or CAC-metal oxide is given the function of In CAC-OS or CAC-metal oxide, By separating the functions, the functionality of both can be maximized.

[0284] In addition, CAC-OS or CAC-metal oxide is a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive region and the insulating region in the material are formed by nanoparticle layers. The conductive and insulating regions may be separated by a bell. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. This may be the case.

[0285] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and The insulating regions are each 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material at sizes of less than 1 m.

[0286] In addition, CAC-OS or CAC-metal oxide has different band gaps For example, CAC-OS or CAC-metal ox The ide consists of a wide-gap component due to the insulating region and a conductive component due to the conductive region. In this configuration, when carriers flow, In addition, carriers mainly flow in the narrow gap component. The component with a narrow gap acts complementary to the component with a wide gap. Carriers also flow into the wide-gap component in conjunction with the component that has a wide gap. CAC-OS or CAC-metal oxide is used as the channel formation region of the transistor. When used in a transistor, it has a high current driving force in the on-state, i.e., a large on-current. , and high field-effect mobility can be obtained.

[0287] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a matrix composite.

[0288] <Metal oxide structure> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS and polycrystalline oxide semiconductors. , nc-OS(nanocrystalline oxide semiconductor or), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor) and amorphous oxide semiconductor.

[0289] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure is distorted by the connection of multiple nanocrystals. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. This refers to the point where the direction of the

[0290] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in CAAC-OS, clear grain boundaries (grain bows) are not observed even near the strain. It is not possible to confirm the presence of grain boundaries (also called grain boundaries). This is because the CAAC-OS has a crystalline structure in the ab-plane direction. The oxygen atoms are not densely packed, and the bond distance between atoms is shortened by the substitution of metal elements. This is thought to be because distortion can be tolerated by changing the thickness of the film.

[0291] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). When the element M in the (M,Zn) layer is replaced with indium, the (In,M,Zn) ) layer. Also, when indium in the In layer is replaced with element M, it can be expressed as (In, It can also be expressed as the M layer.

[0292] CAAC-OS is an oxide semiconductor with high crystallinity. Since it is not possible to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries occurs. In addition, the crystallinity of oxide semiconductors can be affected by impurities and defects. Therefore, CAAC-OS is an oxidized material with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors having CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is designed to withstand the high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when a CAAC-OS is used for an OS transistor, This allows for greater freedom.

[0293] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0294] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor. A-like OS has pores or low density areas. e-OS has lower crystallinity than nc-OS and CAAC-OS.

[0295] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductors in The compound may have two or more of the c-OS and CAAC-OS.

[0296] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0297] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. Furthermore, a highly reliable transistor can be realized. do.

[0298] In addition, an oxide semiconductor with low carrier density is preferably used for the transistor. When the carrier density of the oxide semiconductor film is reduced, the impurity concentration in the oxide semiconductor film is reduced. In this specification and the like, the impurity concentration is low, and the defect level density is low. A low density of defect states is called high purity intrinsic or substantially high purity intrinsic. For example, oxide Semiconductors have a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's all Just do that.

[0299] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Since the density is low, the trap level density may also be low.

[0300] In addition, the time required for the charges trapped in the trap levels of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. This may be the case.

[0301] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, it is effective to reduce It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0302] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0303] When oxide semiconductors contain silicon or carbon, which are elements of Group 14, they are oxidized. Defect levels are formed in semiconductors, which is why defects in silicon and carbon in oxide semiconductors The concentration of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) (concentration obtained by SIMS) was 2 × 10 18 atoms / cm 3 The following is preferably is 2 x 10 17 atoms / cm 3 The following applies.

[0304] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, the defect level is Therefore, alkali metals or alkaline earth metals A transistor using an oxide semiconductor containing such a compound tends to be normally on. Therefore, it is possible to reduce the concentration of alkali metals or alkaline earth metals in the oxide semiconductor. Specifically, it is preferable to use an alkali metal or The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0305] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the oxide semiconductor containing nitrogen is easily converted into an n-type semiconductor. Therefore, the transistor used in the oxide semiconductor tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, the nitrogen content in the oxide semiconductor is The concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Below, More preferably 5×10 17 atoms / cm 3 The following applies.

[0306] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, the hydrogen in the oxide semiconductor tends to cause a transistor to be normally on. It is preferable that the amount of Si in the oxide semiconductor is as small as possible. The hydrogen concentration obtained by MS was 1×10 20 atoms / cm 3 Less than 1x, preferably 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than , and more preferably 1 × 10 18 atoms / cm 3 Less than.

[0307] By using an oxide semiconductor with sufficiently reduced impurities for a channel formation region of a transistor, This makes it possible to impart stable electrical properties.

[0308] Note that this embodiment mode may be appropriately combined with other embodiment modes and / or examples shown in this specification. It can be combined.

[0309] (Embodiment 5) In this embodiment, the semiconductor device or the display device described in the above embodiment is used in an electronic device. We will explain some examples of products that are applied to this.

[0310] <Notebook personal computer> The semiconductor device or the display device according to one embodiment of the present invention is a display included in an information terminal device. FIG. 16(A) shows a notebook PC, which is a type of information terminal device. It is a personal computer, and includes a housing 5401, a display unit 5402, a keyboard 5403, a pointing device, and a It has a control device 5404 and the like.

[0311] <Smartwatch> The semiconductor device or the display device of one embodiment of the present invention can be applied to a wearable terminal. Figure 16(B) shows a smart watch, a type of wearable device, with a housing 59 01, a display unit 5902, operation buttons 5903, an operator 5904, a band 5905, etc. In addition, a display device having a function as a position input device is used as the display unit 5902. The function as a position input device may be realized by providing a touch panel on the display device. Alternatively, the function as a position input device can be added by using a photo sensor. It can also be added by providing a photoelectric conversion element, also called a photodiode, in the pixel section of the display device. The operation button 5903 includes a power switch for starting the smart watch, The buttons for operating the watch's applications, the volume control button, or the display 5902 It can be equipped with a switch to turn on or off the light. In the smart watch shown in B), the number of operation buttons 5903 is two. The number of operation buttons that the watch has is not limited to this. , which functions as a crown for setting the time on the smartwatch. In addition to setting the time, the watch is also used as an input interface for operating smartwatch applications. It may be used as a smart watch interface. In the example, the controller 5904 is provided, but the present invention is not limited to this. It may be configured not to have this.

[0312] <Video camera> The semiconductor device or the display device according to one embodiment of the present invention can be applied to a video camera. The video camera shown in FIG. 16C includes a first housing 5801, a second housing 5802, a display unit 5803, and a display unit 5804. 803, operation keys 5804, a lens 5805, a connection part 5806, etc. The lens 5805 and the lens 5804 are provided in the first housing 5801, and the display unit 5803 is provided in the second housing. The first housing 5801 and the second housing 5802 are connected to each other. The first housing 5801 and the second housing 5802 are connected by a portion 5806, and the angle between the first housing 5801 and the second housing 5802 is The image on the display unit 5803 can be changed by the connection unit 5806. 6, and a configuration in which the switching is performed according to the angle between the first housing 5801 and the second housing 5802. You may do so.

[0313] <Mobile phone> The semiconductor device or the display device of one embodiment of the present invention can be applied to a mobile phone. 16(D) is a mobile phone having an information terminal function, and includes a housing 5501, a display unit 5502, and a , a microphone 5503, a speaker 5504, and an operation button 5505. A display device with a function as a position input device may be used as the display device 02. In addition, the function as a position input device can be added by providing a touch panel on the display device. Alternatively, the function as a position input device can be achieved by using a photoelectric conversion device also known as a photosensor. The operation button 5 can also be added by providing the element in the pixel portion of the display device. The 505 has a power switch to start the mobile phone and buttons to operate the mobile phone's applications. A button, a volume control button, or a switch for turning on or off the display portion 5502. It can have either one.

[0314] In addition, the mobile phone shown in FIG. 16(D) has two operation buttons 5505. However, the number of operation buttons on a mobile phone is not limited to this. The mobile phone shown in FIG. 16(D) is a light-emitting device for use as a flashlight or illumination. The configuration may include a device.

[0315] <Television equipment> The semiconductor device or the display device according to one embodiment of the present invention can be applied to a television set. The television device shown in FIG. 16E includes a housing 9000, a display portion 9001, a speaker, and a speaker unit. 9003, operation keys 9005 (including power switch or operation switch), connection terminal 9006, etc. The television device has a large screen, for example, 50 inches or more, or It is possible to incorporate a display unit 9001 of 100 inches or more.

[0316] <Mobile object> The semiconductor device or display device according to one embodiment of the present invention is suitable for use in the vicinity of a driver's seat in an automobile, which is a moving object. It can be used.

[0317] For example, FIG. 16(F) is a diagram showing the area around the windshield inside the interior of an automobile. In FIG. 16(F), a display panel 5701 attached to the dashboard and a display panel 5 702, a display panel 5703, and a display panel 5704 attached to the pillar are also shown. are.

[0318] The display panels 5701 to 5703 display navigation information, a speedometer, - By displaying the tachometer, mileage, fuel gauge, gear status, air conditioning settings, etc. In addition, various information can be provided. The design can be changed to suit the user's preferences, enhancing the design. The display panels 5701 to 5703 can be used as lighting devices. It is also possible.

[0319] The display panel 5704 displays an image captured by an imaging means provided on the vehicle body. This allows the driver to compensate for the blind spot (blind spot) that is blocked by the pillar. By displaying images from the provided imaging means, blind spots can be compensated for and safety can be improved. In addition, by projecting images that complement the invisible parts, it is possible to make the sense of incongruity appear more natural. The display panel 5704 can also be used as a lighting device. can.

[0320] <Electronic devices for electronic advertising> The semiconductor device or the display device according to one embodiment of the present invention can be used as a display for electronic advertising. Figure 17(A) shows an electronic signboard (digital sign) that can be attached to a wall. FIG. 17(A) shows an example of an electronic signboard 6200 attached to a wall 6201. This shows how it is being used.

[0321] <Foldable tablet-type information terminal> The semiconductor device or the display device of one embodiment of the present invention can be applied to a tablet information terminal. FIG. 17(B) shows a tablet-type information device that can be folded. The information terminal shown in FIG. 17B includes a housing 5321a and a housing 5321b. , a display unit 5322, and an operation button 5323. In particular, the display unit 5322 is It has a flexible base material, which allows it to be folded. Cut.

[0322] The housing 5321a and the housing 5321b are connected by a hinge portion 5321c. The hinge portion 5321c allows the display portion 532 to be folded in half. 2 is provided on the housing 5321a, the housing 5321b, and the hinge portion 5321c.

[0323] Although not shown, in FIGS. 16(A) to 16(C), (E), 17(A), and 17(B), The electronic device shown may have a microphone and a speaker. For example, the electronic device described above can be provided with a voice input function.

[0324] Although not shown, the same as those shown in FIGS. 16(A), (B), (D), 17(A), and (B) The electronic device may have a camera.

[0325] Although not shown, the electric fields shown in FIGS. 16(A) to 16(F) and 17(A) and 17(B) The slave device has sensors (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance) inside the housing. , light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation (including functions to measure temperature, flow rate, humidity, gradient, vibration, odor, or infrared rays) In particular, the mobile phone shown in FIG. 16(D) may be provided with a gyro, an acceleration sensor, etc. By providing a detection device having a sensor that detects the tilt of the mobile phone, the orientation (vertical direction) of the mobile phone can be detected. The direction of the mobile phone relative to the direction of the camera is determined, and the screen display of the display unit 5502 is displayed. The display can be automatically switched depending on the orientation of the mobile phone.

[0326] Although not shown, the electric fields shown in FIGS. 16(A) to 16(F) and 17(A) and 17(B) The slave device is configured to have a device for acquiring biometric information such as fingerprints, veins, irises, or voiceprints. By applying this configuration, an electronic device having a biometric authentication function can be realized. It is possible.

[0327] In addition, flexible displays may be used as display units for the electronic devices shown in FIGS. 16(A) to 16(E) and 17(A). Specifically, the display unit may be a display unit having a substrate with a flexible property. A configuration including a transistor, a capacitance element, a display element, etc. may also be used. As a result, flat electronic devices such as those shown in FIGS. 16(A) to 16(E) and 17(A) can be manufactured. Not only the housing with a surface, but also the curved part such as the dashboard and pillar shown in Fig. 16(F) It is possible to realize an electronic device having a housing with a surface.

[0328] A flexible display device that can be applied to the display units shown in FIGS. 16(A) to 16(F) and 17(A) and 17(B) is shown. Examples of the base material that can be used include a material that is transparent to visible light, such as polyethylene terephthalate. Phthalate resin (PET), polyethylene naphthalate resin (PEN), polyether Polypropylene resin (PES), polyacrylonitrile resin, acrylic resin, polyimide resin, Polymethyl methacrylate resin, polycarbonate resin, polyamide resin, polycyclohexyl acrylate resin olefin resin, polystyrene resin, polyamide-imide resin, polypropylene resin, polyethylene Use ster resin, polyvinyl halide resin, aramid resin, epoxy resin, etc. These materials may also be mixed or laminated.

[0329] Note that this embodiment mode may be appropriately combined with other embodiment modes and / or examples shown in this specification. It can be combined. [Example]

[0330] <Calculation and results 1> In the circuit configuration of the pixel PIX shown in FIG. 6(A), the threshold voltage of the driving transistor is To check whether the compensation is being performed properly, a circuit simulator is used. Here, the transistor Tr3, which corresponds to the driving transistor of the pixel PIX, The threshold voltage is set to 0V, and the threshold voltage is intentionally changed from 0V to form a light-emitting element. The results of calculating the amount of change in the current flowing through the LD will be explained below.

[0331] The software used in this calculation was Gateway (versi) by SILVACO. The circuit simulator is called "on 3.4.1.R". The current change rate of the light emitting element LD with respect to the change in the threshold voltage Vth of the transistor Tr3 was measured. The threshold voltage Vth after the change was calculated as -1V, -0.5V, 0V, 0.5V, The current change rate was calculated for each of the five conditions at 1V.

[0332] Under the conditions of this calculation, V corresponding to the image data data is set to 5V, and the correction data is Equivalent V W was set to 5 V. In addition, in the wiring electrically connected to the pixel PIX, The high-level potential applied to the wirings GL1 to GL4 is set to 15 V, and the low-level potential is set to −5 V. The potential of the wiring VL is set to 0.5V, the potential of the wiring BGL is set to -10V, and the potential of the wiring AL is set to 1 3V, and the reference potential V applied to the wiring CAT GND was set to -4V.

[0333] Furthermore, the light emitting element when the threshold voltage Vth of the transistor Tr3 is changed from 0V The current flowing through the LD is I EL The change in the threshold voltage is 0, i.e., the driving transistor The current flowing through the light emitting element LD when the threshold voltage of the capacitor is 0 is I EL0 And I EL -I E L0 =ΔI EL The current change rate of the light emitting element LD calculated by this calculation is ΔI E L / I EL The calculation was made as ×100%.

[0334] The results of this calculation are shown in Figure 18. Figure 18 shows the change in threshold voltage Vth from -1 V to The current change rate of the light emitting element LD is shown in the figure when the applied voltage is between 1V and 1V. Therefore, if the threshold voltage Vth is between -1V and 1V, the current change rate is approximately -10%. It can be seen that the difference is kept within the range of 10%.

[0335] Generally, when a transistor operates in the saturation region, the amount of current flowing through the transistor is , the threshold voltage changes slightly because it is proportional to the square of the difference between the gate-source voltage and the threshold voltage. On the other hand, the change in the current flowing through the transistor becomes very large when the The calculation results for the circuit configuration of the pixel PIX shown in Figure 1 show that the current change rate is approximately -10% to 10%. Since the threshold voltage of transistor Tr3 is kept within the range It can be seen that this is the case.

[0336] As mentioned above, when the threshold voltage of the driving transistor of the pixel PIX in a certain row is corrected, During this time (from time T3 to time T4 in FIG. 8, or the period PD3 in FIG. 9), By writing the correction data and the image data to the pixels PIX of the row, The operating frequency can be increased.

[0337] This embodiment may be combined with each embodiment mode described in this specification or other embodiments as appropriate. It is possible. [Example]

[0338] <Calculation and results 2> Next, in the circuit configuration of the pixel PIX shown in FIG. 6B, the threshold voltage of the driving transistor To check whether the voltage compensation is working properly, we used a circuit simulator. Here, the transistor corresponding to the driving transistor of pixel PIX is used for the calculation. The amount of current flowing through the light-emitting element LD when the threshold voltage of Tr3 was corrected was calculated. The results will be explained.

[0339] The software used in this calculation was SILVACO's Smart The circuit simulator is called tspice (4.26.7.R). In the circuit configuration of the pixel PIX shown in FIG. 6B, the threshold voltage of the transistor Tr3 is The threshold voltage is set to various values, and the current flowing through the light emitting element LD when the threshold voltage is corrected is The amount of current was calculated.

[0340] FIG. 19 shows the results of calculations using the circuit simulator, with the horizontal axis representing the wiring DL and the Each of the lines WDL is connected to a correction data storage unit (node ​​ND1), an image data storage unit (node The vertical axis is the same voltage (V) (hereafter referred to as the data voltage) input to the ND2. The graph shows the driving current (A) flowing through the optical element LD.

[0341] Also, in FIG. 19, the threshold voltage of the transistor Tr3 corresponding to the drive transistor is -0.9V, -0.4V, 0.1V, 0.6V, 1.1V, 1.6V, 2.1V, 2.6 The figures show nine conditions for V, 3.1V, and 4.0V.

[0342] From FIG. 19, when the data voltage is high, for example, when the data voltage is 7.0 V, The amount of current flowing through the drive transistor under the above nine conditions is approximately 1.85 x 10 -6 A to 2 .80×10 -6 The threshold voltage of the drive transistor is 1.1V. Considering the conditions as the standard, the change in current due to correction is generally between -20% and 20%. It turns out that it is within the range.

[0343] This embodiment may be combined with each embodiment mode described in this specification or other embodiments as appropriate. It is possible. [Example]

[0344] <Prototype> The display device described in the above embodiment was actually fabricated as a prototype. The characteristics of the transistors provided, the details of the display device, and the brightness of the display device The results of the measurement will be explained below.

[0345] Figure 20(A)(B) shows the channel formation of the In-Ga-Zn oxide, which is a CAAC-OS. The drain current I of the OS transistor included in the region D and the gate-source voltage V G of In particular, in FIG. 20(A), the channel The characteristics of an OS transistor with a channel length of 60 nm and a channel width of 60 nm are shown in Figure 20( B) is a channel length of 6 μm and a channel width of 4 μm provided in the display device. The drain current I of the OS transistor D and the gate-source voltage V G and field effect mobility μ FE [cm 2 1 is a graph showing the characteristics of [Vs / Vs].

[0346] The characteristics CHR1 and CHR2 shown in FIG. 20(A) are obtained when the source-drain voltage is The figure shows the characteristics at 0.1V and 1.2V. As shown in Figure 20(A), the OS transistor The transistor exhibits good characteristics as an LSI scale, and the off-current is below the lower limit of measurement. It's getting smaller.

[0347] The characteristics CHR3 and CHR4 shown in FIG. 20(B) are obtained when the source-drain voltage is The characteristics are shown for 0.1V and 10V. Note that the characteristics CHR3 and CHR4 are shown as arrows A. In addition, in FIG. 20B, the characteristic CHR5 corresponds to the vertical axis of the OS transistor. The graph shows the characteristics of the gate-source voltage and field-effect mobility. Note that the characteristic CHR5 is indicated by the arrow As shown in FIG. 20(B), the OS transistor is As with the scale, it also exhibits good properties as a scale for display devices. The flow is below the lower limit of measurement.

[0348] In addition, the OS transistor having the characteristics shown in FIG. 20B has a small off-state current. 6(A)(B) and the transistors Tr1 and Tr2 shown in FIG. 2, Tr7. Also, the transistors Tr1 to Tr4, This may be applied to all of the transistors Tr1 to Tr6 in FIGS.

[0349] FIG. 21 shows the state of a display device that was actually fabricated as a prototype, with the pixel PIX shown in FIG. 6(B). The pixel PIX uses the above-mentioned OS transistor. Since the device is manufactured using a flexible substrate, the display unit of the display device can be divided into two parts. It can be folded into.

[0350] The specific specifications of the display device are shown in the table below.

[0351] [Table 1]

[0352] In addition, when all-white image data is stored in the image data storage unit (node ​​ND2), In addition, the correction data indicating all white is stored in the correction data storage unit (no image data). When the image data and correction data are stored in the same memory, the table The brightness of the display device is as shown in the table below.

[0353] [Table 2]

[0354] From the table above, the image data is stored in the image data storage unit (node ​​ND2) and the correction data is By storing the correction data in the correction data storage unit (node ​​ND3), the image data is It can be seen that the brightness of the display device is improved compared to when it is held in the holding section (node ​​ND2). .

[0355] In addition, when 4% of the entire screen of the display device is illuminated, the peak brightness of that 4% area is , approximately 2000 cd / m 2 It was.

[0356] As described above, by manufacturing a display device in which the pixel is the pixel PIX shown in FIG. 6(B), This allows the image data to be displayed with higher brightness. Since the correction data is stored in the node ND3, the source driver of the display device Apply a voltage equal to or greater than the output of the drive transistor (transistor Tr3) to the gate of the drive transistor. Therefore, the source driver of the display device needs to increase the output voltage. Therefore, the power consumption of the source driver can be reduced.

[0357] This embodiment may be combined with each embodiment mode described in this specification or other embodiments as appropriate. It is possible.

[0358] (Notes regarding the present specification) The following notes are added to the description of each configuration in the embodiments and examples described in this specification. do.

[0359] <Additional Notes Regarding One Aspect of the Present Invention Described in the Embodiments and Examples> The configurations shown in each embodiment and example may be appropriately combined with the configurations shown in other embodiments. In addition, one embodiment may include a plurality of configuration examples. When the above configuration examples are shown, they can be appropriately combined with each other.

[0360] In addition, the contents (or even a part of the contents) described in one embodiment or example and one or more other contents (or even a part of the contents) described in the embodiment or example. At least one of the contents (or a part of the contents) described in a plurality of other embodiments can be applied, combined, or replaced with.

[0361] The contents described in the embodiments or examples are the same as those of the respective embodiments or examples. The contents described in the various figures or the contents described in the text of the specification It is about appearance.

[0362] In addition, the drawings (or even a part thereof) described in one embodiment or example may be used interchangeably. Another part of the figure, another figure (or part thereof) described in the embodiment or example; The same as the figures (or a part thereof) described in one or more other embodiments or examples. At least one figure can be combined to form more figures. This can be done.

[0363] <Note on ordinal numbers> In this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion of constituent elements. Therefore, the number of components is not limited. The order of the components is not limited to this. A component referred to as "first" in one embodiment (or example) may be used in another embodiment (or example). , or may be a "second"-referred-to component in the claims. For example, in one of the embodiments (or examples) of this specification, etc., the term "first" is used. The components described above may be omitted in other embodiments or within the scope of the claims. do.

[0364] <Notes regarding the description of the drawings> The embodiments (or examples) are described with reference to the drawings. The embodiments (or examples) can be implemented in many different ways, and are not intended to be limiting unless otherwise specified. It is readily apparent to those skilled in the art that various modifications can be made to the form and details of the present invention without departing from the spirit and scope of the present invention. Therefore, it is understood that the present invention should not be construed as being limited to the description of the embodiments (or examples). In addition, in the configuration of the invention of the embodiment (or the configuration of the example), The same reference numerals are used in different drawings for parts or parts having similar functions, and the repetition of such reference numerals will be omitted. The explanation of repetition will be omitted.

[0365] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in explaining the relationship with reference to the drawings. , and change appropriately depending on the direction in which each configuration is depicted. The above description is not limited to the above, and can be rephrased appropriately depending on the situation. For example, In the representation of "insulator on top of conductor," the orientation of the drawing shown is rotated 180 degrees. This can be rephrased as "an insulator located on the underside of a conductor."

[0366] In addition, the terms "above" and "below" refer to the positional relationship of the components directly above or below and directly connected to each other. For example, if the expression is "electrode B on insulating layer A," The electrode B does not need to be formed directly on the insulating layer A, and the insulating layer A and the electrode B This does not exclude the inclusion of other components in between.

[0367] In addition, in the drawings, the size, layer thickness, and area are shown at arbitrary scales for the convenience of explanation. Therefore, the drawings are not necessarily limited to the scale. The drawings are merely schematic illustrations for the purpose of clarity, and are not limited to the shapes or values ​​shown in the drawings. fluctuations in signal, voltage, or current due to noise, or signal due to timing deviations These may include variations in signal, voltage, or current.

[0368] In addition, in the drawings, some components are shown in perspective views and the like in order to clarify the drawings. The description of the element may be omitted.

[0369] In addition, in the drawings, the same elements or elements having similar functions, elements made of the same material, or In some cases, the same reference numerals may be used to designate elements that are formed at the same time, and repeated explanations thereof will be omitted. It may be omitted.

[0370] <Notes regarding possible paraphrases> In this specification and the like, when describing the connection relationship of a transistor, "one side" (or first electrode, or first terminal), "the other side of the source or drain" (or second electrode The source and drain of a transistor are called the first terminal and the second terminal. This is because it varies depending on the structure or operating conditions of the transistor. The names of the source (drain) terminal and the source (drain) electrode, etc. This can be rephrased appropriately depending on the situation. In this specification, the two gates other than the gate These terminals may be called the first terminal, the second terminal, the third terminal, and the fourth terminal. In this specification, the channel forming region refers to a region where a channel is formed, and This region is formed by applying a potential, allowing current to flow between the source and drain. Cut.

[0371] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0372] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not a limitation. For example, an "electrode" may be used as part of a "wiring." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably with "electrodes" and "wiring." This also includes cases where the wiring is formed integrally.

[0373] In this specification and the like, the terms voltage and potential can be interchanged as appropriate. It is the potential difference from the reference potential. For example, the reference potential is the ground potential (earth potential). If we use the term "potential"), we can translate voltage into potential. Ground potential is not necessarily 0V. It does not necessarily mean that the potential is relative, and depending on the reference potential, The potential applied to wiring etc. may be changed.

[0374] In this specification, the terms "film" and "layer" may be used in some cases or depending on the situation. For example, the term "conductive layer" can be used interchangeably with "conductive layer" It may be possible to change the term to "insulating film" or, for example, The term may be changed to "insulating layer" in some cases. Alternatively, depending on the situation, words such as "film" and "layer" may be replaced with other terms. For example, the term "conductive layer" or "conductive film" can be changed to "conductor." In some cases, it may be possible to change the term to, for example, "insulating layer" or "insulating film." It may be possible to change the term to "insulator."

[0375] In this specification, terms such as "wiring," "signal line," and "power line" may be used in some cases. For example, "wiring" and "wiring" can be interchangeable. In some cases, it may be possible to change the term "signal line" to "signal line." It may be possible to change the term "wiring" to a term such as "power line." , and vice versa, terms such as "signal line" and "power line" will be changed to the term "wiring." It may be possible to change terms such as "power line" to terms such as "signal line". The reverse is also true, and terms such as "signal line" may be used interchangeably with "power line" In some cases, it may be possible to change the term to "potential" applied to the wiring. Changing the term to "signal" or similar, as the case may be, or depending on the situation. And vice versa, terms such as "signal" may be used in conjunction with "potential." It may be possible to change it to a different word.

[0376] <Notes on definitions of terms> The definitions of terms used in the above embodiments and examples will be explained below.

[0377] <<About impurities in semiconductors>> The impurities in a semiconductor are, for example, those other than the main components that make up the semiconductor layer. Elements with less than 0.1 atomic % are impurities. The formation of DOS (Density of States) and the carrier mobility The semiconductor may become an oxide semiconductor, and the crystallinity may decrease. In the case of a semiconductor, impurities that change the properties of the semiconductor include, for example, elements of Group 1 and Group 2. There are elements, group 13 elements, group 14 elements, group 15 elements, and transition metals other than the main component. In particular, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, In the case of oxide semiconductors, for example, impurities such as hydrogen can be mixed in. In addition, if the semiconductor is a silicon layer, the characteristics of the semiconductor may be affected. The impurities that change the value of the valence band include, for example, oxygen, group 1 elements excluding hydrogen, group 2 elements, and group 1 elements. These include Group 3 elements and Group 15 elements.

[0378] <<About the Switch>> In this specification, a switch is a device that can be in a conducting state (ON state) or a non-conducting state (OFF state). It is a device that has the function of controlling whether or not current flows by entering a state where it is in a switched state. A switch is a device that has the function of selecting and switching the path through which current flows.

[0379] For example, an electrical switch or a mechanical switch can be used. The switch is not limited to a specific one as long as it can control the current.

[0380] An example of an electrical switch is a transistor (e.g., a bipolar transistor, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diode, MIM (Metal Insulator Metal) die MIS (Metal Insulator Semiconductor) die diode-connected transistors, etc.), or logic circuits that combine these There is.

[0381] When a transistor is used as a switch, the "conduction state" of the transistor is The state in which the source and drain electrodes of a transistor can be considered to be electrically shorted is called Also, the "non-conducting state" of a transistor means that the source electrode and drain electrode of the transistor are This refers to a state in which the electrodes can be considered to be electrically disconnected. When the transistor is operated as a transistor having a polarity (conductivity type), there is no particular limitation.

[0382] An example of a mechanical switch is a digital micromirror device (DMD). In 2013, a switch using MEMS (microelectromechanical systems) technology was developed. The switch has a mechanically movable electrode, and when the electrode moves, Therefore, the device operates by controlling conduction and non-conduction.

[0383] <<About connection>> In this specification, when it is stated that X and Y are connected, it means that X and Y are electrically connected. There are cases where X and Y are electrically connected, where X and Y are functionally connected, and where X and Y are directly connected. Therefore, a predetermined connection relationship, for example, a diagram or It is not limited to the connection relationships shown in the text, but also includes connection relationships other than those shown in the drawings or text. It shall be.

[0384] X, Y, etc. used here refer to objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, etc.). , conductive film, layer, etc.).

[0385] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes, display elements, light-emitting elements, loads, etc.) are connected between X and Y. The switch has a function to control on / off. A switch can be in a conducting state (ON state) or a non-conducting state (OFF state), allowing current to flow. It has a function to control whether or not water is flushed.

[0386] An example of a case where X and Y are functionally connected is when the functional connection between X and Y is possible. Circuits that perform functions (e.g., logic circuits (inverters, NAND circuits, NOR circuits, etc.)), signal Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boost circuits, step-down circuits, etc.), level shifter circuits that change the signal potential level, etc. ), voltage source, current source, switching circuit, amplifier circuit (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more circuits (e.g., memory circuits, control circuits, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X X and Y are said to be functionally connected if X is transmitted to Y.

[0387] When it is explicitly stated that X and Y are electrically connected, it means that X and Y are electrically connected. When X and Y are electrically connected (i.e., when another element or circuit is inserted between X and Y) X and Y are functionally connected (i.e., there is no connection between X and Y) When X and Y are connected directly, the two are functionally connected via another circuit. (That is, when X and Y are connected without any other element or circuit between them) In other words, when it is explicitly stated that something is electrically connected, it is not simply The same applies if the document is explicitly stated as being connected to the

[0388] For example, if the source (or first terminal, etc.) of the transistor is connected to the The drain (or second terminal, etc.) of the transistor is electrically connected to X. It may be electrically connected to Y through Z2 (or not), or the source of the transistor may be The first terminal (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. When a part of Z2 is directly connected to Y, and another part of Z2 is directly connected to Y, it can be expressed as follows: It can be manifested.

[0389] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" 2 terminals) are electrically connected to each other, and X, the source (or The first terminal, etc.), the drain of the transistor (or the second terminal, etc.), and the Y are electrically connected in this order. It can be expressed as "connected to the source (or the first The first terminal of the transistor is electrically connected to X, and the drain of the transistor is electrically connected to the second terminal of the transistor. The transistor source (or first terminal, etc.) is electrically connected to Y, and the transistor source (or first terminal, etc.) is electrically connected to X. The drain (or second terminal, etc.) of the transistor, Y, is electrically connected in this order. " Or, "X is the source (or first terminal, etc.) of the transistor. ) and the drain (or second terminal, etc.) of the transistor Y, and X, the source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor , Y are provided in this connection order." By using this expression, the order of connections in the circuit configuration can be specified. A distinction is made between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined by the above expressions. Here, X, Y, Z1, and Z2 are the coordinates of the object (for example, the device, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0390] Note that the circuit diagram shows independent components as if they are electrically connected to each other. Even if one component has the functions of multiple components, For example, when a part of the wiring also functions as an electrode, one conductive film functions as both the wiring and the electrode. Therefore, the present invention has the functions of both the electrode and the electrode. Electrical connection means that one conductive film has the functions of multiple components. This case will also be included in that category. [Explanation of symbols]

[0391] DD display device, PA display unit, GD gate driver circuit, SD source driver circuit , WSD circuit, PIX pixel, SR shift register, LAT latch circuit, LVS Level shift circuit, DAC digital-to-analog conversion circuit, AMP amplifier circuit, GL distribution line, VA wiring, DB data bus wiring, Tr1 transistor, Tr2 transistor , Tr3 transistor, Tr4 transistor, Tr5 transistor, Tr6 transistor transistor, Tr7 transistor, C1 capacitance element, C2 capacitance element, C3 capacitance element, LD light emitting element, GL1 wiring, GL2 wiring, GL3 wiring, GL4 wiring, DL wiring Wire, WDL wire, VL wire, AL wire, BGL wire, CAT wire, ND1 wire node, ND2 node, ND3 node, ND4 node, SDa circuit, WSDa circuit Path, Tr11 transistor, Tr12 transistor, Tr13 transistor, Tr 14 Transistor, SELD wiring, SELG wiring, SELV wiring, SELW wiring line, GNDL wiring, V1L wiring, 101 image data holding unit, 102 drive circuit unit, 103 display element, 104 correction data holding unit, 105 threshold voltage correction circuit unit, 21 5 display unit, 221a scanning line driving circuit, 231a signal line driving circuit, 232a signal line Drive circuit, 241a common line drive circuit, 723 electrode, 726 insulating layer, 728 insulating layer , 729 insulating layer, 741 insulating layer, 742 semiconductor layer, 744a electrode, 744b electrode Pole, 746 Electrode, 755 Impurities, 771 Substrate, 772 Insulating layer, 810 Transistor sta, 811 transistor, 820 transistor, 821 transistor, 825 transistors, 826 transistors, 842 transistors, 843 transistors, 844 transistor, 845 transistor, 846 transistor, 847 transistor resistor, 4001 first substrate, 4005 sealing material, 4006 second substrate, 4010 Transistor, 4011 Transistor, 4014 Wiring, 4015 Electrode, 4017 Electrode, 4018 FPC, 4019 Anisotropic conductive layer, 4020 Capacitor element, 4021 Electrode, 4030 first electrode layer, 4031 second electrode layer, 4041 printed circuit board, 4 042 Integrated circuits, 4102 Insulating layers, 4103 Insulating layers, 4110 Insulating layers, 4111 Insulating layer, 4112 Insulating layer, 4200 Input device, 4210 Touch panel, 4227 Electrode, 4228 Electrode, 4237 Wiring, 4238 Wiring, 4239 Wiring, 4263 Substrate, 4272b FPC, 4273b IC, 4510 partition wall, 4511 light-emitting layer, 4513 Light emitting element, 4514 Filler, 5321a Housing, 5321b Housing, 532 1c hinge part, 5322 display part, 5323 operation button, 5401 housing, 5402 Display unit, 5403 keyboard, 5404 pointing device, 5501 housing , 5502 display unit, 5503 microphone, 5504 speaker, 5505 operation button, 5701 Display panel, 5702 Display panel, 5703 Display panel, 5704 Display Panel, 5801 first housing, 5802 second housing, 5803 display unit, 5804 operation Key, 5805 Lens, 5806 Connection part, 5901 Housing, 5902 Display part, 59 03 Operation button, 5904 Operator, 5905 Band, 6200 Digital sign, 620 1 wall, 9000 housing, 9001 display unit, 9003 speaker, 9005 operation keys , 9006 connection terminal

Claims

1. the display element includes first to sixth transistors, first to third capacitors, and a display element; one of a source and a drain of the first transistor is electrically connected to a first wiring to which image data is input; the other of the source and the drain of the first transistor is electrically connected to a first terminal of the first capacitance element; a first gate of the first transistor electrically connected to a first selection signal line; a first gate of the first transistor electrically connected to a second gate of the first transistor; one of a source and a drain of the second transistor is electrically connected to a second wiring to which correction data for the image data is input, the other of the source and the drain of the second transistor is electrically connected to a second terminal of the first capacitance element; the other of the source and the drain of the second transistor is electrically connected to a first terminal of the second capacitive element; the other of the source and the drain of the second transistor is electrically connected to a first gate of the third transistor; a first gate of the second transistor electrically connected to a second selection signal line; a first gate of the second transistor electrically connected to a second gate of the second transistor; one of the source and the drain of the third transistor is electrically connected to a power supply line; the other of the source and the drain of the third transistor is electrically connected to a second terminal of the second capacitance element; the other of the source and the drain of the third transistor is electrically connected to a first terminal of the third capacitive element; the other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor; the other of the source and the drain of the third transistor is electrically connected to the one of the source and the drain of the fifth transistor; a second gate of the third transistor is electrically connected to a second terminal of the third capacitance element; a second gate of the third transistor is electrically connected to one of the source and the drain of the sixth transistor; the other of the source and the drain of the fourth transistor is electrically connected to a third wiring to which a first potential is input; a first gate of the fourth transistor electrically connected to the first selection signal line; a first gate of the fourth transistor electrically connected to a second gate of the fourth transistor; the other of the source and the drain of the fifth transistor is electrically connected to the display element; a first gate of the fifth transistor is electrically connected to a third selection signal line; a first gate of the fifth transistor electrically connected to a second gate of the fifth transistor; the other of the source and the drain of the sixth transistor is electrically connected to a fourth wiring to which a second potential is input; a first gate of the sixth transistor is electrically connected to a fourth selection signal line; A display device, wherein a first gate of the sixth transistor is electrically connected to a second gate of the sixth transistor.

2. the display element includes first to sixth transistors, first to third capacitors, and a display element; one of a source and a drain of the first transistor is electrically connected to a first wiring to which image data is input; the other of the source and the drain of the first transistor is electrically connected to a first terminal of the first capacitance element; a first gate of the first transistor electrically connected to a first selection signal line; a first gate of the first transistor electrically connected to a second gate of the first transistor; one of a source and a drain of the second transistor is electrically connected to a second wiring to which correction data for the image data is input, the other of the source and the drain of the second transistor is electrically connected to a second terminal of the first capacitance element; the other of the source and the drain of the second transistor is electrically connected to a first terminal of the second capacitive element; the other of the source and the drain of the second transistor is electrically connected to a first gate of the third transistor; a first gate of the second transistor electrically connected to a second selection signal line; a first gate of the second transistor electrically connected to a second gate of the second transistor; one of the source and the drain of the third transistor is electrically connected to a power supply line; the other of the source and the drain of the third transistor is electrically connected to a second terminal of the second capacitance element; the other of the source and the drain of the third transistor is electrically connected to a first terminal of the third capacitive element; the other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor; the other of the source and the drain of the third transistor is electrically connected to the one of the source and the drain of the fifth transistor; a second gate of the third transistor is electrically connected to a second terminal of the third capacitance element; a second gate of the third transistor is electrically connected to one of the source and the drain of the sixth transistor; the other of the source and the drain of the fourth transistor is electrically connected to a third wiring to which a first potential is input; a first gate of the fourth transistor electrically connected to the first selection signal line; a first gate of the fourth transistor electrically connected to a second gate of the fourth transistor; the other of the source and the drain of the fifth transistor is electrically connected to the display element; a first gate of the fifth transistor is electrically connected to a third selection signal line; a first gate of the fifth transistor electrically connected to a second gate of the fifth transistor; the other of the source and the drain of the sixth transistor is electrically connected to a fourth wiring to which a second potential is input; a first gate of the sixth transistor is electrically connected to a fourth selection signal line; a first gate of the sixth transistor electrically connected to a second gate of the sixth transistor; A display device in which at least one of the first to sixth transistors has a channel formation region formed using an oxide semiconductor.

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