Multilayer ceramic electronic component
The multilayer ceramic electronic component with a controlled dielectric layer and Si secondary phase at triple junctions addresses the issues of voltage resistance, reliability, and insulation resistance in miniaturized components, enhancing their performance under high temperature and pressure.
Patent Information
- Application Number
- JP2025185214
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-02-24
- Filing Date
- 2025-10-31
- Publication Date
- 2026-02-03
AI Technical Summary
The miniaturization and increased capacity of multilayer ceramic electronic components lead to deteriorations in voltage resistance, reliability, high temperature, and high pressure characteristics, as well as insulation resistance, due to changes in crystal grain size and distribution within thinner dielectric layers.
A multilayer ceramic electronic component with a dielectric layer composed of 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y O3, featuring a ceramic body with grains and grain boundaries, internal electrodes, and a triple junction with a secondary phase of Si, where the Si content at the interface is 1 wt% or less, controlling the microstructure and secondary phases.
Improves high-temperature and high-pressure characteristics, enhances insulation resistance, and increases the reliability of the multilayer ceramic electronic components by ensuring uniform microstructure and controlled secondary phase distribution.
Smart Images

Figure 2026016711000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a multilayer ceramic electronic component. [Background technology]
[0002] Recently, with the trend toward miniaturization of electronic products, there has been a demand for multilayer ceramic electronic components to be smaller in size and have a larger capacity. To meet the demand for miniaturization and larger capacity of multilayer ceramic electronic components, the dielectric sheets of the multilayer ceramic electronic components have also been made thinner.
[0003] Meanwhile, it is known that the voltage resistance characteristics of electronic components are significantly affected by the microstructure within the component. As dielectric sheets become thinner, the size and component distribution of the crystal grains in the dielectric layer are affected, resulting in problems such as a deterioration in the voltage resistance and reliability characteristics of the chip. Generally, since the crystal grain boundaries between the crystal grains of electronic components have high resistance components, research has been conducted to provide electronic components with high reliability by increasing the proportion of crystal grain boundaries within the dielectric layer.
[0004] However, as the dielectric layers become thinner due to the miniaturization and ultra-high capacity of electronic components, problems still remain, such as deterioration in product reliability, high temperature and high pressure characteristics, and insulation resistance characteristics. Summary of the Invention [Problem to be solved by the invention]
[0005] One of the various objects of the present invention is to provide a multilayer ceramic electronic component having excellent high temperature and high pressure characteristics.
[0006] One of the various objects of the present invention is to provide a multilayer ceramic electronic component in which the microstructure of the dielectric layer is highly uniform and secondary phases can be controlled.
[0007] One of the various objects of the present invention is to improve the insulation resistance characteristics of a multilayer ceramic electronic component.
[0008] One of the various objects of the present invention is to provide a multilayer ceramic electronic component with improved reliability. [Means for solving the problem]
[0009] The multilayer ceramic electronic component according to one embodiment of the present invention is 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y )O3 (where 0≦x≦1, 0≦y≦0.5), and the ceramic body includes a dielectric layer including a plurality of grains and grain boundaries disposed between the plurality of grains, and first and second internal electrodes alternately stacked with the dielectric layer sandwiched therebetween; a first external electrode connected to the first internal electrode; and a second external electrode connected to the second internal electrode, wherein the dielectric layer includes a triple junction where three grain boundaries are in contact with each other and a secondary phase of Si disposed within the triple junction, and the distribution of Si content at the interface between the dielectric layer and the internal electrode may be 1 wt % or less. [Effects of the Invention]
[0010] One of the various effects of the present invention is that it can improve the high-temperature and high-pressure characteristics of a multilayer ceramic electronic component.
[0011] One of the various advantages of the present invention is that the dielectric layers of the multilayer ceramic electronic component have excellent uniformity in their microstructure and can control secondary phases.
[0012] One of the various effects of the present invention is that it can improve the insulation resistance characteristics of a multilayer ceramic electronic component.
[0013] One of the various effects of the present invention is that it can improve the reliability of multilayer ceramic electronic components.
[0014] However, the various yet significant advantages and effects of the present invention are not limited to the above-mentioned contents, and can be more easily understood in the course of describing specific embodiments of the present invention. [Brief explanation of the drawings]
[0015] [Figure 1] 1 is a perspective view schematically showing a multilayer ceramic electronic component according to one embodiment of the present invention. [Figure 2] FIG. 2 is a perspective view schematically illustrating the ceramic body of FIG. [Figure 3] FIG. 2 is a cross-sectional view taken along line II' of FIG. [Figure 4] FIG. 4 is an enlarged view of region A in FIG. [Figure 5] 1A shows EDS (energy dispersive spectroscopy) mapping images of Mg at the internal electrode and dielectric interface in FIG. 1A of the comparative example and FIG. 1B of the embodiment. [Figure 6] 1A shows EDS (energy dispersive spectroscopy) mapping images of Si at the internal electrode and dielectric interface in FIG. 1A of the comparative example and FIG. 1B of the embodiment. [Figure 7(a)] 10 is a graph showing line profiling results for EDS (energy dispersive spectroscopy) mapping at the interface between the internal electrode and the dielectric of the comparative example. [Figure 7(b)] 10 is a graph showing line profiling results for EDS (energy dispersive spectroscopy) mapping at the interface between the internal electrode and the dielectric of the embodiment. [Figure 8(a)] 10 is a graph showing the results of line profiling for EDS (energy dispersive spectroscopy) mapping of a triple point of a comparative example. [Figure 8(b)]10 is a graph showing line profiling results for EDS (energy dispersive spectroscopy) mapping of a triple point according to an embodiment. [Figure 9(a)] 10 is a graph showing the results of a high-temperature, high-pressure test for a comparative example. [Figure 9(b)] 10 is a graph showing high-temperature and high-pressure test results for the embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0016] Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. This is not intended to limit the technology described in this specification to specific embodiments, but should be understood to include various modifications, equivalents, and / or alternatives of the embodiments of the present invention. In describing the drawings, similar reference numerals are used for similar components.
[0017] In addition, in the drawings, parts that are not relevant to the description are omitted in order to clearly explain the present invention, thicknesses are enlarged to clearly represent multiple layers and regions, and components that have the same function within the same concept are described using the same reference symbols.
[0018] In this specification, the terms "have," "can have," "include," or "can include" refer to the presence of a given feature (e.g., a value, function, operation, or component such as a part) and do not exclude the presence of additional features.
[0019] As used herein, expressions such as "A and / or B," "at least one of A and / or B," or "one or more of A and / or B" may include all possible combinations of the listed items. For example, "A and / or B" or "at least one of A and / or B" may refer to (1) at least one A, (2) at least one B, or (3) both at least one A and at least one B.
[0020] In the drawings, the X direction can be defined as the first direction, L direction or length direction, the Y direction can be defined as the second direction, W direction or width direction, and the Z direction can be defined as the third direction, T direction or thickness direction.
[0021] Fig. 1 is a schematic perspective view of a multilayer ceramic electronic component according to one embodiment of the present invention, Fig. 2 is a perspective view of a ceramic body of the multilayer ceramic electronic component, Fig. 3 is a cross-sectional view taken along line II' in Fig. 1, and Fig. 4 is an enlarged view of region A in Fig. 3.
[0022] Hereinafter, a multilayer ceramic electronic component according to one embodiment of the present invention will be described in detail with reference to FIGS.
[0023] 1 to 4, a multilayer ceramic electronic component 100 according to one embodiment of the present invention includes: 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y )O3 (where 0≦x≦1, 0≦y≦0.5), and the ceramic body 110 includes a dielectric layer 111 including a plurality of grains 11 and grain boundaries 11b arranged between the plurality of grains 11, and first and second internal electrodes 121, 122 alternately stacked with the dielectric layer 111 sandwiched therebetween; a first external electrode 131 connected to the first internal electrode 121; and a second external electrode 132 connected to the second internal electrode 122.
[0024] The dielectric layer 111 may include a triple junction 11c where three grain boundaries 11b meet, and a secondary phase of Si disposed within the triple junction 11c. The distribution of Si content at the interface between the dielectric layer 111 and the internal electrodes 121 and 122 may be 1 wt % or less. In this specification, the term "triple junction" refers to the point where three grain boundaries meet, and the "distribution" of Si content refers to the standard deviation of Si content measured at 10 interfaces above and below the center of the multilayer ceramic electronic component, in a cross section perpendicular to the Y axis and passing through the center of the multilayer ceramic electronic component. Figure 6 is an image showing EDS mapping results for Si in the dielectric layer. It can be seen from Figure 6 that the conventional comparative example (a) does not have Si disposed within the triple junction, while the multilayer ceramic electronic component (b) according to an embodiment of the present invention has a secondary phase of Si distributed within the triple junction of the dielectric layer. FIG. 8 is a graph showing line profiling results for ESD mapping of triple junctions. Referring to FIG. 8, it can be seen that in the conventional comparative example (a), Si is not concentrated at the triple junctions (GB regions), while in the multilayer ceramic electronic component according to an embodiment of the present invention (b), secondary Si phases are concentrated and distributed at the triple junctions (GB regions) of the dielectric layers. FIG. 9 is a graph showing the results of high-temperature, high-pressure tests depending on whether or not secondary Si phases are disposed at the triple junctions of the dielectric layers. It can be seen that in the conventional comparative example (a), secondary Si phases are not disposed at the triple junctions of the dielectric layers, and therefore, there is no advantage in terms of high-temperature, high-pressure reliability. It can be seen that in the multilayer ceramic electronic component according to an embodiment of the present invention (b), secondary Si phases are disposed at the triple junctions of the dielectric layers, thereby improving high-temperature, high-pressure reliability.
[0025] The multilayer ceramic electronic component according to the present invention can improve the insulation resistance against grain boundaries through a structure in which a secondary phase of Si is arranged at the triple junction of the dielectric layer.
[0026] The Si content at the interface between the dielectric layer and the internal electrode may be 1.0 wt% or less, 0.9 wt% or less, 0.8 wt% or less, 0.7 wt% or less, 0.6 wt% or less, or 0.5 wt% or less, and the lower limit is not particularly limited, but may be, for example, 0 wt% or more or more than 0 wt%. When the Si content at the interface between the dielectric layer and the internal electrode satisfies the above range, the wettability of the interface between the dielectric and the internal electrode to the minor components is improved, thereby reducing the frequency of secondary phase generation and further improving the reliability of the multilayer ceramic electronic component.
[0027] The multilayer ceramic electronic component 100 according to an embodiment of the present invention may include a ceramic body 110 including a dielectric layer 111 and first and second internal electrodes 121 and 122 alternately stacked with the dielectric layer 111 sandwiched therebetween.
[0028] The ceramic body 110 may include first and second surfaces S1 and S2 facing in a first direction (X direction), third and fourth surfaces S3 and S4 facing in a second direction (Y direction), and fifth and sixth surfaces S5 and S6 facing in a third direction (Z direction).
[0029] The specific shape of the ceramic body 110 is not particularly limited, but as shown in the drawing, the ceramic body 110 may be a hexahedron or a similar shape. The ceramic body 110 may have a substantially hexahedron shape, although not a hexahedron with perfect straight lines, due to shrinkage of the ceramic powder contained in the ceramic body 110 during the firing process. The ceramic body 110 may be rounded to round corners, if necessary. The rounding may be, for example, barrel polishing, but is not limited thereto.
[0030] The ceramic body 110 may have dielectric layers 111, first internal electrodes 121, and second internal electrodes 122 alternately stacked. The dielectric layers 111, first internal electrodes 121, and second internal electrodes 122 may be stacked in a third direction (Z direction). When the plurality of dielectric layers 111 are fired, the boundaries between adjacent dielectric layers 111 may be integrated to such an extent that they are difficult to identify without using a scanning electron microscope (SEM).
[0031] In one example, the dielectric layer 111 includes a main component and a subcomponent, and the subcomponent may include at least one of first to sixth subcomponents. In this specification, the term "main component" may refer to a component that occupies a relatively large weight percentage compared to other components, and may refer to a component that occupies 50 wt % or more based on the weight of the entire dielectric. Also, the term "subcomponent" may refer to a component that occupies a relatively small weight percentage compared to other components, and may refer to a component that occupies less than 50 wt % based on the weight of the entire dielectric.
[0032] Each component of the dielectric layer according to one embodiment of the present invention will be described in more detail below.
[0033] a) Main component The dielectric layers of the multilayer ceramic electronic component according to the present invention are 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y )O3 (where 0≦x≦1, 0≦y≦0.5). The main component may be, for example, a chemical compound in which Ca, Zr, Sn, and / or Hf exist in the form of a partial solid solution in BaTiO3. In the above composition formula, x may be in the range of 0 to 1, and y may be in the range of 0 to 0.5, but is not limited thereto. For example, in the above composition formula, when x is 0, y is 0, and z is 0, the main component may be BaTiO3.
[0034] b) First subcomponent According to one embodiment of the present invention, the dielectric layers of the multilayer ceramic electronic component according to the present invention may include a first minor component including one or more elements selected from the group consisting of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb.
[0035] The first minor component may be included in an amount of 0.2 molar parts or more and / or 5.4 molar parts or less based on a total of 100 moles of the B-site elements of the main component. The content of the first minor component may be based on the content of at least one element selected from Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb included in the first minor component, regardless of the addition form such as oxide or carbonate.
[0036] The first subcomponent plays a role in preventing a decrease in the reliability of the multilayer ceramic electronic component. If the first subcomponent is out of the above range, there is a risk that the high-temperature withstand voltage characteristics will be reduced.
[0037] In one example, a region of the multilayer ceramic electronic component according to the present invention having a maximum content of the first minor component may be disposed within the grain boundary. The region of the maximum content of the first minor component may refer to a point where the concentration of the first minor component is maximum, or may refer to a point where the concentration of the first minor component is maximum in a dielectric layer of the multilayer ceramic electronic component.
[0038] The region in the dielectric layer where the first minor component has the maximum content may be located, for example, within the triple point, i.e., the maximum concentration of the first minor component in the dielectric layer may be observed at the triple point.
[0039] The first minor component can be substituted at the A and / or B sites of a perovskite compound having an ABO3 structure to suppress the generation of oxygen vacancies, thereby achieving high insulation resistance. In this specification, "oxygen vacancies" refers to vacancies formed when oxygen escapes from a site in a compound. For example, when barium titanate (BaTiO3) having a perovskite structure (ABO3) is sintered in a reducing atmosphere, some of the oxygen contained in the barium titanate (BaTiO3) is reduced, causing oxygen to detach from the barium titanate (BaTiO3). The vacancies formed by the oxygen detachment become oxygen vacancies with ionic conductivity. Because such oxygen vacancies can cause deterioration of electrical properties, such as a decrease in insulation properties, it is important to suppress the generation of oxygen vacancies in thin multilayer ceramic electronic components. In the multilayer ceramic electronic component according to the present invention, the region in the dielectric layer where the first minor component has the maximum content can be controlled as described above to effectively suppress the generation of oxygen vacancies, thereby improving product reliability.
[0040] c) Second subcomponent According to one embodiment of the present invention, the dielectric layers of the multilayer ceramic electronic component according to the present invention may contain a second minor component containing Mg.
[0041] The second minor component may function as a fixed-valence acceptor element, and may be included in an amount of 0.25 molar parts or more and / or 1.0 molar parts or less relative to a total of 100 moles of the B-site elements of the main component. The content of the second minor component may be based on the content of Mg element included in the second minor component, regardless of the added form such as oxide or carbonate.
[0042] If the content of the second minor component exceeds 1.0 part by mole relative to 100 moles of the total of the B-site elements of the main component, the dielectric constant may be reduced, which may cause problems such as reduced high-temperature voltage resistance characteristics.
[0043] In one embodiment of the present invention, the dielectric layer 111 of the multilayer ceramic electronic component 100 according to the present invention may include a plurality of grains 11 including the above-described main component and grain boundaries 11c disposed between two or more grains 11. Figure 4 is a schematic diagram illustrating the microstructure of a dielectric layer according to one embodiment of the present invention. The dielectric according to the present invention may be formed by sintering the above-described main component and subcomponents, and the dielectric 111 formed by sintering the main component and subcomponents may include grains 11 and grain boundaries 11b. In addition, the dielectric may include a triple point where three grain boundaries meet.
[0044] In one example, the grain 11 may have a core-shell structure. In the core-shell structure, the shell portion 11b may be disposed to surround the core portion 11a. Referring to FIG. 4, the grain 11 may have the core portion 11a disposed inside the shell portion 11b. The core portion 11a may refer to a region where the minor components are not dissolved, and the shell portion 11b may refer to the remaining region excluding the core portion 11a. The core portion 11a and the shell portion 11b may be distinguished by analyzing a TEM-EDS image of the cross section.
[0045] In one embodiment of the present invention, the ratio (b / a) of the average Si content (b) at the triple junctions to the average Si content (a) within the grains of the dielectric layer of the multilayer ceramic electronic component may be greater than 3 and / or less than 6. The average Si content (b) at the triple junctions may refer to the arithmetic mean of the Si content of samples collected at the point where the above-mentioned distribution of Si content was determined, and the average Si content (a) within the grains may refer to the arithmetic mean of the Si content of samples collected within the grains adjacent to the triple junctions. By ensuring that the ratio (b / a) of the average Si content (b) at the triple junctions to the average Si content (a) within the grains of the dielectric layer satisfies the above range, the distribution of Si, a high-resistance component, can be controlled, thereby achieving a multilayer ceramic electronic component with excellent high-voltage reliability.
[0046] In one embodiment, the average grain size of the dielectric layer of the multilayer ceramic electronic component according to the present invention may be 300 nm or less. The average grain diameter may be the arithmetic mean of values measured at 10 equally spaced points in the X-axis direction on the dielectric layer closest to the center in a cross section perpendicular to the Y-axis and passing through the center of the multilayer ceramic electronic component. The measured grain diameter may refer to an average value calculated by taking an image of the cross section of the dielectric layer using a scanning electron microscope (SEM, Jeol JSM-7400F) and then using an image analysis program (Mediacybernetics ImagePro Plus version 4.5).
[0047] In one embodiment of the present invention, the average thickness of the dielectric layer 111 may be 0.5 μm or less. The average thickness of the dielectric layer 111 may be an average of values measured at five different positions located between the first and second internal electrodes on the fired dielectric layer 111. The lower limit of the average thickness of the dielectric layer 111 is not particularly limited, but may be, for example, 0.01 μm or more.
[0048] The dielectric layer 111 may be formed by adding additives as needed to a slurry containing the above-mentioned materials, coating the slurry on a carrier film, and drying the coating to form a plurality of ceramic sheets. The ceramic sheets may be formed by forming the slurry into a sheet mold having a thickness of several μm using a doctor blade method, but are not limited thereto.
[0049] In one example of the present invention, the first and second internal electrodes 121 and 122 of the multilayer ceramic electronic component 100 may be laminated such that their cross sections are exposed at opposite ends of the ceramic body 110. Specifically, the first and second internal electrodes 121 and 122 may be exposed at both surfaces of the ceramic body 110 in a first direction (X direction), and the first internal electrode 121 may be exposed in a direction of a first surface S1 of the ceramic body 110, and the second internal electrode 122 may be exposed in a direction of a second surface S2 of the ceramic body 110.
[0050] In one example, the average thickness of the first and second internal electrodes 121, 122 of the multilayer ceramic electronic component 100 may be 0.5 μm or less. The average thickness of the internal electrodes may be an average of values measured at five different positions on the fired internal electrodes. The lower limit of the average thickness of the first and second internal electrodes is not particularly limited, but may be, for example, 0.01 μm or more.
[0051] The material for forming the first and second internal electrodes 121 and 122 is not particularly limited, and may be formed using a conductive paste containing one or more of silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.
[0052] The ceramic body 110 may be formed by alternately stacking ceramic green sheets, each having a dielectric layer on which the first internal electrode 121 is printed, and ceramic green sheets, each having a dielectric layer on which the second internal electrode 122 is printed, in a third direction (Z direction). The first and second internal electrodes 121 and 122 may be printed by screen printing, gravure printing, or the like, but are not limited thereto.
[0053] In one embodiment of the present invention, the average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode of the multilayer ceramic electronic component according to the present invention may be 0.1 mol% or less. In this specification, the "interface" between the dielectric layer 111 and the first internal electrode 121 and / or the second internal electrode 122 may refer to the surface where the dielectric layer and the internal electrode contact, and may refer to a surface that can be observed through an SEM image, for example. The interface may also refer to the surface where two surfaces with different components contact, and may refer to a surface that can be identified through the distribution of the major components of the dielectric layer and the internal electrode. For example, referring to FIG. 7, it can be seen that the contents of Ba and Ti are not detected at a predetermined position, but the content of Ni is detected after passing through a predetermined position. This confirms that the region where Ba and Ti are distributed and the region where Ni is distributed are clearly distinguishable, and this region can be interpreted as the interface between the dielectric layer and the internal electrode.
[0054] The average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode may be 0.10 mol% or less, 0.09 mol% or less, 0.08 mol% or less, 0.07 mol% or less, 0.06 mol% or less, or 0.05 mol% or less. The lower limit of the average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode may be, for example, 0 mol% or more. If the average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode is 0 mol%, it may mean that the Si secondary phase is not detected at the interface between the dielectric layer and the internal electrode. For example, there may be an undetected region of the Si secondary phase at the interface between the dielectric layer and the internal electrode. The Si secondary phase may be used as a high-resistance component to improve the insulation resistance of multilayer ceramic electronic components. However, if the Si secondary phase is present at the interface between the dielectric layer and the internal electrode, it may cause localized electric field concentration, which may actually degrade the BDV characteristics. When the average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode satisfies the above-mentioned range, as in the present embodiment, the electric field concentration phenomenon can be suppressed, thereby improving high-voltage reliability.
[0055] 5, it can be seen that in the conventional comparative example (a), Mg secondary phases are disposed at the interfaces between the dielectric layers and the internal electrodes, while in the example (b) of the present invention, Mg is not disposed at the interfaces between the dielectric layers and the internal electrodes. The multilayer ceramic electronic component according to the example of the present invention can improve the dielectric constant and withstand voltage characteristics by reducing the frequency of secondary phases due to the improved wettability of the Mg component.
[0056] In one embodiment of the present invention, the average content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode of the multilayer ceramic electronic component may be 0.1 mol% or less. The average content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode may be 0.10 mol% or less, 0.09 mol% or less, 0.08 mol% or less, 0.07 mol% or less, 0.06 mol% or less, or 0.05 mol% or less. The lower limit of the average content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode may be, for example, 0 mol% or more. If the average content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode is 0 mol%, it may mean that the Mg secondary phase is not detected at the interface between the dielectric layer and the internal electrode. For example, there may be an undetected region of the Mg secondary phase at the interface between the dielectric layer and the internal electrode. When the content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode is within the above range, the internal microstructure of the dielectric layer can be uniform and the secondary phase can be controlled. If the content of the secondary Mg phase is outside the above range, overgrowth of grains may be induced, resulting in a lower dielectric constant and a lower high-temperature withstand voltage characteristic.
[0057] In one example, the dielectric layers and / or internal electrodes of the multilayer ceramic electronic component contain Sn, and a region of the dielectric layers and / or internal electrodes having the maximum Sn content may be disposed at the interface between the dielectric layers and the internal electrodes. The region of the dielectric layers and / or internal electrodes having the maximum Sn content being disposed at the interface between the dielectric layers and the internal electrodes may mean that the average Sn content decreases with increasing distance from the interface between the dielectric layers and the internal electrodes, and may mean that the average Sn content at a position (e.g., within 10 nm) away from the interface between the dielectric layers 111 and the first internal electrodes 121 and / or the second internal electrodes 122 is lower than that at the interface. When the region of the maximum Sn content is disposed at the interface between the dielectric layers and the internal electrodes, the withstand voltage characteristics of the multilayer ceramic electronic component can be improved.
[0058] In the multilayer ceramic electronic component 100 according to the present invention, a first external electrode 131 and a second external electrode 132 may be disposed on outer surfaces of the ceramic body 110. The first external electrode 131 may be disposed on a first surface S1 of the ceramic body 110 of the multilayer ceramic electronic component 100 according to the present invention, and the second external electrode 132 may be disposed on a second surface S2 of the ceramic body 110.
[0059] In one example, at least a portion of the first external electrode 131 of the multilayer ceramic electronic component 100 according to the present invention may be extended onto the third surface S3, the fourth surface S4, the fifth surface S5, and the sixth surface S6 of the ceramic body 110. Also, at least a portion of the second external electrode 132 may be extended onto the third surface S3, the fourth surface S4, the fifth surface S5, and the sixth surface S6 of the ceramic body 110. In this case, the first external electrode 131 and the second external electrode 132 may be spaced apart from each other. When at least a portion of the first external electrode 131 and / or the second external electrode 132 is extended onto the third surface S3, the fourth surface S4, the fifth surface S5, and the sixth surface S6 of the ceramic body 110, respectively, the extended portions may function as band portions, preventing moisture penetration and further improving the reliability of the multilayer ceramic electronic component 100 according to the present invention.
[0060] In one embodiment of the present invention, the first external electrode 131 and the second external electrode 132 of the multilayer ceramic electronic component 100 may be fired electrodes containing a conductive metal. The conductive metal may include, for example, one or more of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), iron (Fe), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof.
[0061] The first external electrode 131 and the second external electrode 132 may include glass. The glass may be a mixture of oxides, and may be, but is not limited to, at least one selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni). The alkali metal may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K). The alkaline earth metal may be at least one selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).
[0062] Examples of methods for forming the first external electrode 131 and the second external electrode 132 include dipping the ceramic body 110 in a conductive paste containing a conductive metal and then firing the conductive paste, or printing the conductive paste on the surface of the ceramic body 110 using a screen printing method, a gravure printing method, or the like, and then firing the conductive paste. Other methods include, but are not limited to, applying the conductive paste to the surface of the ceramic body 110, or transferring a dried film of the conductive paste onto the ceramic body 110 and then firing the film. For example, the first external electrode 131 and the second external electrode 132 may be formed by forming a conductive paste on the ceramic body 110 using various methods other than the above methods, and then firing the film.
[0063] In another embodiment of the present invention, the first and second external electrodes 131 and 132 of the multilayer ceramic electronic component 100 may be resin-based electrodes containing a conductivity imparting agent and a base resin. The resin-based electrodes have a structure in which the conductivity imparting agent is dispersed within the base resin, and are manufactured in a lower temperature environment than sintered electrodes, so that the conductivity imparting agent can be present in the form of particles within the base resin. When the first and second external electrodes 131c and 132c are resin-based electrodes, they can insulate against physical stress such as external impacts.
[0064] The conductivity-imparting agent may include a conductive metal and / or a conductive polymer. The conductive metal may be, but is not limited to, at least one selected from the group consisting of calcium (Ca), titanium (Ti), molybdenum (Mo), tungsten (W), iron (Fe), cobalt (Co), nickel (Ni), palladium (Pd), platinum (Pt), copper (Cu), silver (Ag), gold (Au), zinc (Zn), aluminum (Al), tin (Sn), lead (Pb), and alloys thereof.
[0065] Non-limiting examples of the conductive polymer include sulfur (S) and / or nitrogen (N)-containing compounds such as PT (poly(thiophene)), PEDOT (poly(ethylenedioxy)thiophene), PPS (poly(p-phenylene sulfide)), PANI (polyanilines), P3HT (poly(3-hexylthiophene-2,5-diyl)), PolyTPD (poly(4-butylphenyldiphenylamine)), PSS (poly(4-butylphenyldiphenylamine)), PVK (poly(9-vinylcarbazole)), PDBT (poly(4,4'-dimethoxy bithophene)), polyaniline, and polypyrrole, and heteroatom-free compounds such as poly(fluorine), polyphenylene, polypyrene, polyazulene, polynaphthalene, PAC (poly(acetylene)), and PPV (poly(p-phenylene vinylene), but are not limited thereto.
[0066] The first and second external electrodes 131 and 132 may contain, if necessary, a conductive filler such as a carbon filler such as a carbon nanotube, graphene, or fullerene, and / or a spherical, elliptical, flake-like, fibrous, or dendritic alloy filler, but are not limited thereto.
[0067] The base resin contained in the first and second external electrodes 131, 132 may be, for example, a thermosetting resin. Specific examples of the thermosetting resin include, but are not limited to, phenolic resin, urea resin, diallyl phthalate resin, melamine resin, guanamine resin, unsaturated polyester resin, polyurethane resin, epoxy resin, aminoalkyd resin, melamine-urea co-condensation resin, silicone resin, and polysiloxane resin. When a thermosetting resin is used, a crosslinking agent, a curing agent such as a polymerization initiator, a polymerization accelerator, a solvent, a viscosity modifier, and the like may be further added as needed.
[0068] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments and the accompanying drawings, but is limited by the scope of the accompanying claims. Therefore, various substitutions, modifications, and changes may be made by a person skilled in the art without departing from the technical spirit of the present invention as set forth in the claims, and these also fall within the scope of the present invention. Furthermore, this specification also discloses the configurations described in the following items. (Item 1) (Ba 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y a ceramic body including a dielectric layer including a plurality of grains and grain boundaries disposed between the plurality of grains, and first and second internal electrodes alternately stacked with the dielectric layer sandwiched therebetween; and a first external electrode connected to the first internal electrode and a second external electrode connected to the second internal electrode, the dielectric layer includes a triple junction where three grain boundaries are in contact with each other and a secondary phase of Si disposed inside the triple junction, A multilayer ceramic electronic component, wherein the Si content at the interfaces between the dielectric layers and the internal electrodes is 1% by weight or less. (Item 2) 2. The multilayer ceramic electronic component according to 1, wherein the ratio (b / a) of the average Si content (b) at the triple junction to the average Si content (a) within the plurality of grains is in the range of more than 3 and / or less than 6. (Item 3) the dielectric layer includes a first minor component including one or more elements selected from the group consisting of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb; 2. The multilayer ceramic electronic component according to 1, wherein a region within the dielectric layer in which the first minor component has the maximum content is located within the grain boundary. (Item 4) 4. The multilayer ceramic electronic component according to 3, wherein a region within the dielectric layer having the maximum content of the first minor component is located within the triple point. (Item 5) 5. The multilayer ceramic electronic component according to any one of 1 to 4, wherein the average grain size of the plurality of grains is 300 nm or less. (Item 6) 6. The multilayer ceramic electronic component according to any one of 1 to 5, wherein the dielectric layers have an average thickness of 0.5 μm or less. (Item 7) 7. The multilayer ceramic electronic component according to any one of 1 to 6, wherein an average content of the Si secondary phase at the interface between the dielectric layer and the internal electrode is 0.1 mol % or less. (Item 8) 8. The multilayer ceramic electronic component according to any one of 1 to 7, further comprising a non-detectable region of a Si secondary phase disposed at an interface between the dielectric layer and the internal electrode. (Item 9) the dielectric layer includes a second minor component including Mg, 9. The multilayer ceramic electronic component according to any one of 1 to 8, wherein an average content of the Mg secondary phase at the interface between the dielectric layer and the internal electrode is 0.1 mol % or less. (Item 10) the dielectric layer and / or the internal electrode contains Sn, 10. The multilayer ceramic electronic component according to any one of 1 to 9, wherein the region in the dielectric layer and / or internal electrode having the maximum Sn content is located at the interface between the dielectric layer and the internal electrode. (Item 11) 11. The multilayer ceramic electronic component according to any one of 1 to 10, wherein the first internal electrodes and / or the second internal electrodes have an average thickness of 0.5 μm or less. [Explanation of symbols]
[0069] 100: Multilayer ceramic electronic components 110: Ceramic body 111: Dielectric layer 121, 122: First and second internal electrodes 131, 132: First and second external electrodes
Claims
1. (Ba 1-x Ca x ) (Ti 1-y (Zr, Sn, Hf) y ) O 3 a ceramic body including a dielectric layer including a main component represented by the formula (where 0≦x≦1, 0≦y≦0.5), the dielectric layer including a plurality of grains and grain boundaries disposed between the plurality of grains, and first and second internal electrodes alternately stacked with the dielectric layer sandwiched therebetween; a first external electrode connected to the first internal electrode and a second external electrode connected to the second internal electrode, the dielectric layer includes a triple junction where three grain boundaries are in contact with each other and a secondary phase of Si disposed inside the triple junction, a ratio (b / a) of an average Si content (b) at the triple junctions to an average Si content (a) within the grains is greater than 3 and less than 6.
2. the dielectric layer includes a first minor component including one or more elements selected from the group consisting of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb; The multilayer ceramic electronic component according to claim 1 , wherein a region in the dielectric layer where the first minor component has the maximum content is located within the grain boundary.
3. The multilayer ceramic electronic component according to claim 2 , wherein a region in the dielectric layer where the first minor component has a maximum content is located within the triple point.
4. 4. The multilayer ceramic electronic component according to claim 1, wherein the average grain size of the grains is 300 nm or less.
5. 5. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layers have an average thickness of 0.5 [mu]m or less.
6. 6. The multilayer ceramic electronic component according to claim 1, wherein an average content of the secondary Si phase at the interface between the dielectric layer and the internal electrode is 0.1 mol% or less.
7. 7. The multilayer ceramic electronic component according to claim 1, further comprising a region where a secondary Si phase is not detected, the region being located at an interface between the dielectric layer and the internal electrode.
8. the dielectric layer includes a second minor component including Mg, 8. The multilayer ceramic electronic component according to claim 1, wherein an average content of the secondary Mg phase at the interface between the dielectric layer and the internal electrode is 0.1 mol % or less.
9. the dielectric layers and / or internal electrodes contain Sn, 9. The multilayer ceramic electronic component according to claim 1, wherein the region in the dielectric layer and / or the internal electrode having the maximum Sn content is located at the interface between the dielectric layer and the internal electrode.
10. 10. The multilayer ceramic electronic component according to claim 1, wherein the first internal electrodes and / or the second internal electrodes have an average thickness of 0.5 [mu]m or less.