Semiconductor device and method of manufacturing the same
A resin-sealed joint between the semiconductor module and heat sink addresses reliability issues by protecting the joint from external exposure and stress, improving bonding integrity.
Patent Information
- Application Number
- JP2024125169
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2026-02-13
AI Technical Summary
The reliability of the joint between a semiconductor module substrate and a heat sink is compromised due to exposure to outside air and uneven stress distribution, which can lead to deterioration and reduced bonding strength.
A semiconductor device with a sealing portion made of a cured resin material having an elastic modulus of 5 GPa or more, covering the periphery of the joint between the substrate and the heat sink, while not covering the side surface, to protect the joint from external exposure and alleviate stress.
The sealing portion effectively suppresses joint deterioration and reduces inelastic strain, enhancing the reliability and durability of the bonding interface.
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Figure 2026023269000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]
[0002] Patent Document 1 discloses a power semiconductor device in which a cooling member is thermally bonded to one surface of a circuit board on the side of a conductor layer via a bonding layer made of solder or sintered material. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-41716 Summary of the Invention [Problem to be solved by the invention]
[0004] When a semiconductor module substrate and a heat sink are joined using a joint made of a metal such as solder or sintered body, the joint may deteriorate due to exposure to the outside air. Furthermore, the joint area between the semiconductor module substrate and the heat sink is generally larger than the joint area between the semiconductor module substrate and the semiconductor element, which means that the stress and vibration acting on the joint is likely to be large. In this case, the reliability of the joint between the semiconductor module substrate and the heat sink may be reduced. The present invention aims to suppress a decrease in the reliability of the joint, compared to when a sealing portion that covers the outer periphery of the joint that joins the substrate of a semiconductor module to a heat sink is not provided. [Means for solving the problem]
[0005] According to the present invention, the following inventions (1) to (7) are provided. (1) a semiconductor module (semiconductor module 10) including a substrate (insulating substrate 11) and a semiconductor element (semiconductor element 13) mounted on one surface of the substrate; a heat sink (heat sink 20) laminated on the other surface of the substrate; a joint (joint 30) made of metal that joins the other surface of the substrate to the heat sink; a sealing portion (sealing portion 40) made of a cured resin material containing a thermosetting resin, having an elastic modulus of 5 GPa or more, and covering the periphery of the joint; A semiconductor device comprising: (2) the bonding portion bonds the other surface of the substrate and the heat sink in a part of an area where the other surface and the heat sink face each other; The semiconductor device according to (1), wherein the sealing portion covers the periphery of the joint in a region where the other surface of the substrate and the heat sink face each other. (3) The semiconductor device according to (1) or (2), wherein the sealing portion does not cover a side surface connecting the one surface and the other surface of the substrate. (4) The semiconductor device according to (1) or (2), wherein the sealing portion is a cured product of the resin material having a viscosity of 12 Pa·s or less at 25°C and a viscosity of 0.3 Pa·s or less at 80°C. (5) The semiconductor device according to (1) or (2), wherein the sealing portion is a cured product of the resin material having a contact angle of 65° or less with respect to the other surface of the substrate or the surface of the heat sink at 80°C. (6) a joining step of joining the other surface of a substrate (insulating substrate 11) in a semiconductor module (semiconductor module 10) having a semiconductor element (semiconductor element 13) mounted on one surface of the substrate to a heat sink using a joint (joint 30) made of metal; a coating step of coating a resin material containing a thermosetting resin and having a modulus of elasticity of 5 GPa or more after hardening so as to cover the periphery of the joint; a heating step of heating and curing the resin material; A method for manufacturing a semiconductor device comprising: (7) In the bonding step, the bonding portion is formed in a part of an area where the other surface of the substrate and the heat sink face each other, In the coating step, the resin material is caused to penetrate between the other surface of the substrate and the heat sink by capillary action, and the periphery of the joint is covered with the resin material. (6) A method for manufacturing a semiconductor device according to (6). [Effects of the Invention]
[0006] According to the present invention, it is possible to suppress a decrease in the reliability of the joint, compared to when a sealing portion that covers the joint portion around the outer periphery of the joint portion that joins the substrate of the semiconductor module and the heat sink is not provided. [Brief explanation of the drawings]
[0007] [Figure 1] 1 is a diagram showing an example of the configuration of a semiconductor device to which the present embodiment is applied; [Figure 2] 2 is a diagram showing an example of a cross section of the semiconductor device shown in FIG. 1 cut along a longitudinal direction and a stacking direction, which will be described later. [Figure 3] FIG. 3 is an enlarged view of the semiconductor device of FIG. 2. [Figure 4] 4 is a view of the semiconductor device of FIG. 3 as seen from the direction IV. [Figure 5] 1 is a flowchart showing an example of a method for manufacturing a semiconductor device. [Figure 6] 1(a) and 1(b) are diagrams illustrating an example of a coating step. [Figure 7] 1(a) and 1(b) are diagrams showing the configuration of a semiconductor device used in a thermal cycle test. [Figure 8] 10 is a diagram showing a temperature change profile of a thermal cycle applied to a semiconductor device in a thermal cycle test. [Figure 9] 7(a) and 7(b) are diagrams showing the amount of inelastic strain generated in the bonding portion after the semiconductor device of this embodiment shown in FIG. 7(a) is subjected to a heat cycle. [Figure 10] 7(a) and 7(b) are diagrams showing the amount of inelastic strain generated in the bonding portion after the semiconductor device of the comparative example shown in FIG. 7(b) was subjected to a heat cycle. [Figure 11]FIG. 10 is a diagram showing an example of the configuration of a semiconductor device to which a second embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION
[0008] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. [Embodiment 1] (Semiconductor device 1) FIG. 1 is a diagram showing an example of the configuration of a semiconductor device 1 to which this embodiment is applied. FIG. 2 is a diagram showing an example of a cross section of the semiconductor device 1 shown in FIG. 1 cut along the longitudinal direction and the lamination direction, which will be described later. FIG. 3 is an enlarged view of the semiconductor device 1 of FIG. FIG. 4 is a view of the semiconductor device 1 of FIG. 3 as viewed from the direction IV.
[0009] The semiconductor device 1 according to this embodiment includes a semiconductor module 10. In this example, the semiconductor device 1 includes three semiconductor modules 10. The semiconductor device 1 also includes a heat sink 20 that dissipates heat conducted from the semiconductor modules 10. The semiconductor device 1 also includes a bonding portion 30 that bonds each semiconductor module 10 to the heat sink 20. The semiconductor device 1 also includes a sealing portion 40 that seals the periphery of the bonding portion 30. In the semiconductor device 1, a semiconductor module 10 and a heat sink 20 are stacked via a joint 30 and a sealing portion 40. Hereinafter, in the semiconductor device 1, the direction in which the semiconductor module 10 and the heat sink 20 are stacked via the joint 30 and the sealing portion 40 (the vertical direction in FIG. 2 ) may be simply referred to as the stacking direction.
[0010] Although not shown in the drawings, the semiconductor device 1 of this embodiment can be used by attaching it to a case having an internal space through which a coolant flows, so that the fins 22 (described later) of the heat sink 20 come into contact with the coolant. This allows the heat generated in the semiconductor module 10 and conducted to the heat sink 20 via the joint 30 to be dissipated by the coolant.
[0011] In the semiconductor device 1 of this embodiment, a base portion 21 (described later) of the heat sink 20 has a rectangular shape having a longitudinal direction and a lateral direction. In the semiconductor device 1, three semiconductor modules 10 are arranged side by side in the longitudinal direction of the base portion 21. Moreover, the three semiconductor modules 10 have the same structure.
[0012] Each semiconductor module 10 includes an insulating substrate 11 as an example of a substrate, a semiconductor element 13 mounted on one surface (the upper surface in Figure 2) of the insulating substrate 11, and an element bonding layer 15 that bonds one surface of the insulating substrate 11 to each semiconductor element 13. Each semiconductor module 10 may be a module in which the semiconductor element 13 and the like are sealed using transfer molding, or may be a case-type module in which the semiconductor element 13 and the like are housed in a case.
[0013] The insulating substrate 11 includes an insulating layer 111 that insulates the semiconductor elements 13 from the heat sink 20. The insulating substrate 11 also includes a wiring layer 112 that is formed on one surface (the upper surface in FIG. 2) of the insulating layer 111 and that includes wiring for supplying power to each of the semiconductor elements 13. The insulating substrate 11 also includes a heat transfer layer 113 that is formed on the other surface (the lower surface in FIG. 2) of the insulating layer 111 and that conducts heat generated in the semiconductor elements 13 to the heat sink 20.
[0014] A ceramic substrate made of, for example, alumina (Al2O3), silicon nitride (Si3N4), aluminum nitride (AlN), etc. can be used as the insulating layer 111. The thickness of the insulating layer 111 can be, for example, in the range of 0.1 mm to 2.0 mm.
[0015] The wiring layer 112 is formed in a predetermined region on one surface of the insulating layer 111 and constitutes wiring for supplying power to the semiconductor element 13 . The heat transfer layer 113 is formed so as to cover substantially the entire other surface of the insulating layer 111 . The wiring layer 112 and the heat transfer layer 113 are made of metal layers. Examples of metals used for the wiring layer 112 and the heat transfer layer 113 include copper, nickel, silver, palladium, gold, platinum, lead, cobalt, tin, aluminum, and alloys of two or more metals selected from these, and preferably copper, nickel, silver, palladium, gold, or alloys of two or more metals selected from these, and more preferably copper, nickel, or silver. The wiring layer 112 and the heat transfer layer 113 may be made of the same type of metal or different types of metals. The thickness of the wiring layer 112 and the heat transfer layer 113 can be, for example, in the range of 0.05 mm to 2.0 mm.
[0016] Furthermore, the surface of the heat transfer layer 113 (the lower surface in FIG. 3) may be subjected to a surface treatment to improve adhesion between the heat transfer layer 113 and the uncured resin material that forms the sealing portion 40. Examples of surface treatments that may be performed on the surface of the heat transfer layer 113 include plasma treatment and application of a primer. One example of the primer used for the surface treatment is a thermoplastic resin.
[0017] An example of insulating substrate 11 is a DCB (Direct Copper Bond) substrate in which a wiring layer 112 and a heat transfer layer 113 made of copper are bonded to one side and the other side of insulating layer 111 made of ceramic. Another example of insulating substrate 11 is a DAB (Direct Aluminum Bond) substrate in which a wiring layer 112 and a heat transfer layer 113 made of aluminum are bonded to both sides of insulating layer 111 made of ceramic substrate. As described above, insulating substrate 11 may include conductive layers such as wiring layer 112 and heat transfer layer 113, as long as insulating substrate 11 can insulate semiconductor element 13 from heat sink 20 as a whole.
[0018] The semiconductor element 13 is provided on a wiring layer 112 formed on one surface of the insulating substrate 11 . The semiconductor element 13 is, for example, a power semiconductor such as a transistor, a thyristor, or a diode used for power control. Examples of the material of the semiconductor element 13 include silicon (Si), silicon carbide (SiC), gallium nitride (GaN), and gallium oxide (Ga2O3). In this embodiment, the semiconductor element 13 has a rectangular parallelepiped shape as a whole. Although not shown, the semiconductor element 13 may be provided with terminals for supplying power to other devices such as a motor or a computer device.
[0019] The element bonding layer 15 bonds the wiring layer 112 formed on the surface of the insulating substrate 11 to the semiconductor element 13. The element bonding layer 15 is not particularly limited as long as it can electrically bond the wiring layer 112 to the semiconductor element 13. Examples of methods for bonding the wiring layer 112 of the insulating substrate 11 to the semiconductor element 13 via the element bonding layer 15 include soldering, brazing, and sintering.
[0020] The heat sink 20 includes a flat base portion 21 and a plurality of fins 22 protruding from the base portion 21 . When viewed from the stacking direction, the base 21 has a rectangular shape with a longitudinal direction and a lateral direction. The base 21 has a front surface 211 from which the fins 22 protrude and a back surface 212 that faces the semiconductor module 10 with the joining portion 30 and the sealing portion 40 interposed therebetween.
[0021] Each fin 22 of the heat sink 20 protrudes from the surface 211 of the base portion 21 in a direction perpendicular to the plate surface of the base portion 21. In addition, each fin 22 has a columnar shape extending in a direction perpendicular to the plate surface of the base portion 21. The fins 22 are arranged side by side on the surface 211 of the base portion 21 with gaps between them in the longitudinal and lateral directions. The shape of the fins 22 is not particularly limited, and may be, for example, a flat plate shape extending in a direction perpendicular to the plate surface of the base portion 21 and in the longitudinal direction of the base portion 21. Furthermore, the heat sink 20 may be composed of only the base portion 21 without the fins 22 .
[0022] In addition, the heat sink 20 has the insulating substrate 11 of the semiconductor module 10 joined to the rear surface 212 of the base portion 21 by a joining portion 30 .
[0023] The material of the heat sink 20 is not particularly limited, but examples thereof include aluminum, aluminum alloy, copper, and copper alloy. Furthermore, a plating layer such as silver plating or gold plating may be formed on the heat sink 20, particularly on the back surface 212 of the base portion 21 of the heat sink 20. By forming such a plating layer on the back surface 212 of the base portion 21, the bonding strength with the insulating substrate 11 of the semiconductor module 10 via the bonding portion 30 can be increased. Furthermore, the rear surface 212 of the base portion 21 may be subjected to a surface treatment to improve adhesion between the rear surface 212 of the base portion 21 and the uncured resin material that forms the sealing portion 40. Details will be described later, but examples of the surface treatment that may be applied to the rear surface 212 of the base portion 21 include plasma treatment and application of a primer.
[0024] The heat sink 20 has a surface that is bonded to the insulating substrate 11 via the bonding portion 30, and the bonded surface is made of metal as long as it has the function of dissipating heat conducted from the semiconductor module 10. Additionally, the shape of the heat sink 20 is not limited to the above-described form having the flat base portion 21 and the fins 22 protruding from the base portion 21. The heat sink 20 may have, for example, an overall box-like shape with a space inside that allows a coolant to flow. Examples of metals used for the surface of the heat sink 20 to which the insulating substrate 11 is bonded include copper, nickel, silver, palladium, gold, platinum, lead, cobalt, tin, aluminum, and alloys of two or more metals selected from these metals. Preferably, the metal is copper, nickel, silver, palladium, gold, or an alloy of two or more metals selected from these metals. More preferably, the metal is copper, nickel, or silver.
[0025] The joint 30 joins the other surface of the insulating substrate 11 in the semiconductor module 10 to the base portion 21 of the heat sink 20. In this example, the joint 30 joins the other surface of the insulating substrate 11 to the base portion 21 in a part of the region where the other surface of the insulating substrate 11 faces the base portion 21 of the heat sink 20. In addition, the joint 30 is provided inside the outer periphery of the insulating substrate 11 in the semiconductor module 10 when viewed from the stacking direction. Furthermore, when viewed from the stacking direction, the joints 30 are provided so as to overlap the semiconductor elements 13 mounted on one surface of the insulating substrate 11 in the semiconductor module 10. In addition, when viewed from the stacking direction, the joints 30 are provided at the portion where the semiconductor elements 13 are mounted on one surface of the insulating substrate 11 and around the portion where the semiconductor elements 13 are mounted.
[0026] The joint 30 is made of a sintered body made by sintering metal particles. The sintered body constituting the joint 30 can be obtained, for example, by applying a metal paste having metal particles dispersed therein between the insulating substrate 11 and the heat sink 20, followed by sintering. Alternatively, the sintered body constituting the joint 30 can be obtained, for example, by stacking a sheet-like bonding material containing metal particles between the insulating substrate 11 and the heat sink 20, followed by sintering. Examples of sintering methods for sintering a metal paste or a bonding sheet to obtain a sintered body include pressureless sintering, pressure sintering, and electric sintering.
[0027] The metal particles used in the sintered body that constitutes the joint 30 can be, for example, particles of a metal selected from copper (Cu), silver (Ag), and an alloy of copper and silver (Cu-Ag). Furthermore, the metal particles can be, for example, particles made of copper whose surfaces are coated with silver. Among these metal particles, copper particles are preferably used. By using copper particles as the metal particles that form the sintered body, the heat transfer between the semiconductor module 10 and the heat sink 20 via the joint 30 can be improved. The sintered body that forms the joint 30 may also contain components other than metals, such as intermetallic compounds, inorganic compounds, and resins.
[0028] The thickness of the joint 30 can be, for example, in the range of 10 μm to 500 μm. If the thickness of the joint 30 is less than 10 μm, the bonding strength between the semiconductor module 10 and the heat sink 20 by the joint 30 may be insufficient. If the thickness of the joint 30 exceeds 500 μm, the heat transfer from the semiconductor module 10 to the heat sink 20 via the joint 30 is likely to decrease. In this case, the efficiency of dissipating heat generated in the semiconductor element 13 of the semiconductor module 10 may decrease. The thickness of the joint 30 is preferably in the range of 50 μm to 300 μm, more preferably in the range of 100 μm to 200 μm.
[0029] The sintered body constituting the joint 30 has a structure in which metal particles melted by sintering are connected to each other. Furthermore, it is preferable that minute gaps are formed between the metal particles in the sintered body constituting the joint 30. By forming gaps between the metal particles in the sintered body, internal stress generated in the joint 30 is easily alleviated. The density of the metal in the sintered body constituting the joint 30 can be, for example, in the range of 40% by volume to 95% by volume, preferably in the range of 50% by volume to 95% by volume, and more preferably in the range of 60% by volume to 95% by volume. When the density of the metal in the sintered body constituting the joint 30 satisfies the above range, it becomes easier to achieve both good heat transfer between the semiconductor module 10 and the heat sink 20 via the joint 30 and the relaxation of internal stress by the joint 30.
[0030] The density of the metal in the sintered body is determined by measuring the volume of the sintered body and the mass of the sintered body measured with a precision balance, and from this volume and mass, the apparent density M1 (g / cm 3 Next, the apparent density M1 is calculated and the theoretical density Mx of the metal used in the sintered body (for example, in the case of copper particles, the theoretical density of copper is 8.96 g / cm3). 3 ) and the density (vol %) of the metal in the sintered body can be calculated from the following formula (1). Metal density in sintered body (volume %) = [(M1) / (Mx)] × 100 (1)
[0031] The sealing portion 40 seals the periphery of the joint portion 30 . The sealing portion 40 extends into the region where the other surface of the insulating substrate 11 in the semiconductor module 10 faces the base portion 21 of the heat sink 20, and covers the periphery of the joint portion 30. In FIG. 4, the hatched area indicates the range where the sealing portion 40 is provided when viewed from the stacking direction. When viewed from the stacking direction, the sealing portion 40 is provided along the outer periphery of the joint portion 30. The sealing portion 40 contacts the outer periphery of the joint portion 30 and covers the outer periphery of the joint portion 30. In this example, the sealing portion 40 is provided so as to protrude outward beyond the outer periphery of the insulating substrate 11 when viewed in the stacking direction.
[0032] The semiconductor device 1 of this embodiment has a sealing portion 40 that seals the periphery of the bonding portion 30, thereby preventing the bonding portion 30 from being exposed to the outside air. This prevents the bonding portion 30 from being deteriorated by the outside air. Furthermore, in the semiconductor device 1 of this embodiment, stress and vibration acting on the bonding portion 30 can be alleviated by the sealing portion 40. This prevents the bonding portion 30 from being distorted and deteriorated due to stress and vibration acting on the bonding portion 30, or from being peeled off from the insulating substrate 11 or the heat sink 20. As a result, the semiconductor device 1 can suppress deterioration of the bonding portion 30 compared to when the sealing portion 40 is not provided around the bonding portion 30.
[0033] The sealing portion 40 does not cover the side surface (indicated by the symbol A in FIG. 3) that connects one surface and the other surface of the insulating substrate 11 in the semiconductor module 10. In other words, in the semiconductor device 1 of this embodiment, the side surface of the insulating substrate 11 in the semiconductor module 10 is exposed without being covered by the sealing portion 40. In this case, the contact area between the sealing portion 40 and the insulating substrate 11 is smaller than when, for example, the sealing portion 40 covers the side surface of the insulating substrate 11. This reduces the stress acting between the sealing portion 40 and the insulating substrate 11, making it less likely that the sealing portion 40 will be delaminated or otherwise deteriorated due to the stress.
[0034] The sealing portion 40 has an elastic modulus of 5 GPa or more. Preferably, the sealing portion 40 has an elastic modulus of 10 GPa or less. If the elastic modulus of the sealing portion 40 is less than 5 GPa, the effect of the sealing portion 40 in mitigating the stress and vibration acting on the joint portion 30 may be insufficient. Furthermore, if the elastic modulus of the sealing portion 40 exceeds 10 GPa, the adhesion between the sealing portion 40 and the insulating substrate 11, the heat sink 20, and the bonding portion 30 may decrease.
[0035] The sealing portion 40 is made of a cured product obtained by curing a liquid resin material containing a thermosetting resin. Next, the resin material that forms the sealing portion 40 will be described. The resin material forming the sealing portion 40 contains an epoxy resin as a thermosetting resin. The type of epoxy resin contained in the resin material is not particularly limited. Examples of epoxy resins include bisphenol-type epoxy resins, naphthalene-type epoxy resins, glycidylamine-type epoxy resins, hydrogenated bisphenol-type epoxy resins, alicyclic epoxy resins, alcohol ether-type epoxy resins, alicyclic epoxy resins, fluorene-type epoxy resins, siloxane-type epoxy resins, etc. These epoxy resins may be used alone or in combination of two or more.
[0036] The resin material forming the sealing portion 40 contains a curing agent that hardens the epoxy resin. The type of curing agent contained in the resin material is not particularly limited. Examples of the curing agent include an amine curing agent, a phenol curing agent, an acid anhydride curing agent, a polymercaptan curing agent, a polyaminoamide curing agent, an isocyanate curing agent, etc. These curing agents may be used alone or in combination of two or more.
[0037] The compounding ratio of the epoxy resin and the curing agent in the resin material is preferably set so as to reduce the amount of unreacted epoxy resin and unreacted curing agent. Specifically, the compounding ratio of the epoxy resin and the curing agent in the resin material is preferably set so that the ratio of the number of functional groups in the curing agent to the number of epoxy groups in the epoxy resin (number of functional groups in the curing agent / number of epoxy groups in the epoxy resin) is in the range of 0.5 to 2.0.
[0038] The resin material forming the sealing portion 40 may contain a filler in addition to the epoxy resin and the curing agent. The filler is not particularly limited, but examples include silicon oxide, aluminum oxide, calcium carbonate, carbon fiber, talc, and mica. The resin material forming the sealing portion 40 may also contain other additives. The additives are not particularly limited, but examples include a curing accelerator, a stress relaxation agent, a coupling agent, and a colorant.
[0039] The resin material forming the sealing portion 40 preferably has a viscosity of 12 Pa·s or less at 25°C. Also, the resin material forming the sealing portion 40 preferably has a viscosity of 0.3 Pa·s or less at 80°C. When the viscosity of the resin material forming the sealing portion 40 is within the above range, the resin material can easily penetrate between the surface of the heat transfer layer 113 in the insulating substrate 11 and the back surface 212 of the base portion 21 of the heat sink 20 during the manufacture of the semiconductor device 1 described below.
[0040] Furthermore, it is preferable that the resin material forming the sealing portion 40 has a contact angle of 65° or less with the surface of the heat-transfer layer 113 of the insulating substrate 11 or the back surface 212 of the base portion 21 of the heat sink 20. The surface of the heat-transfer layer 113 of the insulating substrate 11 is an example of the other surface of the substrate. The back surface 212 of the base portion 21 of the heat sink 20 is an example of the front surface of the heat sink. When the contact angle of the resin material forming the sealing portion 40 is within the above range, the resin material can easily penetrate between the surface of the heat transfer layer 113 in the insulating substrate 11 and the back surface 212 of the base portion 21 of the heat sink 20 during the manufacture of the semiconductor device 1 described below.
[0041] (Method of manufacturing semiconductor device 1) Next, a method for manufacturing the semiconductor device 1 will be described. FIG. 5 is a flowchart showing an example of a method for manufacturing the semiconductor device 1. The manufacturing method of the semiconductor device 1 of this embodiment includes a bonding step (S101) of bonding the other surface of the insulating substrate 11 in the semiconductor module 10 to the base portion 21 of the heat sink 20 with a bonding portion 30. The manufacturing method of the semiconductor device 1 also includes a surface treatment step (S102) of performing a surface treatment on the other surface of the insulating substrate 11 or the back surface 212 of the base portion 21. The manufacturing method of the semiconductor device 1 also includes a coating step (S103) of coating a resin material that forms the sealing portion 40 so as to cover the periphery of the bonding portion 30 formed in the bonding step. The manufacturing method of the semiconductor device 1 also includes a heating step (S104) of heating and hardening the resin material coated in the coating step to form the sealing portion 40.
[0042] (Joining process) In the bonding step, first, a metal paste for forming the bonding portion 30 is applied to either the surface of the heat transfer layer 113 of the insulating substrate 11 on which the semiconductor element 13 is mounted on the wiring layer 112, or the back surface 212 of the base portion 21 of the heat sink 20. Hereinafter, the surface of the heat transfer layer 113 of the insulating substrate 11 or the back surface 212 of the base portion 21 to which the metal paste for forming the bonding portion 30 is applied may be referred to as the application surface. The method for applying the metal paste to the application surface is not particularly limited, and examples thereof include screen printing, transfer printing, offset printing, inkjet printing, and printing methods using various dispensers or coaters.
[0043] In this example, the metal paste is applied to a part of the area of the application surface where the other surface of insulating substrate 11 faces back surface 212 of base portion 21, as viewed from the stacking direction. In addition, in this example, the metal paste is applied to an area of the application surface consisting of a portion on one surface of insulating substrate 11 where semiconductor element 13 is mounted and the periphery of the portion where semiconductor element 13 is mounted, as viewed from the stacking direction.
[0044] Next, in the bonding step, the heat sink 20 and the insulating substrate 11 of the semiconductor module 10 are laminated together with the applied metal paste sandwiched therebetween. When stacking the heat sink 20 and the insulating substrate 11 of the semiconductor module 10 with the metal paste sandwiched therebetween, a pressing force may be applied to the heat sink 20 and the semiconductor module 10, or no pressure may be applied. The pressing force applied to the heat sink 20 and the semiconductor module 10 varies depending on the viscosity of the metal paste, etc., but can be in the range of 0.01 MPa or less, preferably 0.005 MPa or less. The method of applying the pressing force is not particularly limited, but can be, for example, a method of placing a weight on the semiconductor module 10.
[0045] Next, in the bonding step, the metal paste is heated and sintered to form a bonding portion 30 made of a sintered body that bonds the heat sink 20 and the insulating substrate 11 of the semiconductor module 10 together. The temperature at which the metal paste is sintered varies depending on the type of metal particles contained in the metal paste, but can be in the range of 150°C or higher and 500°C or lower, for example. Furthermore, the sintering of the metal paste may be performed while pressing the semiconductor module 10 and the heat sink 20 together in the stacking direction via the metal paste, or may be performed without pressing the semiconductor module 10 and the heat sink 20 together. When pressing the semiconductor module 10 and the heat sink 20 together, the pressing force is preferably 25 MPa or less. If the pressing force pressing the semiconductor module 10 and the heat sink 20 together exceeds 25 MPa, structures such as the insulating substrate 11 may be damaged.
[0046] (Surface treatment process) In the surface treatment step, the coating surface is subjected to a surface treatment to improve adhesion between the coating surface and the resin material that forms the sealing portion 40. In addition, in the surface treatment step, the surface of the heat-transfer layer 113 of the insulating substrate 11 or the back surface 212 of the base portion 21 of the heat sink 20 is subjected to a surface treatment. This improves the wettability of the resin material to the coating surface when the resin material that forms the sealing portion 40 is applied to the coating surface in the coating step described below. This also makes it easier for the resin material to penetrate between the surface of the heat-transfer layer 113 of the insulating substrate 11 and the back surface 212 of the base portion 21 of the heat sink 20. In the method for manufacturing the semiconductor device 1, if the resin material has sufficient wettability with respect to the coating surface, it is not necessarily necessary to perform the surface treatment step.
[0047] (Coating process) 6(a) and 6(b) are diagrams illustrating an example of the coating step. Figures 6(a) and 6(b) correspond to cross sections of the semiconductor module 10 and the heat sink 20 joined by the joint 30, cut along the stacking direction. The coating step proceeds in the order of Figures 6(a) and 6(b). In Figures 6(a) and 6(b), the resin material is indicated by the reference numeral 42. In the application process, the resin material 42 that forms the sealing portion 40 is applied to the application surface so as to cover the periphery of the joint portion 30. Here, an example will be described in which the resin material 42 that forms the sealing portion 40 is applied to the back surface 212 of the base portion 21 of the heat sink 20, which is an example of the application surface.
[0048] In the application process, as shown in Figure 6(a), a resin material 42 is applied onto the back surface 212 of the base portion 21 so as to surround the gap S formed between the surface of the heat transfer layer 113 and the back surface 212 of the base portion 21 by forming the joint 30 in the joining process. 6(a), the resin material 42 enters the gap S by capillary action and moves through the gap S toward the bonding portion 30. In addition, the resin material 42 moves through the gap S toward the bonding portion 30 by capillary action along the front surface of the heat transfer layer 113 and the rear surface 212 of the base portion 21. As a result, the gap S is filled with the resin material 42, and the bonding portion 30 is covered with the resin material 42, as shown in FIG. 6(b).
[0049] In the application step of this embodiment, the bonding portion 30 is coated with the resin material 42 by utilizing capillary action. This makes it possible to coat the bonding portion 30 with the resin material 42 without performing a special operation, such as injecting the resin material into the gap S. Depending on the viscosity of the resin material 42, the wettability of the resin material 42 with respect to the application surface, and other factors, the movement of the resin material 42 by capillary action may be insufficient, and the bonded portion 30 may not be completely covered with the resin material 42. However, as the resin material 42 is gradually heated in a subsequent heating step, the viscosity of the resin material 42 decreases, making it easier for the resin material 42 to move through the gap S. As a result, the bonded portion 30 is covered with the resin material 42 before the resin material 42 is cured by heating.
[0050] (Heating process) In the heating step, the resin material 42 applied in the application step is heated to a predetermined temperature to harden the resin material 42 and form the sealing portion 40. In addition, in the heating step, the resin material 42 is heated to form the sealing portion 40, which is made of a hardened resin material 42 containing a thermosetting resin, has an elastic modulus of 5 GPa or more, and covers the periphery of the bonding portion 30. The heating temperature in the heating step varies depending on the composition of the resin material 42, but can be in the range of 120°C or higher and 200°C or lower, for example.
[0051] As described above, in this embodiment, the semiconductor device 1 of Figures 1 to 4, which includes a semiconductor module 10, a heat sink 20, a bonding portion 30, and a sealing portion 40, is obtained through the bonding process, surface treatment process, coating process, and heating process.
[0052] (Action by sealing portion 40) For the semiconductor device 1 to which this embodiment is applied, the effect of the sealing portion 40 in suppressing deterioration of the bonding portion 30 was confirmed by a thermal cycle test using simulation. 7(a) and 7(b) are diagrams showing the configurations of semiconductor devices 1 and 2 used in the thermal cycle test. FIG. 7(a) shows the semiconductor device 1 to which this embodiment is applied, which has a sealing portion 40 that covers the bonding portion 30. FIG. 7(b) shows a semiconductor device 2 of a comparative example that does not have a sealing portion 40. The semiconductor device 1 shown in FIG. 7(a) and the semiconductor device 2 shown in FIG. 7(b) have the same structure except that the semiconductor device 2 does not have a sealing portion 40. In addition, in the semiconductor device 1 shown in Figure 7(a) and the semiconductor device 2 shown in Figure 7(b), the same components as those in the semiconductor device 1 shown in Figures 1 to 4 are designated by the same reference numerals, and detailed explanations thereof will be omitted here.
[0053] 7(a) and 7(b), in the semiconductor devices 1 and 2, one semiconductor module 10 is joined to a heat sink 20 by a joint 30 (see FIG. 2). In the semiconductor device 1 shown in FIG. 7(a), a sealing portion 40 that covers the joint 30 is provided around the joint 30. The heat sink 20 had a size of 60 mm x 40 mm, a thickness of 3 mm, and a thermal conductivity of 180 W / m·K. In addition, the semiconductor module 10 had an insulating substrate 11 measuring 40 mm×30 mm and 1.92 mm thick, and a semiconductor element 13 measuring 10 mm×10 mm and 0.1 mm thick.
[0054] The bonding part 30 was a sintered body made of spherical copper particles with an average particle size of 100 μm as the metal particles. The bonding part 30 had dimensions of 35 mm × 25 mm, a thickness of 0.2 mm, and a thermal conductivity of 200 W / m·K. Furthermore, the sealing portion 40 of the semiconductor device 1 is made of a cured product obtained by curing a resin material containing an epoxy resin, which is a thermosetting resin, and an amine-based curing agent, and has an elastic modulus of 9.0 GPa at 25°C.
[0055] FIG. 8 is a diagram showing a temperature change profile of the thermal cycle applied to the semiconductor devices 1 and 2 in the thermal cycle test. As shown in FIG. 8, in the thermal cycle test, the semiconductor devices 1 and 2 were subjected to two thermal cycles in which the initial temperature was 120° C. and the temperature was changed within a range of −40° C. to 150° C. for 10,000 seconds. After the thermal cycle was applied, the amount of inelastic strain occurring in the bonding portion 30 of the semiconductor devices 1 and 2 was evaluated.
[0056] 9(a) and 9(b) are diagrams showing the amount of inelastic strain generated in the bonding portion 30 after the semiconductor device 1 of this embodiment shown in FIG. 7(a) is subjected to a heat cycle. 10(a) and 10(b) are diagrams showing the amount of inelastic strain generated in the bonding portion 30 after the semiconductor device 2 of the comparative example shown in FIG. 7(b) was subjected to a heat cycle. 9(a) and 10(a) show the amount of inelastic strain occurring on the semiconductor module 10 side of the joint 30. Also, FIGS. 9(b) and 10(b) show the amount of inelastic strain occurring on the heat sink 20 side of the joint 30. In FIGS. 9(a) to 9(b) and 10(a) to 10(b), the range in which the inelastic strain of the joint 30 is 0.032 or more is indicated by hatching.
[0057] As shown in FIGS. 10(a) and 10(b), in the semiconductor device 2 that does not have the sealing portion 40, the amount of inelastic strain is particularly large at the four corners of the bonding portion 30. In contrast, as shown in Figures 9(a) to (b), in the semiconductor device 1 of this embodiment, which has a sealing portion 40 that covers the periphery of the bonding portion 30, the amount of inelastic strain in the bonding portion 30 is smaller than in the semiconductor device 2. This confirmed that in the semiconductor device 1, by providing the sealing portion 40 around the bonding portion 30, deterioration of the bonding portion 30 can be suppressed. In the semiconductor device 1 shown in Figures 9(a) and 9(b), the maximum value of the inelastic strain generated in the bonding portion 30 was 0.079. On the other hand, in the semiconductor device 2 shown in Figures 10(a) and 10(b), the maximum value of the inelastic strain generated in the bonding portion 30 was 0.155.
[0058] [Embodiment 2] Next, a description will be given of a second embodiment of the present invention. Note that the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted here. Fig. 11 is a diagram showing an example of the configuration of a semiconductor device 3 to which embodiment 2 is applied. Fig. 11 corresponds to a cross section of the semiconductor device 3 cut along the stacking direction.
[0059] In the semiconductor device 1 of the first embodiment (see FIG. 2) described above, the heat sink 20 is joined only to one side in the stacking direction (the lower side in FIG. 2) of the semiconductor module 10. In contrast, in the semiconductor device 3 of the second embodiment, the heat sinks 20A and 20B are joined to both one side (the lower side in FIG. 11) and the other side (the upper side in FIG. 11) of the semiconductor module 10 in the stacking direction. Specifically, the semiconductor device 3 of the second embodiment includes three semiconductor modules 10. The semiconductor device 3 also includes a heat sink 20A joined to one side of the semiconductor module 10 and a heat sink 20B joined to the other side of the semiconductor module 10. The semiconductor device 3 also includes bonding portions 30 that bond each of the semiconductor modules 10 to the heat sinks 20A and 20B. The semiconductor device 3 also includes a sealing portion 40 that seals the periphery of the bonding portion 30.
[0060] In the semiconductor device 3 of this embodiment, heat generated in the semiconductor module 10 is conducted to and dissipated by both the heat sink 20A and the heat sink 20B via the joint 30. This allows the heat generated in the semiconductor module 10 to be dissipated more efficiently than, for example, when the heat sink 20 is joined to only one side of the semiconductor module 10. The semiconductor device 3 also has a sealing portion 40 that covers the joint portion 30 that joins the semiconductor module 10 to the heat sink 20A and the joint portion 30 that joins the semiconductor module 10 to the heat sink 20B. This makes it possible to suppress deterioration of the joint portion 30 that joins the semiconductor module 10 to the heat sink 20A and the joint portion 30 that joins the semiconductor module 10 to the heat sink 20B.
[0061] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments. Various modifications and combinations may be made as long as they do not deviate from the spirit of the present invention. [Explanation of symbols]
[0062] REFERENCE SIGNS LIST 1... semiconductor device, 10... semiconductor module, 11... insulating substrate, 13... semiconductor element, 15... element bonding layer, 20... heat sink, 21... base portion, 22... fin, 30... bonding portion, 40... sealing portion
Claims
1. a semiconductor module including a substrate and a semiconductor element mounted on one surface of the substrate; a heat sink laminated on the other surface of the substrate; a joining portion made of metal that joins the other surface of the substrate to the heat sink; a sealing portion that is made of a cured resin material containing a thermosetting resin, has an elastic modulus of 5 GPa or more, and covers the periphery of the joint portion; A semiconductor device comprising:
2. the bonding portion bonds the other surface of the substrate and the heat sink in a part of an area where the other surface of the substrate and the heat sink face each other, The sealing portion covers the periphery of the joint portion in a region where the other surface of the substrate and the heat sink face each other. The semiconductor device according to claim 1 .
3. 3. The semiconductor device according to claim 1, wherein the sealing portion does not cover a side surface connecting the one surface and the other surface of the substrate.
4. 3. The semiconductor device according to claim 1, wherein the sealing portion is a cured product of the resin material having a viscosity of 12 Pa.s or less at 25[deg.] C. and a viscosity of 0.3 Pa.s or less at 80[deg.] C.
5. 3. The semiconductor device according to claim 1, wherein the sealing portion is a cured product of the resin material having a contact angle of 65[deg.] or less with respect to the other surface of the substrate or the surface of the heat sink at 80[deg.]C.
6. a joining step of joining the other surface of a substrate in a semiconductor module having semiconductor elements mounted on one surface of the substrate to a heat sink using a joint made of metal; a coating step of coating a resin material containing a thermosetting resin and having a modulus of elasticity of 5 GPa or more after hardening so as to cover the periphery of the joint; a heating step of heating and curing the resin material; A method for manufacturing a semiconductor device comprising:
7. In the bonding step, the bonding portion is formed in a part of an area where the other surface of the substrate and the heat sink face each other, In the coating step, the resin material is caused to penetrate between the other surface of the substrate and the heat sink by capillary action, and the periphery of the joint is covered with the resin material. The method for manufacturing a semiconductor device according to claim 6 .
Citation Information
Patent Citations
Power semiconductor device and manufacturing method of power semiconductor device
JP2015041716A