Solar cell manufacturing method

Abstract

To provide a method for manufacturing a double-sided texture substrate capable of easily and surely manufacturing the double-sided texture substrate having textures of different sizes on the front and rear surfaces.SOLUTION: A method of manufacturing a double-sided texture substrate according to one aspect of the present invention includes forming a first texture on a first main surface on one side and a second main surface on the other side of a semiconductor substrate by first anisotropic etching, forming an etching mask that wraps around to an end portion of the second main surface on the first main surface, removing the first texture together with a wrapped portion of the etching mask by polishing the second main surface, and forming a second texture smaller than the first texture on the second main surface by second anisotropic etching.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a double-sided textured substrate and a method for manufacturing a solar cell. [Background technology]

[0002] A known technique involves anisotropically etching a semiconductor substrate used as a photoelectric conversion substrate for a solar cell to form a texture with a pyramidal pattern on both sides, promoting light incidence on both sides of the solar cell while suppressing light emission, thereby improving photoelectric conversion efficiency. The optimal size of the textured irregularities differs between the light-receiving surface (front surface) of the solar cell and the opposite surface (back surface). For this reason, a solar cell manufacturing method has been disclosed in which two smooth semiconductor substrates are held in close contact and etched, and then the two semiconductor substrates are separated and etched again, thereby forming a double-sided textured substrate with different sizes of irregularities on the front and back surfaces (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-61030 Summary of the Invention [Problem to be solved by the invention]

[0004] Even when two semiconductor substrates are bonded together, etching solution may seep between the semiconductor substrates from the edges, making it difficult to etch only the outer surfaces. While it is possible to form an etching mask on only one of the principal surfaces of the semiconductor substrate, it is difficult to form an etching mask that completely covers the edges of the front surface of the semiconductor substrate without wrapping around to the edges of the back surface. Therefore, using an etching mask can increase the unevenness of the outer edge of the front surface or reduce the unevenness of the outer edge of the back surface.

[0005] When a layer is formed by coating on a main surface on which a small texture is formed, if large protrusions are also present, pinholes may form in the coating film at the tips of the large protrusions. Pinholes formed in some layers can cause a decrease in the photoelectric conversion efficiency of solar cells.

[0006] In view of the above problems, the present invention aims to provide a method for manufacturing a double-sided textured substrate that can easily and reliably manufacture a double-sided textured substrate having textures of different sizes on the front and back, and a method for manufacturing a solar cell that can manufacture a solar cell with high photoelectric conversion efficiency. [Means for solving the problem]

[0007] A method for manufacturing a double-sided textured substrate according to one embodiment of the present invention includes the steps of: simultaneously forming a first texture on a first main surface on one side of a semiconductor substrate and a second main surface on the other side by first anisotropic etching; forming an etching mask on the first main surface that extends to the edge of the second main surface; polishing the second main surface to remove the first texture together with the portion of the etching mask that has extended; and forming a second texture on the second main surface that is smaller than the first texture by second anisotropic etching.

[0008] In the above-described double-sided textured substrate manufacturing method, the smoothing step may include chemically polishing the second main surface.

[0009] In the above-described method for manufacturing a double-sided textured substrate, the etching mask may be made of silicon nitride.

[0010] A solar cell manufacturing method according to one embodiment of the present invention includes the steps of obtaining a double-sided textured substrate using the above-described double-sided textured substrate manufacturing method, stacking a first semiconductor layer having a first polarity on one side of the first main surface of the double-sided textured substrate, stacking a second semiconductor layer having a second polarity on the other side of the second main surface of the double-sided textured substrate, stacking a first electrode layer on the one side of the first semiconductor layer, and stacking a second electrode layer on the other side of the second semiconductor layer.

[0011] The above-described solar cell manufacturing method may further include the steps of: stacking a first charge transport layer on the other side of the second electrode layer; stacking a front-side photoelectric conversion layer containing a perovskite compound on the other side of the first charge transport layer; stacking a second charge transport layer on the other side of the front-side photoelectric conversion layer; and stacking a front electrode layer on the other side of the second charge transport layer. [Effects of the Invention]

[0012] According to the present invention, it is possible to manufacture a double-sided textured substrate having textures of different sizes on the front and back sides, and a solar cell with high photoelectric conversion efficiency. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a flowchart showing the steps of a solar cell manufacturing method according to one embodiment of the present invention. [Figure 2] 2 is a schematic cross-sectional view showing the configuration of a solar cell that can be manufactured by the solar cell manufacturing method of FIG. 1. FIG. [Figure 3] 2 is a flowchart showing a detailed procedure of a textured substrate manufacturing step in the solar cell manufacturing method of FIG. 1. [Figure 4] 4 is a schematic cross-sectional view showing an intermediate product immediately after a first etching step in the method for producing a textured substrate in FIG. 3. FIG. [Figure 5] 4 is a schematic cross-sectional view showing an intermediate product immediately after the mask formation step of the textured substrate manufacturing method of FIG. 3. FIG. [Figure 6]4 is a schematic cross-sectional view showing an intermediate product immediately after the polishing step in the method for producing a textured substrate in FIG. 3. [Figure 7] 4 is a schematic cross-sectional view showing an intermediate product immediately after the second etching step of the textured substrate manufacturing method of FIG. 3. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments of the present invention will be described with reference to the drawings. For convenience, hatching and component symbols may be omitted, and in such cases, other drawings should be referenced. Also, the dimensions of various components in the drawings have been adjusted for ease of viewing. FIG. 1 is a flowchart showing the steps of a solar cell manufacturing method according to one embodiment of the present invention. FIG. 2 is a schematic cross-sectional view showing the configuration of a solar cell 1 that can be manufactured by the solar cell manufacturing method of FIG. 1.

[0015] As shown in FIG. 1, a solar cell manufacturing method according to one embodiment of the present invention includes a textured substrate forming step (step S01), a first semiconductor layer laminating step (step S02), a second semiconductor layer laminating step (step S03), a first electrode laminating step (step S04), a second electrode layer laminating step (step S05), a first charge transport layer laminating step (step S06), a front photoelectric conversion layer laminating step (step S07), a second charge transport layer laminating step (step S08), and a front electrode laminating step (step S09).

[0016] 2, a solar cell 1 that can be manufactured by this solar cell manufacturing method includes a double-sided textured substrate 10, a first semiconductor layer 20 stacked on one side (the lower side in FIG. 1) of the double-sided textured substrate 10, a second semiconductor layer 30 stacked on the other side (the upper side in FIG. 1) of the double-sided textured substrate 10, a first electrode layer 40 stacked on one side of the first semiconductor layer 20, a second electrode layer 50 stacked on the other side of the second semiconductor layer 30, and a first charge transport layer 60, a front-side photoelectric conversion layer 70, a second charge transport layer 80, and a front electrode layer 90 stacked on the other side of the second electrode layer 50. The solar cell 1 is a tandem solar cell including two stacked photoelectric converters, and converts light incident from the side of the front electrode layer 90 into electricity. In the solar cell 1, the double-sided textured substrate 10, the first semiconductor layer 20, and the second semiconductor layer 30 form a first photoelectric conversion element, and the first charge transport layer 60, the front-side photoelectric conversion layer 70, and the second charge transport layer 80 form a second photoelectric conversion element electrically connected in series with the first photoelectric conversion structure.

[0017] The double-sided textured substrate 10 is made of a single-crystal semiconductor substrate, such as silicon (Si) or gallium arsenide (GaAs). The double-sided textured substrate 10 can be, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. An example of an n-type dopant is phosphorus (P). The double-sided textured substrate 10 functions as a photoelectric conversion substrate that absorbs incident light and generates photocarriers (electrons and holes). By using crystalline silicon as the material for the double-sided textured substrate 10, dark current is relatively small, and a relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of incident light is low.

[0018] The double-sided textured substrate 10 has a first texture on one main surface 11, which has a surface shape similar to a covered pattern of pyramidal projections and depressions, and a second texture on the other main surface 12, which has a surface shape similar to a covered pattern of pyramidal projections and depressions that are smaller than the projections and depressions of the first texture. The first and second textures improve the absorption rate of light incident on the double-sided textured substrate 10 from outside and have the effect of trapping light inside the double-sided textured substrate 10. The first texture on the first main surface 11 has a relatively large projection and depression height, which improves the light trapping effect, and the second texture on the second main surface 12 has a relatively small height, which makes it possible to form a uniform layer on the second main surface 12 side by coating.

[0019] The thickness of the double-sided textured substrate 10 may be, for example, 50 μm or more and 300 μm or less. The arithmetic mean roughness Ra of the texture on the first main surface 11 is preferably 2.0 μm or more and 4.0 μm or less, and more preferably 2.2 μm or more and 3.0 μm or less, in order to improve the light trapping effect. Meanwhile, the arithmetic mean roughness Ra of the second texture on the second main surface 12 is preferably 0.1 μm or more and 1.8 μm or less, and more preferably 0.5 μm or more and 1.5 μm or less, in order to facilitate the formation of a film by coating on the other side of the double-sided textured substrate 10 while still achieving the light trapping effect. Because the texture size varies within the substrate surface, when evaluating the texture size on the first main surface 11 and the second main surface 12, it is necessary to measure multiple points within the surface and take the average.

[0020] The first semiconductor layer 20 has a first polarity, and the second semiconductor layer 30 has a second polarity opposite to the first polarity. The first semiconductor layer 20 and the second semiconductor layer 30 extract charges of opposite polarities from within the double-sided textured substrate 10 by attracting carriers of opposite polarities. Specifically, the first semiconductor layer 20 may be formed from an n-type semiconductor, and the second semiconductor layer 30 may be formed from a p-type semiconductor. The first semiconductor layer 20 and the second semiconductor layer 30 may be formed, for example, from an amorphous silicon material containing a dopant that imparts the desired conductivity type. An example of a p-type dopant is boron (B), and an example of an n-type dopant is phosphorus (P), as described above.

[0021] The first electrode layer 40 outputs the charge extracted by the first semiconductor layer 20 from the double-sided textured substrate 10 to the outside of the solar cell 1. The first electrode layer 40 may be formed from a conductive material. The first electrode layer 40 may have a multilayer structure including a thin layer of transparent conductive oxide (TCO) for improving adhesion to the first semiconductor layer 20 and a layer mainly made of metal for ensuring conductivity.

[0022] The second electrode layer 50 is an intermediate electrode that electrically connects the first photoelectric converter and the second photoelectric converter. The second electrode layer 50 can be formed of a transparent conductive oxide that is conductive and optically transparent so that light that has passed through the second photoelectric converter can be incident on the first photoelectric converter. Examples of transparent conductive oxides that can be used to form the second electrode layer 50 include indium oxide, tin oxide, zinc oxide, titanium oxide, and composite oxides thereof. Among these, indium-based composite oxides containing indium oxide as the main component are preferred. Indium oxide is particularly preferred from the standpoint of high conductivity and transparency. Furthermore, it is preferable to add a dopant to indium oxide to ensure reliability or higher conductivity. Examples of dopants include Sn, W, Zn, Ti, Ce, Zr, Mo, Al, Ga, Ge, As, Si, and S. For example, ITO (indium tin oxide), indium oxide doped with tin, is widely known.

[0023] The first charge transport layer 60 is a hole transport layer (HTL) that selectively transports one of the carriers generated in the front-side photoelectric conversion layer 70, that is, holes in this embodiment, to the second electrode layer 50. Examples of the main material of the first charge transport layer 60 that is the first charge transport layer include metal oxides such as nickel oxide (NiO) and copper oxide (CuO), and organic substances such as PTAA (Poly(bis(4-phenyl)(2,4,6-trimethylphenyl)amine)) and Spiro-MeOTAD. In addition, the first charge transport layer 60 may be a self-assembled monolayer (SAM) formed from, for example, 2PACz ([2-(9H-Carbazol-9-yl)ethyl]phosphonic Acid), MeO-2PACz ([2-(3,6-Dimethoxy-9H-carbazol-9-yl)ethyl]phosphonic Acid), Me-4PACz ([4-(3,6-Dimethyl-9H-carbazol-9-yl)butyl]phosphonic Acid), etc. In this case, the effect of reducing the second texture on the second main surface 12 becomes more pronounced.

[0024] The front-side photoelectric conversion layer 70 contains a perovskite compound that absorbs light and generates carriers. The perovskite compound contained in the front-side photoelectric conversion layer 70 may be a compound represented by the formula ABX3, which includes an organic atomic group A containing at least one of a monovalent organic ammonium ion and an amidinium ion; a metal atom B that generates a divalent metal ion; and a halogen atom X containing at least one of an iodide ion I, a bromide ion Br, a chloride ion Cl, and a fluoride ion F. Examples of the organic atomic group A include methylammonium MA (CH3NH3) and formamidinium FA (CH3N2). Examples of the metal atom B include lead Pb and tin Sn, with lead being the main component. The halogen atom X is preferably at least one of iodide I, bromide Br, and chloride Cl. Substitution of part or all of the organic atomic group A with an alkali metal Am has also been considered, and such perovskite compounds are not excluded from the present invention. Examples of the alkali metal Am include potassium K, cesium Cs, and rubidium Rb.

[0025] Specifically, preferred perovskite compounds include methylammonium lead halides (MAPbX3) such as MAPbI3, MAPbBr3, and MAPbCl3, and formamidinium lead halides (FAPbX3) such as FAPbI3, FAPbBr3, and FAPbCl3. Note that the halogen atom X may contain multiple types, and FA compounds containing both methylammonium and formamidinium as the organic atomic group A are also suitable. y MA 1-y PbX3. When the alkali metal Am is contained, Am y FA z MA 1-y-z PbIX, Am y FA 1-y PbIX, etc. Am may be a single species of Cs, Rb, or K, or may contain multiple species (where y and z are any positive integers).

[0026] The second charge transport layer 80 is an electron transport layer (ETL) that selectively transports carriers generated in the front photoelectric conversion layer 70, which in this embodiment are electrons, to the front electrode layer 90. Examples of the main material of the second charge transport layer 80, which is an electron transport layer, include PTAA (Poly(bis(4-phenyl)(2,4,6-trimethylphenyl)amine)), Spiro-MeOTAD, and fullerene. Examples of fullerenes include C60, C70, and their hydrides, oxides, metal complexes, and derivatives with alkyl groups or the like added. Forming the second charge transport layer 80 from a material containing fullerenes encapsulating lithium (Li) can improve electron transport efficiency.

[0027] The front electrode layer 90 outputs the charges transmitted by the second charge transport layer 80 to the outside of the solar cell 1. Like the second electrode layer 50, the front electrode layer 90 can be formed from a transparent conductive oxide that is conductive and optically transparent.

[0028] In the solar cell manufacturing method of Figure 1, in the textured substrate formation process of step S01, a first texture on the first main surface 11 and a second texture on the second main surface 12 of double-sided textured substrate 10 are formed by a double-sided textured substrate manufacturing method shown in detail in Figure 3. The double-sided textured substrate manufacturing method of Figure 3 is itself an embodiment of the double-sided textured substrate manufacturing method according to the present invention.

[0029] The double-sided textured substrate manufacturing method of FIG. 3 includes a first etching step (step S11), a mask forming step (step S12), a polishing step (step S13), a second etching step (step S14), and a mask removing step (step S15).

[0030] In the first etching process of step S11, as shown in FIG. 4, a first texture having relatively large projections and depressions is simultaneously formed on both the first main surface 11 and the second main surface 12 of the semiconductor substrate 10A by first anisotropic etching. When the texture is formed by immersing the semiconductor substrate 10A in an anisotropic etching solution, the first texture is simultaneously formed on the first main surface 11 and the second main surface 12 of the semiconductor substrate 10A by first anisotropic etching, thereby forming first textures of approximately the same size on the first main surface 11 and the second main surface 12. To form a texture having pyramidal projections and depressions by anisotropic etching, the semiconductor substrate 10A is used such that the main surfaces 11 and 12 are crystalline (100) planes. An alkaline solution can be used as the etching solution. Examples of alkaline components include hydroxides of alkali metals or alkaline earth metals, such as sodium hydroxide, potassium hydroxide, or calcium hydroxide, or mixtures thereof. Among these, sodium hydroxide or potassium hydroxide is preferred. Etching conditions such as the concentration and temperature of the etching solution, and etching (immersion) time are appropriately selected so as to form a first texture of the above-mentioned size.

[0031] In the mask formation process of step S12, as shown in FIG. 5, an etching mask M is formed on the first main surface, extending to the edge of the second main surface. The etching mask M may be formed from a resin composition or the like, but is preferably formed from a metal nitride so as to facilitate control of the subsequent polishing process. When the semiconductor substrate 10A is a crystalline silicon substrate, it is particularly preferable to form the etching mask M from silicon nitride (SiN). Although it depends on the shape of the apparatus, when silicon nitride is formed as the etching mask M using a chemical vapor deposition (CVD) method, the film thickness of the extended portion is approximately 5 to 20 nm. The etching mask M made of a metal nitride can be formed using a vacuum film formation technique such as sputtering.

[0032] In the polishing process of step S13, the second main surface 12 of the semiconductor substrate 10A is polished to completely remove the first texture on the second main surface 12, including the portion of the etching mask M that wraps around to the second main surface 12. As a result, as shown in FIG. 6, the second main surface 12 of the semiconductor substrate 10A is smoothed and the entire second main surface 12 of the semiconductor substrate 10A is exposed. Smoothing does not necessarily require a completely flat surface; it is sufficient to achieve a smooth surface that does not affect the arithmetic mean roughness of the second texture. The arithmetic mean roughness is preferably 1.0 μm or less, and more preferably 0.5 μm or less. Polishing can be performed not only by mechanical polishing but also by chemical polishing using chemicals. Chemical polishing is preferred in terms of minimizing damage to the substrate, facilitating the production of high-performance solar cells, and improving productivity. Chemical polishing slows down the portion of the etching mask M that wraps around to the second main surface 12, slightly increasing the thickness of the wafer's periphery, which is expected to reduce the wafer's cracking resistance.

[0033] In the second etching process of step S14, a second texture smaller than the first texture is formed on the second main surface 12 of the semiconductor substrate 10A by second anisotropic etching, as shown in Fig. 7. The same etchant as that used in the first etching process is used. The etching conditions are appropriately selected so as to form the second texture of the above-mentioned size.

[0034] In the mask removal step of step S15, the etching mask M is removed using a dissolving liquid that selectively dissolves the etching mask M, thereby obtaining a double-sided textured substrate 10 having a first texture formed on the first main surface 11 and a second texture smaller than the first texture formed on the second main surface 12. As the dissolving liquid, for example, hydrofluoric acid or the like can be used.

[0035] According to the above-described method for manufacturing a textured substrate, after forming the first texture on the semiconductor substrate 10A, the second main surface 12 of the semiconductor substrate 10A is smoothed and then the second texture is formed, so that the size of the irregularities in the second texture can be made relatively accurate and uniform. Although pinholes may be formed in the etching mask M laminated on the first texture, even if local irregularities of different sizes are formed as a result of the first main surface 11 being locally re-etched through the pinholes in the etching mask M in the second etching step, this does not pose a problem because the reduction in the light trapping effect is extremely slight.

[0036] In step S02, a first semiconductor layer lamination process, a first semiconductor layer 20 is laminated on one side of the first main surface 11 having the first texture of the double-sided textured substrate 10. The first semiconductor layer 20 can be laminated using a vacuum film formation technique such as sputtering or vacuum deposition.

[0037] In step S03, a second semiconductor layer deposition process, a second semiconductor layer 30 is deposited on the other side of the second main surface 12 having the second texture of the double-sided textured substrate 10. Like the first semiconductor layer 20, the second semiconductor layer 30 can be deposited using a vacuum film-forming technique such as sputtering or vacuum deposition.

[0038] In the first electrode lamination step of step S04, the first electrode layer 40 is laminated on one side of the first semiconductor layer 20. The first electrode layer 40 can be laminated by a method appropriately selected depending on the material of the second electrode layer 50, such as the vacuum film-forming technique used for the first electrode layer 40, or by a method such as plating or applying and drying and curing a conductive paste.

[0039] In the second electrode layer lamination step of step S05, the second electrode layer 50 is laminated on the other side of the second semiconductor layer 30. The second electrode layer 50 can be laminated using a vacuum film formation technique such as sputtering or vacuum deposition.

[0040] In step S06, a first charge transport layer lamination step, a first charge transport layer 60 is laminated on the other side of the second electrode layer 50. When the first charge transport layer 60 is formed of a metal oxide, it can be laminated using a vacuum film-forming technique such as sputtering or vacuum deposition. When the first charge transport layer 60 is formed of a material containing an organic substance, it can be formed by a method such as coating and drying an organic solution. When the first charge transport layer 60 is formed by a method including coating, especially when the first charge transport layer 60 is formed of a material that forms a self-assembled monolayer, pinholes are less likely to form in the first charge transport layer 60 due to the small unevenness of the second texture formed on the second main surface 12 of the double-sided textured substrate 10 as described above.

[0041] In step S07, a front-side photoelectric conversion layer lamination process, a front-side photoelectric conversion layer 70 is laminated on the other side of the first charge transport layer 60. The front-side photoelectric conversion layer 70 can be formed by applying a precursor liquid containing a precursor that forms a perovskite compound and crystallizing the perovskite compound in the coating. Because the precursor liquid is applied to the first charge transport layer 60, which can have a surface shape that conforms to the second main surface 12 of the double-sided textured substrate 10, the relatively small unevenness of the second texture makes it easy to apply the precursor liquid appropriately.

[0042] In the second charge transport layer lamination step of step S08, the second charge transport layer 80 is laminated on the other side of the front-side photoelectric conversion layer 70. The second charge transport layer 80 can be formed by a method such as a sol-gel method or a coating method.

[0043] In the surface electrode lamination process of step S09, a surface electrode layer 90 is laminated on the other side of the second charge transport layer 80. Like the second electrode layer 50, the surface electrode layer 90 can be laminated using a vacuum film formation technique such as sputtering or vacuum deposition.

[0044] As described above, the solar cell manufacturing method according to this embodiment uses a double-sided textured substrate 10 manufactured by the double-sided textured substrate manufacturing method of FIG. 3, in which the second texture irregularities on the second main surface 12 are relatively uniform and small. This facilitates coating in the first charge transport layer lamination step and the front-side photoelectric conversion layer lamination step, thereby enabling the manufacture of a solar cell 1 with high photoelectric conversion efficiency.

[0045] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and various modifications and variations are possible. For example, in the solar cell manufacturing method according to the present invention, the order of steps may be reversed as long as the order of layers in the resulting solar cell is not changed. Specifically, the order of the first semiconductor layer lamination step and the second semiconductor layer lamination step may be reversed. Additional layers may be interposed between the layers of the above-described embodiments. Specifically, passivation layers that suppress carrier recombination may be provided between the double-sided textured substrate 10 and the first semiconductor layer 20, between the double-sided textured substrate 10 and the second semiconductor layer 30, between the first charge transport layer 60 and the front-side photoelectric conversion layer 70 and the first charge transport layer 60, and between the second charge transport layer 80. [Explanation of symbols]

[0046] 1. Solar cells 10 Double-sided textured board 10A semiconductor substrate 11 First main surface 12 Second main surface 20 First semiconductor layer 30 Second semiconductor layer 40 1st electrode layer 50 Second electrode layer 60 First charge transport layer 70 Front photoelectric conversion layer 80 Second charge transport layer 90 Surface electrode layer M Etching Mask

Claims

1. simultaneously forming a first texture on a first main surface on one side of the semiconductor substrate and a second main surface on the other side of the semiconductor substrate by first anisotropic etching; forming an etching mask on the first main surface that extends to an edge of the second main surface; polishing the second principal surface to remove and smooth the first texture together with the portion that has been covered by the etching mask; forming a second texture on the second main surface by a second anisotropic etching, the second texture being smaller than the first texture; A method for manufacturing a double-sided textured substrate, comprising:

2. The method for manufacturing a double-sided textured substrate according to claim 1 , wherein the second main surface is chemically polished in the smoothing step.

3. The method for manufacturing a double-sided textured substrate according to claim 1 , wherein the etching mask is made of silicon nitride.

4. a step of obtaining a double-sided textured substrate by the double-sided textured substrate manufacturing method according to any one of claims 1 to 3; laminating a first semiconductor layer having a first polarity on the one side of the first main surface of the double-sided textured substrate; laminating a second semiconductor layer having a second polarity on the other side of the second main surface of the double-sided textured substrate; laminating a first electrode layer on the one side of the first semiconductor layer; stacking a second electrode layer on the other side of the second semiconductor layer; A solar cell manufacturing method comprising:

5. depositing a first charge transport layer on the other side of the second electrode layer; stacking a front-side photoelectric conversion layer containing a perovskite compound on the other side of the first charge transport layer; laminating a second charge transport layer on the other side of the front-side photoelectric conversion layer; laminating a surface electrode layer on the other side of the second charge transport layer; The solar cell manufacturing method according to claim 4 , further comprising:

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