Image forming apparatus

Abstract

To provide a circuit board having a configuration in which even an alternative component having no function of a regular component can be replaced with the regular component by achieving the function.SOLUTION: An image forming apparatus 100 includes a semiconductor device 501 having a VSEN terminal for monitoring a voltage of a connected node, a printer (240) for forming an image on a recording medium based on image data, and a CPU203 for controlling the semiconductor device 501 and the printer 240. CPU203 sends a manual reset signal 509 to reset the device 501.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to an image forming apparatus. [Background technology]

[0002] An image forming apparatus has a circuit board for controlling the operation of components provided inside the apparatus. The circuit board has a function of controlling components that perform, for example, image processing, paper transport processing, etc. Electronic components that constitute logic circuits, drive circuits, power supply circuits, etc. are mounted on the circuit board depending on the function.

[0003] Patent Document 1 discloses a configuration in which an electronic component (IC) with an error detection function that notifies when an output voltage of a predetermined voltage value cannot be output due to an overcurrent, etc. is mounted, and a configuration in which an electronic component without an error detection function is mounted. If the mounted electronic component does not have an error detection function, it proposes using an external reset IC or the like to detect a drop in output voltage. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2024-048499 Summary of the Invention [Problem to be solved by the invention]

[0005] When there is no error detection function, an external reset IC is provided, which results in problems such as an increase in the number of parts, an increase in cost, and an increase in the size of the circuit board. In view of the above problems, the main object of the present invention is to provide an image forming apparatus with a simpler configuration. [Means for solving the problem]

[0006] An image forming apparatus according to one aspect of the present invention comprises a semiconductor device having a monitor terminal for monitoring the voltage of a connected node, an image forming unit for forming an image on a recording medium based on image data, and a control unit for controlling the semiconductor device and the image forming unit, wherein the control unit transmits a reset signal for resetting the semiconductor device. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide an image forming apparatus with a simple configuration. [Brief explanation of the drawings]

[0008] [Figure 1] A simplified diagram of the system. [Figure 2] FIG. 1 is a diagram illustrating the configuration of an image forming apparatus. [Figure 3] FIG. [Figure 4] FIG. 1 is an explanatory diagram of a semiconductor device having a manual reset function. [Figure 5] 10A and 10B are explanatory diagrams of a semiconductor device that does not have a manual reset function. [Figure 6] FIG. 10 is another explanatory diagram of a semiconductor device without a manual reset function. [Figure 7] 1 is a diagram illustrating an example of a circuit board on which semiconductor devices for a plurality of types of power supply monitoring devices can be mounted; [Figure 8] FIG. 2 is a diagram illustrating a wiring pattern of a circuit board. DETAILED DESCRIPTION OF THE INVENTION

[0009] Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. The device configurations and circuits described in the present embodiments are merely examples, and the present invention is not limited to the described contents. In the present embodiments, an image forming apparatus will be described as an example of an electronic device, but the present embodiments are also effective for other information processing devices such as personal computers, and general electrical equipment such as air conditioners and refrigerators.

[0010] (system) 1 is a simplified configuration diagram of a system having an image forming apparatus and an image processing controller. The system is configured by an image forming apparatus 100 and personal computers (hereinafter referred to as "PCs") 103, 104, and 105 connected to each other so as to be able to communicate with each other via a network 106. The network 106 may be a LAN (Local Area Network), a WAN (Wide Area Network), a public line, or the like. The PCs 103, 104, and 105 function as image processing controllers.

[0011] Image forming apparatus 100 is connected to network 106 via network cable 107. A plurality of image forming apparatuses 100 may be connected to network 106. PCs 103, 104, and 105 are connected to network 106 via network cables 108, 109, and 110, respectively. Note that while FIG. 1 shows an example of wired connection using network cables 107 to 110, image forming apparatus 100 and PCs 103, 104, and 105 may be connected to network 106 wirelessly.

[0012] Each of the PCs 103, 104, and 105 can transmit a print job to the image forming apparatus 100 via a network 106. Each of the PCs 103, 104, and 105 can transmit a remote shutdown instruction to cut off the power to the image forming apparatus 100 via the network 106.

[0013] (Image forming device) 2 is a configuration diagram of the image forming apparatus 100. The image forming apparatus 100 includes a power supply unit 200, a control unit 201, a reader 230, a printer 240, and an operation unit 250. The control unit 201 includes a power supply control unit 202 and a control unit 220. The power supply control unit 202 is connected to the power supply unit 200. The control unit 220 is connected to the power supply control unit 202, the reader 230, the printer 240, and the operation unit 250. The control unit 220 is connected to the network 106 via a network cable 107.

[0014] The power supply unit 200 supplies power to each component of the image forming apparatus 100. The power supply control unit 202 controls the supply of power to the power supply unit 200 and the control unit 220. The power supply control unit 202 is implemented in the control unit 201, and controls the supply of power to each component based on an instruction from the user via a power switch or the like. Details of the power supply control unit 202 will be described later.

[0015] The control unit 220 is an information processing device having a CPU (Central Processing Unit) 203, a ROM (Read Only Memory) 204, a RAM (Random Access Memory) 205, and a storage 206. The control unit 220 also has an image processing unit 207 and a network controller 208. The control unit 220 also has a printer I / F 212, a reader I / F 213, and a network I / F 209 as interfaces.

[0016] The CPU 203 controls the overall operation of the image forming apparatus 100 by executing computer programs such as a startup program stored in the ROM 204 and a control program stored in the storage 206. The RAM 205 functions as a work memory when the CPU 203 executes the computer programs. The ROM 204 stores various setting values ​​in addition to the startup program.

[0017] The storage 206 is a large-capacity storage device such as an HDD (Hard Disk Drive) or an SSD (Solid State Drive). The storage 206 stores control programs and is used for temporary storage of image data, etc. The storage 206 is connected to the CPU 203 via a predetermined interface such as Serial ATA. Data is written to and read from the storage 206 by the CPU 203. Note that multiple storages 206 may be connected to the CPU 203. For example, the storage 206 may be configured using RAID0 (striping) or RAID1 (mirroring).

[0018] The image processing unit 207 is connected to the reader 230 via a reader I / F 213, and to the printer 240 via a printer I / F 212. The reader 230 reads an image from a document and generates image data. The reader 230 has an ADF (Auto Document Feeder) and a scanner unit, and reads an image of a document placed on a document platen or the ADF and generates image data. The printer 240 is an image forming unit that forms an image on a recording medium such as paper based on the image data. The operations of the reader 230 and the printer 240 are controlled directly by the CPU 203 or by the CPU 203 via the image processing unit 207.

[0019] The image processing unit 207 acquires image data from the reader 230, performs signal processing such as color space conversion on the acquired image data, and converts it into image data for printing. The image processing unit 207 transmits the image data for printing to the printer 240. Note that the image processing of the image data may be performed on the reader 230 side. The image processing unit 207 may also acquire image data together with a print job from the PCs 103 to 105 via the network 106, and perform predetermined image processing on the image data to generate image data for the printer.

[0020] The network controller 208 communicates with the PCs 103 to 105 via the network I / F 209 and the network under the control of the CPU 203. The network I / F 209 is a communication interface with the network .

[0021] The operation unit 250 is a user interface having an input interface and an output interface. The input interface is various key buttons, a touch panel, etc. A user can input instructions and the like to the control unit 220 via the input interface. The output interface is a display, a speaker, etc. The control unit 220 can display a setting screen to the user and notify the user of the status of the image forming apparatus 100 via the output interface.

[0022] (Power supply control unit) 3 is an explanatory diagram of the control unit 201. The power supply unit 200 includes a first power supply unit 301 and a second power supply unit 302. The control unit 220 includes a CPU power supply unit 310, an image processing power supply unit 311, a storage power supply unit 312, a network controller power supply unit 313, an operation unit power supply unit 314, a printer power supply unit 315, and a reader power supply unit 316.

[0023] Commercial power 330 is supplied to the first power supply unit 301 and the second power supply unit 302 from a commercial power source via a power outlet 300. The first power supply unit 301 converts the commercial power 330 to generate first power 331, which is supplied to the power supply control unit 202, the CPU power supply unit 310, the image processing power supply unit 311, the storage power supply unit 312, the network controller power supply unit 313, and the operation unit power supply unit 314. The second power supply unit 302 converts the commercial power 330 to generate second power 332, which is supplied to the printer power supply unit 315 and the reader power supply unit 316.

[0024] The first power 331 supplied by the first power supply unit 301 is converted into a voltage value according to the supply destination. That is, the voltage value of the first power 331 corresponds to each of the power supply control unit 202, the CPU power supply unit 310, the image processing power supply unit 311, the storage power supply unit 312, the network controller power supply unit 313, and the operation unit power supply unit 314. In the following description, the first power 331 does not refer to a single power, but refers to multiple powers having voltage values ​​according to the supply destinations. The first power supply unit 301 outputs the first power 331 under the control of the power supply control unit 202.

[0025] The power supply control unit 202 outputs power supply control signals 341 to 344 to enable the operations of the image processing power supply unit 311, storage power supply unit 312, network controller power supply unit 313, and operation unit power supply unit 314. The image processing power supply unit 311, storage power supply unit 312, network controller power supply unit 313, and operation unit power supply unit 314 are enabled to operate by the corresponding power supply control signals 341 to 344, respectively.

[0026] The CPU power supply unit 310 receives a power supply control signal from the power supply control unit 202 via a signal line (not shown). Based on this power supply control signal, the CPU power supply unit 310 supplies power to the CPU 203. A charge drain unit 320 is provided in the path along which power is supplied from the CPU power supply unit 310 to the CPU 203. The operation of the charge drain unit 320 is controlled by a control signal 350 input from the power supply control unit 202. The charge drain unit 320 is driven to adjust the current value of the path along which power is supplied from the CPU power supply unit 310 to the CPU 203. The CPU 203 operates when power is supplied from the CPU power supply unit 310.

[0027] The image processing power supply unit 311 is enabled by a power supply control signal 341, and supplies power to the image processing unit 207. A charge drain unit 321 is provided on the path along which power is supplied from the image processing power supply unit 311 to the image processing unit 207. The operation of the charge drain unit 321 is controlled by a control signal 351 input from the power supply control unit 202. The charge drain unit 321 is driven to adjust the current value of the path along which power is supplied from the image processing power supply unit 311 to the image processing unit 207. The image processing unit 207 operates when power is supplied from the image processing power supply unit 311.

[0028] The storage power supply unit 312 is enabled by a power supply control signal 342, and supplies power to the storage 206. A charge drain unit 322 is provided in the path along which power is supplied from the storage power supply unit 312 to the storage 206. The operation of the charge drain unit 322 is controlled by a control signal 352 input from the power supply control unit 202. The charge drain unit 322 is driven to adjust the current value of the path along which power is supplied from the storage power supply unit 312 to the storage 206. The storage 206 operates when power is supplied from the storage power supply unit 312.

[0029] Network controller power supply unit 313 supplies power to network controller 208 when its operation is enabled by power supply control signal 343. A charge drain unit 323 is provided in the path along which power is supplied from network controller power supply unit 313 to network controller 208. The operation of charge drain unit 323 is controlled by control signal 353 input from power supply control unit 202. When driven, charge drain unit 323 adjusts the current value of the path along which power is supplied from network controller power supply unit 313 to network controller 208. Network controller 208 operates when power is supplied from network controller power supply unit 313.

[0030] The operation of the operation unit power supply unit 314 is enabled by a power supply control signal 344, and the operation unit supplies power to the operation unit 250. A charge drain unit 324 is provided in the path along which power is supplied from the operation unit power supply unit 314 to the operation unit 250. The operation of the charge drain unit 324 is controlled by a control signal 354 input from the power supply control unit 202. The charge drain unit 324 is driven to adjust the current value of the path along which power is supplied from the operation unit power supply unit 314 to the operation unit 250. The operation unit 250 operates when power is supplied from the operation unit power supply unit 314.

[0031] In this way, the supply of power to each unit is controlled by power control signals 341 to 344 and control signals 350 to 354 output from power control unit 202. The voltage value of the power supplied to each unit may be set by CPU power supply unit 310, image processing power supply unit 311, storage power supply unit 312, network controller power supply unit 313, and operation unit power supply unit 314. For example, the voltage value of first power 331 may be kept constant, and CPU power supply unit 310, image processing power supply unit 311, storage power supply unit 312, network controller power supply unit 313, and operation unit power supply unit 314 may each generate and supply a voltage value appropriate for the subsequent component.

[0032] The second power 332 supplied by the second power supply unit 302 is converted to a voltage value appropriate for the supply destination. In other words, the voltage value of the second power 332 is set to a value appropriate for each of the printer 240 and the reader 230. The printer 240 and the reader 230 have a large power load and consume a lot of power. For this reason, the second power supply unit 302 is provided separately from the first power supply unit 301, and outputs the second power 332 only when necessary under the control of the power supply control unit 202. The power supply control unit 202 controls the output of the second power 332 by the second power supply unit 302 by inputting a power supply control signal 347 to the second power supply unit 302.

[0033] The power supply control unit 202 outputs power supply control signals 345 and 346 to enable the operation of the printer power supply unit 315 and the reader power supply unit 316. The printer power supply unit 315 and the reader power supply unit 316 are enabled to operate by the corresponding power supply control signals 345 and 346, respectively.

[0034] The printer power supply unit 315 supplies power to the printer 240 when its operation is enabled by a power supply control signal 345. A charge discharge unit 325 is provided in the path along which power is supplied from the printer power supply unit 315 to the printer 240. The operation of the charge discharge unit 325 is controlled by a control signal 355 input from the power supply control unit 202. When driven, the charge discharge unit 325 adjusts the current value of the path along which power is supplied from the printer power supply unit 315 to the printer 240. The printer 240 operates when power is supplied from the printer power supply unit 315.

[0035] The reader power supply unit 316 is enabled by a power supply control signal 346, and supplies power to the reader 230. A charge discharge unit 326 is provided on the path for supplying power from the reader power supply unit 316 to the reader 230. The operation of the charge discharge unit 326 is controlled by a control signal 356 input from the power supply control unit 202. The charge discharge unit 326 is driven to adjust the current value of the path for supplying power from the reader power supply unit 316 to the reader 230. The reader 230 operates when power is supplied from the reader power supply unit 316.

[0036] As shown in FIG. 3, the control unit 201 is equipped with multiple components (power supply control unit 202, power supply units 310 to 316). Each component is configured by mounting a large number of electronic components on a circuit board. Each circuit board is used to generate power and switch the power supply according to the specifications of the image forming apparatus 100 in which it is installed. Each component may be configured on an independent circuit board, or multiple components may be implemented on a single circuit board.

[0037] Although the present embodiment is described using an image forming apparatus 100 as an example, the present embodiment is effective for any electronic device that operates on a circuit board. Examples include information processing devices such as personal computers and servers, and electrical appliances such as air conditioners and refrigerators. These electronic devices may be equipped with a power supply monitoring device that monitors power levels (e.g., voltage values ​​and current values) to ensure the power supply sequence to each component. Typically, a circuit board on which electronic components such as semiconductor devices are mounted is used as the power supply monitoring device.

[0038] (Semiconductor device for power supply monitoring device with manual reset function) 4 is an explanatory diagram of a semiconductor device that is an electronic component for a power supply monitoring device having a manual reset function. The semiconductor device 401 has an MR terminal, a VSS terminal, a VDD terminal, and a VOUT terminal. The semiconductor device 401 monitors power 402 supplied from the image processing power supply unit 311 to the image processing unit 207. The VSS terminal is grounded.

[0039] The VDD terminal is a power supply terminal for the semiconductor device 401. The VOUT terminal is an output terminal for a reset signal 403 to the image processing unit 207. The semiconductor device 401 monitors the voltage value of the power 402 supplied from the VDD terminal. When the voltage value is equal to or greater than a predetermined specified voltage, the semiconductor device 401 transmits a reset signal 403 of a predetermined logical value (here, high level) from the VOUT terminal to the image processing unit 207. When the voltage value is less than the specified voltage, the semiconductor device 401 transmits a reset signal 403 of a logical value (here, low level) opposite to that when the voltage value is equal to or greater than the specified voltage from the VOUT terminal to the image processing unit 207. Whether the voltage is equal to or greater than the specified value is determined, for example, based on the result of comparing the specified value with the voltage value. When the low-level reset signal 403 is input, the operation of the image processing unit 207 is reset.

[0040] The MR terminal is a terminal to which a manual reset signal 404 is input from the CPU 203. The manual reset signal 404 is a signal that forcibly sets the reset signal 403 to a low level regardless of the state of the power 402 to be monitored. The manual reset signal 404 in FIG. 4 is issued, for example, when the CPU 203 detects the occurrence of an operational abnormality in the image processing unit 207, and is used to restart (reset) the image processing unit 207. The CPU 203 operates using power 405 supplied from the CPU power supply unit 310. In this way, by inputting the manual reset signal 404 from the CPU 203 to the MR terminal, it is possible to reset the semiconductor device with a simple circuit configuration.

[0041] (Semiconductor device for power supply monitoring device without manual reset function) 5A and 5B are explanatory diagrams of a semiconductor device for a power supply monitoring device that does not have a manual reset function. In the example of Fig. 5A, the manual reset function is not implemented. In the example of Fig. 5B, the manual reset function is implemented by peripheral components of the semiconductor device 501.

[0042] The semiconductor device 501 has a VOUT terminal, a VSS terminal, a VIN terminal, a VSEN terminal, and a CD terminal. The VSS terminal is grounded. The VIN terminal is a power supply terminal for the semiconductor device 501. In this embodiment, the power 405 supplied from the CPU power supply unit 310 to the CPU 203 is also supplied to the VIN terminal.

[0043] The VSEN terminal is a monitor terminal for power monitoring that monitors the voltage of a connected node. In this embodiment, the semiconductor device 501 monitors the power 402 supplied to the image processing unit 207 based on the power input from the VSEN terminal. The power 402 is divided by resistors 503 and 504. The divided power 402 is input to the VSEN terminal. The semiconductor device 501 compares the voltage value of the divided power 402 input from the VSEN terminal with a specified value to determine whether the voltage value of the power 402 is equal to or greater than the specified voltage.

[0044] The VOUT terminal is a terminal that outputs a reset signal 505 via an open collector in accordance with the state of the power 402 to be monitored. When the voltage value of the divided power 402 is equal to or greater than a specified value, the reset signal 505 is pulled up by the power 402 via a resistor 506 and becomes high level. When the voltage value of the divided power 402 is less than the specified value, the reset signal 505 becomes low level. The reset signal 505 is input to the image processing unit 207. The operation of the image processing unit 207 is reset when the low-level reset signal 505 is input. The CD terminal is a terminal that specifies the delay time of the reset signal 505 and is not used in this embodiment.

[0045] The terminal configuration of the semiconductor device 501 in FIG. 5(b) is the same as that in FIG. 5(a). In FIG. 5(b), a manual reset function is realized by adding a switch circuit 508 to the configuration in FIG. 5(a). The switch circuit 508 in this embodiment includes a bipolar transistor and two resistor elements. The bipolar transistor has a collector terminal, a base terminal, and an emitter terminal. The collector terminal is connected to the VSEN terminal, the base terminal is connected to the CPU 203 via a first resistor element, and the emitter terminal is grounded. The base terminal and the emitter terminal are connected via a second resistor element. An open collector signal 510 is input to the VSEN terminal from the collector terminal of the switch circuit 508.

[0046] The CPU 203 inputs a manual reset signal 509 to the switch circuit 508. The switch circuit 508 inputs an open collector signal 510 corresponding to the manual reset signal 509 to the VSEN terminal. For example, when the manual reset signal 509 is low (a voltage value close to the ground potential), the collector terminal of the switch circuit 508 becomes high impedance. That is, the transistor turns off, and the resistance value between the collector terminal and the emitter terminal increases. In this case, a reset signal 505 is output from the VOUT terminal according to the state of the monitored power 402. When the manual reset signal 509 is high (a voltage value close to the power supply potential), the transistor turns on. Because the resistance value between the collector terminal and the emitter terminal becomes very small, the collector terminal of the switch circuit 508 is forcibly set to low level (ground potential) regardless of the monitored power 402. This is because the low-level reset signal 505 is output from the VOUT terminal to indicate that the voltage value of the power 402 is below a specified value. This resets the operation of the image processing unit 207. That is, the semiconductor device 501 resets the image processing unit 207 in response to receiving the reset signal.

[0047] As described above, in this embodiment, a manual reset signal 509 is input via the switch circuit 508 to a monitor terminal (VSEN terminal) for monitoring the voltage of a connected node. The VSEN terminal also functions as a reset terminal for receiving the manual reset signal 509. Therefore, it is possible to reset the semiconductor device with a simple circuit configuration. As shown by the input / output relationship described above, the switch circuit 508 is an inverting amplifier circuit configured with transistors.

[0048] (Another example of a semiconductor device for a power supply monitoring device that does not have a manual reset function) 6 is an explanatory diagram of another example of a semiconductor device for a power supply monitoring device that does not have a manual reset function. In FIG. 6, the manual reset function is realized by adding a switch circuit 508 to the configuration of FIG. 5(a). The switch circuit 508 is provided in a different position from that in FIG. 5(b). The switch circuit 508 has a collector terminal connected to the VOUT terminal, a base terminal connected to the CPU 203, and an emitter terminal grounded. The base terminal and emitter terminal are connected via a resistor.

[0049] The CPU 203 inputs a manual reset signal 509 to a switch circuit 508. The switch circuit 508 controls a reset signal 505 output from a VOUT terminal according to the value of the manual reset signal 509. For example, when the manual reset signal 509 is at a high level, the switch circuit 508 forcibly sets the reset signal 505 to a low level. When the manual reset signal 509 is at a low level, the reset signal 505 maintains a state according to the state of the power 402 to be monitored that is output from the VOUT terminal. In this way, in this embodiment, the manual reset signal 509 is input via the switch circuit 508 to a monitor terminal (VSEN terminal) for monitoring the voltage of the connected node. Therefore, it is possible to reset the semiconductor device with a simple circuit configuration.

[0050] 5(b) and 6, even if the semiconductor device 501 does not have a manual reset function, it is possible to add the manual reset function by adding peripheral components. Therefore, even if there is a problem in procuring the semiconductor device 401 for the power supply monitoring device that has the manual reset function, the semiconductor device 501 can be used as a substitute component to achieve the configuration shown in FIG. 5(b) or 6, thereby allowing the manufacture of circuit boards to continue.

[0051] (Installed state) FIG. 7 is an exemplary diagram of a circuit board on which semiconductor devices for multiple types of power supply monitoring devices can be mounted. Here, a circuit board on which a semiconductor device 401 with a manual reset function and a semiconductor device 501 without a manual reset function can be selectively mounted is described. In FIG. 7, the layout of the semiconductor device 401 and the semiconductor device 501 is shown rotated 180 degrees relative to each other. By mounting the semiconductor device 401 and the semiconductor device 501 rotated 180 degrees relative to each other, the terminals of the semiconductor device 401 and the semiconductor device 501 assigned with the same functions are arranged in the same manner. The configuration of FIG. 5(b) is used for the peripheral components of the semiconductor device 501. In FIG. 7, the pin arrangement without parentheses indicates the semiconductor device 501, and the pin arrangement with parentheses indicates the semiconductor device 401.

[0052] When the semiconductor device 501 is mounted, the VOUT terminal and VSS terminal are used in common with the semiconductor device 401. A reset signal 505 is output from the VOUT terminal. The VSS terminal is grounded. The VIN terminal of the semiconductor device 501 is connected to a short resistor 701 for supplying power 405. When the semiconductor device 501 is mounted, the short resistor 702 for supplying power 402 is not mounted.

[0053] 5(b), resistors 503 and 504 for monitoring the state of the power 402 to be monitored and a switch circuit 508 for adding a manual reset function are connected to the VSEN terminal of the semiconductor device 501. When the semiconductor device 501 is mounted, the short resistor 703 is not mounted. A capacitor C2 is connected to the CD terminal of the semiconductor device 501 as needed, and nothing is connected if not needed.

[0054] When the semiconductor device 401 is mounted, a short resistor 702 for supplying power 402 to be monitored is connected to the VDD terminal. When the semiconductor device 401 is mounted, the short resistor 701 is not mounted. A short resistor 703 is connected to the MR terminal of the semiconductor device 401, and a manual reset signal 509 is input via the short resistor 703. When the semiconductor device 401 is mounted, the switch circuit 508, resistor 503, and resistor 504 are also not mounted. The VSS terminal of the semiconductor device 401 is grounded via a short resistor R7.

[0055] 8 is a diagram illustrating a wiring pattern of a circuit board shared by the semiconductor device 401 and the semiconductor device 501. FIG. 8 shows the wiring pattern of the circuit configuration of FIG.

[0056] The semiconductor device 401 and the semiconductor device 501 are exclusively mounted in the same mounting area 801. The VOUT terminals of the semiconductor device 401 and the semiconductor device 501 are connected to a reset signal pattern 802 that outputs a reset signal. The VSS terminal of the semiconductor device 501 is connected to a ground pattern 803.

[0057] The VIN terminal of the semiconductor device 501 and the VDD terminal of the semiconductor device 401 are connected to a power supply pattern 804, and power is supplied from the power supply pattern 804. Power 402 is supplied from a power supply pattern 805 to the power supply pattern 804 via a short resistor 702. Power 405 is supplied from a power supply pattern 806 to the power supply pattern 804 via a short resistor 701. One of the short resistors 701 and 702 is mounted, and the other is not mounted, depending on the semiconductor device to be mounted. That is, when the semiconductor device 401 is mounted, the short resistor 702 is mounted, and when the semiconductor device 501 is mounted, the short resistor 701 is mounted.

[0058] The VSEN terminal of the semiconductor device 501 is connected to the connection point between the resistor 503 and the resistor 504. The resistor 503 is connected to a power supply pattern 807 to which the power 402 is supplied, and the resistor 504 is connected to a ground pattern 809 to be grounded, so that the power 402 is divided by the resistors 503 and 504 and input to the VSEN terminal.

[0059] The manual reset signal 509 is input from a signal pattern 808. The manual reset signal 509 is input to the semiconductor device 401 or the semiconductor device 501 via a short resistor 703 or a switch circuit 508. When the semiconductor device 401 is mounted, the short resistor 703 is mounted, and the switch circuit 508 is not mounted. When the semiconductor device 501 is mounted, the switch circuit 508 is mounted, and the short resistor 703 is not mounted.

[0060] When the semiconductor device 501 is mounted in this manner, the capacitor C1, resistors 503, 504, 701, and switch circuit 508 are mounted on the circuit board, but the short resistors 702 and 703 are not mounted. When the semiconductor device 401 is mounted on the circuit board, the capacitors C1, 702, 703, and R7 are mounted on the circuit board, but the resistors 503, 504, 701, and switch circuit 508 are not mounted.

[0061] Even when the semiconductor device 501 does not have the manual reset function in this way, the manual reset function can be realized by adding peripheral components. In this embodiment, when the semiconductor device 501 is implemented, a component for inputting a reset signal 505 for forcibly resetting the image processing unit 207 is provided as a peripheral component. When the semiconductor device 401 having the manual reset function is implemented, the peripheral component for realizing the manual reset function is not implemented.

[0062] That is, when a semiconductor device 501 that does not have a predetermined function is mounted as a substitute for a semiconductor device 401 that has that function, peripheral components for realizing that function are mounted on the circuit board. The wiring pattern provided on the circuit board is provided so as to be compatible with any semiconductor device that is mounted. By switching the mounted components, such a circuit board can save space and continue stable production regardless of the component procurement situation.

Claims

1. a semiconductor device having a monitor terminal for monitoring a voltage of a connected node; an image forming unit that forms an image on a recording medium based on image data; a control unit that controls the semiconductor device and the image forming unit, the control unit transmits a reset signal to reset the semiconductor device. An image forming apparatus characterized by:

2. further comprising a switch circuit that controls a voltage of the node based on the reset signal; 2. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.

3. the switch circuit includes an inverting amplifier circuit configured with a transistor; 3. The image forming apparatus according to claim 2, wherein the image forming apparatus is a recording medium.

4. The semiconductor device further includes a reset terminal that receives the reset signal.

2. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.

5. further comprising an image processing unit that performs signal processing on the image data; the semiconductor device monitors the power supply supplied to the image processing unit, and resets the image processing unit in response to an abnormality in the power supply; the control unit transmits the reset signal to the semiconductor device when an abnormality occurs in the image processing unit; the semiconductor device resets the image processing unit in response to receiving the reset signal; 2. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.

Images