Power supply control device and LED illumination system
The power supply control device for LED lighting systems enters low-power modes using a CPU, feedback control, and clock frequency management to reduce unnecessary power consumption.
Patent Information
- Application Number
- JP2024138965
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-08-20
- Publication Date
- 2026-03-05
AI Technical Summary
Existing power supply control systems for LED lighting fixtures consume power even when the lights are off due to constant CPU operation, and the method in Patent Document 1 requires complex load state determination.
A power supply control device that uses a CPU, feedback control unit, timer, and clock frequency control unit to manage power supply based on PWM or pulse control signals, allowing the CPU to enter low-power modes based on duty ratio calculations or terminal state determinations.
Achieves energy savings by allowing the CPU to enter low-power modes with a simple configuration, reducing unnecessary power consumption.
Smart Images

Figure 2026036396000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a power supply control device and an LED lighting system. [Background technology]
[0002] A known method is to use the duty ratio of a PWM (Pulse Width Modulation) signal as a dimming input signal when dimming an LED lighting fixture. Because the CPU calculates this duty ratio, it must operate constantly, even when the lights are off and not in operation. This results in power consumption even when the lights are off. Patent Document 1 (JP-A-2005-102626) discloses a method to solve this problem, in which a signal is fed back from the load, and depending on the load state, the clock on the control side is stopped, halting CPU operation and achieving energy savings. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-017022 Summary of the Invention [Problem to be solved by the invention]
[0004] However, the technology described in Patent Document 1 requires a signal from the load, and there is a problem in that the processing is complicated, such as determining the load state.
[0005] The present disclosure has been made to solve the above problems, and aims to provide a power supply control device that controls the power supply of a power consumption device by transmitting a power supply control signal based on a command input signal consisting of a PWM control signal or a pulse control signal, which can achieve energy savings with a simple configuration. [Means for solving the problem]
[0006] The present disclosure has been made to achieve the above-mentioned object, and provides a power supply control device that controls the power supply of a power consumption device by transmitting a power supply control signal based on a command input signal consisting of a PWM control signal or a pulse control signal, the power supply control device comprising: a CPU that outputs a control value based on the command input signal; a feedback control unit that performs feedback control based on the control value from the CPU and a feedback value from the power consumption device and transmits a power supply control signal; a timer that constantly measures the command input signal, calculates the duty ratio of the command input signal, and determines the operating conditions; and a clock frequency control unit that controls the clock frequency of the CPU based on the determination result of the timer.
[0007] Such a power supply control device can achieve energy conservation with a simple configuration.
[0008] In this case, the clock frequency control unit can be a power supply control device that, when the timer determines that the duty ratio is a value that satisfies the operating conditions of the power consumption device, supplies a signal to the CPU to set the clock frequency of the CPU to the clock frequency when the power consumption device is operating.
[0009] This makes it possible to start the CPU in low power mode with a simple configuration.
[0010] In this case, the clock frequency control unit can be a power supply control device that, when the timer determines that the duty ratio is a value that does not satisfy the operating conditions of the power consumption device, supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating.
[0011] This makes it possible to put an active CPU into a low-power mode with a simple configuration.
[0012] In this case, if the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that satisfies the driving conditions of the power consumption device, the clock frequency control unit can be a power supply control device that supplies a signal to the CPU that sets the clock frequency of the CPU to the clock frequency when the power consumption device is driven.
[0013] This makes it possible to start the CPU in low power mode with a simple configuration even in response to a specific command input signal.
[0014] In this case, if the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that does not satisfy the operating conditions of the power consumption device, the clock frequency control unit can be a power supply control device that supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating.
[0015] This makes it possible to put an active CPU into a low power mode with a simple configuration even in response to a specific command input signal.
[0016] In this case, the power consumption device may be an LED lighting device, and the power control device may be an LED dimmer.
[0017] This results in a power supply control device that controls the power supply of LED lighting devices and can achieve energy savings with a simple configuration.
[0018] In this case, the LED lighting system may include the power supply control device and the power consumption device that is the LED lighting device.
[0019] This results in an LED lighting system that can achieve energy savings with a simple configuration. [Effects of the Invention]
[0020] As described above, the power supply control device of the present disclosure can achieve energy conservation with a simple configuration. [Brief explanation of the drawings]
[0021] [Figure 1] 1 is a diagram showing an example of the configuration of a power supply control device and a power consumption device according to the present disclosure, illustrating an LED lighting system including a power supply control device that is an LED dimmer device and a power consumption device that is an LED lighting device. [Figure 2] 10 is a diagram illustrating an operation flow in an input capture mode of a timer according to the present disclosure. [Figure 3] 10 is a diagram illustrating a command input signal and calculation of a duty ratio based thereon. DETAILED DESCRIPTION OF THE INVENTION
[0022] The present disclosure will be described in detail below, but the present disclosure is not limited thereto.
[0023] As described above, there has been a demand for a power supply control device that can achieve energy savings with a simple configuration.
[0024] As a result of extensive research into the above-mentioned problems, the inventors have discovered that a power supply control device that controls the power supply of a power consumption device by transmitting a power supply control signal based on a command input signal consisting of a PWM control signal or a pulse control signal, and that the power supply control device comprises a CPU that outputs a control value based on the command input signal, a feedback control unit that performs feedback control based on the control value from the CPU and a feedback value from the power consumption device and transmits a power supply control signal, a timer that constantly measures the command input signal, calculates the duty ratio of the command input signal, and determines the operating conditions, and a clock frequency control unit that controls the clock frequency of the CPU based on the determination result of the timer, thereby achieving energy savings with a simple configuration and completing the present disclosure.
[0025] The following description will be made with reference to the drawings. Fig. 1 shows an example of the configuration of a power supply control device and a power consumption device according to the present disclosure, and shows an LED lighting system 100 including a power supply control device 10 that is an LED dimming device and a power consumption device 20 that is an LED lighting device. In the following description, based on Fig. 1, dimming using a command input signal composed of a PWM signal will be described using a lighting device that includes an LED load as the load 6 as an example of a power consumption device, but the power consumption device of the present disclosure is not limited to a lighting device.
[0026] The PWM signal controls the brightness of the LED by changing the pulse width. If the on time of the PWM signal is the pulse width, the LED will be dimmer if the pulse width is narrow (the on time is short), and conversely, the LED will be brighter if the pulse width is wide (the on time is long). Note that in the present disclosure, the command input signal may be composed of a pulse control signal.
[0027] [Power supply control device] First, a power supply control device according to the present disclosure will be described. As shown in Fig. 1, a power supply control device 10 according to the present disclosure includes a CPU 1 that outputs a control value S2 based on a command input signal S1, a feedback control unit 2 that performs feedback control based on the control value S2 from the CPU 1 and a feedback value S3 from a power consumption device 20 and transmits a power supply control signal S4, a timer 3 that constantly measures the command input signal S1, calculates the duty ratio of the command input signal S1, and determines the operating conditions, and a clock frequency control unit 4 that controls the clock frequency of the CPU based on the determination result of the timer 3. By including a simple configuration including the timer 3 that constantly measures the command input signal S1 and the clock frequency control unit 4, such power supply control device 10 does not need to operate the CPU 1 constantly, thereby achieving energy savings.
[0028] The duty ratio is determined by the specifications of the power consumption device 20. The duty ratio of the PWM signal may be either an on (H) period / cycle or an off (L) period / cycle. The relationship between whether or not the CPU is activated and the range of the duty ratio can be set in a register.
[0029] The CPU 1 outputs a control value S2 to the feedback control unit 2 based on a command input signal S1 consisting of a PWM control signal or a pulse control signal. In addition to calculating the control value S2 to be sent to the feedback control unit 2, the CPU 1 also performs status control to switch the operation mode, status monitoring to check for abnormalities, and communication with the outside. For this reason, it consumes a large amount of power as a component of a power supply control device.
[0030] The feedback control unit 2 performs feedback control based on a control value S2 from the CPU 1 and a feedback value S3 from the power consumption device 20, and transmits a power supply control signal S4 to the power consumption device 20. Although not particularly limited, the feedback control unit 2 may include an A / D converter (ADC) that converts the detected current value into digital form, a controller that performs PI control or PID control, a PWM waveform forming unit that compares the output from the controller with a triangular wave, performs PWM modulation, and performs digital PWM modulation to send a switching signal to the FET driver, etc.
[0031] 1, the timer 3 is equipped with a duty ratio calculation / determination unit that constantly measures the command input signal S1, calculates the duty ratio of the command input signal S1, and determines the drive conditions. In other words, the timer 3 has the function of continuing to measure the command input signal S1 and calculate the duty ratio of the command input signal S1 even when the operating speed of the CPU 1 is reduced (including stopped).
[0032] There are no limitations on specific examples of the timer's configuration, but it can be configured as follows: The input is a signal between 0 and DVCC (3.3V), and like a general-purpose timer, it may be equipped with a compare match mode and an input capture mode. A register is used to select which mode to operate in. In input capture mode, the duty ratio is calculated, and the CPU is started by a signal from the clock frequency control unit depending on the result. In compare match mode, the CPU is started at regular intervals, and the dimming signal (duty ratio) is calculated by the CPU.
[0033] The clock frequency control unit 4 controls the clock frequency of the CPU 1 based on the determination result of the timer 3. By providing such a timer 3 and clock frequency control unit 4, the operating state of the CPU 1 can be controlled.
[0034] When the timer 3 determines that the duty ratio of the command input signal is a value that satisfies the drive conditions of the power consumption device 20, the clock frequency control unit 4 can supply to the CPU 1 a signal that sets the clock frequency of the CPU 1 to the clock frequency at which the power consumption device 20 is driven. This ends the low power mode, that is, ends the state in which the clock frequency (including halt) is lower than the clock frequency at which the power consumption device 20 is driven, and puts the CPU 1 into an operating state. Such a power supply control device can start up a CPU in low power mode with a simple configuration.
[0035] Furthermore, when the timer 3 determines that the duty ratio of the command input signal does not satisfy the drive conditions of the power consumption device 20, the clock frequency control unit 4 can supply to the CPU 1 a signal to set the clock frequency of the CPU 1 to a clock frequency lower than the clock frequency at which the power consumption device 20 is driven. This initiates a low power mode, i.e., a low power state in which the clock frequency is lower (including stopped) than the clock frequency at which the power consumption device 20 is driven. Such a power supply control device can put the CPU into the low power mode with a simple configuration.
[0036] It is preferable that the timer 3 measures the terminal state of the command input signal S1 when it is unable to calculate the duty ratio of the command input signal S1. Then, when it is determined that the terminal state satisfies the drive conditions of the power consuming device 20, the clock frequency control unit 4 can supply to the CPU 1 a signal that sets the clock frequency of the CPU 1 as the clock frequency when the power consuming device 20 is driven. This type of power supply control device can start the CPU in low power mode with a simple configuration even for a command input signal for which the duty ratio cannot be calculated.
[0037] Furthermore, when it is determined that the terminal state does not satisfy the drive conditions of the power consuming device 20, the clock frequency control unit 4 can supply to the CPU 1 a signal that sets the clock frequency of the CPU 1 to a clock frequency lower than the clock frequency at which the power consuming device 20 is driven. Such a power supply control device can put the CPU into low power mode with a simple configuration even for a command input signal for which the duty ratio cannot be calculated.
[0038] Although not particularly limited, the timer 3 of the power supply control device 10 according to the present disclosure can make the following determination in the input capture mode, for example.
[0039] The operation flow of the timer 3 in input capture mode will be explained using Figures 2 and 3. Figure 2 shows the flow from when the CPU 1 is in a state where the clock frequency is lower than the clock frequency when the power consumption device is running (including a stopped state, hereinafter referred to as "low power mode") to when the CPU is started up. Figure 3 explains the command input signal and the calculation of the duty ratio based on it.
[0040] This section explains the case where the input pulse period and the L or H period can be measured. While the duty ratio can be defined as the L or H period divided by the period, in the following example, the duty ratio is assumed to be the L period divided by the period. When low-power mode is initiated, timer 3 measures the pulse width (Period_B in Figure 3). For example, if pulse width B1 is correctly acquired for (Pulse 1) in Figure 3, the timer measures the period (A1 in Period_A in Figure 3). If period A1 is also correctly acquired, the timer calculates the duty ratio (B / A = B1 / A1 in Figure 3) and determines whether it satisfies the CPU operating conditions. If it is determined that the duty ratio satisfies the CPU operating conditions, the clock frequency control unit supplies the CPU with a clock frequency signal that activates the CPU, activating it (ending low-power mode).
[0041] Timer 3 constantly measures the command input signal and repeats the above flow for (Pulse 2), (Pulse 3), (Pulse 4), (Pulse 5) in Figure 3. If it determines that the duty ratio does not meet the CPU's operating conditions, it returns to measuring the pulse width and repeats the above operation until low power mode ends.
[0042] In this way, when CPU1 is in low power mode, if the calculation result is within the set range of the CPU activation conditions, clock frequency control unit 4 supplies a signal to CPU1 to activate CPU1. If the calculation result is outside the set range of the CPU activation conditions, nothing is done and duty ratio measurement continues. On the other hand, when CPU1 is in activation mode, if the calculation result is outside the set range of the CPU activation conditions, clock frequency control unit 4 supplies a signal to CPU1 to put CPU1 into low power mode. If the calculation result is within the set range of the CPU activation conditions, nothing is done and duty ratio measurement continues.
[0043] On the other hand, when measuring the pulse width (L, H) and / or period using Timer 3, the pulse width or period may not be measured (overflow) depending on the command input signal. A specific example of this is when a fixed H or L signal is input. An example of such a case is shown in (Pulse 3) in Figure 3. (Pulse 3) in Figure 3 illustrates a situation where the pulse width (B3) can be measured correctly when the command input signal switches from L to H, but the period (A3) overflows. Timer 3 measures the H level of the command input signal after measuring the pulse width (B3), but a fixed H signal is input, and the command input signal remains in the H state without switching to L (fixed H signal). In such cases, a preset overflow threshold (OVF_TH) is used as shown in Figure 3, and an "overflow" is determined when the measurement value (counter) reaches OVF_TH in the "Acquire Period_A (period)" step. 2, timer 3 measures the terminal state of the command input signal and determines whether the terminal state is a value that satisfies the drive conditions of power consumption device 20. If it determines that the terminal state is a value (H) that satisfies the drive conditions of the power consumption device, it ends the low power mode and starts up the CPU, but if it determines that the terminal state is a value (L) that does not satisfy the drive conditions of the power consumption device, it returns to measuring the pulse width and repeats the above operation until the low power mode ends.
[0044] The above has been explained using an example in which an "overflow" is determined in the "Acquire Period_A (period)" step in Figure 3, but even when an "overflow" is determined in the "Acquire Period_B (period)" step, Timer 3 can similarly acquire the terminal state and make a determination based on it. Note that whether or not the CPU is started when a fixed H or L signal is input can be registered in a register.
[0045] [Power consumption equipment] Although not particularly limited, the power consumption device 20 according to the present disclosure may be an LED lighting device. In this case, the power supply control device 10 according to the present disclosure may be an LED dimmer. In particular, the power consumption device 20 and the power supply control device 10 according to the present disclosure may be applied to such an LED dimmer. The power supply control device 10 according to the present disclosure is a power supply control device that controls the power supply of an LED lighting device and can achieve energy savings with a simple configuration.
[0046] The present disclosure can also provide an LED lighting system 100 that includes a power supply control device 10 that is an LED dimmer and a power consumption device 20 that is an LED lighting device. The LED lighting system 100 according to the present disclosure can achieve energy conservation with a simple configuration.
[0047] The present specification includes the following aspects. [1]: A power supply control device that controls the power supply of a power consumption device by transmitting a power supply control signal based on a command input signal composed of a PWM control signal or a pulse control signal, a CPU that outputs a control value based on the command input signal; a feedback control unit that performs feedback control based on a control value from the CPU and a feedback value from the power consumption device and transmits a power supply control signal; a timer that constantly measures the command input signal, calculates a duty ratio of the command input signal, and determines a driving condition; a clock frequency control unit that controls the clock frequency of the CPU based on the determination result of the timer. [2]: The power supply control device of [1] above, wherein the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to the clock frequency when the power consumption device is operating when the timer determines that the duty ratio is a value that satisfies the operating conditions of the power consumption device. [3]: The power supply control device of [1] or [2] above, wherein the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating, when the timer determines that the duty ratio is a value that does not satisfy the operating conditions of the power consumption device. [4]: A power supply control device according to [1], [2] or [3] above, wherein when the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that satisfies the driving conditions of the power consumption device, the clock frequency control unit supplies a signal to the CPU that sets the clock frequency of the CPU to the clock frequency when driving the power consumption device. [5]: A power supply control device according to [1], [2], [3] or [4], wherein when the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that does not satisfy the operating conditions of the power consumption device, the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating. [6]: The power supply control device according to [1], [2], [3], [4] or [5], wherein the power consumption device is an LED lighting device and the power supply control device is an LED dimming device. [7]: An LED lighting system comprising the power supply control device according to [6] above and the power consumption device being the LED lighting device.
[0048] The present disclosure is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration that is substantially identical to the technical idea described in the claims of the present disclosure and that provides similar effects is included within the technical scope of the present disclosure. [Explanation of symbols]
[0049] 1...CPU, 2...Feedback control section, 3...Timer, 4... Clock frequency control unit, 6... Load, 10... Power supply control device (LED dimmer), 20...Power consumption device (LED lighting device), 100...LED lighting system. S1...command input signal, S2...control value, S3...feedback value, S4...Power control signal.
Claims
1. A power supply control device that controls the power supply of a power consumption device by transmitting a power supply control signal based on a command input signal configured as a PWM control signal or a pulse control signal, a CPU that outputs a control value based on the command input signal; a feedback control unit that performs feedback control based on a control value from the CPU and a feedback value from the power consumption device and transmits a power supply control signal; a timer that constantly measures the command input signal, calculates a duty ratio of the command input signal, and determines a driving condition; a clock frequency control unit that controls a clock frequency of the CPU based on the determination result of the timer; A power supply control device comprising:
2. 2. The power supply control device according to claim 1, wherein the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to the clock frequency when the power consumption device is operating when the timer determines that the duty ratio is a value that satisfies the operating conditions of the power consumption device.
3. 2. The power supply control device according to claim 1, wherein the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating, when the timer determines that the duty ratio is a value that does not satisfy the operating conditions of the power consumption device.
4. 2. The power supply control device according to claim 1, wherein when the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that satisfies the driving conditions of the power consumption device, the clock frequency control unit supplies a signal to the CPU that sets the clock frequency of the CPU to the clock frequency when driving the power consumption device.
5. 2. The power supply control device according to claim 1, wherein when the timer is unable to calculate the duty ratio of the command input signal, it measures the terminal state of the command input signal, and when it determines that the terminal state is a value that does not satisfy the operating conditions of the power consumption device, the clock frequency control unit supplies a signal to the CPU to set the clock frequency of the CPU to a clock frequency lower than the clock frequency when the power consumption device is operating.
6. 6. The power supply control device according to claim 1, wherein the power consumption device is an LED lighting device, and the power supply control device is an LED dimmer.
7. 7. An LED lighting system comprising: the power supply control device according to claim 6; and the power consumption device being the LED lighting device.
Citation Information
Patent Citations
Power supply controller
JP2010017022A