Semiconductor device manufacturing method

Abstract

A method for manufacturing a semiconductor device that can inspect the forward voltage of a diode while suppressing the complexity of the manufacturing process is provided. [Solution] A test object having a semiconductor element including a diode formed thereon is prepared, and a forward voltage test of the diode is performed. The forward voltage test includes passing a first test current If1 and a second test current If2, which are smaller than a known rated current If, through the test object to measure a first test forward voltage Vf1 and a second test forward voltage Vf2, deriving a test forward voltage Vf3 when the rated current If is passed based on the first test current If1, the second test current If2, the first test forward voltage Ifa, the second test forward voltage Ifb, and the rated current If, and comparing the derived test forward voltage Vf3 with a threshold range.

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device having a diode. [Background technology]

[0002] BACKGROUND ART Conventionally, there have been proposed manufacturing methods for manufacturing semiconductor devices while inspecting their characteristics. For example, Patent Document 1 proposes an inspection device that inspects the characteristics of a semiconductor device using a plurality of terminals. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-55550 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present inventors have been studying a semiconductor device manufacturing method that includes a forward voltage test for testing the forward voltage Vf of a diode. In recent years, there has been a demand for larger rated currents. Therefore, when performing a forward voltage test, it is conceivable to prepare a test device that can withstand larger currents and pass the rated current through each diode to determine whether the characteristics are met. However, passing a large current through each diode to perform a forward voltage test tends to complicate the manufacturing process.

[0005] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can inspect the forward voltage of a diode while suppressing the complexity of the manufacturing process. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, a method for manufacturing a semiconductor device includes: preparing an object to be inspected in which a semiconductor element including a diode is formed; and performing a forward voltage inspection of the diode, wherein the forward voltage inspection includes passing a first inspection current (If1) and a second inspection current (If2) that are smaller than a known rated current (If) through the object to be inspected to measure a first inspection forward voltage (Vf1) and a second inspection forward voltage (Vf2); deriving an inspection forward voltage (Vf3) when the rated current is passed based on the first inspection current, the second inspection current, the first inspection forward voltage, the second inspection forward voltage, and the rated current; and comparing the derived inspection forward voltage with a threshold range. The threshold range is determined by preparing a plurality of threshold devices corresponding to the test object, passing a first threshold current (Ifa) having the same value as the first test current and a second threshold current (Ifb) having the same value as the second test current through the plurality of threshold devices to measure the first threshold forward voltage (Vfa) and the second threshold forward voltage (Vfb), deriving the threshold forward voltage (Vfc) when the rated current is passed based on the first threshold current, the second threshold current, the first threshold forward voltage, the second threshold forward voltage, and the rated current, passing the rated current and measuring the forward voltage (Vf), and setting the threshold range from the relationship between the derived threshold forward voltage and the measured actual forward voltage.

[0007] According to this, when performing a forward voltage test on a diode, a first test current and a second test current that are smaller than the rated current are passed through to measure the first test forward voltage and the second test forward voltage. The forward voltage test on the diode is then performed by using the first test current, the second test current, the first test forward voltage, the second test forward voltage, and the rated current to derive the test forward voltage when the rated current is passed through, and comparing the test forward voltage with a threshold range. This eliminates the need to pass the rated current through each test object (i.e., diode), simplifying the manufacturing process.

[0008] The threshold range is set as follows: A first threshold current having the same value as the first inspection current and a second threshold current having the same value as the second inspection current are passed, and the first threshold forward voltage and the second threshold forward voltage are measured. Then, the first threshold current, the second threshold current, the first threshold forward voltage, the second threshold forward voltage, and the rated current are used to derive the threshold forward voltage when the rated current is passed. The actual forward voltage when the rated current is passed is also measured. The threshold range is then set using the measured actual forward voltage and the derived threshold forward voltage. This makes it possible to set a threshold range that has a high correlation between the measured actual forward voltage and the derived threshold forward voltage, thereby preventing a decrease in determination accuracy.

[0009] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view of a semiconductor device manufactured by a method for manufacturing a semiconductor device according to a first embodiment. [Figure 2] FIG. 10 is a diagram showing the relationship between voltage and current when creating an auxiliary map. [Figure 3] FIG. 10 is a diagram showing the relationship between the actual forward voltage at a rated current and the derived forward voltage. [Figure 4] FIG. 10 is a diagram showing the relationship between voltage and current in a comparative example. [Figure 5] FIG. 10 is a diagram showing the relationship between the actual forward voltage at a rated current and the derived forward voltage. [Figure 6] FIG. 10 is a diagram showing the relationship between voltage and current when an inspection process is performed. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following embodiments, identical or equivalent parts will be denoted by the same reference numerals.

[0012] (First embodiment) A first embodiment will be described with reference to the drawings. First, the configuration of a semiconductor device obtained by the semiconductor device manufacturing method of this embodiment will be described. In this embodiment, a semiconductor device having a MOSFET (short for Metal Oxide Semiconductor Field Effect Transistor) formed as a semiconductor element and a parasitic diode as a diode will be described as an example. Although not specifically shown, the semiconductor device has a cell region and an outer peripheral region formed to surround the cell region. The MOSFET shown in FIG. 1 is formed in the cell region of the semiconductor device.

[0013] The semiconductor device is configured using a semiconductor substrate 10 having one surface 10a and another surface 10b. In this embodiment, the semiconductor substrate 10 is configured, for example, as a silicon carbide (hereinafter simply referred to as SiC) substrate, but may also be configured as a silicon substrate or the like.

[0014] The semiconductor substrate 10 is made of SiC. + The present embodiment is configured using a substrate 11 of a silicon carbide (SiC) type. An epitaxial layer 20 made of SiC is disposed on the surface of the substrate 11. The epitaxial layer 20 of this embodiment is an n-type - Buffer layer 21, n - The n-type drift layer 22 and the p-type base layer 23 are arranged in this order.

[0015] The surface layer of the base layer 23 is made of n +An n-type source region 24 is formed in the base layer 23. The source region 24 is formed by ion implantation into the surface layer of the base layer 23, or by forming a groove in the base layer 23 and disposing an n-type epitaxial layer in the groove. In this embodiment, one surface 10a of the semiconductor substrate 10 is formed by the surface on the source region 24 side, and the other surface 10b of the semiconductor substrate 10 is formed by the surface on the substrate 11 side.

[0016] The substrate 11 has, for example, a resistivity of 20 mΩ·cm, a (0001) Si surface, and an off-angle of 0.5 to 5° relative to the (0001) Si surface. The substrate 11 has, for example, an n-type impurity concentration of 5.0×10 18 ~1.0×10 20 cm -3 In this embodiment, the substrate 11 forms a drain layer in the MOSFET.

[0017] The buffer layer 21 has an n-type impurity concentration of, for example, 1.0×10 18 ~10 19 cm -3 The drift layer 22 has an n-type impurity concentration of, for example, 1.0×10 15 ~5.0×10 16 cm -3 It is said that...

[0018] The base layer 23 is a portion where a channel region is formed, and has a p-type impurity concentration of, for example, 3.0×10 17 cm -3 The source region 24 has a higher impurity concentration than the drift layer 22, and the n-type impurity concentration in the surface layer is, for example, 2.5×10 18 ~1.0×10 19 cm -3 The thickness is about 0.5 to 2 μm. The impurity concentrations and film thicknesses of the buffer layer 21, drift layer 22, base layer 23, and source region 24 are arbitrary and are not limited to those described above.

[0019] A trench 30 is formed in the semiconductor substrate 10 so as to penetrate the base layer 23 and the source region 24 and reach the drift layer 22. The base layer 23 and the source region 24 are arranged so as to contact the side surfaces of the trench 30. Although only one trench 30 is shown in FIG. 1, in reality, a plurality of trenches 30 are formed in the shape of stripes that are equally spaced from one another in the left-to-right direction of the page.

[0020] A gate insulating film 31 is formed on the inner wall surface of the trench 30. A gate electrode 32 made of doped poly-Si is formed on the surface of the gate insulating film 31. The trench 30 is completely filled with the gate insulating film 31 and the gate electrode 32. In this embodiment, a trench gate structure is configured in this manner.

[0021] An upper electrode 41 is disposed on one surface 10a of the semiconductor substrate 10 as a source electrode, insulated from the gate electrode 32 and connected to the base layer 23 and the source region 24. In this embodiment, the upper electrode 41 is made of a plurality of metals, such as Ni / Al. The portion of the plurality of metals that contacts the portion that constitutes the n-type SiC (i.e., the source region 24) is made of a metal that can make ohmic contact with the n-type SiC. The portion of the plurality of metals that contacts at least the p-type SiC (i.e., the base layer 23) is made of a metal that can make ohmic contact with the p-type SiC.

[0022] A lower electrode 42 is formed on the back surface of the substrate 11 (i.e., the other surface 10b of the semiconductor substrate 10) as a drain electrode electrically connected to the substrate 11. In this embodiment, this structure constitutes an n-channel inversion type trench gate MOSFET. A cell region is constituted by arranging a plurality of such MOSFETs.

[0023] The above is the basic configuration of the semiconductor device in this embodiment. In this embodiment, n-type can also be called the first conductivity type, and p-type can also be called the second conductivity type. In such a semiconductor device, a pn junction is formed between the n-type drift layer 22 and the p-type base layer 23, forming a parasitic diode.

[0024] In the semiconductor device of this embodiment, when a predetermined gate voltage is applied to the gate electrode 32, an inversion layer is formed in the portion of the base layer 23 that contacts the trench 30, and a current flows between the upper electrode 41 and the lower electrode 42. That is, a current flows along the stacking direction of the substrate 11 and the epitaxial layer 20. In addition, in such a semiconductor device, when a voltage higher than that of the lower electrode 42 is applied to the upper electrode 41, the parasitic diode operates as a diode. In this case, if the forward voltage Vf of the parasitic diode at the rated current If is not within a required threshold range, this may cause malfunction of the semiconductor device or malfunction of an electronic component incorporating the semiconductor device.

[0025] Next, a method for manufacturing the semiconductor device described above will be described, which includes a forward voltage test for a parasitic diode.

[0026] First, a semiconductor device as shown in FIG. 1 is prepared as an inspection target by performing a general semiconductor manufacturing process. That is, a semiconductor device in which a semiconductor element including a parasitic diode as a diode is formed is prepared as an inspection target. The inspection target may be in a wafer state or in a chip state separated from the wafer. If the inspection target is in a wafer state, the parts constituting each semiconductor device before being separated are the inspection target.

[0027] Next, a forward voltage test is performed to determine whether the forward voltage Vf at the rated current If of the parasitic diode is within the threshold range. The rated current If here is the current that can flow through the parasitic diode, and is the maximum current required for the product. Therefore, the rated current If varies depending on the application and is a known value.

[0028] The forward voltage test in this embodiment is performed using a preset threshold range. The method for setting the threshold range in this embodiment will be described below. First, multiple samples having the same configuration as the test object are prepared as threshold test devices. In other words, multiple samples corresponding to the test object are prepared as threshold test devices. It is confirmed that the voltage and current waveforms of each sample vary depending on the quality of the test, as shown in FIG. 2. While FIG. 2 shows the waveforms of Sample 1 and Sample 2 as examples, multiple more samples are actually prepared. Furthermore, Vbi in FIG. 2 refers to the built-in potential.

[0029] Then, for each sample, a first threshold current Ifa and a second threshold current Ifb smaller than the rated current If are passed, and the first threshold forward voltage Vfa when the first threshold current Ifa is passed and the second threshold forward voltage Vfb when the second threshold current Ifb is passed are measured. Next, using the first threshold current Ifa, the second threshold current Ifb, the first threshold forward voltage Vfa, the second threshold forward voltage Vfb, and the rated current If, the threshold forward voltage Vfc when the rated current If is passed is derived (i.e., extrapolated). Note that the rated current If is a known value as described above. In this embodiment, the threshold forward voltage Vfc is derived using either Equation 1 or Equation 2 below.

[0030] (Equation 1) Vfc = {(Vfb - Vfa) / (Ifb - Ifa)} × (If - Ifb) + Vfb... (Equation 1)

[0031] (Equation 2) Vfc = {(Vfb - Vfa) / (Ifb - Ifa)} × (If - Ifa) + Vfa ... (Equation 2) Furthermore, the actual forward voltage Vf when the rated current If is applied to each sample is measured. Then, using the measured actual forward voltage Vf and the derived threshold forward voltage Vfc, an auxiliary map is created showing the correlation between the actual forward voltage Vf and the derived threshold forward voltage Vfc, as shown in Figure 3. For example, in the example of Figure 3, the correlation between the actual forward voltage Vf and the derived threshold forward voltage Vfc is expressed by the following equation 3, where x is the actual forward voltage Vf and y is the derived threshold forward voltage Vfc, and the coefficient of determination R 2 is 0.9671, which confirms that the relationship is highly reliable.

[0032] (Equation 3) y = 1.12168x - 0.2013... (Equation 3) Then, the threshold range is set based on this auxiliary map. For example, if it is desired to determine that the actual forward voltage Vf when the rated current If flows is normal when it is 4.7 to 4.9 V, the derived threshold forward voltage Vfc should be 5.5 to 5.76 V. Therefore, in this example, the threshold range is set to 5.5 to 5.75 V. The threshold range is changed as appropriate depending on the application.

[0033] Here, as a comparative example, the inventors measured the threshold forward voltage VF when one threshold current IF was flowing and the forward voltage Vf when a rated current If was flowing, as shown in FIG. 4 , and created an auxiliary map using the threshold forward voltage VF and forward voltage Vf to obtain the results shown in FIG. 5 . Note that FIG. 5 summarizes the results for multiple samples. As shown in FIG. 5 , it was confirmed that creating an auxiliary map using only the threshold forward voltage VF when one threshold current IF was flowing and the forward voltage Vf when the rated current If was flowing resulted in large variations. For example, in the example of FIG. 5 , the correlation between the threshold forward voltage VF when one threshold current IF was flowing and the actual forward voltage Vf when the rated current If was flowing is expressed by the following Equation 4, where x is the actual forward voltage Vf and y is the threshold forward voltage VF when one threshold current IF was flowing, and the coefficient of determination R 2 is 0.3553, which confirms that the relationship is unreliable.

[0034] (Equation 4) y = 0.3016x + 1.9035... (Equation 4) For this reason, with this method, it is not possible to set an appropriate threshold range, and even if a threshold range is set, the determination accuracy will be low. Therefore, in this embodiment, the threshold range is set based on the above-mentioned auxiliary map of FIG.

[0035] To perform a forward voltage test, as shown in FIG. 6, a first test current If1 and a second test current If2 are passed through the test object, and the first test forward voltage Vf1 when the first test current If1 is passed and the second test forward voltage Vf2 when the second test current If2 is passed are measured. Then, using the first test current If1, the second test current If2, the first test forward voltage Vf1, the second test forward voltage Vf2, and the rated current If, the test forward voltage Vf3 when the rated current If is passed is calculated, and it is determined whether the calculated test forward voltage Vf3 is within the threshold range. The rated current If is a known value, and the threshold range is calculated based on FIG. 3 above, the test forward voltage Vf3 is calculated based on Equation 5 or 6 below.

[0036] (Equation 5) Vf3 = {(Vf2 - Vf1) / (If2 - If1)} × (If3 - If2) + Vf2 ... (Equation 5)

[0037] (Equation 6) Vf3 = {(Vf2 - Vf1) / (If2 - If1)} × (If3 - If1) + Vf1 ... (Equation 6) This forward voltage test is performed by comparing the test forward voltage Vf3 with a preset threshold range, and does not measure the forward voltage Vf at the actual rated current If. In other words, the actual forward voltage Vf at the rated current If is measured only when creating the auxiliary map (i.e., when setting the threshold range). This simplifies the manufacturing process, including the forward voltage test.

[0038] The first inspection current If1 has the same value as the first threshold current Ifa. Similarly, the second inspection current If2 has the same value as the second threshold current Ifb. By setting the first inspection current If1 and the first threshold current Ifa to the same value and the second inspection current If2 and the second threshold current Ifb to the same value, the current when setting the threshold range and the current when performing the forward voltage inspection are the same, the accuracy of the forward voltage inspection can be improved. Furthermore, according to the inventors' studies, it has been confirmed that the influence of temperature tends to be significant at current values ​​greater than half the rated current If. For this reason, it is preferable that the first inspection current If1 and the second inspection current If2 be equal to or less than half the rated current If. In other words, it is preferable that the first threshold current Ifa and the second threshold current Ifb be equal to or less than half the rated current If when setting the threshold range.

[0039] According to the embodiment described above, when a forward voltage test is performed on a diode, a first test current If1 and a second test current If2 are passed through the diode, and the first test forward voltage Vf1 and the second test forward voltage Vf2 are measured. The forward voltage test is performed by using the first test current If1, the second test current If2, the first test forward voltage Vf1, the second test forward voltage Vf2, and the rated current If to derive the test forward voltage Vf3 when the rated current If is passed through the diode, and comparing the test forward voltage Vf3 with a threshold range. This eliminates the need to pass the rated current If through each test object (i.e., diode), simplifying the manufacturing process.

[0040] The threshold range is set as follows: A first threshold current Ifa, which has the same value as the first inspection current If1, and a second threshold current Ifb, which has the same value as the second inspection current If2, are passed through the test circuit, and the first threshold forward voltage Vfa and the second threshold forward voltage Vfb are measured. Then, the first threshold current Ifa, the second threshold current Ifb, the first threshold forward voltage Vfa, the second threshold forward voltage Vfb, and the rated current If are used to derive the threshold forward voltage Vfc when the rated current If is passed through the test circuit. The actual forward voltage Vf when the rated current If is passed through the test circuit is measured. The threshold range is set using the measured actual forward voltage Vf and the derived threshold forward voltage Vfc. This allows a threshold range to be set that has a high correlation between the actual forward voltage Vf and the derived threshold forward voltage Vfc, thereby preventing a decrease in determination accuracy. In particular, semiconductor devices made of SiC have a higher sensitivity to injected holes than semiconductor devices made of silicon, for example, so by accurately determining the forward voltage Vf, recovery surges and the like can be predicted with high accuracy.

[0041] (1) In this embodiment, by setting the first inspection current If1 and the second inspection current If2 to be equal to or less than half the rated current If, the first inspection forward voltage Vf1 and the second inspection forward voltage Vf2 can be measured with reduced influence of temperature, and a decrease in judgment accuracy can be suppressed.

[0042] (Other embodiments) Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

[0043] For example, in the first embodiment, a semiconductor device has been described in which a MOSFET having a first conductivity type of n-type and a second conductivity type of p-type is formed. However, the semiconductor device may be configured with the conductivity types of each component reversed. Furthermore, the semiconductor device may be a MOSFET having a planar gate structure instead of a MOSFET having a trench gate structure.

[0044] In the first embodiment, the semiconductor device is described as having a semiconductor element that forms a parasitic diode. However, the semiconductor device may have a diode having an anode layer and a cathode layer formed as the semiconductor element. [Explanation of symbols]

[0045] If Rated current If1 First inspection current If2 Second inspection current Ifa Current for first threshold Ifb Second threshold current Vf forward voltage Vf1 First inspection forward voltage Vf2 Second inspection forward voltage Vf3 Forward voltage for inspection Vfa First threshold forward voltage Vfb Second threshold forward voltage Vfc threshold forward voltage

Claims

1. A method for manufacturing a semiconductor device, comprising: preparing an object to be inspected in which a semiconductor element including a diode is formed; performing a forward voltage test on the diode; In performing the forward voltage test, a first test current (If1) and a second test current (If2) smaller than a known rated current (If) are passed through the test object to measure a first test forward voltage (Vf1) and a second test forward voltage (Vf2); a test forward voltage (Vf3) when the rated current is passed is derived based on the first test current, the second test current, the first test forward voltage, the second test forward voltage, and the rated current; and a comparison of the derived test forward voltage with a threshold range. A method for manufacturing a semiconductor device that includes the steps of: preparing a plurality of threshold devices corresponding to the test object; passing a first threshold current (Ifa) having the same value as the first test current and a second threshold current (Ifb) having the same value as the second test current through the plurality of threshold devices to measure a first threshold forward voltage (Vfa) and a second threshold forward voltage (Vfb); deriving a threshold forward voltage (Vfc) when the rated current is passed based on the first threshold current, the second threshold current, the first threshold forward voltage, the second threshold forward voltage, and the rated current; passing the rated current to measure a forward voltage (Vf); and setting the threshold range from the relationship between the derived threshold forward voltage and the measured actual forward voltage.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein, in the forward voltage test, currents equal to or less than half of the rated current are passed through the test object as the first test current and the second test current.

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