Semiconductor Devices

Abstract

A semiconductor layer including a region where a channel of a thin film transistor is formed, and a source electrode layer and to provide a thin film transistor having a low contact resistance of the drain electrode layer. Another object of the present invention is to provide a thin film transistor having low electrical resistance of wiring. Another object of the present invention is to reduce a step generated at an edge of a source electrode layer and a drain electrode layer. A thin-film transistor with a structure that allows carriers to move smoothly through a semiconductor layer that covers a portion of the transistor. One of our goals is to provide the following. When forming a thin film transistor, a first wiring layer is provided on a first electrode layer. A second wiring layer is provided on the second electrode layer, and the first electrode layer extends from an end of the first wiring layer. The electrode layer extends from the end of the second wiring layer and is connected to the side and top surfaces of the first electrode layer and the side and top surfaces of the second electrode layer. A semiconductor layer is provided on the top surface so as to be electrically connected.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device, a display device using the semiconductor device, and a manufacturing method thereof. . [Background technology]

[0002] There are many types of metal oxides and they are used for various purposes. Indium oxide is well known as It is a material that has been developed and is used as a transparent electrode material required for liquid crystal displays, etc. do.

[0003] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include: For example, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin film transistors using metal oxides with excellent semiconductor properties as the channel formation region are already known. (Patent Documents 1 to 4, Non-Patent Document 1).

[0004] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO)m (m: natural number) has a homologous phase and is composed of In, Ga, and Zn. It is known as a multi-component oxide semiconductor having the above structure (Non-Patent Documents 2 to 4).

[0005] Then, the oxide semiconductor composed of the above-mentioned In-Ga-Zn-based oxide is used as a thin film transistor. It has been confirmed that it can be used as a channel layer for transistors (Patent Document 5, Non-Patent Document 5). and 6).

[0006] Conventionally, thin film transistors (TFTs) are provided in each pixel of an active matrix liquid crystal display. Amorphous silicon and polycrystalline silicon have been used for TFTs. Instead of silicon materials, thin-film transistors are fabricated using metal oxide semiconductors such as those mentioned above. For example, zinc oxide and In-Ga- Thin film transistors were fabricated using Zn-O oxide semiconductors, and used to switch image display devices. The technologies used for the silicon carbide element are disclosed in Patent Documents 6 to 9. Semiconductors made of Group 14 elements other than those mentioned above and compound semiconductors other than the oxide semiconductors mentioned above are also used. It is known that it can be used as a channel layer for a transistor.

[0007] In addition, oxide semiconductor films can be formed at temperatures of 300°C or less by sputtering or the like. It is possible to fabricate thin-film transistors with a channel formation region made of oxide semiconductors on a wide area of ​​a large substrate. Therefore, it is suitable for application to active matrix type display devices. is expected. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 1988-1986 [Patent Document 2] Japanese Patent Application Publication No. 8-264794 [Patent Document 3] Special Publication No. 11-505377 [Patent Document 4] Japanese Patent Application Laid-Open No. 2000-150900 [Patent Document 5] Japanese Patent Application Laid-Open No. 2004-103957 [Patent Document 6] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 7] Japanese Patent Application Laid-Open No. 2007-96055 [Patent Document 8] Japanese Patent Application Laid-Open No. 2007-81362 [License 9] Special Announcement No. 2007-123700 [Non-licensed literature]

[0009] [Non-licensed Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68, p.3650-3652 [Non-licensed Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-licensed Document 3] N. Kimizuka, M. Isobe, and M. Nakamura, "Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System", J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-licensed Document 4] Masaki Nakamura, Noboru Kimizuka, Naohiko Mori, Mitsumasa Isobe, "The crystal structure of the ホモロガス phase, InFeO3(ZnO)m(m: natural number) homotype compound", Solid State Physics, 1993, Vol.28, No.5, p.317-328 [Non-licensed Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272 [Non-patent document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors", NATURE, 2004, Vol.432, p.488-492 Summary of the Invention [Problem to be solved by the invention]

[0010] Active matrix liquid crystal display devices and light emitting display devices require a large driving current. For example, in a liquid crystal display device, the voltage applied to the liquid crystal layer is changed during a short gate switching time. A large driving current is required to charge the storage capacitor and the LCD. In addition, a liquid crystal display device with high definition requires a larger driving current. The thin film transistor used as the switching element preferably has high field effect mobility. In addition, the contact resistance (contact resistance) between the semiconductor layer including the region where the channel is formed and the source electrode layer is Preferably, the contact resistance between the semiconductor layer and the drain electrode layer is small. For the same reason, it is preferable that the wiring of the thin film transistor has low electrical resistance.

[0011] In addition, at least one of the edge portions of the source electrode layer and the drain electrode layer and the step generated at the edge portions In a structure in which a semiconductor layer covers a portion of the step, carriers can pass smoothly through the semiconductor layer that covers a portion of the step. In addition, variations in transistor characteristics can cause uneven display. Therefore, the structure and characteristics are such that variations in the field-effect mobility and contact resistance of transistors are less likely to occur. The material is preferred.

[0012] In view of the above, one embodiment of the present invention is a semiconductor including a region where a channel of a thin film transistor is formed. The thin film transistor has a low contact resistance between the source electrode layer and the drain electrode layer. Another object of the present invention is to provide a thin film transistor with low electrical resistance of wiring. Another object of the present invention is to provide a gate insulating film having a gate insulating film formed on an edge of a source electrode layer and a drain electrode layer. To provide a structure that allows carriers to move smoothly through a semiconductor layer that covers at least a part of the step that occurs. Another object of the present invention is to provide a semiconductor layer including a region where a channel is formed and a source electrode. Contact resistance of the electrode layer, and contact resistance between the semiconductor layer and the drain electrode layer Another object of the present invention is to provide a thin film transistor in which variations in characteristics are unlikely to occur. An object of the present invention is to provide a display device having a thin film transistor using a conductor. [Means for solving the problem]

[0013] In forming a thin film transistor, a first wiring layer is provided on a first electrode layer, and a second electrode layer is provided on a second electrode layer. A second wiring layer is provided on the first wiring layer, the first electrode layer extends from an end of the first wiring layer, and the second electrode layer is connected to the second wiring layer. The semiconductor layer extends from the end of the line layer and covers the side and top surfaces of the first electrode layer and the side and top surfaces of the second electrode layer. The insulating film 11 may be provided so as to be electrically connected to the upper surface of the insulating film 11.

[0014] One example of the disclosed invention is a gate electrode layer, a gate insulating film on the gate electrode layer, and a gate insulating film. a first electrode layer and a second electrode layer, the ends of which overlap with the gate electrode layer on the film; a wiring layer, a second wiring layer on the second electrode layer, and an oxide semiconductor layer in a region overlapping the gate electrode layer; The first electrode layer extends from an end of the first wiring layer, and the second electrode layer extends from an end of the second wiring layer. The oxide semiconductor layer is electrically connected to the side and top surfaces of the first electrode layer and the side and top surfaces of the second electrode layer. The gate insulating film on the gate electrode layer is electrically connected to the first electrode layer and the second electrode layer. The semiconductor device has a region in contact with an oxide semiconductor layer between the contact regions.

[0015] In addition, one aspect of the present invention is a method for manufacturing a semiconductor device, comprising: The width (d2) of the second electrode layer extending from the end of the second wiring layer is 0.2 μm or more and 5 μm or less. The semiconductor device is as follows.

[0016] In one embodiment of the present invention, the thickness of the oxide semiconductor layer is 5 nm to 200 nm, preferably is 20 nm or more and 60 nm or less, and the thickness of the first electrode layer or the second electrode layer is 5 nm or more. The semiconductor device has a thickness of 200 nm or less, preferably 5 nm or more, which is less than half the thickness of the oxide semiconductor layer. It is a location.

[0017] Another example of the disclosed invention is a semiconductor device including a first electrode layer, a second electrode layer, a first wiring layer on the first electrode layer, and a second wiring layer on the first electrode layer. a second wiring layer on the second electrode layer; an oxide semiconductor layer on the first electrode layer and the second electrode layer; a gate insulating film on the compound semiconductor layer; and a gate insulating film on the first electrode layer and the second electrode layer. a gate electrode layer overlapping an end of the electrode layer, and the first electrode layer is the second electrode layer extends from an end of the second wiring layer, and the first electrode layer extends from a side surface and an upper surface of the first electrode layer. The semiconductor device has an oxide semiconductor layer electrically connected to the surface of the first electrode layer and the side and top surfaces of the second electrode layer.

[0018] In addition, one aspect of the present invention is a method for manufacturing a semiconductor device, comprising: The width (d2) of the second electrode layer extending from the end of the second wiring layer is 0.2 μm or more and 5 μm or less. The semiconductor device is as follows.

[0019] In one embodiment of the present invention, the thickness of the oxide semiconductor layer is 5 nm to 200 nm, preferably is 20 nm or more and 60 nm or less, and the thickness of the first electrode layer or the second electrode layer is 5 nm or more. The semiconductor device has a thickness of 200 nm or less, preferably 5 nm or more, which is less than half the thickness of the oxide semiconductor layer. It is a location.

[0020] Another example of the disclosed invention is a gate electrode layer formed on a substrate, and a gate insulating film formed on the gate electrode layer. A first electrode layer and a second electrode layer are formed on the gate insulating film, and the ends of the first electrode layer and the second electrode layer are overlapped with the gate electrode layer on the gate insulating film. a first electrode layer extending from an end of the first wiring layer and a first wiring layer formed on the first electrode layer; the second electrode layer extends from an end of the second wiring layer to form a second wiring layer on the second electrode layer; In the region overlapping with the gate electrode layer, the side and top surfaces of the first electrode layer and the side and top surfaces of the second electrode layer A region electrically connected to the upper surface and in contact with the first electrode layer of the gate insulating film on the gate electrode layer. and an oxide semiconductor layer in contact with the gate insulating film in a region between the regions where the second electrode layer is in contact. The present invention relates to a method for manufacturing a semiconductor device in which a

[0021] Another example of the disclosed invention is a method for forming a first electrode layer and a second electrode layer on a substrate, the first electrode layer being The first wiring layer extends from an end of the first wiring layer, and the second electrode layer is disposed on the first wiring layer. and a second wiring layer is formed on the second electrode layer, and the first wiring layer is formed on the side and top surfaces of the first electrode layer. and forming an oxide semiconductor layer electrically connected to the side and top surfaces of the second electrode layer, A gate insulating film is formed on the body layer, and the ends of the first electrode layer and the second electrode layer are connected to each other through the gate insulating film. The present invention relates to a method for manufacturing a semiconductor device, in which a gate electrode layer is formed to overlap with a gate electrode.

[0022] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate

[0023] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor circuits and electro-optical devices and electronic equipment that utilize semiconductor characteristics. It is a conductor device. [Effects of the Invention]

[0024] In the thin film transistor, a first wiring layer is provided on the first electrode layer and a second wiring layer is provided on the second electrode layer. The first electrode layer extends from an end of the first wiring layer, and the second electrode layer extends from an end of the second wiring layer. The semiconductor layer extends from the end of the first electrode layer and electrically connects to the side and top surfaces of the first electrode layer. The semiconductor layer is provided so as to be electrically connected to the side and top surfaces of the second electrode layer, A semiconductor layer including a region where a channel is formed, a contact between a source electrode layer and a drain electrode layer, and In addition, the thickness of the wiring can be increased, which reduces the electrical resistance of the wiring. In addition, the resistance between the end portions of the source electrode layer and the drain electrode layer and the resistance generated at the end portions can be reduced. Carriers can move smoothly through the semiconductor layer that covers at least a part of the step. and a semiconductor layer including a region where the contact resistance between the source electrode layer and the drain electrode layer is We provide thin-film transistors with little variation in characteristics (contact resistance). can.

[0025] Furthermore, by using the thin film transistor in a pixel portion and a driver circuit portion of a display device, It is possible to provide a display device with high thermal properties and high reliability. [Brief explanation of the drawings]

[0026] [Figure 1] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 2] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 3] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 5] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 7] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 8] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 9] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 10] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 11] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 12] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 13] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 14]4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 15] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 16] FIG. 2 is a diagram illustrating the configuration of a shift register. [Figure 17] 1A and 1B are diagrams illustrating a connection configuration of a flip-flop according to an embodiment; [Figure 18] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 19] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 20] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 21] 1A and 1B are diagrams illustrating pixel equivalent circuits of a semiconductor device according to an embodiment. [Figure 22] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 23] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 24] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Figure 25] FIG. 1 is an external view showing an example of an electronic book. [Figure 26] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 27] FIG. 1 is an external view showing an example of a gaming machine. [Figure 28] FIG. 1 is an external view showing an example of a mobile phone. DETAILED DESCRIPTION OF THE INVENTION

[0027] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in the form and details thereof without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be achieved by the following embodiments. It should not be construed as being limited to the contents of the description. The same reference numerals are used in different drawings to denote the same parts or parts having similar functions. A repeated explanation will be omitted.

[0028] (Embodiment 1) In this embodiment, a structure of a thin film transistor, which is one embodiment of a semiconductor device, will be described. .

[0029] A bottom-gate thin film transistor of this embodiment mode is shown in FIG. 1(B) is a cross-sectional view. FIG. 1(B) is a cross-sectional view of the line A1-A2 and FIG. 1(C) is a cross-sectional view taken along the lines B1-B2. 1 is an enlarged cross-sectional view of a portion where an electrode layer of a photoresist contacts a semiconductor layer.

[0030] The thin film transistor 141 shown in FIG. 1 includes a gate electrode layer 111 provided on a substrate 100, A gate insulating film 102 is provided on the gate electrode layer 111, and a source The first electrode layer 114a and the second electrode layer 114b, which are to be the drain electrode layer and the drain electrode layer, have their ends The first electrode layer 114a is provided so as to overlap the gate electrode layer 111. The first wiring layer 114a is provided on the first electrode layer 114a. 15a is provided, a second wiring layer 115b is provided on the second electrode layer 114b, and a first electrode The first electrode layer 114a and the second electrode layer 114b are respectively connected to the first wiring layer 115a and the second wiring layer 115b. The semiconductor layer 113 overlaps the gate electrode layer 111 and extends outward from the end of the first The electrode layer 114a and the second electrode layer 114b are provided so as to be in contact with the side and top surfaces thereof. The gate insulating film 102 on the gate electrode layer 111 has a region in contact with the first electrode layer 114a. and a region in contact with the semiconductor layer 113 between the region in contact with the second electrode layer 114b and the region in contact with the second electrode layer 114c. do.

[0031] In FIG. 1(B), the substrate 100 is made of barium borosilicate glass, aluminoborosilicate glass, or the like. Glass or aluminosilicate glass, made by the fusion or float process. In addition to alkali-free glass substrates and ceramic substrates, For example, a plastic substrate having sufficient heat resistance can be used. It contains more barium oxide (BaO) than boron oxide (B2O3) and has a strain point of 730°C or higher. The oxide semiconductor layer forming the semiconductor layer is preferably heated at about 700° C. This is because the glass substrate does not warp even when heat treatment is performed at a high temperature.

[0032] Alternatively, a substrate in which an insulating film is provided on the surface of a metal substrate such as a stainless steel alloy may be used. If the plate 100 is a mother glass, the size of the substrate is 1st generation (320mm x 400mm) , 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm), 4th generation Generation (680mm x 880mm, or 730mm x 920mm), 5th generation (1000m m x 1200mm or 1100mm x 1250mm), 6th generation 1500mm x 180 0mm), 7th generation (1900mm x 2200mm), 8th generation (2160mm x 246 0mm), 9th generation (2400mm x 2800mm, 2450mm x 3050mm), 10th generation (2950mm x 3400mm) etc. can be used.

[0033] An insulating film may be formed as a base film on the substrate 100. The base film may be formed by a CVD method or the like. A silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a nitride film is formed by using a sputtering method or the like. The insulating film 11 may be formed of a single layer or a multilayer of silicon dioxide films.

[0034] The gate electrode layer 111 is made of aluminum (Al), copper (Cu), gold (Au), silver (Ag), Platinum (Pt), molybdenum (Mo), titanium (Ti), chromium (Cr), tantalum (Ta ), tungsten (W), neodymium (Nd), scandium (Sc), and other metal materials, or alloy materials whose main components are these metal materials, or nitrogen compounds whose components are these metal materials It is formed by a single layer or multilayer using a low-resistance conductive material such as aluminum or copper. However, there are problems with low heat resistance and susceptibility to corrosion, so heat resistance is It is preferable to use it in combination with a heat-resistant conductive material. Materials used include titanium, chromium, tantalum, tungsten, neodymium, and scandium.

[0035] Conductive films containing aluminum as the primary component include titanium (Ti), tantalum (Ta), and W, Molybdenum (Mo), Chromium (Cr), Neodymium (Nd), Scandium Sum (Sc), Nickel (Ni), Platinum (Pt), Copper (Cu), Gold (Au), Silver (Ag) , manganese (Mn), carbon (C), or silicon (Si), or any of these elements It is preferable to use an alloy material containing aluminum as the main component or an aluminum alloy to which a compound is added. It's nice.

[0036] In addition, when a conductive film made of a heat-resistant conductive material is laminated on a low-resistance conductive film, for example, Two-layer laminate structure with molybdenum layer laminated on aluminum layer or molybdenum layer laminated on copper layer A two-layer structure with a copper layer laminated on top, or a titanium nitride layer or tantalum nitride layer laminated on top of a copper layer A two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. The three-layer laminate structure is a tungsten layer or a tungsten nitride layer, an aluminum layer, and A silicon alloy layer or an aluminum-titanium alloy layer and a titanium nitride layer or a titanium layer It is preferable to have a laminated structure.

[0037] Alternatively, a transparent conductive film may be used, and the material may be an indium oxide tin oxide alloy (In2O3-S nO2, abbreviated as ITO), indium tin oxide containing silicon or silicon oxide, Indium zinc oxide, zinc oxide, zinc oxide doped with aluminum or gallium (AZO, GZO) can also be used.

[0038] The insulating film that can be used as the gate insulating film 102 includes a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. silicon nitride film, silicon oxide nitride film, aluminum oxide film, aluminum nitride film, magnesium oxide Examples include titanium oxide, yttrium oxide, hafnium oxide, and tantalum oxide. It may be formed as a single layer or a laminated structure made of these materials.

[0039] In this specification, an oxynitride is a compound having a composition in which oxygen atoms are more abundant than nitrogen atoms. Nitrided oxide refers to a substance with a higher number of nitrogen atoms than oxygen atoms. For example, a silicon oxynitride film has a composition that is higher in number than nitrogen atoms. The number of oxygen atoms is larger than that of the ion-doped fluoride, and the Rutherford B Backscattering Spectrometry and Hydrogen Forward Scattering Spectrometry (HFS) When measured using Hydrogen Forward Scattering (Hydrogen Forward Scattering) The concentration range is 50 to 70 atomic % for oxygen, 0.5 to 15 atomic % for nitrogen, and 25 atomic % for silicon. % to 35 atomic % and hydrogen in the range of 0.1 to 10 atomic %. Silicon film is a film whose composition has more nitrogen atoms than oxygen atoms, and is measured by RBS and HFS. When measured, the concentration ranges are 5 to 30 atomic % for oxygen, 20 to 55 atomic % for nitrogen, It refers to a material containing 25 to 35 atomic % silicon and 10 to 30 atomic % hydrogen. When the total number of atoms constituting silicon oxynitride or silicon nitride oxide is taken as 100 atomic %, The content ratios of nitrogen, oxygen, silicon and hydrogen are to be within the above ranges.

[0040] The gate insulating film may be a single layer, or may be formed by laminating two or three insulating films. For example, the gate insulating film in contact with the substrate may be formed using a silicon nitride film or a silicon nitride oxide film. This increases the adhesion between the substrate and the gate insulating film, and when a glass substrate is used, impurities from the substrate are removed. It is possible to prevent substances from diffusing into the semiconductor layer, and further to prevent oxidation of the gate electrode layer. That is, it is possible to prevent film peeling and also to prevent the thin film transistor to be formed later. The electrical characteristics of the capacitor can be improved.

[0041] The first electrode layer 114a and the second electrode layer 114b are formed using a conductive film. At the interface between the electrode layer and the semiconductor layer, elements constituting the semiconductor layer 113 and elements contained in the film-forming atmosphere are present. When a mixed layer is formed by diffusion, the conductive film material and the semiconductor material are mixed so that the mixed layer exhibits conductivity. For example, when an oxide semiconductor is used as the semiconductor layer, The first electrode layer 114a and the second electrode layer 114b are made of molybdenum (Mo), titanium (Ti), or titanium. The use of tungsten (W) is preferable because the resulting oxide film is conductive. Indium tin oxide alloy, indium tin oxide containing silicon or silicon oxide, indium Aluminum zinc oxide, zinc oxide, zinc oxide doped with aluminum or gallium (AZO, GZ Oxides exhibiting high conductivity, such as SiO, can also be used.

[0042] The thickness of the first electrode layer 114a and the second electrode layer 114b is 5 nm or more and 200 nm or less. Preferably, the thickness of the first electrode layer is set to half or less of the thickness of the semiconductor layer 113. The thinner the thickness of the second electrode layer 114a and the second electrode layer 114b, the smaller the step generated on the gate insulating film. The semiconductor layer is in contact with the top surface of the gate insulating film, the side surface of the first electrode layer 114a, and the second electrode layer 11 4b, the top surface of the first electrode layer 114a, and the top surface of the second electrode layer 114b. As a result, the semiconductor layer in contact with the step portion can easily overcome the step. The region where the channel is formed is free from structures that hinder the movement of carriers, such as voids. In addition, a semiconductor layer including the first electrode layer 114a and the second electrode layer 114b can be formed. In the cross-sectional shape, the thickness of the end portions of the first electrode layer 114a and the second electrode layer 114b is A wedge shape that increases linearly from the center, a shape that increases in a downward convex arc, and a shape that increases in an upward convex arc. , or an S-shaped increasing shape is drawn, the first electrode layer 114a and the second electrode On the other hand, if the electrode layer is too thin, the step generated at the edge of the layer 114b will be small. Not only does this make the process difficult, but it also increases electrical resistance and impairs the function of the electrode. The first electrode layer 114a and the second electrode layer 114b are used as a source electrode layer and a drain electrode layer. The channel length L of the film transistor corresponds to the distance between the first electrode layer 114a and the second electrode layer 114b. Correct.

[0043] 1C, the first electrode layer 114a and the second electrode layer 114b are in contact with the semiconductor layer 113. The first electrode layer 114a is an underlayer (here, a gate insulating film 1 02), the first wiring layer 115a is connected to the electrode layer 114 from the end of the first electrode layer 114a. The width d1 of the first wiring layer 115a to the end of the first wiring layer 115a that starts to contact a or the width d2 of the second electrode layer 114b From the end of the second electrode layer 114b that starts to contact the ground (here, the gate insulating film 102), The width d from the edge of the second wiring layer 115b where the wiring layer 115b starts to contact the second electrode layer 114b The thickness of the electrode layer is preferably 0.2 μm or more and 5 μm or less. If the width (d1 or d2) is too narrow, the contact area with the semiconductor layer will be small, which may cause defects. If the first wiring layer 115a or the second wiring layer 115b is too wide, the processing becomes complicated. The taper angle (θ) of the end of the wire layer 115b is preferably less than 90°, but an inverted taper angle of 90° or more is also preferable. Even if the electrode layer is in a par shape, the width (d1 or d2) that the electrode layer extends outward from the end of the wiring layer If the thickness is 0.2 μm or more, the electrode layer and the semiconductor layer can be electrically connected well.

[0044] The first wiring layer 115a and the second wiring layer 115b are made of the same material as the gate electrode layer 111. Aluminum in particular has low electrical resistance, is easy to process, and is inexpensive. It is preferable that the thickness of the first wiring layer 115a and the second wiring layer 115b is 5 nm or more and 100 nm or less. The thicker the wiring layer, the lower the wiring resistance, but if it is too thick, it takes a long time to form the film. This requires a long time, and the stress in the film increases, causing defects such as film peeling. In order to make it easier for the oxide semiconductor layer to cover the end of the wiring layer, the cross-sectional shape of the end of the wiring layer is There are wedge-shaped shapes where the thickness increases linearly from the base, shapes that increase in a convex arc downwards, and shapes that increase in a convex arc upwards. It may be a shape that increases by drawing a curve or an S-shape.

[0045] Also, a film extending over the end of the first electrode layer 114a and the end of the first wiring layer 115a, or The film extending over the end of the second electrode layer 114b and the end of the second wiring layer 115b is formed by the electrode layer 114b. Since the step extends outward from the end of the groove, the step is reduced and the groove is less likely to break.

[0046] The semiconductors used in this specification include, for example, group 14 elements such as Si, Ge, and SiC. semiconductors and compound semiconductors such as GaAs, InP, ZnSe, CdS, and CuAlOS Conductors and nitride semiconductors such as GaN, AlN, InN, ZnO, CuAlO2, etc. An example of such an oxide semiconductor is an amorphous semiconductor containing microcrystals. The crystal may be either solid, polycrystalline, or single crystalline.

[0047] In this embodiment, the oxide semiconductor forming the semiconductor layer 113 is InMO3 (ZnO ) m It is preferable to use an oxide semiconductor having a structure represented by (m>0), and in particular, In-Ga It is preferable to use a Zn-O-based oxide semiconductor. M is gallium (Ga), iron ( One selected from the group consisting of Fe, nickel (Ni), manganese (Mn) and cobalt (Co) It indicates a metal element or multiple metal elements. For example, M can be Ga, or Ga and It may contain Ni or Ga and Fe, or Ga and the above metal elements other than Ga. In the oxide semiconductor, in addition to the metal element contained as M, Fe is contained as an impurity element. Some of the materials contain Ni or other transition metal elements, or oxides of the transition metals. In the specification, InMO3(ZnO) m Oxide semiconductor with a structure represented by (m>0) Among them, oxide semiconductors with a structure containing at least Ga as M are called In-Ga-Zn-O oxides. The thin film is also called an In-Ga-Zn-O based non-single crystal film.

[0048] The crystal structure of the In-Ga-Zn-O non-single crystal film was determined by XRD (X-ray diffraction) analysis. The In-Ga-Zn-O non-single crystal film was formed by sputtering. After film formation, heat treatment is performed at 200 to 500°C, typically 300 to 400°C, for 10 to 100 minutes. We are carrying out this principle.

[0049] However, the oxide semiconductor forming the semiconductor layer 113 is InMO3(ZnO). m (m>0) For example, the oxide semiconductor layer may be an oxide semiconductor layer having an indium oxide ( InO x ), zinc oxide (ZnO x ), tin oxide (SnO), indium zinc oxide (IZO) , indium tin oxide (ITO), indium tin oxide with silicon oxide (ITSO), acid Indium zinc oxide containing silicon dioxide (IZO containing SiOx), zinc oxide containing silicon dioxide ( Zinc oxide containing silicon oxide and tin oxide (TSZO), and zinc oxide doped with gallium An oxide semiconductor layer made of (GZO) or the like may also be used.

[0050] The thickness of the semiconductor layer 113 is 5 nm or more and 200 nm or less, preferably 20 nm or more and 60 nm or less. The following applies.

[0051] The carrier concentration range of the semiconductor layer 113 is 1×10 17 / cm 3 Less than (more preferably 1× 10 11 / cm 3 It is preferable that the carrier concentration range of the semiconductor layer 113 is within the above range. If it exceeds this limit, the thin film transistor may become normally on.

[0052] In addition to the above, oxide semiconductors applicable to the semiconductor layer 113 include In—Sn—Zn—O-based Sn-Ga-Zn-O series, In-Zn-O series, Sn-Zn-O series, Ga-Zn-O series, I Sn—O-based, Sn—O-based, and Zn—O-based oxide semiconductors can be applied. By adding insulating impurities to these oxide semiconductors, the crystallinity of the semiconductor layer 113 can be improved. This makes it possible to suppress the degradation and stabilize the characteristics of the thin film transistor.

[0053] The semiconductor layer 113 may contain insulating impurities. Examples of the impurities include silicon oxide, Insulating oxides such as germanium oxide, insulating materials such as silicon nitride Nitride or insulating oxynitride such as silicon oxynitride is applied.

[0054] These insulating oxides or insulating nitrides do not impair the electrical conductivity of the oxide semiconductor. It is added in concentrations.

[0055] By including insulating impurities in the semiconductor layer 113, crystallization of the semiconductor layer 113 is suppressed. By suppressing the crystallization of the semiconductor layer 113, the thin film transistor This makes it possible to stabilize the characteristics of the

[0056] In addition, by adding impurities such as silicon oxide to the In-Ga-Zn-O oxide semiconductor, Even if heat treatment is performed at 300° C. to 600° C., the oxide semiconductor is not crystallized or the microcrystalline grains are not formed. generation can be prevented.

[0057] Fabrication of thin-film transistors with In-Ga-Zn-O oxide semiconductors as the channel formation region In the process, the S value (subthreshold swing value) is calculated by heat treatment. e) and field-effect mobility can be improved, but even in such cases, This prevents the thin-film transistor from becoming normally on. Even when thermal stress and bias stress are applied to the transistor, the threshold voltage remains stable. It can be prevented.

[0058] With the above-described structure, the edge portions of the source electrode layer and the drain electrode layer and the step portions formed at the edge portions are Carriers can move smoothly through the semiconductor layer that covers at least a part of the source. The contact area between the electrode layer and the drain electrode layer and the semiconductor layer including the region where the channel is formed is sufficiently large. Because it has a large area, it is possible to not only reduce the contact resistance, but also Therefore, the characteristic variation caused by the variation in contact resistance is reduced. A thin film transistor with little lacquering can be provided. Since the wiring connected to the wiring can be made thicker, the electrical resistance of the wiring can be reduced.

[0059] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0060] (Embodiment 2) Next, a manufacturing method of the thin film transistor 141 shown in FIGS. 1A and 1B will be described with reference to FIGS. Specifically, a manufacturing process of a pixel portion of a display device having a thin film transistor will be described. Reveal.

[0061] The substrate 100 is the same as that described in the first embodiment. The conductive film material used for the gate electrode layer is formed on the entire surface of the substrate 100 by sputtering or vacuum deposition. Next, a first photolithography process is performed to form a resist mask, and an etching The unnecessary portions are removed by etching, and the gate wiring including the gate electrode layer 111 and the capacitance wiring 1 23 and the first terminal 118. At this time, in order to prevent disconnection, at least the gate It is preferable to etch the end of the electrode layer 111 so that it has a tapered shape.

[0062] Next, a gate insulating film 102 is formed on the entire surface of the gate electrode layer 111. For 02, the CVD method or sputtering method is used, and the film thickness is set to 50 to 250 nm.

[0063] For example, a silicon oxide film is used as the gate insulating film 102 by a CVD method or a sputtering method. Of course, the gate insulating film 102 is not limited to such a silicon oxide film. The various materials mentioned in the first embodiment may be used in a single layer or a laminated structure. can be done.

[0064] In addition, a silicon oxide layer is formed as the gate insulating film 102 by a CVD method using organic silane gas. As the organic silane gas, ethyl silicate (TEOS: chemical formula S i(OC2H5)4), tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylsilane Tetramethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH( silanes such as dimethylaminosilane (SiH(N(CH3)2)3), tris(dimethylaminosilane) A ribonucleic acid-containing compound can be used.

[0065] Next, a second photolithography process is performed to form a resist mask and then etching is performed. By doing so, unnecessary portions of the gate insulating film 102 are removed, and wiring and the like made of the same material as the gate electrode layer 111 are formed. A contact hole (not shown) is formed to reach the electrode layer. It is provided to directly connect the conductive film to be formed later with the gate wiring and electrode layer. In the path portion, a thin film transistor directly contacting the gate electrode layer and the source electrode layer or the drain electrode layer is formed. When forming a terminal that is electrically connected to the gate wiring of the terminal part, a contact hole is used. Form a rule.

[0066] Next, the lower conductive film that will become the first electrode layer 114a and the second electrode layer 114b is formed on the gate insulating film 10. 2. Also, a first wiring layer 115a and a second wiring layer 115b are formed on the lower conductive film. The upper conductive film, which will be b, is formed and stacked. The lower conductive film and the upper conductive film are formed by sputtering. The film can be formed by vacuum deposition or vapor deposition.

[0067] The lower conductive film that becomes the first electrode layer 114a and the second electrode layer 114b is the same as that described in the first embodiment. The first wiring layer 115a and the second wiring layer 115b are formed using a conductive material. As described in the first embodiment, the upper conductive film is made of the same material as the gate electrode layer 111. In addition, both the lower conductive film and the upper conductive film can be formed as a single layer or a laminated layer. .

[0068] The unnecessary portions of the lower conductive film and the upper conductive film are removed using the same resist mask. A first wiring layer is provided on the electrode layer, and a second wiring layer is provided on the second electrode layer, and the first electrode layer is connected to the first wiring layer. the first electrode layer is formed extending from the end of the second wiring layer; This is preferable because the process can be simplified.

[0069] To remove unnecessary portions of the lower conductive film and the upper conductive film using the same resist mask, Conditions can be found where the etching rate of the upper conductive film material is sufficiently higher than that of the conductive film material. A combination is preferred.

[0070] In this embodiment, a titanium film having a thickness of 20 nm is used as the lower conductive film, and a titanium film having a thickness of 20 nm is used as the upper conductive film. The titanium is not only heat-resistant but also has a high thermal conductivity. It is a conductive material that can be electrically connected well to n-Ga-Zn-O oxide semiconductors. In addition, aluminum is a material with low wiring resistance. This not only reduces the step that occurs in the wiring, but also allows the formation of electrode layers and wiring layers with reduced wiring resistance. Since the unnecessary portions of the lower conductive film and the upper conductive film can be removed using the same resist mask, The process can be simplified.

[0071] Next, a third photolithography step is performed to form a resist mask 131. The upper and lower conductive films are etched by etching to form the first electrode layer 114a and the second electrode layer 114b. The electrode layer 114b, the first wiring layer 115a, the second wiring layer 115b, and the second terminal portion are formed. In this case, wet etching or dry etching is used as the etching method. .

[0072] For example, when titanium is used for the lower conductive film and aluminum is used for the upper conductive film, Using water, heated hydrochloric acid, or nitric acid solution containing ammonium fluoride as an etchant Wet etching can be performed. For example, KSMF-240 (manufactured by Kanto Chemical Co., Ltd.) ) to etch the lower conductive film (titanium) and the upper conductive film (aluminum) at the same time. It is also possible to etch them all at once using dry etching. .

[0073] When the upper conductive film and the lower conductive film are etched at the same time, the first electrode layer 114a and the first wiring layer The ends of the second electrode layer 114b and the second wiring layer 115b are aligned. When wet etching is used, the etching can be performed in a continuous manner. The chipping is performed isotropically, and the ends of the first wiring layer 115a and the second wiring layer 115b are resist-coated. The cross section at this stage is shown in FIG. A top view without the mask 131 is shown in FIG.

[0074] Next, using the same resist mask, the first wiring layer 115a is etched by a second etching. The second wiring layer 115b is recessed from the outer periphery of the second electrode layer 114b. The etching method used here is wet etching.

[0075] For example, a 150 nm aluminum film is deposited on a 20 nm titanium film as a lower conductive film. In the case where the upper conductive film is etched to recede from the edge of the lower electrode, In this case, a chemical solution (referred to as "chemical solution" in this specification) containing phosphoric acid, acetic acid, nitric acid, and pure water was mixed in a volume ratio of 85:5:5:5. The second etching solution was prepared by heating the aluminum mixed acid solution (hereinafter referred to as aluminum mixed acid solution) to 45°C, and the etching was continued for 2 minutes. This second etching removes the upper conductive film from the edge of the lower electrode by about 2 μm. m can be retreated.

[0076] By etching in this manner, the end of the first wiring layer 115a is aligned with the end of the first electrode layer 114a. The end of the second wiring layer 115b is recessed from the end of the second electrode layer 114b. As a result, the first electrode layer 114a extending outward from the end of the first wiring layer 115a and the second wiring The second electrode layer 114b can be formed so as to extend outward from the end of the layer 115b. To simplify the process, the first and second etching steps are performed using a resist mask 131. However, a resist mask may be separately prepared for the second etching. The first electrode layer 114a and the second electrode layer 114b are the source electrode layer and the drain electrode layer of the thin film transistor. The first wiring layer 115a and the second wiring layer 115b become signal lines. This is shown in Figure 2(B). The top view at this stage corresponds to Figure 5.

[0077] In addition, in this third photolithography step, the second terminal 122 is left in the terminal portion. The second terminal 122 is formed using a part of the source wiring and is electrically connected to the signal line. It is being done.

[0078] In addition, in the terminal portion, the connection electrode 120 is formed through a contact hole formed in the gate insulating film. It is connected to the first terminal 118 of the terminal portion through the The source or drain electrodes of the thin film transistors of the driving circuits are formed through the same process. and the gate electrode are directly connected.

[0079] Before forming the oxide semiconductor film 103 including the region where the channel is to be formed, Inverse sputtering is performed by introducing argon gas into a chamber where 0 is installed to generate plasma. It is preferable to remove dust adhering to the surface of the gate insulating film by performing the reverse scanning. By performing puttering, the flatness of the surface of the gate insulating film 102 can also be improved. Reverse sputtering is a method in which RF is applied to the substrate side in an argon atmosphere without applying voltage to the target side. This is a method of modifying the surface by applying a voltage using a power supply to generate plasma on the substrate. Instead of the argon atmosphere, nitrogen, helium, etc. may be used. It may be performed in an atmosphere containing oxygen, N2O, etc. Also, Cl2, CF After the reverse sputtering process, the oxide semiconductor is removed without being exposed to the atmosphere. By forming the conductive film 103, the gate insulating film 102 and the oxide semiconductor film 103 are This can prevent dust and moisture from adhering to the interface.

[0080] Next, the surface of the gate insulating film 102 is treated with an oxide film that will become the semiconductor layer 113 without being exposed to the atmosphere. The semiconductor film 103 is formed by sputtering in an atmosphere of rare gas such as argon and oxygen gas. The oxide semiconductor film 103 can be formed using the oxide semiconductor described in Embodiment 1. Therefore, it is preferable to use an In-Ga-Zn-O based oxide semiconductor.

[0081] As a specific example of the conditions, an oxide semiconductor terahertz crystal containing In, Ga, and Zn with a diameter of 8 inches was used. Using a get (In2O3:Ga2O3:ZnO=1:1:1), the substrate and target The distance between the chamber and the substrate was 170 mm, the pressure was 0.4 Pa, the DC power supply was 0.5 kW, and the deposition gas was Ar. Sputtering was performed at room temperature with a gas flow rate of 0.5:0.5 (sccm). The target was a Ga2O3 and Z pellet on an 8-inch diameter disk containing In2O3. It is also possible to place nO. If a pulse direct current (DC) power supply is used, the dust will be lighter. This is preferable because it can reduce the thickness and the film thickness distribution is uniform. The thickness is set to 5 nm or more and 200 nm or less, preferably 20 nm or more and 60 nm or less. The cross-sectional view at this point is shown in FIG. 2(C).

[0082] When forming an In-Ga-Zn-O based non-single crystal film by sputtering, In, G The oxide semiconductor target containing a and Zn may contain insulating impurities. The impurities include insulating oxides such as silicon oxide and germanium oxide, nitrides, and the like. Insulating nitrides such as silicon, or insulating oxynitrides such as silicon oxynitride For example, an oxide semiconductor target containing 0.1% by weight or more of SiO2 and 10% by weight of SiO2 is used. % or less, preferably 1% by weight or more and 6% by weight or less.

[0083] By adding insulating impurities to the oxide semiconductor, the oxide semiconductor film can be made amorphous. Furthermore, when the semiconductor layer 113 is heat-treated, the semiconductor layer 1 This can prevent 13 from crystallizing.

[0084] In addition to In-Ga-Zn-O oxide semiconductors, there are also In-Sn-Zn-O and Sn-Ga -Zn-O series, In-Zn-O series, Sn-Zn-O series, Ga-Zn-O series, In-O series, A similar effect can be achieved by adding insulating impurities to Sn-O and Zn-O oxide semiconductors. can be obtained.

[0085] For example, an In-Sn-Zn-O oxide semiconductor containing silicon oxide is formed by sputtering. When forming a film, In2O3, SnO2, ZnO, and SiO2 are used as targets in a predetermined ratio. In addition, a target sintered with In-Zn-O system oxide containing silicon oxide is used. In the case of oxide semiconductors, the target is In2O3, ZnO, and SiO2 in a specified ratio. The film is formed using a sintered target. Also, Sn-Zn-O with added silicon oxide is used. When forming a film of a silicon-based oxide semiconductor by sputtering, SnO2 and ZnO are used as targets. Mix them in a specified ratio, and add SiO2 to the total of SnO2 and ZnO at a ratio of 1 wt% to 10 wt%. Preferably, the amount is 2 wt% or more and 8 wt% or less, and the sintered target is used. do.

[0086] The deposition of the In-Ga-Zn-O non-single crystal film was performed in the same chamber as the previous reverse sputtering. The chamber may be used, or a chamber different from the chamber in which the reverse sputtering was performed previously may be used. A film may be formed.

[0087] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply for the sputtering power source, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used for.

[0088] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0089] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are sputtering devices that use this method.

[0090] In addition, in the film formation method using the sputtering method, the target material and the sputtering gas component are mixed during film formation. Reactive sputtering is used to form thin films of these compounds by chemically reacting them with each other. There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0091] Next, a fourth photolithography step is performed to form a resist mask 132, and Etching of a-Zn-O based non-single crystal film. Etching is done with citric acid, oxalic acid, etc. The organic acid can be used as an etchant. Unnecessary parts were removed by wet etching using a material (manufactured by Kanto Chemical Co., Ltd.) to form an In-Ga- The Zn-O based non-single crystal film is formed into an island shape, and a semiconductor layer 1 which is an In-Ga-Zn-O based non-single crystal film is formed. The edge of the semiconductor layer 113 is etched to have a tapered shape, thereby forming a stepped shape. This can prevent wiring breakage due to stepping.

[0092] The etching here is not limited to wet etching, but may be dry etching. The etching apparatus used for dry etching may be a reactive ion etching apparatus. Etching equipment using the RIE method and ECR (Electron Cyclotron Resonance) on Resonance) and ICP (Inductively Coupled Pl. A dry etching device using a high density plasma source such as ASMA can be used. In addition, compared to ICP etching equipment, it is easier to obtain uniform discharge over a wide area. The etching equipment uses a grounded upper electrode and a 13.56MHz high frequency power supply to the lower electrode. A power supply was connected to the bottom electrode, and a low-frequency power supply of 3.2 MHz was connected to the bottom electrode. Advanced Capacitively Coupled Plasma (CAP) mode edge In this ECCP mode etching equipment, for example, It can also accommodate 10th generation substrates with sides exceeding 3m.

[0093] Through the above steps, a thin film transistor 141 having the semiconductor layer 113 as a channel forming region can be fabricated. The cross-sectional view at this stage is shown in Figure 3(A). The top view at this stage corresponds to Figure 6. do.

[0094] After removing the resist mask 132, the temperature is increased to 200°C to 600°C, typically 250°C to 500°C. In this embodiment, the substrate is placed in a furnace and heated to 350° C. in a nitrogen atmosphere. This heat treatment causes the atomic level of the In-Ga-Zn-O system non-single crystal film to change. This heat treatment releases the distortion that inhibits carrier movement, Therefore, the heat treatment (including optical annealing) is effective. The method is not particularly limited as long as it is after the formation of an In-Ga-Zn-O based non-single crystal film. This may be done after the electrodes are formed.

[0095] Furthermore, the back surface of the channel forming region of the semiconductor layer 113, that is, the surface where the so-called back channel is formed By performing oxygen radical treatment, the thin film transistor Furthermore, by performing radical treatment, the semiconductor The damage on the exposed surface of layer 113 can be repaired. The radical treatment is carried out using O2, N It is preferable to carry out the reaction in an atmosphere of N2, He, or Ar, preferably containing oxygen. The radical treatment may be carried out in an atmosphere containing Cl2 and CF4. It is preferably done with a bias.

[0096] Next, a protective insulating layer 109 is formed to cover the thin film transistor 141. The silicon nitride film, silicon oxide film, silicon oxynitride film, aluminum oxide film, etc. are obtained by sputtering. A tantalum oxide film, a tantalum film, or the like can be used.

[0097] Next, a fifth photolithography step is performed to form a resist mask, and a protective insulating layer 10 9 is etched to form a contact hole 125 reaching the second wiring layer 115b. In addition, the etching here forms a contact hole 124 that reaches the second terminal 122, A contact hole 126 reaching the electrode 120 is also formed. A cross-sectional view is shown in FIG.

[0098] Next, a transparent conductive film is formed. The material of the transparent conductive film is indium oxide (InO 3) and indium oxide tin oxide alloy (In2O3-SnO2, abbreviated as ITO). It is formed by sputtering or vacuum deposition. Etching of such materials is done with hydrochloric acid. However, since ITO etching is particularly prone to leaving residues, Indium oxide zinc oxide alloy (In2O3-ZnO) was used to improve the workability of the alloy. It's okay to be there.

[0099] Next, a sixth photolithography step is performed to form a resist mask, and then etching is performed. The pixel electrode layer 128 is formed by removing unnecessary portions.

[0100] In this sixth photolithography step, the gate insulating film 102 and the protective insulating layer The capacitor wiring 123 and the pixel electrode layer 128 form a storage capacitor in the capacitor section, with the dielectric 109. will be done.

[0101] In the sixth photolithography step, the first terminal and the second terminal are resist-etched. The transparent conductive film 127 is covered with a mask to leave the transparent conductive film 127 and 129 formed on the terminal portion. , 129 are electrodes or wiring used for connection with the FPC. The transparent conductive film 129 formed on the connected connection electrode 120 serves as the input terminal of the gate wiring. The transparent conductive film 12 formed on the second terminal 122 serves as a terminal electrode for connection. Reference numeral 7 denotes a terminal electrode for connection that functions as an input terminal for a signal line.

[0102] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG. The top view at this stage corresponds to Figure 7.

[0103] 8(A1) and 8(A2) are a cross-sectional view and a top view of the gate wiring terminal portion at this stage. 8(A1) is a cross section taken along the line C1-C2 in FIG. 8(A2). 8A. In FIG. 8A, a transparent conductive film 15 is formed on a protective insulating film 154. 5 is a terminal electrode for connection that functions as an input terminal. In the terminal section, a first terminal 151 made of the same material as the gate wiring and a second terminal 152 made of the same material as the signal line are provided. The connection electrode 153 formed by the above-mentioned method is overlapped and directly contacted with the gate insulating film 152 through the opening. In addition, a connection electrode 153 and a transparent conductive film 155 are provided on a protective insulating film 154. The electrodes are directly connected to each other through contact holes to provide electrical continuity.

[0104] 8(B1) and 8(B2) are a cross-sectional view and a top view of the signal line terminal portion, respectively. FIG. 8(B1) corresponds to a cross-sectional view taken along the line D1-D2 in FIG. 8(B2). In FIG. 8(B1), the transparent conductive film 155 formed on the protective insulating film 154 is It is a terminal electrode for connection that functions as an input terminal. In this example, the electrode 156 made of the same material as the gate wiring is electrically connected to the signal line. The electrode 156 overlaps the second terminal 150 via the gate insulating film 152. 50, and the electrode 156 is at a different potential than the second terminal 150, e.g. If you set it to floating, GND, 0V, etc., you can reduce capacitance or static electricity for noise prevention. In addition, the second terminal 150 is formed on the protective insulating film 15 4, and is electrically connected to the transparent conductive film 155.

[0105] A plurality of gate wirings, signal lines, and capacitance wirings are provided depending on the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, and a second terminal has the same potential as the signal line. , a third terminal at the same potential as the capacitance wiring, and the like are arranged in a row. The number of each of these may be set arbitrarily, and the implementer may decide as appropriate.

[0106] In this way, six photolithography processes were performed using six photomasks to create the bottom A pixel thin film transistor 141 is a gate-type n-channel thin film transistor. The thin film transistor part and the storage capacitor can be completed. Then, the pixel thin film transistor The pixel section is configured by arranging the storage capacitors in a matrix corresponding to each pixel. It can also be used as one of the substrates for manufacturing an active matrix display device. For convenience, this type of substrate is referred to as an active matrix substrate in this specification.

[0107] When manufacturing an active matrix liquid crystal display device, an active matrix substrate a liquid crystal layer is provided between the active matrix substrate and an opposing substrate on which an opposing electrode is provided; The common electrode is electrically connected to the counter electrode provided on the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for connecting the

[0108] In addition, this embodiment is not limited to the pixel configuration of FIG. 7, and an example of a top view different from that of FIG. 7 is shown in FIG. In FIG. 9, no capacitance wiring is provided, and the pixel electrode is connected to the gate wiring of the adjacent pixel and the protective insulating film. and a gate insulating film are interposed between them to form a storage capacitor. In this case, the capacitor wiring and The third terminal connected to the capacitance wiring can be omitted. The same parts will be described using the same reference numerals.

[0109] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0110] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0111] Also, the vertical synchronization frequency should be increased by 1.5 times, preferably by more than 2 times to improve the video characteristics. A driving technique called double speed driving may be used.

[0112] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. Therefore, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of the LEDs to be turned off. This is especially useful when displaying images with a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0113] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. This can be improved over conventional liquid crystal display devices.

[0114] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of the organic light-emitting element is In order to set the low power supply potential, for example, GND or 0V, the cathode is connected to the terminal. A fourth terminal is provided for setting the voltage level, for example, GND, 0V, etc. When manufacturing a device, a power supply line is provided in addition to a signal line and a gate line. The terminal section is provided with a fifth terminal that is electrically connected to a power supply line.

[0115] With the above-described structure, the end portions of the source electrode layer and the drain electrode layer and the Carriers can move smoothly through the semiconductor layer that covers at least a part of the step. The contact area between the source electrode layer and the drain electrode layer and the semiconductor layer including the region where the channel is formed is Because it has a sufficient area, it is possible to not only reduce the contact resistance but also Variation in contact resistance is unlikely to occur. In addition, a thin film transistor having a small variation in the source electrode layer and the drain electrode can be provided. The wiring connected to the pole layer can be made thicker, which reduces the electrical resistance of the wiring.

[0116] In addition, the thin film transistor obtained in this embodiment has good characteristics, and therefore can be used in liquid crystal display devices. It can be used in the pixel portion and driver circuit portion of a liquid crystal display device or a light emitting display device. By combining it with a light-emitting display element, it is possible to provide a display device with excellent electrical properties and high reliability. .

[0117] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0118] (Embodiment 3) In this embodiment, a thin film transistor of a semiconductor device will be described. A pixel portion of a display device having a gate-type thin film transistor will be described.

[0119] 10A and 10B show a thin film transistor according to this embodiment. FIG. 10A is a top view, and FIG. 10(B) is a cross-sectional view taken along lines A1-A2 and B1-B2 in FIG. 10(A).

[0120] The thin film transistor 144 shown in FIGS. 10A and 10B has a source electrode layer on a substrate 100. and a first electrode layer 114a and a second electrode layer 114b which will become drain electrode layers are formed. A first wiring layer 115a is provided on the first electrode layer 114a, and a second wiring layer 115b is provided on the second electrode layer 114b. The second wiring layer 115b is provided, and the first electrode layer 114a and the second electrode layer 114b are respectively The first wiring layer 115a and the second wiring layer 115b extend outward from their ends. The semiconductor layer 113 is in contact with the side and top surfaces of the first electrode layer 114a and the second electrode layer 114b. Further, a gate insulating film 102 is formed on the semiconductor layer 113, and the gate insulating film 1 A gate electrode layer is formed by overlapping the ends of the first electrode layer 114a and the second electrode layer 114b with a gate electrode layer 114b interposed therebetween. 111 is formed.

[0121] The first electrode layer 114a and the second electrode layer 114b are the same as those described in the first and second embodiments. In this embodiment, a titanium film having a thickness of 20 nm is used as the lower conductor. The film is formed as an electrode layer and used as the first electrode layer 114a and the second electrode layer 114b.

[0122] The first wiring layer 115a and the second wiring layer 115b are also the same as those in the first and second embodiments. In this embodiment, a 150 nm thick aluminum film is used. is deposited as an upper conductive film and is used for the first wiring layer 115a and the second wiring layer 115b.

[0123] The semiconductor layer 113 is formed in the same manner as in Embodiments 1 and 2 using the semiconductor film described in the first and second embodiments. In this embodiment, an In-Ga-Zn-O-based oxide semiconductor having a thickness of 50 nm is used. The first electrode layer 114a and the second electrode layer 114b having a thickness of 20 nm are sufficiently thin and The step on the plate is small. The step is the thickness of the semiconductor layer 113 having a thickness of 50 nm. and the semiconductor layer 113 is located at the end of the first electrode layer 114a and the second electrode layer 114b. As a result, the semiconductor layer 113 that extends over the step portion can be covered satisfactorily. No structure that hinders the movement of the carrier is created.

[0124] The gate insulating film 102 is formed on the semiconductor layer 113, and the first electrode 114 is formed on the gate insulating film 102. The gate electrode layer 111 formed to overlap the ends of the first electrode layer 114a and the second electrode layer 114b is The respective materials described in Embodiment Modes 1 and 2 are used to form the insulating film 10 in the same manner.

[0125] With the above-described structure, the edge portions of the source electrode layer and the drain electrode layer and the step portions formed at the edge portions are Carriers can move smoothly through the semiconductor layer that covers at least a part of the source. The contact area between the electrode layer and the drain electrode layer and the semiconductor layer including the region where the channel is formed is sufficiently large. Because it has a large area, it is possible to not only reduce the contact resistance, but also Therefore, the characteristics caused by the variation in contact resistance are less likely to occur. A thin film transistor with little variation can be provided. Since the wiring connected to the layer can be made thicker, the electrical resistance of the wiring can be reduced. The structure shown in the above embodiment may be used in appropriate combination with structures exemplified in other embodiments. It shall be so decided.

[0126] (Fourth embodiment) In this embodiment, an inverter circuit using two thin film transistors described in the first embodiment is used. Explain about the road.

[0127] The driver circuit for driving the pixel section is composed of an inverter circuit, a capacitor, a resistor, etc. When two n-channel TFTs are combined to form an inverter circuit, When forming a combination of a ment type transistor and a depletion type transistor ( EDMOS circuit) and enhancement-type TFTs (hereinafter referred to as In addition, when the threshold voltage of the n-channel TFT is positive, is defined as an enhancement type transistor, and the threshold voltage of the n-channel TFT is negative. In this case, the transistor is defined as a depletion-type transistor, and this definition is followed throughout the specification. Let's say.

[0128] The pixel section and the driver circuit are formed on the same substrate, and the pixel section is arranged in a matrix. Enhancement-type transistors are used to switch the voltage applied to the pixel electrode on and off In this embodiment, the enhancement type transistor arranged in the pixel portion is Carriers can move smoothly even in stepped portions on the source electrode layer and the drain electrode layer. A semiconductor layer having a structure is formed, and a source electrode layer, a drain electrode layer, and a channel Since the contact region of the semiconductor layer including the region where the contact resistance is formed has a sufficient area, Not only can the contact resistance be reduced, but the contact resistance is also less likely to vary. This allows us to provide thin-film transistors with little variation in characteristics caused by variations in contact resistance. In addition, since the wirings connected to the source electrode layer and the drain electrode layer can be thickened, This reduces the electrical resistance of the device, allowing it to be driven with low power consumption.

[0129] The equivalent circuit of the EDMOS circuit is shown in Figure 11(A). The circuit connection corresponds to FIG. 11(A), and the first thin film transistor 430a is connected to the enhancement The second thin film transistor 430b is a depletion type n-channel transistor. This is an example of an n-channel transistor.

[0130] Enhancement type n-channel transistor and depletion type n-channel transistor are mounted on the same substrate. The method for fabricating the first and second semiconductor layers 403a and 403b is, for example, The conductor layer 403b is fabricated using different materials and under different film forming conditions. An oxide semiconductor is used, and gate electrodes are provided above and below the oxide semiconductor layer to control the threshold voltage. Apply a voltage to the gate electrode of one TFT so that it is normally on, and The EDMOS circuit may be configured so that the transistor is normally off.

[0131] In addition to the EDMOS circuit, the first thin film transistor 430a and the second thin film transistor By using an enhancement type n-channel transistor as the transistor 430b, E An EMOS circuit can also be fabricated. In that case, the second electrode layer 404b and the second wiring layer 4 Instead of connecting the second gate electrode layer 401b to the third electrode layer 404c and the third gate electrode layer 405b, The wiring layer 405c and the second gate electrode layer 401b are connected to each other.

[0132] A top view of the inverter circuit of the drive circuit is shown in FIG. The cross section taken along 1-Z2 corresponds to FIG. 11(C). The first thin film transistor 430a and the second thin film transistor 430b are inverted staggered thin film transistors according to one embodiment of the present invention. It is a thin film transistor.

[0133] The first thin film transistor 430a shown in FIG. 11C has a first gate electrode on the substrate 400. A first electrode layer 401a is provided, and a gate insulating film 402 is provided on the first gate electrode layer 401a. A first electrode layer 404a serving as a source electrode layer and a drain electrode layer is formed on the gate insulating film 402. A first wiring layer 405 is formed on the first electrode layer 404a. a is provided on the second electrode layer 404b, a second wiring layer 405b is provided on the second electrode layer 404b, and a first electrode layer 4 The first and second electrode layers 404a and 404b are connected to the ends of the first and second wiring layers 405a and 405b, respectively. The semiconductor layer 403a extends outward from the first electrode layer 404a and the second electrode layer 404b. It is formed so as to contact the side and top surfaces of 4b.

[0134] Similarly, the second thin film transistor 430b also has a second gate electrode layer 401 formed on the substrate 400. a gate insulating film 402 is provided on the second gate electrode layer 401b; On the insulating film 402, a second electrode layer 404b and a third electrode layer 404c are formed to be source and drain electrode layers. A second wiring layer 405b is provided on the second electrode layer 404b. A third wiring layer 405c is provided on the third electrode layer 404c, and the second electrode layer 404b and The third electrode layer 404c extends from the ends of the second wiring layer 405b and the third wiring layer 405c. The second semiconductor layer 403b extends to the second electrode layer 404b and the third electrode layer 404c. The casing is formed so as to contact the side and top surfaces of the casing.

[0135] Here, the second electrode layer 404b is formed through a contact hole 406 formed in the gate insulating film 402. The first semiconductor layer 403a and the second gate electrode layer 401b are directly connected to each other through the first semiconductor layer 403a and the second gate electrode layer 401b. At least a part of the semiconductor layer 403b is provided in contact with the upper surface of the gate insulating film 402. For the structure and materials of each part, please refer to the thin film transistor in the second embodiment.

[0136] The first wiring layer 405a is a power supply line of the ground potential (ground power supply line). The third wiring layer 405c may be a power supply line (negative power supply line) to which a negative voltage VDL is applied. is a power supply line (positive power supply line) to which a positive voltage VDD is applied.

[0137] As shown in FIG. 11C, both the first semiconductor layer 403a and the second semiconductor layer 403b The second electrode layer 404b is electrically connected to the gate insulating film 402. The second gate of the second thin film transistor 430b is connected to the second gate of the second thin film transistor 430b through the formed contact hole 406. The second electrode layer 404b and the second gate electrode layer 401b are directly connected to each other. By directly connecting the two, the resistance is improved compared to connecting via another conductive film, for example, a transparent conductive film. The number of contact holes is reduced, and the connection resistance is reduced. Since the thickness can be reduced, the area occupied by the contact holes can be reduced.

[0138] With the above-described structure, the edge portions of the source electrode layer and the drain electrode layer and the step portions formed at the edge portions are Carriers can move smoothly through the semiconductor layer that covers at least a part of the source electrode. The contact area between the semiconductor layer including the region where the channel is formed and the drain electrode layer is sufficient. Because it has a large area, not only can the contact resistance be reduced, but also the variation Therefore, the thin film has little variation in characteristics caused by variations in contact resistance. In addition, a transistor can be provided by forming wirings connected to a source electrode layer and a drain electrode layer thick. This reduces the electrical resistance of the wiring.

[0139] An inverter circuit using two thin film transistors with such a configuration is highly reliable. , and can be driven with low power consumption.

[0140] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0141] (Embodiment 5) In this embodiment, in a display device which is an example of a semiconductor device, at least An example of manufacturing a part of a driver circuit and a thin film transistor disposed in a pixel portion is shown in FIGS. This will be explained below with reference to FIG.

[0142] In this embodiment, an In-Ga-Zn-O oxide is used for the semiconductor layer, and in other embodiments, Similarly to the method exemplified in the embodiment, a thin film transistor is formed on the same substrate as at least a part of the driving circuit. Among the driving circuits, a part of the driving circuit that can be configured with n-channel TFTs is It is assumed that the thin film transistor of the pixel portion is formed on the same substrate.

[0143] FIG. 1 shows an example of a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device. 12(A). The display device shown in FIG. 12(A) is a display device having a display element on a substrate 5300. A pixel portion 5301 having a plurality of pixels, a scanning line driver circuit 5302 for selecting each pixel, and a scanning line driver circuit 5303 for selecting each pixel. and a signal line driver circuit 5303 for controlling input of a video signal to the pixel.

[0144] The pixel portion 5301 is a signal line driver circuit 5303. The signal line driver circuit 5303 is arranged to extend in the column direction. The signal line driving circuit 5303 is connected to the scanning line driving circuit 5304 by lines S1 to Sm (not shown). Scanning is performed by a plurality of scanning lines G1 to Gn (not shown) arranged extending in the row direction from 302. The signal lines S1 to Sm and the scanning lines G1 to Gn are connected to a line driver circuit 5302. The pixel array has a plurality of pixels (not shown) arranged in a trix pattern. Each pixel is connected to a signal line S j (any one of the signal lines S1 to Sm), a scanning line Gi (any one of the scanning lines G1 to Gn), It is connected to the

[0145] In addition, the signal line configured by the n-channel TFT exemplified in the first to third embodiments The driving circuit will be described with reference to FIG.

[0146] The signal line driver circuit shown in FIG. 13 includes a driver IC 5601 and a group of switches 5602_1 to 5602_56. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes: A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0147] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are connected to the first wiring 5611, the second wiring 5612, and the third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor Three signal lines (signal line Sm-2, signal line Sm-1, signal line S m (m=3M)). For example, the J-th row wiring 5621_J (wiring 5621_1 Any one of the wirings 5621_M is connected to the first thin film of the switch group 5602_J. A transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor Connected to signal line Sj-2, signal line Sj-1, and signal line Sj (j=3J) via terminal 5603c. To be continued.

[0148] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0149] It is desirable that the driver IC 5601 be formed using a single crystal semiconductor. Furthermore, the switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_56 It is recommended to connect it to the 02_M via an FPC or the like. Alternatively, it can be attached to the same substrate as the pixel section. A single crystal semiconductor layer may be formed by, for example, forming the driver IC 5601.

[0150] Next, the operation of the signal line driver circuit shown in FIG. 13 will be described with reference to the timing chart of FIG. The timing chart in FIG. 14 will be explained with reference to the timing chart when the i-th scanning line Gi is selected. Furthermore, the timing chart shows the selection period of the i-th scanning line Gi. is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driving circuit of FIG. In this case, the same operation as in FIG. 14 is performed.

[0151] In the timing chart of FIG. 14, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-2, signal line Sj-1, and signal line Sj via 3c It shows.

[0152] In the timing chart of FIG. 14, the timing at which the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the J-th row wiring 5621_J. Signal 5721_J is shown.

[0153] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-2 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj-1, and is output to the wiring 56 during the third sub-selection period T3. The video signal input to the first sub-selection period 21_J is input to the signal line Sj. During the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-2, Data_j-1, and Data_ Let's call it j.

[0154] As shown in FIG. 14, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-2 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-2 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a The third thin film transistor 5603c is turned off. The signal Data_j-1 is transmitted to the signal line Sj-1 via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on. The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j input to the wiring 5621_J is input to the third thin film transistor It is input to the signal line Sj via 5603c.

[0155] From the above, the signal line driver circuit in FIG. 13 can achieve the following by dividing one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the display is mounted and the substrate on which the pixel section is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one-third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0156] As shown in Figure 13, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, there are no limitations on the arrangement, number, driving method, etc. of the thin film transistors.

[0157] For example, three or more signal lines are connected to one wiring in each of three or more sub-selection periods. When a video signal is input to each, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or Preferably, it is divided into three sub-selection periods.

[0158] As another example, as shown in the timing chart of FIG. 15, one gate selection period is pre-selected. Charge period Tp, first sub-selection period T1, second sub-selection period T2, third sub-selection period T3 15, the scanning line G The timing when i is selected, the timing when the first thin film transistor 5603a is turned on and off, timing 5803a, on / off timing 5803b of the second thin film transistor 5603b , the on / off timing 5803c of the third thin film transistor 5603c and the 15, a signal 5821_J is input to a wiring 5621_J. During the recharge period Tp, the first thin film transistor 5603a and the second thin film transistor The third thin film transistor 5603b and the third thin film transistor 5603c are turned on. The precharge voltage Vp input to the first thin film transistor 5603a and the second thin film transistor 5603b is The signals are output through the thin film transistor 5603b and the third thin film transistor 5603c. In the first sub-selection period T1, the signal is input to the signal line Sj-2, the signal line Sj-1, and the signal line Sj. The first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and The third thin film transistor 5603c is turned off. Data_j-2 is input to the signal line Sj-2 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on. , the first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j-1 input to the wiring 5621_J is During the third sub-selection period T3, the third The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. The thin film transistor 5603b is turned off. At this time, the Da The signal ta_j is input to the signal line Sj via the third thin film transistor 5603c.

[0159] From the above, the signal line driver circuit of FIG. 13 to which the timing chart of FIG. 15 is applied By providing a precharge period before the block selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. 14 are denoted by the same reference numerals, and the same parts or parts having similar functions are shown. A detailed description of the relevant parts will be omitted.

[0160] The configuration of the scanning line driving circuit will be described. The scanning line driving circuit includes a shift register, a buffer, and a In some cases, a level shifter may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP) are input to the shift register. ) is input, the selection signal is generated. The generated selection signal is The signal is buffered and amplified in the scanning line and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be able to pass a large current. It is used.

[0161] One form of a shift register used as part of a scanning line driving circuit is shown in FIGS. 16 and 17. I will explain.

[0162] The circuit configuration of the shift register is shown in Figure 16. The shift register shown in Figure 16 is a flip-flop. It consists of multiple flip-flops 5701_1 to 5701_n. A first clock signal, a second clock signal, a start pulse signal, and a reset signal are input. It works as it is.

[0163] The connection relationship of the shift register in Figure 16 will be explained. 1_1 is a first wiring 5711, a second wiring 5712, a fourth wiring 5714, a fifth wiring 5715, the seventh wiring 5717_1, and the seventh wiring 5717_2. The flip-flop 5701_2 in the second stage is connected to a third wiring 5713, a fourth wiring 5714, The fifth wiring 5715, the seventh wiring 5717_1, the seventh wiring 5717_2, and the seventh wiring Connected to 5717_3.

[0164] Similarly, the flip-flop 5701_i in the i-th stage (flip-flops 5701_1 to 57 01_n) is either the second wiring 5712 or the third wiring 5713, The fourth wiring 5714, the fifth wiring 5715, the seventh wiring 5717_i-1, the seventh wiring 57 17_i and the seventh wiring 5717_i+1. Here, if i is an odd number, The flip-flop 5701_i in the i-th stage is connected to the second wiring 5712, and when i is an even number, In some cases, the flip-flop 5701_i in the i-th stage is connected to the third wiring 5713. This will be the case.

[0165] The n-th flip-flop 5701_n is connected to the second wiring 5712 or the third wiring 5713. 713, a fourth wiring 5714, a fifth wiring 5715, and a seventh wiring 5717_n-1 , the seventh wiring 5717_n, and the sixth wiring 5716.

[0166] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the This may also be called the power line 2.

[0167] Next, the flip-flop shown in FIG. 16 will be described in detail with reference to FIG. 17. The flip-flop shown in FIG. 5 includes a first thin film transistor 5571, a second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor 5574, a fifth Thin film transistor 5575, sixth thin film transistor 5576, seventh thin film transistor The first thin film transistor 5577 and the eighth thin film transistor 5578 are also included. 5571, a second thin film transistor 5572, a third thin film transistor 5573, a fourth Thin film transistor 5574, fifth thin film transistor 5575, sixth thin film transistor 5576, the seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n It is a channel type transistor, and the gate-source voltage (Vgs) is the threshold voltage (Vt h), the conduction state is established.

[0168] The flip-flop shown in FIG. 17 includes a first wiring 5501, a second wiring 5502, a third wiring 5503, a fourth wiring 5504, a fourth wiring 5505, a fifth wiring 5506, a sixth wiring 5507, a sixth wiring 5508, a sixth wiring 5509, a sixth wiring 5501, a sixth wiring 5502, a sixth wiring 5503, a sixth wiring 550 A third wiring 5503, a fourth wiring 5504, a fifth wiring 5505, and a sixth wiring 5506 It has.

[0169] In this embodiment, all the thin film transistors are enhancement type n-channel transistors. However, there is no particular limitation thereto. For example, a depletion type n-channel transistor is used. The driver circuit can also be driven by a transistor.

[0170] Next, the connection configuration of the flip-flop shown in FIG. 17 will be described below.

[0171] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to a The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0172] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506, and A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0173] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0174] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506, and The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0175] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0176] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0177] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. will be done.

[0178] A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506, and The second electrode of the thin film transistor 5578 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 5501. will be done.

[0179] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5573, and the gate electrode of the third thin film transistor 5574 are connected to the gate electrode of the second thin film transistor 5575. a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0180] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It can also be called a line.

[0181] In the flip-flop 5701_i in the i-th stage, the first wiring 5501 in FIG. 16 is connected to the seventh wiring 5717_i-1. Also, the second wiring 550 in FIG. 2 is connected to the seventh wiring 5717_i+1 in FIG. 16. Also, the third wiring The line 5503 and the seventh wiring 5717_i are connected. 506 and a fifth wiring 5715 are connected.

[0182] When i is an odd number, the fourth wiring 5504 in FIG. 17 is connected to the second wiring 5712 in FIG. When i is an even number, it is connected to the third wiring 5713 in FIG. 16. The fifth wiring 5505 and the fourth wiring 5714 in FIG. 16 are connected.

[0183] However, in the first stage flip-flop 5701_1, the first wiring 550 in FIG. 16. The n-th flip-flop 57 17 is connected to the sixth wiring 5716 in FIG. 16. To be continued.

[0184] The signal line driver circuit and the scanning line driver circuit are the same as those exemplified in the first to third embodiments. It is also possible to manufacture the device using only n-channel TFTs. The n-channel TFT shown as an example has a high transistor mobility, so the driving frequency of the driving circuit It is possible to increase the wave number. The channel type TFT has a source region or a drain region that is an In-Ga-Zn-O based non-single crystal film. The parasitic capacitance is reduced by the frequency range, resulting in high frequency characteristics (called f characteristics). A scanning line driving circuit using an n-channel TFT as exemplified in any of the first to third embodiments. Since it can be operated at high speed, it is possible to increase the frame frequency or It is possible to realize face insertion etc.

[0185] Furthermore, the channel width of the transistor of the scanning line driving circuit can be increased, and multiple scanning lines can be formed. By arranging the drive circuit, it is possible to achieve an even higher frame frequency. When multiple scanning line driving circuits are arranged, the scanning line driving circuits for driving the even-numbered scanning lines are The circuit for driving the odd-numbered scanning lines is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the other side. By placing multiple If signals are output to the same scanning line by the scanning line driving circuit, it is advantageous for increasing the size of the display device. do.

[0186] In addition, when an active matrix light-emitting display device, which is an example of a semiconductor device, is manufactured, At least one pixel is provided with a plurality of thin film transistors, so that multiple scanning line driving circuits are required. An example of a block diagram of an active matrix light emitting display device is shown in FIG. 2(B).

[0187] The light-emitting display device shown in FIG. 12B has a plurality of pixels each having a display element over a substrate 5400. a pixel portion 5401 for selecting each pixel, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. circuit 5404 and a signal line driver circuit 540 for controlling the input of a video signal to a selected pixel. 3 and has.

[0188] When a video signal input to a pixel of the light-emitting display device shown in FIG. 12(B) is in a digital format, When a pixel is turned on, it emits light or does not emit light by switching the transistor on or off. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by moving the pixel. This is a driving method that displays gradation by controlling the period during which the light is turned on.

[0189] Light-emitting elements have a higher response speed than liquid crystal elements, making them more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, in accordance with the video signal, the light emitting element of the pixel is By dividing the period into multiple subframes, The total length of the period during which pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0190] In the light-emitting display device shown in FIG. 12B, two switching TFTs are provided for one pixel. When the first scanning line is connected to the gate of one of the switching TFTs, The signal to be output is generated by the first scanning line driver circuit 5402, and the gate of the other switching TFT is A signal input to the second scanning line, which is a wiring, is generated by a second scanning line driver circuit 5404. In this example, the signal input to the first scanning line and the signal input to the second scanning line are Alternatively, for example, one pixel may be generated by one scanning line driving circuit. The number of switching TFTs used to control the operation of the switching element is determined by the number of switching TFTs that the In this case, a plurality of scanning lines may be provided for each pixel. All input signals may be generated by one scanning line driving circuit, or by a plurality of scanning line driving circuits. It may be generated by a circuit.

[0191] In addition, in the light-emitting display device, the driver circuit may be configured with an n-channel TFT. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit are not limited to those shown in the first to third embodiments. It is also possible to fabricate the device using only n-channel TFTs.

[0192] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in It may also be used in electronic paper, which uses electrically connected elements to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display) and has the same properties as paper. It is easy to read, consumes less power than other display devices, and can be made thinner and lighter. It has advantages.

[0193] Electrophoretic displays can be considered to have various forms. A microphone containing first particles with a positive charge and second particles with a negative charge. A plurality of microcapsules are dispersed in a solvent or solute, and the electrophoretic display By applying an electric field to the capsules, the particles in the microcapsules are oriented in opposite directions. The color of the particles that are moved and gathered on one side is displayed. The second particles contain a dye and do not move in the absence of an electric field. The color of the first particle and the color of the second particle are different (including colorless).

[0194] Thus, electrophoretic displays allow materials with high dielectric constants to migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. Since it does not require the polarizing plates that display devices require, its thickness and weight are reduced by half.

[0195] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0196] Furthermore, the microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be performed by applying an electric field to the cell. The active matrix substrate obtained by the thin film transistor can be formed in the same manner as the method. It can be used.

[0197] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from magnetochromic materials, magnetophoretic materials, or a composite material thereof Just use it.

[0198] The display device exemplified in this embodiment is equipped with a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high-speed operation.

[0199] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0200] (Embodiment 6) The thin film transistors exemplified in the first to third embodiments are fabricated, and the thin film transistors By using the transistor in the pixel portion and further in the driver circuit, a semiconductor device having a display function (also called a display device) can be manufactured. In addition, the thin films exemplified in the first to third embodiments can be fabricated. A part or the whole of a driver circuit using a transistor is formed on the same substrate as the pixel portion, A system on panel can be formed.

[0201] The display device includes a display element. The display element includes a liquid crystal element (also called a liquid crystal display element), a light-emitting element, A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by the light emitted from the light source, specifically inorganic EL (Electroluminescent) luminescence elements, organic EL elements, etc. Also, electronic ink A display medium whose contrast changes due to an electrical effect can also be applied.

[0202] The display device also includes a panel in which a display element is sealed, and a controller for the panel. Furthermore, one aspect of the present invention is a module in which an IC or the like including the above-mentioned is mounted. In the process of manufacturing a display device, the element substrate corresponds to one form before the display element is completed. The element substrate includes a means for supplying a current to each of the plurality of pixels. Specifically, the substrate may be in a state where only pixel electrodes of the display element are formed, or After forming the conductive film that will become the electrode, but before etching to form the pixel electrode It's fine, and all forms apply.

[0203] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. It also refers to connectors, such as FPC (Flexible Printed Circuit) integrated circuit) or TAB (Tape Automated Bon ding) tape or TCP (Tape Carrier Package) Modules with printed wiring boards attached to the end of TAB tape or TCP or the display element is mounted on an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which the display device (circuit) is directly mounted.

[0204] In this embodiment mode, the appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device, will be described. 18. FIG. 18 shows another embodiment of a semiconductor device formed on a first substrate 4001. Reliability of the oxide semiconductor layer containing the In-Ga-Zn-O non-single crystal film exemplified in the form The thin film transistors 4010 and 4011 with high resistance and the liquid crystal element 4013 are mounted on the second substrate 40. 18(B) is a top view of the panel sealed with a sealant 4005 between the panel and the substrate 106. corresponds to the cross section at MN in Figures 18(A1) and 18(A2).

[0205] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driving circuit 4004 is a circuit that connects the liquid crystal layer 4001 and the liquid crystal layer 4006 together. 4008. Also, the first substrate 4001 is surrounded by a sealing material 4005. A single crystal semiconductor film or a polycrystalline semiconductor film is formed on a separately prepared substrate in a region different from the region where the semiconductor layer is formed. A signal line driver circuit 4003 formed of a conductive film is mounted.

[0206] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, Wire bonding or TAB method can be used. is an example of mounting a signal line driver circuit 4003 by the COG method, and FIG. 18(A2) is This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0207] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 18B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 Insulating layers 4020 and 4022 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0208] The thin film transistors 4010 and 4011 are made of an In-Ga-Zn-O based non-single crystal film as an oxide semiconductor. The thin film transistors exemplified in other embodiments are applied, which have high reliability and include a conductor layer. In this embodiment, the thin film transistors 4010 and 4011 are n-channel thin film transistors. It is a panel-type thin film transistor.

[0209] The pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. The pixel electrode layer 4030, the counter electrode layer 4031, and the liquid crystal layer 4008 are The overlapping portion corresponds to the liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0210] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Aluminum foil can also be used with PVF film or polyester film. A sheet sandwiched between films can also be used.

[0211] 4035 is a columnar spacer obtained by selectively etching the insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the opposing electrode layer 40 via conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 40 to the common potential line. Included in 05.

[0212] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, the liquid crystal layer 4008 is formed using a liquid crystal composition containing 5% by weight or more of a chiral agent. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 10 μs It is short (approximately 100 μs), has optical isotropy so alignment treatment is not required, and has little viewing angle dependency. Sai.

[0213] Note that this embodiment mode is an example of a transmissive liquid crystal display device, but one embodiment of the present invention is a reflective liquid crystal display device. The present invention can be applied to both a liquid crystal display device and a semi-transmissive liquid crystal display device.

[0214] In the liquid crystal display device of this embodiment, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a polarizing plate is provided on the inner side. An example is shown in which a colored layer and an electrode layer used for a display element are provided in this order, but the polarizing plate is provided on the inner side of the substrate. The laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment. The coloring layer may be appropriately selected depending on the material and manufacturing process conditions of the coloring layer. A light-shielding film that functions as a light-shielding film may be provided.

[0215] In this embodiment, in order to reduce the surface unevenness of the thin film transistor, In order to improve the reliability of the thin film transistor, the thin film transistors exemplified in other embodiments may be protected. The insulating layer (insulating layer 4020, insulating layer 4021) functions as a film or a planarizing insulating film. The protective film is resistant to contamination from airborne organic matter, metals, water vapor, etc. The purpose of the protective film is to prevent the intrusion of impurities, and a dense film is preferable. Silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, oxide Aluminum film, aluminum nitride film, aluminum oxynitride film, or aluminum oxynitride film In this embodiment, the protective film is formed by a sputtering method. However, there is no particular limitation and various methods may be used to form the film.

[0216] In this embodiment, an insulating layer 4020 having a stacked structure is formed as a protective film. In this case, a silicon oxide film is formed by sputtering as the first layer of the insulating layer 4020. When a silicon oxide film is used as the protective film, the silicon dioxide film used as the source electrode layer and the drain electrode layer can be It is effective in preventing hillocks on aluminum films.

[0217] In addition, a silicon nitride film is formed as a second layer of the insulating layer 4020 by sputtering. When a silicon nitride film is used as a protective film, mobile ions such as sodium invade the semiconductor region. This can prevent the electrical characteristics of the TFT from being changed by the introduction of other substances.

[0218] After forming the protective film, the oxide semiconductor layer was annealed (at 300°C to 400°C). That's fine.

[0219] An insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. In addition, by stacking a plurality of insulating films made of these materials, it is possible to obtain an insulating layer. 4021 may be formed.

[0220] Siloxane-based resin is a Si-OS compound formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, an organic group having a fluoro group may be used. That's fine.

[0221] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife When the insulating layer 4021 is formed using a material liquid, In the step of annealing, the oxide semiconductor layer may be annealed (at 300°C to 400°C). The baking process of the insulating layer 4021 and the annealing process of the oxide semiconductor layer are combined to efficiently bake the semiconductor. It is possible to create a body device.

[0222] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used.

[0223] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / square or less at a wavelength of 550 nm. The light transmittance is preferably 70% or more. It is preferable that the resistivity of the film is 0.1 Ω·cm or less.

[0224] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0225] A signal line driver circuit 4003, a scanning line driver circuit 4004, and a pixel section 40 Various signals and potentials applied to O2 are supplied from FPC4018.

[0226] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the same conductive film as the thin film transistors 4010 and 40 The source electrode layer and the drain electrode layer 11 are formed of the same conductive film.

[0227] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0228] In FIG. 18, a signal line driver circuit 4003 is formed separately and mounted on a first substrate 4001. However, this embodiment is not limited to this configuration. Alternatively, a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Alternatively, the circuit board may be formed separately and mounted.

[0229] FIG. 19 shows a semiconductor device using a TFT substrate 2600 manufactured according to one embodiment of the present invention. 1 shows an example of a liquid crystal display module.

[0230] FIG. 19 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate is fixed by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate and the bonding material 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is necessary for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. The wiring board 2609 is connected to the wiring circuit section 2608 of the TFT substrate 2600, and the controller It also incorporates external circuits such as a polarizing plate and a power supply circuit. The layers may be laminated with a retardation film interposed therebetween.

[0231] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-Plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) Switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0232] The liquid crystal display panel exemplified in this embodiment includes a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high speed operation.

[0233] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0234] (Embodiment 7) In this embodiment, a semiconductor device to which a thin film transistor exemplified in any of the other embodiments is applied is An example of electronic paper is shown below.

[0235] Figure 20 shows an active matrix electronic paper as an example of a semiconductor device. The thin film transistor 581 used in the device may be any of the thin film transistors exemplified in other embodiments. A transistor can be applied.

[0236] The electronic paper in Figure 20 is an example of a display device that uses the twisting ball display method. The spherical display method is an electrode layer that uses spherical particles painted in black and white as display elements. A potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles by generating a liquid crystal.

[0237] The thin film transistor 581 disposed between the substrate 580 and the substrate 596 has a top gate structure. The first electrode layer 58 is a thin film transistor having a source electrode layer or a drain electrode layer. 7 and are electrically connected to each other through openings formed in the insulating layers 583, 584, and 585. Between the first electrode layer 587 and the second electrode layer 588, there are a black area 590a and a white area 590b. 90b, and a spherical particle 589 containing a cavity 594 filled with liquid therearound. The spherical particles 589 are surrounded by a filler 595 such as resin (see FIG. 20). In this embodiment, the first electrode layer 587 corresponds to a pixel electrode, and the second electrode layer The second electrode layer 588 corresponds to a common electrode. It is electrically connected to a common potential line provided on one substrate. Using one of the common connection parts, a second electrode is connected via conductive particles disposed between the pair of substrates. The pole layer 588 can be electrically connected to a common potential line.

[0238] Also, instead of the twist ball, an electrophoretic element can be used. and a diameter of 10 μm to 20 μm that contains positively charged white particles and negatively charged black particles. Microcapsules of about 0 μm in size are used. When an electric field is applied by the first and second electrode layers, the microcapsules turn white. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is an electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display unit, the image that has been displayed can be retained. Therefore, the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0239] The electronic paper exemplified in this embodiment is equipped with a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high speed operation.

[0240] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0241] (Embodiment 8) In this embodiment, a semiconductor device to which a thin film transistor exemplified in any of the other embodiments is applied is As a display element of the display device, in this embodiment mode, This is shown using a light-emitting element that uses electroluminescence. Light-emitting devices that utilize these materials are classified according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter an inorganic EL element.

[0242] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0243] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this embodiment, organic EL elements are used as light-emitting elements. I will explain.

[0244] FIG. 21 shows an example of a semiconductor device to which digital time gray scale driving is applied. FIG. 1 shows an example of a possible pixel configuration.

[0245] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. In this embodiment, the oxide semiconductor layer (In—Ga— Zn-O based non-single crystal film) in the channel formation region. An example of using two for one pixel is shown below.

[0246] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate, and the connection portion is used as a common connection portion, The structure shown in FIG. 1(A), FIG. 2(A), or FIG. 3(A) may be used.

[0247] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0248] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0249] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0250] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 21 can be used.

[0251] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0252] Note that the pixel configuration shown in Fig. 21 is not limited to this. For example, A switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added.

[0253] Next, the structure of the light-emitting element will be described with reference to FIG. The cross-sectional structure of a pixel will be described using an example in which FT is n-type. The driving TFTs 7001, 7011, and 7021 used in the semiconductor device of (C) are It can be fabricated in the same manner as the thin film transistors exemplified in the first to third embodiments, and is an In-Ga-Zn-O system The thin film transistor has high reliability and includes a non-single-crystal film as an oxide semiconductor layer.

[0254] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. The surface of the substrate and the substrate are different. There are light emitting devices with a double-sided emission structure in which light is emitted from the opposite surface. The present invention can also be applied to a light emitting element with an injection structure.

[0255] A light emitting element with a top emission structure will be described with reference to FIG.

[0256] In FIG. 22(A), the driving TFT 7001 is n-type, and the light emitted from the light emitting element 7002 is The cross section of the pixel when light is transmitted to the anode 7005 side (the side opposite to the substrate) with respect to the light-emitting layer 7004. 22A shows a cross-sectional view of a cathode 7003 of a light-emitting element 7002 and a driving TFT 700. 1 are electrically connected, and a light-emitting layer 7004 and an anode 7005 are stacked in this order on a cathode 7003. The cathode 7003 is made of a conductive material that has a low work function and reflects light. For example, Ca, Al, MgAg, AlLi, etc. are desirable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers stacked. When it is made up of multiple layers, the cathode 7003 An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are laminated on top of each other in this order. It is not necessary to provide all of these layers. The insulating layer is formed using a conductive material, such as indium oxide containing tungsten oxide, tungsten oxide, Indium zinc oxide containing titanium dioxide, indium oxide containing titanium dioxide, Indium tin oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc Conductive materials with transparency, such as indium tin oxide and silicon oxide, are used. It's okay to be there.

[0257] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 22(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as shown by the mark.

[0258] Next, a light emitting element with a bottom emission structure will be described with reference to FIG. 7011 is n-type, and the light emitted from the light emitting element 7012 is incident on the cathode 7013 side ( 22(B) shows a cross-sectional view of a pixel when light is emitted to the driving TFT 70. The cathode of the light-emitting element 7012 is formed on a light-transmitting conductive film 7017 electrically connected to the light-emitting element 7011. 7013 is formed, and a light-emitting layer 7014 and an anode 7015 are laminated in this order on the cathode 7013. In addition, when the anode 7015 is transparent, a light-reflecting layer is formed on the anode so as to cover the anode. Alternatively, a shielding film 7016 for shielding may be formed. As in the case of (A), various conductive materials with small work functions can be used. However, the film thickness should be such that light can pass through (preferably about 5 nm to 30 nm). For example, an aluminum film having a thickness of 20 nm is used as the cathode 7013. The light-emitting layer 7014 is composed of a single layer, as in FIG. The anode 7015 may be a single layer or a laminate of multiple layers. Although it is not necessary for the material to be transparent, it is formed using a conductive material having light-transmitting properties, as in FIG. 22(A). The shielding film 7016 can be made of, for example, a light-reflecting metal. However, the material is not limited to a metal film. For example, a resin containing a black pigment may be used. do.

[0259] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 22B, the light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0260] Next, a light emitting element with a dual emission structure will be described with reference to FIG. Then, on the conductive film 7027 having light-transmitting properties and electrically connected to the driving TFT 7021, A cathode 7023 of the light-emitting element 7022 is formed as a film. A light-emitting layer 7024 is formed on the cathode 7023. The cathode 7023 is laminated in the same manner as in FIG. Various conductive materials with small electrical conductivity can be used. For example, Al having a thickness of 20 nm is used as the cathode 7023. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 70 may be formed by laminating a plurality of layers. 25 is formed using a light-transmitting conductive material, similar to that shown in FIG. It is possible.

[0261] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 is the light-emitting element 70. In the case of the pixel shown in FIG. 22(C), the light emitted from the light emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as shown by the arrows.

[0262] In this embodiment, the organic EL element is described as the light-emitting element. It is also possible to provide an inorganic EL element.

[0263] In this embodiment, a thin film transistor (driving TFT) that controls driving of a light emitting element is Although an example in which the light emitting element is electrically connected has been shown, it is possible to prevent a current from flowing between the driving TFT and the light emitting element. A control TFT may be connected.

[0264] Note that the semiconductor device described in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0265] Next, a semiconductor device to which a thin film transistor exemplified in another embodiment is applied will be described. The appearance and cross section of the light-emitting display panel (also called the light-emitting panel) are shown in Figure 23. FIG. 23A shows a thin film transistor and a light emitting element formed on a first substrate. 1 is a top view of a panel sealed by a sealant between a first substrate and a second substrate; FIG. 23B corresponds to a cross-sectional view taken along line HI in FIG. 23A.

[0266] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. 3b and the scanning line driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealing material 4505, and a second substrate 4506. The light-emitting display panel is sealed together with the filler 4507 by the sealing material 4508. Highly airtight and low outgassing protective film (lamination film, UV It is preferable to package (enclose) the optical disc with a radiation-curable resin film or a cover material.

[0267] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 23B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45 shows an example of a thin film transistor 4509 included in a line driver circuit 4503a.

[0268] The thin film transistors 4509 and 4510 are made of In-Ga-Zn-O based non-single crystal films as oxide semiconductors. The thin film transistors exemplified in other embodiments are applied, which have high reliability and include a conductor layer. In this embodiment mode, the thin film transistors 4509 and 4510 are n-channel thin film transistors. It is a panel-type thin film transistor.

[0269] Further, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured by a first electrode layer 4517, an electroluminescent layer The second electrode layer 4512 and the second electrode layer 4513 are stacked in a stacked structure. The direction of the light emitting element 4511 is adjusted according to the direction of the light extracted from the light emitting element 4511. The configuration can be changed as appropriate.

[0270] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable to form the inclined surface so that the inclined surface has a continuous curvature.

[0271] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0272] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511. A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be formed of silicon nitride. It is possible to form a silicon nitride oxide film, a DLC film, etc.

[0273] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0274] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 The terminal electrode 4516 is formed from the same conductive film as the thin film transistors 4509 and 517. The source electrode layer and the drain electrode layer 510 are formed from the same conductive film.

[0275] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0276] The second substrate 4506 located in the direction of light extraction from the light emitting element 4511 must be light-transmitting. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0277] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. In this embodiment, filler 4507 Nitrogen is used as the

[0278] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light emitting surface of the light emitting element. ), retardation plates (λ / 4 plate, λ / 2 plate), color filters, and other optical films are provided as needed. Alternatively, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0279] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted. In this embodiment, the structure shown in FIG. Not limited.

[0280] The light-emitting display device exemplified in this embodiment includes a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high speed operation.

[0281] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0282] (Embodiment 9) The display device of one embodiment of the present invention can be used as electronic paper. It can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, and on trains and other vehicles. It can be used for in-car advertising, display on various cards such as credit cards, etc. Examples of child devices are shown in Figs. 24 and 25.

[0283] FIG. 24(A) shows a poster 2631 made of electronic paper. In the case of printed matter, the advertisements are exchanged manually. By using electronic paper, the display of advertisements can be changed in a short time. The poster is designed to be able to send and receive information wirelessly. It may also be possible to use the following.

[0284] FIG. 24(B) shows an advertisement 2632 inside a vehicle such as a train. When using printed paper, advertisements are exchanged manually, but with electronic paper, This allows you to change the display of your advertisements in a short time without requiring a lot of manpower. It is possible to obtain a stable image without any distortion. It may also be possible to use the following.

[0285] 25 shows an example of an electronic book 2700. For example, the electronic book 2700 includes: It consists of two housings, housing 2701 and housing 2703. The body 2703 is integrated with a shaft 2711, and the opening and closing movement is performed around the shaft 2711. This configuration allows the device to operate like a paper book. This becomes:

[0286] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 25) and An image can be displayed on the display unit 2707 in FIG.

[0287] 25 shows an example in which the housing 2701 is provided with an operation unit. 701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. It may also be configured to include a touch panel, a pointing device, etc. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have the function of an electronic dictionary. That's fine.

[0288] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0289] The display device exemplified in this embodiment is equipped with a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high-speed operation.

[0290] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used.

[0291] (Embodiment 10) A semiconductor device according to one embodiment of the present invention can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television (also called digital receivers), computer monitors, digital cameras and digital video cameras cameras such as digital cameras, digital photo frames, mobile phones (also known as mobile phones or mobile phone devices) (hereinafter referred to as "games"), portable game machines, personal digital assistants, sound reproduction devices, large game machines such as pachinko machines Examples include:

[0292] FIG. 26(A) shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In this embodiment, the stand 9605 can be used to hold the case in place. The configuration supporting the 9601 is shown.

[0293] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0294] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0295] FIG. 26(B) shows an example of a digital photo frame 9700. The photo frame 9700 has a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example, images taken with a digital camera. By displaying the image data, it can function like a normal photo frame.

[0296] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is preferable to have a recording medium for a digital photo frame as it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The image data can be captured and the captured image data can be displayed on the display portion 9703 .

[0297] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data can be wirelessly acquired and displayed.

[0298] FIG. 27(A) shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in 27(A) also includes a speaker unit 9884, a recording medium insertion unit 988, 6, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration (including functions for measuring movement, smell, or infrared rays), microphone 9889) Of course, the configuration of the portable gaming machine is not limited to the above, and It is sufficient if the semiconductor device according to one aspect is included, and other auxiliary equipment is appropriately provided. The portable gaming machine shown in FIG. 27(A) can be configured as It has the function of reading out programs or data and displaying them on the display, as well as wireless communication with other portable gaming machines. The portable gaming machine shown in Figure 27(A) has the function of communicating with the user and sharing information. The functions are not limited to these, and various other functions may be provided.

[0299] FIG. 27(B) shows an example of a slot machine 9900, which is a large gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. Machine 9900 also has other operating means such as a start lever and stop switch, coin It is equipped with an insertion slot, a speaker, etc. Of course, the configuration of the slot machine 9900 is The present invention is not limited to the above, and may be implemented in any configuration as long as it includes at least a semiconductor device according to one embodiment of the present invention. In addition, other auxiliary equipment may be provided as appropriate.

[0300] FIG. 28 shows an example of a mobile phone 1000. The mobile phone 1000 has a housing 100 1, in addition to the display unit 1002, operation buttons 1003, an external connection port 1004, It is equipped with a speaker 1005, a microphone 1006, etc.

[0301] The mobile phone 1000 shown in FIG. 28 allows users to input information by touching the display unit 1002 with a finger or the like. In addition, operations such as making a call or sending an email can be performed by the display unit 100. This can be done by touching 2 with a finger or something.

[0302] The screen of the display unit 1002 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This is a display + input mode that combines two modes: display mode and input mode.

[0303] For example, when making a call or creating an email, the display unit 1002 is used to input characters. This is the main character input mode, and you can input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. I wish.

[0304] In addition, the mobile phone 1000 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1000 (portrait or landscape) can be determined and the display The screen display of the display unit 1002 can be automatically switched.

[0305] The screen mode can be switched by touching the display unit 1002 or by operating the housing 1001. This is done by operating the button 1003. Also, depending on the type of image displayed on the display unit 1002, For example, if the image signal to be displayed on the display unit is a video signal, If it is data, the display mode is switched to, and if it is text data, the input mode is switched to.

[0306] In the input mode, the optical sensor of the display unit 1002 detects a signal and displays it. If there is no input by touch operation of the part 1002 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0307] The display unit 1002 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to capture images of finger veins, palm veins, etc.

[0308] The electronic devices exemplified in this embodiment are equipped with a thin film transistor according to one embodiment of the present invention. This allows for low power consumption and high-speed operation.

[0309] Note that the structure described in this embodiment mode may be implemented by appropriately combining structures exemplified in other embodiments. It may be used. [Explanation of symbols]

[0310] 100 boards 102 Gate insulating film 103 Semiconductor film 109 Protective insulating layer 111 gate electrode layer 113 Semiconductor layer 114a Electrode layer 114b Electrode layer 115a wiring layer 115b wiring layer 118 terminals 120 connecting electrode 122 terminals 123 Capacitance wiring 124 Contact Hole 125 Contact Hole 126 Contact Hole 127 Transparent conductive film 128 Pixel electrode layer 129 Transparent conductive film 131 Resist mask 132 Resist mask 141 Thin-film transistor 144 Thin-film transistor 150 terminals 151 terminals 152 Gate insulating film 153 Connecting electrode 154 Protective insulating film 155 Transparent conductive film 156 Electrode 400 boards 401a gate electrode layer 401b gate electrode layer 402 Gate insulating film 403a Semiconductor layer 403b Semiconductor layer 404a Electrode layer 404b Electrode layer 404c electrode layer 405a wiring layer 405b wiring layer 405c wiring layer 406 Contact Hole 430a Thin-film transistor 430b thin film transistor 580 board 581 Thin-film transistor 583 Insulating Layer 585 Insulation Layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 590a black area 590b White area 594 Cavity 595 Filling material 596 PCB 1000 mobile phones 1001 Case 1002 Display section 1003 Operation button 1004 External connection port 1005 Speaker 1006 Mike 2600 TFT substrate 2601 Opposing substrate 2602 Sealing material 2603 Pixel section 2604 Display element 2605 Colored layer 2606 Polarizing plate 2607 Polarizing plate 2608 Wiring circuit section 2609 Flexible wiring board 2610 cold cathode tube 2611 Reflector 2612 Circuit Board 2613 Diffuser 2631 Poster 2632 In-car advertising 2700 e-books 2701 Housing 2703 Housing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation Key 2725 Speaker 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 Thin Film Transistor 4011 Thin-film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4020 Insulation layer 4021 Insulation layer 4030 Pixel electrode layer 4031 Counter electrode layer 4032 Insulation layer 4033 Insulation layer 4035 Pillar spacer 4501 Circuit Board 4502 Pixel section 4503a Signal line driver circuit 4503b Signal line driver circuit 4504a Scanning line driver circuit 4504b Scanning line driver circuit 4505 Sealing material 4506 board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4518a FPC 4518b FPC 4519 Anisotropic conductive film 4520 Bulkhead 5300 board 5301 Pixel unit 5302 Scanning line driver circuit 5303 Signal line driver circuit 5400 board 5401 Pixel unit 5402 Scanning line driver circuit 5403 Signal line driver circuit 5404 Scanning line driver circuit 5501 Wiring 5502 Wiring 5503 Wiring 5504 Wiring 5505 Wiring 5506 Wiring 5543 nodes 5544 nodes 5571 Thin-film transistor 5572 Thin-film transistor 5573 Thin-film transistor 5574 Thin-film transistor 5575 Thin-film transistor 5576 Thin-film transistor 5577 Thin-film transistor 5578 Thin-film transistor 5601 Driver IC 5602 switches 5603a Thin Film Transistor 5603b Thin Film Transistor 5603c Thin Film Transistor 5611 Wiring 5612 Wiring 5613 Wiring 5621 Wiring 5701 Flip-Flop 5703a Timing 5703b Timing 5703c Timing 5711 Wiring 5712 Wiring 5713 Wiring 5714 Wiring 5715 Wiring 5716 Wiring 5717 Wiring 5721 Signal 5803a Timing 5803b Timing 5803c Timing 5821 Signal 6400 pixels 6401 Switching transistor 6402 Drive transistor 6403 Capacitor element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 7001 Driving TFT 7002 Light-emitting element 7003 Cathode 7004 Light-emitting layer 7005 Anode 7011 Driving TFT 7012 Light-emitting element 7013 Cathode 7014 Light-emitting layer 7015 Anode 7016 Shielding membrane 7017 Conductive film 7021 Driving TFT 7022 Light-emitting element 7023 Cathode 7024 Light-emitting layer 7025 Anode 7027 Conductive film 9600 Television Equipment 9601 Housing 9603 Display section 9605 Stand 9607 Display section 9609 Operation Key 9610 Remote Control Machine 9700 Digital Photo Frame 9701 Housing 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker section 9885 Operation Key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 9893 Connection section 9900 slot machine 9901 Housing 9903 Display section

Claims

[Claim 1] a gate electrode layer; a gate insulating film on the gate electrode layer; a first electrode layer and a second electrode layer, the ends of which overlap the gate electrode layer on the gate insulating film; a first wiring layer on the first electrode layer; a second wiring layer on the second electrode layer; an oxide semiconductor layer in a region overlapping with the gate electrode layer, the first electrode layer extends from an end of the first wiring layer; the second electrode layer extends from an end of the second wiring layer, the oxide semiconductor layer is electrically connected to a side surface and an upper surface of the first electrode layer; the oxide semiconductor layer is electrically connected to the side surface and the top surface of the second electrode layer; The semiconductor device includes a region in contact with the oxide semiconductor layer, the region being between a region in contact with the first electrode layer and a region in contact with the second electrode layer.

Images