Information processing device and control method

Abstract

This reduces power consumption during the firmware update process while suppressing the prolonged firmware update time. [Solution] The system includes a host system that performs firmware update processing. The host system measures the processing speed for each update process, and reduces the power limit when the amount of reduction in processing speed relative to the reduction in the host system's power limit falls below a predetermined standard amount. The embodiments of this application may be in any form, such as an information processing device or a control method.

Description

Technical Field

[0001] This application relates to an information processing apparatus and a control method, for example, updating of firmware of devices constituting the apparatus.

Background Art

[0002] In information processing apparatuses such as personal computers (PCs), the firmware of devices constituting a part thereof may be updated. Firmware may be incorporated into hardware to control basic functions. Usually, firmware updates are performed by stopping the operation of the device to be updated. Therefore, it is desired to shorten the update time as much as possible.

[0003] For example, the information processing apparatus described in Patent Document 1 identifies one or more first processing blocks, each of which is a plurality of update processes to be executed in parallel from a plurality of update processes, based on information indicating the execution order of a plurality of update processes related to a plurality of modules corresponding to a target apparatus including a plurality of modules in which software update processing is performed, estimates the update time for each first processing block identified using information indicating the update time for each of the plurality of update processes, and estimates the update time of the target apparatus based on at least one of the information indicating the update time and the update time for each first processing block estimated.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Generally, the processing speed of an information processing device increases with a higher clock frequency, but so does its power consumption. However, the quantitative relationship between power consumption and firmware update time is not always clear. For example, increasing the power limit, a power consumption parameter, does not necessarily shorten the firmware update time. Increasing the power limit may increase the power consumption of the information processing device, but it may lead to wasted power without shortening the firmware update time. [Means for solving the problem]

[0006] This invention was made to solve the above-mentioned problems, and an information processing device according to one embodiment is an information processing device comprising a host system that performs firmware update processing, wherein the host system measures the processing speed for each update processing, and reduces the power limit when the amount of reduction in processing speed with respect to the reduction in the power limit of the host system is less than or equal to a predetermined standard amount.

[0007] In the above-described information processing device, the host system may reduce the power limit value by a predetermined amount when the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process is less than or equal to the reference amount.

[0008] In the above-described information processing device, the rate of decrease of the power limit value may be constant.

[0009] In the above-described information processing device, the host system may increase the power limit value when the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process exceeds the reference amount.

[0010] In the above-described information processing device, the firmware may be a basic input / output system.

[0011] The above-described information processing device further comprises an embedded controller, and the firmware may be the firmware of the embedded controller.

[0012] A control method according to a second aspect of the present application is a control method for an information processing device that performs firmware update processing, wherein the information processing device measures the processing speed for each update processing, This control method reduces the power limit of the host system when the amount of reduction in processing speed relative to the reduction in the power limit of the host system falls below a predetermined reference amount. [Effects of the Invention]

[0013] According to the embodiment of the present invention, it is possible to reduce power consumption during the firmware update process while suppressing the prolongation of the firmware update time. [Brief explanation of the drawing]

[0014] [Figure 1] This is a schematic block diagram showing an example configuration of the information processing device according to this embodiment. [Figure 2] This is a schematic block diagram showing an example of the functional configuration of the host system according to this embodiment. [Figure 3] This diagram illustrates the power consumption during the firmware update process. [Figure 4] This flowchart illustrates the power limit setting process according to this embodiment. [Figure 5] This is an explanatory diagram showing an example of the execution of the power limit value setting process according to this embodiment. [Modes for carrying out the invention]

[0015] The embodiments of this application will be described below with reference to the drawings. An example of the configuration of the information processing device 1 according to this embodiment will be described. Figure 1 is a schematic block diagram showing an example of the configuration of the information processing device 1 according to this embodiment. In the example shown in Figure 1, the information processing device 1 is configured as a general-purpose personal computer (PC). The information processing device 1 comprises a host system 10, a display 14, a ROM (Read Only Memory) 22, an auxiliary storage device 23, a communication module 25, an input / output interface 26, an embedded controller 31 (EC), an input device 32, a power supply circuit 33, and a power switch 36.

[0016] The host system 10 is the core computer system of the information processing device 1. The host system 10 comprises a CPU (Central Processing Unit) 11, main memory 12, a GPU (Graphics Processing Unit) 13, and a chipset 21. In this application, the hardware constituting the host system 10 may be referred to as the "host device."

[0017] The CPU 11 controls the operation of the entire information processing device 1. In other words, the CPU 11 is the core processing unit that executes arithmetic processing instructed by various commands written in the software (program). The CPU 11's operations include reading and writing data to storage media such as the main memory 12 and auxiliary storage device 23, reading data from the ROM 22, and input / output with other devices. Programs executed by the CPU 11 include, for example, the OS (Operating System), firmware, device drivers (sometimes simply called "drivers" in this application), utility programs, and application programs. In this application, the execution of processing instructed by commands written in a program may be referred to as "executing a program" or "program execution."

[0018] System firmware is a program for performing input / output with hardware resources. System firmware includes BIOS (Unified Extensible Firmware Interface Basic Input / Output System). BIOS includes a system BIOS based on the UEFI (Unified Extensible Firmware Interface) standard. In this application, system firmware may be referred to as BIOS. CPU 11 starts booting when power is turned on. CPU 11 executes a boot loader and reads BIOS from ROM 22. CPU 11 executes POST (Power On Self Test) processing according to BIOS. POST processing includes processes such as basic device initialization, consistency verification, device detection, system setting, and system startup (OS startup).

[0019] Main memory 12 is a writable memory that is used as a loading area for the execution program of processor 11 or as a working area for writing processing data of the execution program. Main memory 12 is composed of, for example, a plurality of DRAM (Dynamic Random Access Memory) chips. Processor 11 and main memory 12 are the minimum hardware constituting host system 10.

[0020] GPU 13 is an arithmetic processing unit mainly for realizing functions related to image display. GPU 13 processes (image processes) drawing commands issued from CPU 11 and writes display data indicating the obtained display information into a video memory provided in itself. GPU 13 sequentially reads out the display data written from the video memory and outputs the read display data to display 14. GPU 13 may share some processing with CPU 11. GPU 13 may be integrated with CPU 11 and formed on the same core, or may be formed on a core separate from CPU 11. GPU 13 may execute parallel arithmetic processing other than image processing or share some processing with CPU 11.

[0021] The display 14 displays a screen based on display data input from the GPU 13. The display 14 may be, for example, a liquid crystal display (LCD) or an organic light-emitting diode (OLED) display.

[0022] The chipset 21 includes multiple controllers and can be connected to multiple devices to input and output various types of data. The controllers on the chipset 21 may be, for example, USB (Universal Serial Bus), SPI (Serial Peripheral Interface) bus, PCI-Express bus, etc. In the example in Figure 1, the chipset 21 is connected to ROM 22, auxiliary storage device 23, communication module 25, input / output I / F 26, and EC31.

[0023] Furthermore, the chipset 21 includes a Management Engine 21m. The Management Engine 21m has functions related to the maintenance and management of the host system 10. The Management Engine 21m has functions to provide some or all of the following: low power consumption services, out-of-band management services, function licensing services, anti-theft functions, and protected audio / video paths. The Management Engine 21m is a microcontroller separate from the host system 10. The Management Engine 21m is independent of the power state of the host system 10 and functions from immediately after power-on until the main OS is fully started by the host system 10. Immediately after power-on, the Management Engine 21m reads firmware for the Management Engine 21m (sometimes referred to as "MEFW: Management Engine Firmware" in this application) from the ROM 22, executes the read MEFW, and provides its functions.

[0024] ROM22 primarily stores firmware. The firmware stored in ROM22 includes the BIOS, MEFW, and other firmware specific to individual devices. ROM22 is composed of rewritable non-volatile memory such as EEPROM (Electrically Erasable Programmable Read Only Memory) and flash ROM.

[0025] The auxiliary storage device 23 stores various data used in the processing of the host system 10, various data acquired through such processing, or various programs. The auxiliary storage device 23 may be, for example, an SSD (Solid State Drive) or an HDD (Hard-disk Drive).

[0026] The communication module 25 connects to a communication network, enabling it to send and receive various types of data wirelessly or via wired connections. The communication module 25 communicates various types of data with other devices connected to the communication network. The communication module 25 is, for example, a wireless LAN module that connects to a wireless LAN.

[0027] The I / F26 input / output interface connects to various devices for data input and output via wired or wireless connections. For example, the I / F26 includes a connector (USB connector) for wired data input and output in accordance with USB specifications.

[0028] EC31 is a controller that monitors and controls the operation of various devices connected to it, regardless of the operating state of the host system 10. EC31 has a separate CPU, ROM, RAM, timer, and input / output interface from the host system 10. Devices with a lower data transfer speed than the chipset 21 can be connected to EC31. In the example shown in Figure 1, an input device 32, a power supply circuit 33, and a power switch 36 are connected to EC31.

[0029] The EC31 reads firmware for the EC31 (sometimes referred to as "ECFW: Embedded Controller Firmware" in this application) from its own ROM, executes the read ECFW, and provides its functions. Instead of its own ROM, the ECFW may be pre-stored in ROM22 and the read ECFW may be executed. However, ROM22 must also be started when the EC31 starts up.

[0030] The input device 32 detects user operations, generates an operation signal according to the detected operation, and outputs it to EC31. The input device 32 may be, for example, a keyboard, a touchpad, or any other.

[0031] The power supply circuit 33 includes a voltage converter. The voltage converter converts the voltage of DC power supplied from an external power source or a battery (not shown) to the voltage required for the operation of each device constituting the information processing device 1, and supplies power with the converted voltage to the receiving device. The power supply circuit 33 performs power supply to the device according to the control of EC31. The power supply circuit 33 includes a charger. The charger charges the battery with the power remaining from the power supplied from the external power source that is not consumed by each device. If power is not supplied from the external power source, or if the power supplied from the external power source does not meet the demand, the charger supplies power discharged from the battery to each device. The battery charges with power supplied from the power supply circuit 33, or discharges power stored in itself to the power supply circuit 33. The battery may be, for example, a lithium-ion battery, a sodium-ion battery, or any other.

[0032] Each time a press operation is received, the power switch 36 controls the power supply state to the host system 10 to either power ON or power OFF. When a press operation is received, the power switch 36 outputs a press signal to EC31. When the information processing device 1 is powered off and a press signal is input from the power switch 36, EC31 instructs the power supply circuit 33 to start supplying power to each device of the information processing device 1 (power on). When power is supplied to the information processing device 1 and a press signal is input from the power switch 36, EC31 causes the host system 10 to perform a shutdown process.

[0033] Next, the operation of the host system 10 will be described. The functions of the host system 10 are realized by the CPU 11 executing various programs in cooperation with the main memory 12, chipset 21, and other hardware. Figure 2 is a schematic block diagram showing an example of the functional configuration of the host system 10 according to this embodiment. The host system 10 includes a firmware management unit 10a and a power management unit 10b.

[0034] The firmware management unit 10a manages the firmware used in the information processing device 1. The firmware management unit 10a maintains a management table that shows version information of the firmware applied to each device constituting the information processing device 1. The firmware management unit 10a performs firmware update processing. Firmware update processing includes, for example, detection tasks, acquisition tasks, and update tasks. Update processing may be performed as part of maintenance processing. The firmware management unit 10a may perform firmware management during predetermined maintenance periods (for example, specific time slots on a daily or weekly basis), or it may perform firmware management at any time in response to user instructions. User instructions are transmitted by operation signals input from the input device 32.

[0035] In the detection task, the firmware management unit 10a detects a newer version of firmware than the version currently applied to the device (sometimes referred to as the "current version" in this application). The firmware management unit 10a queries a provider device (not shown) that provides the firmware for the latest version at predetermined intervals. In this case, the firmware management unit 10a sends a query command to the provider device to inquire about the firmware that can be provided. The provider device has a database that stores the firmware versions that can be provided for each device, or makes it possible to access such a database. The provider device is, for example, a firmware management server. The provider device may differ for each device to which the firmware is applied (sometimes referred to as the "target device" in this application). The provider device is, for example, a cloud server connected to the information processing device 1 via the Internet.

[0036] When the providing device receives a query command from the information processing device 1, it generates response information indicating the firmware version available at that time (sometimes referred to as the "available version" in this application). The providing device sends the generated response information to the information processing device 1, which is the source of the query, as a response to the query command. The firmware management unit 10a refers to the management table and identifies a version from the available versions shown in the response information that is different from the current version applied to the target device at that time. If multiple different versions exist, the firmware management unit 10a identifies one of the multiple versions (for example, the latest version). If the available versions shown in the response information only include the current version, the firmware management unit 10a does not perform the acquisition task and update task described later.

[0037] In addition, the target device and version may be specified by the user. In that case, the firmware management unit 10a refers to the management table to identify the current version for the target device and determines whether the version specified by the user corresponds to the current version. Even if the version specified by the user is the current version, the firmware management unit 10a does not perform the acquisition task and update task described later.

[0038] In the acquisition task, the firmware management unit 10a accesses the ROM 22 and determines whether the firmware version for the target device identified in the detection task is stored there. If it is stored there, the firmware management unit 10a proceeds to the update task without acquiring the firmware from the source device. If the identified firmware version is not stored in the ROM 22, the firmware management unit 10a acquires the identified firmware version for the target device from the source device. In that case, the firmware management unit 10a sends a request command to the source device to request the identified firmware version for the target device.

[0039] The providing device reads the firmware version specified by the request command. In response to the request command, the providing device sends the read firmware to the requesting information processing device 1. The firmware management unit 10a receives the firmware version specified by the request command from the providing device and saves the received firmware to the ROM 22. At this time, the current version of firmware stored in the ROM 22 may be erased, or it may be overwritten by the newly saved version of firmware.

[0040] In the update task, the firmware management unit 10a erases the current version of the firmware stored in the working memory of the target device. For a specified target device, before erasing the current version of the firmware, the firmware management unit 10a saves (backs up) image data indicating the execution status of the running program containing that firmware to the auxiliary storage device 23. Then, the firmware management unit 10a stops the power supply to the target device (power off). At this time, the firmware stored in the working memory of the target device is erased. Then, the firmware management unit 10a resumes the power supply to the target device (power on), reads the specified version of the firmware from the ROM 22, and deploys the read firmware to the working memory of the target device. If image data was stored in the auxiliary storage device 23, the firmware management unit 10a reads the image data from the auxiliary storage device 23 and deploys the read image data to the working memory. Then, the firmware management unit 10a starts executing the firmware deployed in the working memory. The firmware management unit 10a updates the management table so that the new version of the firmware becomes the current version of the firmware.

[0041] The working memory can be the volatile memory (e.g., RAM) available on the target device (e.g., management engine 21m, EC31). If the target device is a host device, the working memory will be main memory 12. Unlike peripheral devices other than the host device (e.g., management engine 21m, EC31), power loss corresponds to shutdown, and the firmware to be updated is the BIOS. The deployment of the new version of the BIOS to be updated from ROM 22 to main memory 12 is performed during the boot process described above after power is supplied to the host system 10.

[0042] The power management unit 10b monitors the operation of the host system 10 and controls the power consumption of the host system 10. The control parameters of the host system 10 include, for example, a first power limit. The first power limit is a power limit value equivalent to the rated power and is sometimes called PL1 (Power Limit 1) or Long Term Power Limit. The rated power is a threshold that allows the moving average value of power consumption to temporarily exceed this value, but restricts it from exceeding this value steadily (for example, for several seconds to tens of seconds or more). The window length in the moving average (the observation period related to the moving average of power consumption) is, for example, about 1 to 10 seconds.

[0043] The power management unit 10b controls the power consumption of the host system 10 so that the moving average value of power consumption is less than or equal to the rated power. The power management unit 10b monitors the power consumption of the host system 10, and if the power consumption exceeds the rated power for a predetermined reference duration τ (e.g., 0.2 to 1 second) or longer, it reduces the power consumption of the host system 10 until the moving average value of power consumption is less than or equal to the rated power. Generally, the power consumption of the CPU 11 increases with higher operating voltage and higher clock frequency. The power control unit 202 limits the power consumption of the host system 10 to less than or equal to the rated power by changing either or both of the operating voltage and / or clock frequency of the CPU 11.

[0044] In this embodiment, the power management unit 10b monitors the operating status of the firmware management unit 10a and controls the power consumption related to the firmware update process. Here, the power management unit 10b reduces the power limit value of the host system 10 within a range where the decrease in the processing speed of the update process with respect to the decrease in the power limit value is smaller than a predetermined reference amount. Generally, processing speed decreases as the power limit decreases, but the ratio of the decrease in processing speed to the decrease in the power limit is not necessarily constant. Figure 3 illustrates the changes in CPU power consumption under conditions where BIOS updates are repeated.

[0045] In the example shown in Figure 3, the CPU power consumption during the first update process is greater than that during subsequent update processes. However, the time required for the first update process is not significantly less than the time required for subsequent update processes. This embodiment focuses on this point and explores a power limit value that suppresses the decrease in processing speed while also reducing power consumption by reducing the ratio of the decrease in processing speed to the decrease in the power limit value within a small range.

[0046] More specifically, the power management unit 10b determines whether the firmware management unit 10a is performing a firmware update process (sometimes referred to as "update" in this application). When the firmware update process is in progress, the power management unit 10b measures the processing speed related to the update process (sometimes referred to as "update speed" in this application). The power management unit 10b measures the processing time required for the firmware update process (sometimes referred to as "update time" in this application) and the capacity of the firmware to be updated (sometimes referred to as "update size" in this application). The power management unit 10b determines the processing speed by dividing the measured capacity by the processing time.

[0047] The power management unit 10b reduces the power limit by a predetermined amount for each update process, for example, until the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process exceeds a predetermined standard amount. Here, when the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process falls below the predetermined standard amount, the power management unit 10b reduces the power limit at that point by a constant rate. When the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process exceeds the standard amount, the power management unit 10b does not reduce the power limit. In this case, the power management unit 10b may increase the power limit to compensate for the previous decrease.

[0048] Next, an example of the power limit setting process according to this embodiment will be described. Figure 4 is a flowchart illustrating the power limit setting process according to this embodiment. However, the host system 10 is set to an initial value of the power limit related to the update process that is equal to or greater than the normal power consumption. Parameters such as the power limit, its initial value, its increase rate, and decrease rate may be set independently for each target device.

[0049] (Step S102) The power management unit 10b monitors the operating status of the firmware management unit 10a and determines whether or not a firmware update process is being performed. If the update process is performed (Step S102 YES), the process proceeds to Step S104. If the update process is not performed (Step S102 NO), the process in Step S102 is repeated. (Step S104) The power management unit 10b measures the time required for the update process as the update time and measures the capacity of the firmware (update size) related to the update process. The power management unit 10b calculates the update speed by dividing the measured update size by the update time.

[0050] (Step S106) The power management unit 10b determines whether the calculated latest update speed (current value) exceeds a predetermined multiplier (for example, 0.8 to 1.0 times) of the update speed (previous value) related to the immediately preceding update process. If it is determined that it exceeds the previous value (Step S106 YES), the process proceeds to Step S108. If it is determined that it does not exceed the previous value (Step S106 NO), the process proceeds to Step S110.

[0051] (Step S108) The power management unit 10b reduces the power limit value set on the host system 10 at a predetermined reduction rate (for example, to 0.7 to 0.9 times the current value). Then, it returns to the process in step S102. (Step S110) The power management unit 10b increases the power limit value set in the host system 10 at a predetermined rate of increase (for example, to 1.1 to 1.4 times the current value). The rate of increase of the power limit value in step S110 may be set to compensate for the decrease in the power limit value in step S108. For example, if the power limit value decreases to 0.8 times in step S108, the rate of increase in step S110 may be set to increase the power limit value to 1.25 times. After that, the process shown in Figure 4 is terminated.

[0052] Next, an example of the power limit setting process according to this embodiment will be described. Figure 5 is an explanatory diagram showing an example of the power limit setting process according to this embodiment. In the example shown in Figure 5, the initial power limit is 28W, the predetermined multiplier for the update speed in step S106 is 0.9 times, the decrease rate in step S108 is 3 / 4 of the current value, and the increase rate in step S110 is 4 / 3 of the current value.

[0053] In the first update process, the update time is 10 minutes and the update size is 100kB, so the update speed is 10kB / minute. The power management unit 10b reduces the power limit to 21W, which is 3 / 4 of the initial value of 28W. In the second update process, the update time is 10 minutes and the update size is 100kB, so the update speed is 10kB / minute. Since the update speed of the second update is the same as the update speed of the first update, the power management unit 10b reduces the power limit to 16W, which is 3 / 4 times 21W.

[0054] In the third update process, the update time is 8 minutes and the update size is 80kB, so the update speed is 10kB / minute. Since the update speed of the third update is the same as that of the second update, the power management unit 10b reduces the power limit to 12W, which is 3 / 4 times 16W. In the fourth update process, the update time is 10 minutes and the update size is 100kB, so the update speed is 10kB / minute. Since the update speed of the fourth update is the same as that of the third update, the power management unit 10b reduces the power limit to 9W, which is 3 / 4 times 12W.

[0055] In the fifth update process, the update time is 15 minutes and the update size is 100kB, so the update speed is 6.7kB / min. Since the update speed of the fifth update is less than 0.9 times that of the fourth update, the power management unit 10b increases the power limit to 12W, which is 4 / 3 times 9W. In the sixth update process, the update time is 8 minutes and the update size is 80kB, resulting in an update speed of 10kB / minute. After that, the process shown in Figure 4 is completed, and the power limit for the firmware update process is set to 12W.

[0056] In the explanations for Figures 4 and 5, the change in the power limit value from the previous value to the current value is shown using an increase rate, a decrease rate, or a multiplier of the current value to the previous value, but this is not limited to these methods. The change in the power limit value may also be shown using the difference between the previous value and the current value. Similarly, the change in the update speed from the previous value to the current value is shown using a multiplier of the current value to the previous value, but this is not limited to these methods. The change in the update speed may also be shown using a decrease rate or the difference between the previous value and the current value.

[0057] In the process shown in Figure 4, step S110 may be omitted. In that case, if the power management unit 10b determines in step S106 that the current value of the update speed does not exceed a predetermined multiplier of the previous value of the update speed (step S106 NO), it terminates the process shown in Figure 4.

[0058] As described above, the information processing device 1 according to this embodiment includes a host system 10 that performs firmware update processing. The host system 10 measures the processing speed for each update process and reduces the power limit when the amount of reduction in processing speed (i.e., update speed) relative to the reduction in the power limit of the host system 10 falls below a predetermined reference amount. With this configuration, the power limit is controlled to decrease only if the processing speed does not decrease or decreases only slightly. As a result, the time required for firmware update processing is suppressed, and power consumption can be reduced.

[0059] Furthermore, the host system 10 may reduce the power limit value by a predetermined amount when the decrease in processing speed from the processing speed of the previous update process to the processing speed of the latest update process falls below a standard amount. In this configuration, the power limit is adaptively adjusted to maintain the processing speed based on the changes in processing speed measured each time a firmware update process is performed.

[0060] Furthermore, the rate of decrease in the power limit may be constant. With this configuration, a simple calculation allows for smaller reductions in the power limit value. When adjusting by decreasing the power limit value to a smaller value, the power limit value can be efficiently adjusted until the reduction exceeds a predetermined standard amount.

[0061] Furthermore, the host system 10 may increase the power limit value when the decrease in processing speed from the processing speed of the previous update process to the processing speed of the latest update process exceeds a reference amount. With this configuration, even if the processing speed decreases significantly due to a reduction in the power limit, the original processing speed can be restored by compensating by increasing the power limit.

[0062] Note that the firmware to be updated may also be the BIOS. Furthermore, in an information processing device 1 equipped with an embedded controller (e.g., management engine 21m, EC31), the firmware to be updated may be the firmware of the embedded controller (e.g., MEFW, ECFW).

[0063] Although embodiments of the present invention have been described in detail above with reference to the drawings, the specific configurations are not limited to the embodiments described above, and include designs and the like that do not depart from the spirit of this invention. The configurations described in the embodiments described above can be combined in any way. [Explanation of symbols]

[0064] 1…Information processing device, 10…Host system, 10a…Firmware management unit, 10b…Power management unit, 11…CPU, 12…Main memory, 13…GPU, 14…Display, 21…Chipset, 21m…Management engine, 22…ROM, 23…Auxiliary storage device, 25…Communication module, 26…Input / output interface, 31…EC, 32…Input device, 33…Power supply circuit, 36…Power switch

Claims

1. An information processing device comprising a host system that performs firmware update processing, The host system measures the processing speed for each update process, When the decrease in processing speed relative to the decrease in the power limit of the host system falls below a predetermined threshold, the power limit is reduced. Information processing device.

2. The aforementioned host system When the decrease in processing speed from the previous update process to the latest update process is less than or equal to the aforementioned standard amount, The aforementioned power limit value is reduced by a predetermined amount. The information processing apparatus according to claim 1.

3. The rate of decrease of the aforementioned power limit value is constant. The information processing apparatus according to claim 2.

4. The aforementioned host system When the decrease in processing speed from the previous update process to the latest update process exceeds the aforementioned reference amount, Increase the aforementioned power limit value The information processing apparatus according to claim 2.

5. The aforementioned firmware is a basic input / output system. The information processing apparatus according to claim 1.

6. It also features an embedded controller, The firmware is the firmware of the embedded controller. The information processing apparatus according to claim 1.

7. A control method for an information processing device that performs firmware update processing, The information processing device measures the processing speed for each update process, When the reduction in processing speed relative to the reduction in the host system's power limit falls below a predetermined threshold, the power limit is reduced. Control method.

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