Wiring board, and method for manufacturing a wiring board

Abstract

Improved reliability of wiring boards. [Solution] The wiring board of the embodiment comprises a conductor layer 22, an insulating layer 32 covering the conductor layer 22, a through hole 5 penetrating the insulating layer 32 and having a first opening 51 on the side opposite to the conductor layer 22 and a second opening 52 facing the conductor layer 22, and a via conductor 4 formed inside the through hole 5 and connected to the conductor layer 22. The surface 2a of the conductor layer 22 on the via conductor 4 side has a recess 6 that communicates with the through hole 5, the recess 6 is smaller than the second opening 52 in plan view and has a conical shape that tapers toward the side opposite to the via conductor 4, and the center of the recess 6 on the surface 2a of the conductor layer 22 is offset from the center of the first opening 51 in plan view.

Description

Technical Field

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[0001] The present invention relates to a wiring board and a method for manufacturing the wiring board.

Background Art

[0002] Patent Document 1 discloses a multilayer wiring board in which a first metal wiring layer, an insulating layer, and a second metal wiring layer are laminated. A via hole is formed in the insulating layer, and a recess having a smaller diameter than the opening on the lower side of the via hole is formed on the upper surface of the first metal wiring layer exposed in the via hole. The first metal wiring layer and the second metal wiring layer are electrically connected by a metal layer and a plating layer formed along the wall surface and the bottom surface of this recess and the wall surface of the via hole.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the multilayer wiring board disclosed in Patent Document 1, the strength against the force applied to the interface between the metal layer connecting the first metal wiring layer and the second metal wiring layer and the surface of the first metal wiring layer may not be sufficient. Therefore, peeling may occur at this interface during the use of the multilayer wiring board. In addition, since the recess on the upper surface of the first metal wiring layer of Patent Document 1 is formed by etching after the formation of the via hole, the manufacturing process of the multilayer wiring board is considered to be long and complicated.

Means for Solving the Problems

[0005] The wiring board of the present invention comprises a conductor layer, an insulating layer covering the conductor layer, a through hole penetrating the insulating layer and having a first opening on the side opposite to the conductor layer and a second opening facing the conductor layer, and a via conductor formed inside the through hole and connected to the conductor layer. The surface of the conductor layer on the via conductor side has a recess that communicates with the through hole, the recess is smaller than the second opening in plan view and has a conical shape that tapers toward the side opposite to the via conductor, and the center of the recess on the surface of the conductor layer is offset from the center of the first opening in plan view.

[0006] The present invention provides a method for manufacturing a wiring board, comprising: forming a conductor layer; forming an insulating layer covering the conductor layer; forming a through-hole in the insulating layer having a first opening that opens toward the opposite side of the conductor layer; and forming a via conductor connected to the conductor layer inside the through-hole. The formation of the through-hole includes forming a recess having a conical shape that tapers toward the opposite side of the through-hole on the insulating layer side of the conductor layer, such that in a plan view, the center of the recess is offset from the center of the first opening.

[0007] According to embodiments of the present invention, delamination between via conductors and conductor layers is suppressed, and the connection reliability inside the wiring board may be improved. Furthermore, wiring boards with such good connection reliability can be manufactured more easily than in the past. [Brief explanation of the drawing]

[0008] [Figure 1] A cross-sectional view showing an example of a wiring board according to the embodiment. [Figure 2] Enlarged view of section II of the wiring board in Figure 1. [Figure 3A] A schematic plan view showing the through-holes and recesses of the wiring board in Figure 1. [Figure 3B] Figure 1 schematically shows the cross-section of the through-holes and recesses of the wiring board. [Figure 4A] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4B] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4C] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4D] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4E] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4F] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4G] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4H] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4I] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4J] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 4K] A cross-sectional view showing an example of a finished wiring board manufactured by the manufacturing method of the embodiment. [Modes for carrying out the invention]

[0009] <Basic configuration of the wiring board in the embodiment> A wiring board according to an embodiment of the present invention will be described with reference to the drawings. Figure 1 shows a wiring board 1, which is an example of a wiring board according to the embodiment, and Figure 2 shows an enlarged view of part II of the wiring board 1 of Figure 1. Furthermore, Figure 3A schematically shows the through hole 5 and recess 6 of the wiring board 1 of Figure 1 in a plan view, and Figure 3B schematically shows the cross-section of the through hole 5 and recess 6.

[0010] The wiring boards illustrated in the drawings referenced in the following description are merely examples of wiring boards in the embodiments. The laminated structure of the wiring boards in the embodiments is not limited to the laminated structure of the wiring boards shown in each drawing, and the number of conductive layers and insulating layers included in the wiring boards in the embodiments is not limited to the number of conductive layers and insulating layers included in the wiring boards shown in each drawing. The wiring boards in the embodiments may include any number of insulating layers and conductive layers in addition to the insulating layers and conductive layers of the wiring boards shown in each drawing, and may not include all of the insulating layers and conductive layers of the wiring boards shown in each drawing. In addition, in the drawings referenced in the following description, certain parts may be enlarged to make the disclosed embodiments easier to understand. Therefore, each component may not be depicted in the exact proportions between them in terms of size and length.

[0011] As shown in Figure 1, the wiring board 1 comprises conductor layers 21-24 and insulating layers 31-33. Each conductor layer 21-24 and each insulating layer 31-33 are alternately stacked. The stacking direction of each conductor layer and each insulating layer is the thickness direction of the wiring board 1, and is hereinafter also referred to as the "Z direction". In Figure 1, the insulating layer 31 is stacked so as to cover one of the two surfaces of the conductor layer 21 that is perpendicular to the Z direction, and on the side of the insulating layer 31 opposite to the conductor layer 21 side, each conductor layer and each insulating layer is stacked in the order of conductor layer 22, insulating layer 32, conductor layer 23, insulating layer 33, and conductor layer 24. Insulating layer 32 covers conductor layer 22, and insulating layer 33 covers conductor layer 23. The wiring board 1 of this embodiment further comprises through holes 5 that penetrate each insulating layer 31-33, and via conductors 4 formed inside each of the through holes 5.

[0012] In the wiring board 1 of FIG. 1, the widths of the through-hole 5 and the via conductor 4 are smaller on the conductor layer 21 side than on the conductor layer 24 side. In the above and below descriptions of the wiring board of the embodiment, the side with the larger width of the through-hole 5 and the via conductor 4 is also referred to as the "upper side", and the side with the smaller width is also referred to as the "lower side". That is, the conductor layer 24 side in the wiring board 1 is also referred to as the "upper side", and the conductor layer 21 side is also referred to as the "lower side". Therefore, in each conductor layer and each insulating layer, the surface facing away from the conductor layer 21 or the surface facing the conductor layer 24 side is also referred to as the "upper surface", and the surface facing away from the conductor layer 24 or the surface facing the conductor layer 21 side is also referred to as the "lower surface". Note that the "width" of each of the through-hole 5 and the via conductor 4 is the maximum value among the distances between any two points on the outer periphery of the through-hole 5 or the via conductor 4 in an arbitrary cross-sectional plane orthogonal to the Z direction.

[0013] As shown in FIG. 2, the through-hole 5 has a first opening 51 that opens at the upper end and a second opening 52 that opens at the lower end. The second opening 52 faces the lower conductor layer of each through-hole 5. Each through-hole 5 has the first opening 51 on the side opposite to the lower conductor layer. Therefore, the through-hole 5 penetrating the insulating layer 32 in FIG. 2 has the second opening 52 facing the conductor layer 22 and the first opening 51 on the conductor layer 23 side opposite to the conductor layer 22. Similarly, the through-hole 5 penetrating the insulating layer 31 in FIG. 1 has the second opening facing the conductor layer 21 and the first opening on the conductor layer 22 side opposite to the conductor layer 21. The through-hole 5 penetrating the insulating layer 33 has the second opening facing the conductor layer 23 and the first opening on the conductor layer 24 side opposite to the conductor layer 23. The through-hole 5 and the via conductor 4 in the examples of FIGS. 1 and 2 each have a tapered shape that tapers downward. Therefore, the second opening 52 is smaller than the first opening 51.

[0014] The via conductors 4 formed inside each of the through holes 5 penetrating any one of the insulating layers 31 to 33 are integrally formed with the conductor layer above each via conductor 4 and are connected to the conductor layer below. In FIG. 2, the via conductor 4 formed inside the through hole 5 penetrating the insulating layer 32 is integrally formed with the conductor layer 23 above the via conductor 4 and is connected to the conductor layer 22 below the via conductor 4. The via conductor 4 shown in FIG. 2 connects the conductor layer 23 and the conductor layer 22. Similarly, in FIG. 1, the via conductor 4 formed inside the through hole 5 penetrating the insulating layer 31 is integrally formed with the conductor layer 22 and is connected to the conductor layer 21, thus connecting the conductor layer 22 and the conductor layer 21. Also, the via conductor 4 formed inside the through hole 5 penetrating the insulating layer 33 is integrally formed with the conductor layer 24 and is connected to the conductor layer 23, thus connecting the conductor layer 24 and the conductor layer 23.

[0015] The wiring board 1 in FIG. 1 further includes a solder resist 71 covering the lower surface of the conductor layer 21 and the lower surface of the insulating layer 31, and a solder resist 72 covering the upper surface of the conductor layer 24 and the insulating layer 33. The solder resists 71 and 72 are formed of, for example, a photosensitive epoxy resin. An opening for exposing a predetermined region of the conductor layer 21 or the conductor layer 24 is formed in each solder resist.

[0016] The conductor layers 21 to 24 and the via conductors 4 are each formed of an arbitrary metal having appropriate conductivity. Examples of the materials of these conductive components include copper, nickel, gold, titanium, palladium, and tungsten. However, the materials of the conductor layers 21 to 24 and the via conductors 4 are not limited to these metals.

[0017] Although the conductor layers 21-24 and via conductor 4 are depicted in a simplified manner as consisting of only one layer in Figure 1, they may have a multilayer structure composed of two or more metal films, as shown in Figure 2. In the example in Figure 2, conductor layers 22 and 23, and via conductor 4, are composed of a lower layer made of a metal film 4a and an upper layer made of a plating film 4b. The metal film 4a may be, for example, an electroless copper plating film or a sputtering film, and the plating film 4b may be, for example, an electrolytic copper plating film.

[0018] The insulating layers 31-33 are mainly formed from any insulating resin. Examples of insulating resins used to form the insulating layers 31-33 include epoxy resin, bismaleimide triazine resin (BT resin), phenolic resin, fluororesin, liquid crystal polymer (LCP), acrylic resin, fluoroethylene fluorine (PTFE) resin, polyester (PE) resin, and modified polyimide (MPI) resin. The insulating layers 31-33 may contain inorganic fillers (not shown), such as silicon dioxide or alumina, to adjust various properties, such as the coefficient of thermal expansion. The insulating layers 31-33 may also contain core materials (not shown), such as glass fibers, to improve mechanical strength. The resins listed above as materials for the insulating layers 31-33 are merely examples of materials that can form each insulating layer. Each insulating layer can be formed from any material that can provide insulation to the conductor layers 21-24 and support the conductor layers 21-24.

[0019] In the wiring board 1 of this embodiment, the upper via conductor 4 side surface 2a of each conductor layer 21 to 23 has a recess 6. That is, a recess 6 is formed on the upper surface of each conductor layer 21 to 23. The recess 6 has a conical shape that tapers toward the opposite side of the upper via conductor 4 of each conductor layer 21 to 23. That is, as shown in Figure 2, the recess 6 has a tapered shape that tapers toward the lower surface 2b side from the upper surface 2a of each conductor layer. The recess 6 has a tip 6a that faces away from the upper through hole 5. The tip 6a is the deepest part of each recess 6 and is the part of the inner wall surface of each conductor layer exposed in the recess 6 that is furthest from the surface 2a. The tip 6a may be pointed as in the example in Figure 2, or it may be rounded to some extent.

[0020] Each insulating layer, such as the insulating layer 32, has a through hole 5, and each conductive layer, such as the conductive layer 22, has a bottomed hole formed by the through hole 5. The bottom surface of the bottomed hole is formed by the surface 2a of each conductive layer. The recess 6 is formed on the surface 2a of each conductive layer, in the portion that blocks the second opening 52 of the through hole 5, that is, the portion exposed to the through hole 5. Therefore, the recess 6 itself is also exposed to the through hole 5. In plan view, the recess 6 is smaller than the second opening 52 of the through hole 5. Therefore, not only the recess 6 but also a portion of the surface 2a of each conductive layer is exposed within the through hole 5.

[0021] The recess 6 is connected to the upper through-hole 5 of each of the conductor layers 21-23. In other words, the through-hole 5 and the recess 6 are in communication. Therefore, the inside of the recess 6 is also filled with via conductors 4. Consequently, a portion of the via conductor 4 is also formed inside the recess 6 and extends into the recess 6. As shown in Figure 3A, the recess 6 is formed in a position that overlaps with the upper through-hole 5 of the recess 6 in a plan view. Note that "plan view" means viewing the object from a line of sight along the Z direction.

[0022] Furthermore, in the wiring board 1 of the embodiment, as shown in Figures 3A and 3B, the center C6 of the recess 6 on the surface 2a of each conductor layer is offset relative to the center C51 of the first opening 51 of the through hole 5 in a plan view. The statement that the center C6 of the recess 6 is "offset" relative to the center C51 of the first opening 51 in a plan view means that the position of the center C6 and the position of the center C51 are misaligned in a plan view. In other words, in the wiring board 1, the center C6 and the center C51 do not overlap in a plan view. The first opening 51 is eccentric relative to the center C6 of the recess 6 on the surface 2a of each conductor layer in a plan view. In other words, the recess 6 is eccentric relative to the center C51 of the first opening 51 on the surface 2a of each conductor layer in a plan view. In the examples of Figures 3A and 3B, the center C6 of the recess 6 is located on the first direction side (right side) indicated by arrow X in each drawing, relative to the center C51 of the first opening 51 (hereinafter, the first direction will also be referred to as the "+X direction"). The "+X direction" and the "-X direction" described later are directions perpendicular to the Z direction. Note that the direction in which the position of center C6 is shifted relative to the position of center C51 does not need to be limited to a specific direction, but may be any direction perpendicular to the Z direction.

[0023] As will be described later, in the wiring board of the embodiment, the recess 6 that connects to the through hole 5 is formed at the same time as the through hole 5 is formed. In one example, the through hole 5 of the wiring board 1 of the embodiment is formed by irradiation with laser light. By appropriately refracting or reflecting the laser light used to form the through hole 5, the center of the spot of the laser light that travels along the Z direction within each insulating layer such as the insulating layer 32 can be shifted in a specific direction as the laser light progresses. By shifting the center of the spot in this way, a through hole 5 can be formed having a first opening 51 and a second opening 52 whose centers are offset from each other in a plan view.

[0024] Furthermore, by focusing the laser beam at a predetermined position using, for example, the reflection or refraction of the laser beam, the power of the central part of the laser beam spot can be increased. In other words, in the formation of the through-hole 5, the power of the central part of the laser beam spot that has passed through each insulating layer can be increased on the surface 2a of each conductor layer. As a result, a recess 6 is easily formed in the center of the laser beam spot irradiating the surface 2a. In other words, a recess 6 is easily formed in the center of the second aperture 52. As a result, in a plan view, a recess 6 can be formed on the surface 2a of each conductor layer where the center C6 is offset relative to the center C51 of the first aperture 51.

[0025] In the embodiment, the wiring board 1 has recesses 6 formed on the surface 2a of each conductor layer, such as the conductor layer 22, which connect to through holes 5 in which via conductors 4 (see Figures 1 and 2) are formed. The via conductors 4 are also formed inside the recesses 6, and within the recesses 6, they are in contact with the inner wall surfaces of each conductor layer, such as the conductor layer 22. In other words, the contact area between the via conductors 4 and each conductor layer is large. Therefore, it is considered that the adhesion between the via conductors 4 and each conductor layer, such as the conductor layer 22, is higher compared to when the recesses 6 are not formed. Consequently, it is considered that peeling of the via conductors 4 from each conductor layer is less likely to occur.

[0026] Furthermore, in the wiring board 1 of the embodiment, the center C6 of the recess 6 is offset from the center C51 of the first opening 51 of the through hole 5 in a plan view, so displacement is unlikely to occur between the via conductor 4 and each conductor layer such as the conductor layer 22 and each insulating layer such as the insulating layer 32. In other words, since the via conductor 4 also extends into the recess 6, which is offset from the center C51 of the first opening 51 in a plan view, it is unlikely to rotate along the direction along the periphery of the via conductor 4 (circumferential direction) in a plan view. Such rotational movement along the circumferential direction is prevented by the portion of the via conductor 4 that extends into the recess 6 because the center C6 is offset from the center C51. Therefore, even if a force is applied along the circumferential direction of the via conductor 4 in a plan view, it is unlikely to move relative to each conductor layer and each insulating layer. As a result, it is considered unlikely that the via conductor 4 will peel off from each conductor layer.

[0027] Thus, in the wiring board of this embodiment, recesses 6 are formed on the surface 2a of each conductor layer, such as the conductor layer 22, having a center C6 that is offset from the center C51 of the first opening 51 of the through hole 5 in a plan view. Therefore, it is believed that delamination of the via conductor 4 is suppressed. As a result, it is believed that the internal connection reliability is improved in the wiring board of this embodiment.

[0028] [Relationship between the characteristics of the shape of through holes and the characteristics of the shape of recesses] As described above, the recess 6 of the wiring board in the embodiment is formed in conjunction with the formation of the through hole 5. Therefore, the recess 6 may have similar characteristics in terms of shape to those of the through hole 5. Some of these characteristics will be described below with reference to Figures 3A and 3B, which schematically show the through hole 5 and the recess 6.

[0029] In Figures 3A and 3B, in a plan view, the center C52 of the second opening 52 of the through hole 5 is offset in the first direction (+X direction) relative to the center C51 of the first opening 51. That is, in a plan view, the position of the center C52 is shifted in the +X direction relative to the position of the center C51. The second opening 52 is eccentric in the +X direction relative to the center C51 of the first opening 51 in a plan view, and in other words, the first opening 51 is eccentric in the second direction, opposite to the first direction, relative to the center C52 of the second opening 52 in a plan view. Hereafter, the second direction will also be referred to as the "-X direction," and when there is no need to distinguish between directions, the "+X direction" and the "-X direction" will be collectively referred to simply as the "X direction."

[0030] Furthermore, the tip 6a of the recess 6 is offset in the +X direction in a plan view with respect to the center C6 of the recess 6 on the surface 2a of each conductor layer, such as the conductor layer 22 (see Figure 2). In other words, in a plan view, the position of the tip 6a is shifted in the +X direction with respect to the position of the center C6. The tip 6a of the recess 6a is eccentric in the +X direction with respect to the center C6 of the recess 6 on the surface 2a in a plan view; in other words, on the surface 2a, the recess 6 is eccentric in the -X direction with respect to the tip 6a in a plan view.

[0031] In other words, the central axis of the through hole 5 is tilted so as to be offset in the +X direction with respect to the Z direction on the side of the second opening 52, and the central axis of the recess 6 is also tilted so as to be offset in the +X direction with respect to the Z direction on the side of the tip 6a. Thus, the recess 6 in the examples of Figures 1 and 2, schematically shown in Figures 3A and 3B, has the same characteristics as the through hole 5 with respect to its central axis.

[0032] Furthermore, as described above, the center C6 of the recess 6 on the surface 2a of each conductor layer is offset relative to the center C51 of the first opening 51 of the through hole 5 in a plan view, and the tip 6a of the recess 6 is offset relative to the center C6 of the recess 6 in a plan view. Therefore, the tip 6a of the recess 6 may also be offset relative to the center C51 of the first opening 51 in a plan view. As shown in Figures 3A and 3B, if the direction in which the center C6 is offset relative to the center C51 and the direction in which the tip 6a is offset relative to the center C6 are the same, then the tip 6a of the recess 6 is also offset relative to the center C51 in a plan view. In that case, the offset D1 of the tip 6a relative to the center C51 of the first opening 51 is greater than the offset D2 of the center C6 of the recess 6 on the surface 2a of each conductor layer relative to the center C51 of the first opening 51. If the offset D1 is greater than the offset D2, it is considered that the via conductor 4 will be even less likely to move relative to each conductor layer and each insulating layer. As a result, it is considered that delamination of the via conductor 4 from each conductor layer is less likely to occur.

[0033] As shown in Figure 3B, the through-hole 5 has a tapered shape that narrows downwards, and the second opening 52 of the through-hole 5 is eccentric in plan view relative to the first opening 51. Therefore, the inclination angle of the inner wall surfaces of each insulating layer exposed in the through-hole 5 changes in the circumferential direction of the through-hole 5. That is, the first wall surface 3a and the second wall surface 3b facing each other in the through-hole 5 in Figure 3B may be inclined at different angles.

[0034] Similarly, the recess 6 has a tapered shape that narrows downwards, and the tip 6a is offset in plan view from the center C6 of the recess 6 on the surface 2a of each conductor layer. Therefore, the inclination angle of the inner wall surface of each conductor layer exposed in the recess 6 changes in the circumferential direction of the recess 6. That is, the third wall surface 2c and the fourth wall surface 2d, which face each other within the recess 6 in Figure 3A, may be inclined at different angles.

[0035] In Figure 3B, if the angle θ1 (first angle) of the first wall surface 3a of each insulating layer with respect to the Z direction is greater than the angle θ2 (first angle) of the second wall surface 3b of each insulating layer with respect to the Z direction, then the angle θ3 (third angle) of the third wall surface 2c of each conductor layer with respect to the Z direction is greater than the angle θ4 (fourth angle) of the fourth wall surface 2d of each conductor layer with respect to the Z direction. On the other hand, if angle θ2 is greater than angle θ1, then angle θ4 is greater than angle θ3.

[0036] In other words, in the cross-section of the wiring board 1 along the Z direction, drawn by a cutting line passing through the center of the through-hole 5 (hereinafter, this cross-section will also be referred to as the "first cross-section"), of the two wall surfaces 3a and 3b of the insulating layers facing each other across the through-hole 5, the first wall surface 3a has an angle θ1 with respect to the Z direction, and the second wall surface 3b has an angle θ2 with respect to the Z direction. More specifically, the first cross-section is a cross-section drawn by a cutting line passing through the center C51 of the first opening 51 and the center C52 of the second opening 52. On the other hand, of the two wall surfaces 2c and 2d of the conductor layers facing each other across the recess 6 in the first cross-section, the third wall surface 2c located on the side of the first wall surface 3a has an angle θ3 with respect to the Z direction, and the fourth wall surface 2d located on the side of the second wall surface 3b has an angle θ4 with respect to the Z direction.

[0037] In the example in Figure 3A, angle θ1 is greater than angle θ2, and therefore angle θ3 is greater than angle θ4. On the other hand, contrary to the example in Figure 3A, angle θ2 may be greater than angle θ1, in which case angle θ4 is greater than angle θ3. By giving angles θ1 to θ4 such a magnitude relationship, it is easy to offset the center C6 of the recess 6 on the surface 2a of each conductor layer relative to the center C51 of the first opening 51 in a plan view. Furthermore, the offset D1 of the tip 6a of the recess 6 with respect to the center C51 of the first opening 51 of the through hole 5 can be made greater than the offset D2 of the center C6 of the recess 6 on the surface 2a with respect to the center C51 of the first opening 51.

[0038] [Examples of dimensions around through holes and recesses] The thickness T3 of the insulating layer through which the through-hole 5 passes (the distance between the upper and lower conductor layers sandwiching the insulating layer) is, for example, 5 μm or more and 15 μm or less. The width W1 of the through-hole 5 on the upper surface of each insulating layer (width of the first opening 51) is, for example, 5 μm or more and 15 μm or less, and the width W2 of the through-hole 5 on the lower surface of each insulating layer (width of the second opening 52) is, for example, 2 μm or more and 10 μm or less. Small diameter and short via conductors 4 can be provided. In particular, in the wiring board 1 of this embodiment, the via conductor 4 (see Figure 1) is less likely to peel off from each conductor layer, so even with a small diameter via conductor 4, problems such as open faults and increased electrical resistance are less likely to occur between the via conductor 4 and each conductor layer.

[0039] The width W3 of the recess 6 on the surface 2a of each conductor layer is 1 μm or more and 5 μm or less. The depth D6 of the recess 6 is 1 μm or more and 5 μm or less. The angles θ1 and θ2 are, for example, 10° or more and 30° or less, and the difference between angles θ1 and θ2 is, for example, 0° or more and 10° or less in absolute value. The angles θ3 and θ4 are, for example, 40° or more and 55° or less, and the difference between angles θ3 and θ4 is, for example, 0° or more and 10° or less in absolute value.

[0040] The angles θ1 to θ4 are determined for the first cross-section. Angle θ1 is determined by the arctangent of (the distance in the X direction between the outer edge of the first opening 51 on the first wall surface 3a side and the outer edge of the second opening 52) / (the thickness of the insulating layer T3). Similarly, angle θ2 is determined by the arctangent of (the distance in the X direction between the outer edge of the first opening 51 on the second wall surface 3b side and the outer edge of the second opening 52) / (the thickness of the insulating layer T3). Angle θ3 is determined by the arctangent of (the distance in the X direction between the outer edge of the recess 6 on the third wall surface 2c side and the tip 6a of the recess 6 on the surface 2a of each conductor layer) / (the depth D6 of the recess 6). Angle θ4 is determined by the arctangent of (the distance in the X direction between the outer edge of the recess 6 on the fourth wall surface 2d side and the tip 6a of the recess 6 on the surface 2a of each conductor layer) / (the depth D6 of the recess 6).

[0041] <Method for manufacturing a wiring board according to an embodiment> Referring to Figures 4A to 4K, the manufacturing method of the wiring board according to the embodiment will be explained using the wiring board 1 shown in Figure 1 as an example.

[0042] As shown in Figure 4A, a support substrate SP is prepared, which includes a core layer GS and metal film layers ML1 and ML2 laminated on both sides of the core layer GS, respectively. The core layer GS is composed of, for example, glass material or glass epoxy material. The metal film layers ML1 and ML2 are single-layer or multi-layer metal films formed by electroless plating or sputtering, respectively, using materials such as copper and titanium. The metal film layer ML1 and the metal film layer ML2 are joined by an adhesive layer AL, which is composed of an adhesive whose adhesive properties change upon exposure to light, for example.

[0043] In the following explanation, the side of the support substrate SP closer to the core layer GS will also be referred to as "bottom" or "lower side," and the side further from the core layer GS will also be referred to as "top" or "upper side." Therefore, the side of each element constituting the wiring board that faces the support substrate SP will also be referred to as the "bottom surface," and the side that faces away from the support substrate SP will also be referred to as the "top surface."

[0044] A conductive layer 21 is formed on the metal film layer ML2 on both sides of the prepared support substrate SP. In the formation of the conductive layer 21, for example, a plating resist (not shown) having predetermined openings is formed on the metal film layer ML2. By electroplating using the metal film layer ML2 as a power supply layer, a plating film is deposited in the openings of the plating resist. Subsequently, the plating resist is removed. A conductive layer 21 is formed, containing each conductive pattern made of the plating film deposited in the openings of the plating resist.

[0045] After the conductor layer 21 is formed, an insulating layer 31 is formed to cover the conductor layer 21. The insulating layer 31 is made of an insulating resin such as epoxy resin, BT resin, or phenolic resin. In the formation of the insulating layer 31, as an example, a film made of an insulating resin such as epoxy resin is laminated on the conductor layer 21 and the metal film layer ML2. The insulating layer 31 is formed by thermocompressing the laminated resin film to the conductor layer 21 and the metal film layer ML2, for example by heating and pressurizing.

[0046] As shown in Figure 4B, a conductor layer 22 is formed on the insulating layer 31. Furthermore, through holes 5 are formed in the insulating layer 31, and via conductors 4 are formed within the through holes 5. Note that in Figure 4B, and later in Figures 4C, 4D, and 4G-4J, only one surface of the support substrate SP is shown, and the state of the other side is omitted. However, the insulating layer and conductor layer may be formed on the unillustrated surface of the support substrate SP in the same way as the illustrated side, or they may not be formed at all.

[0047] The conductor layer 22 and the via conductor 4 are basically formed using a general semi-additive method, but specifically, they are formed in the same way as the method for forming the conductor layer 23 and the via conductor 4 described with reference to Figures 4C to 4H. Therefore, similar to the conductor layer 22 in Figure 4H, a recess 6 is formed on the upper surface of the conductor layer 21 that is in contact with the via conductor 4 in Figure 4B. Although not shown, the upper surface 31a of the insulating layer 31 may be provided with the protective film PF shown in Figure 4C after the insulating layer 31 is formed and before the through-hole 5 is formed. A specific method for forming the through-hole 5, including the formation of the recess 6, will be described below with reference to Figures 4C to 4F, using the formation of the through-hole 5 into the insulating layer 32 as an example.

[0048] As shown in Figure 4C, an insulating layer 32 is formed to cover the upper surfaces of the conductor layer 22 and the insulating layer 31. The insulating layer 32 is formed by, for example, the same method as for forming the insulating layer 31, by heat-pressing a resin film having appropriate insulating properties, such as epoxy resin. Thus, the method for manufacturing a wiring board of this embodiment includes forming the conductor layer 22 and forming the insulating layer 32 that covers the conductor layer 22.

[0049] In the example shown in Figure 4C, a protective film PF is provided on the upper surface 32a of the insulating layer 32, which is the surface facing away from the conductor layer 22. The protective film PF is bonded to the upper surface 32a of the insulating layer 32, for example, via an arbitrary adhesive layer (not shown). The protective film PF may be provided on the upper surface 32a after the formation of the insulating layer 32, or it may be provided on one side of the resin film used to form the insulating layer 32 before the formation of the insulating layer 32. In the manufacturing method of the wiring board of this embodiment, forming the insulating layer 32 may include forming a resin layer as the insulating layer 32, which has a protective film PF on the surface facing away from the conductor layer 22, as shown in the example in Figure 4C.

[0050] For the formation of the protective film PF, materials with high refractive index and optical transparency are preferable for the formation of the recesses 6 (see Figure 4D). Examples of materials for the protective film PF include resins such as polyethylene naphthalate (PEN) and polyethylene terephthalate (PET). Therefore, the protective film PF may contain polyethylene naphthalate or polyethylene terephthalate. The optical properties of polyethylene naphthalate may facilitate the formation of cone-shaped recesses 6.

[0051] As shown in Figure 4D, a through-hole 5 is formed in the insulating layer 32. The through-hole 5 that penetrates the insulating layer 32 has a first opening 51 that opens facing upward and a second opening 52 that opens facing downward. That is, a through-hole 5 is formed that has a first opening 51 that opens facing away from the conductor layer 22 and a second opening 52 that opens facing the conductor layer 22. A tapered through-hole 5 is formed, with the second opening 52 being smaller than the first opening 51. In Figure 4D, since a protective film PF is formed on the upper surface 32a of the insulating layer 32, the through-hole 5 also penetrates the protective film PF.

[0052] The formation of the through-hole 5 will be explained in more detail with reference to Figures 4E and 4F. Figures 4E and 4F show enlarged views of the IVE section shown in Figure 4D during the process of forming the through-hole 5. Figure 4E shows the state of the IVE section at the beginning of the process of forming the through-hole 5, and Figure 4F shows the state immediately after the formation of the through-hole 5.

[0053] As shown in Figure 4E, laser light LB is irradiated onto the location where the through-hole 5 is to be formed in the insulating layer 32. By irradiating the insulating layer 32 with laser light LB, the irradiated area and its vicinity sublimate, and the through-hole 5 is formed in the sublimated portion. As the laser light LB for forming the through-hole 5, a laser light that has high directivity and can have high power is preferred. By using a laser light LB with such characteristics, it becomes possible to form a through-hole 5 that has a width relatively small relative to the thickness of the insulating layer 32. Ultraviolet (UV) laser light is an example of a laser light LB particularly suitable for forming such through-holes 5. Therefore, forming the through-hole 5 in the manufacturing method of the wiring board of this embodiment may include irradiating with a laser light in the ultraviolet band as the laser light LB. Note that the laser light LB used to form the through-hole 5 may be a laser light from a laser other than a UV laser, such as a carbon dioxide laser light or a YAG laser light.

[0054] In the example shown in Figure 4E, since the protective film PF is formed on the upper surface 32a of the insulating layer 32, the laser beam LB first irradiates the protective film PF. Forming the through-hole 5 in the manufacturing method of the wiring board of this embodiment may include irradiating the protective film PF with the laser beam LB, as shown in Figure 4E. By irradiating the insulating layer 32 with the laser beam LB via the protective film PF rather than directly irradiating the insulating layer 32 with the laser beam LB, it is possible to prevent foreign matter from adhering to the upper surface 32a of the insulating layer 32.

[0055] When the protective film PF is irradiated with laser light LB, an aperture PF1 is first formed in the protective film PF, penetrating it. Subsequently, the diffusing component LB1 of the irradiated laser light LB is reflected from the wall surface of aperture PF1 and incident on the insulating layer 32. The diffusing component LB1 is reflected from the wall surface of aperture PF1 over its entire circumference. As a result, within the insulating layer 32, the power of the laser light LB in the center of the spot LBS is stronger than the power of the peripheral part of the spot LBS. The laser light LB, whose power is amplified in the center of the spot LBS, irradiates the surface 2a of the conductive layer 22. As a result, the portion of the surface 22a of the conductive layer 22 that is irradiated by the center of the laser light LB sublimes. Consequently, a recess 6 is formed on the surface 22a. In the conductive layer 22, sublimation occurs over a larger area closer to the surface 22a in the thickness direction of the conductive layer 22, so a recess 6 with a cone-shaped form that tapers toward the opposite side of the surface 22a is formed.

[0056] Thus, in the manufacturing method of the wiring board of this embodiment, irradiating with laser light LB may include increasing the power of the central part of the spot LBS of the laser light LB compared to the peripheral part of the spot LBS. For example, by increasing the power of the central part of a laser light that can have high power, such as a UV laser, it is possible to sublimate a part of the surface of a conductor layer made of a metal such as copper to form a recess. Furthermore, by providing a protective film PF on the upper surface 32a of the insulating layer 32 and utilizing the aperture PF1 of the protective film PF formed by irradiation with laser light LB, the power of the central part of the spot LBS of the laser light LB can be easily increased.

[0057] The diffusion component LB1 of the laser beam LB cannot normally be incident at a uniform angle around the entire circumference of the aperture PF1 wall. Therefore, the reflected light of the diffusion component LB1 is unlikely to occur at a uniform reflection angle around the entire circumference of the aperture PF1. Consequently, the power of the laser beam LB is amplified at a position that is biased in plan view from the center of the spot LBS of the laser beam LB. On the other hand, the opening of the through hole 5 (first opening) formed in the upper surface 32a of the insulating layer 32 is formed at approximately the same position in plan view as the spot LBS of the laser beam LB because the reflected light from the wall of the aperture PF1 has not yet converged at the upper surface 32a.

[0058] As a result, as shown in Figure 4F, a recess 6 is formed on the surface 2a of the conductor layer 22, having a center C6 that is offset from the center C51 of the first opening 51 in a plan view. Thus, forming the through hole 5 in the manufacturing method of the wiring board of this embodiment involves forming a recess 6 on the surface 2a of the conductor layer 22 on the insulating layer 32 side, which has a conical shape that tapers toward the opposite side of the through hole 5. The center C6 of the recess 6 on the surface 2a of the conductor layer 22 is offset from the center C51 of the first opening 51 of the through hole 5 in a plan view. By forming such a recess 6, it is possible to make it difficult for the via conductor 4 (see Figure 4H) formed in a later process to peel off from the conductor layer 22. That is, as explained in the description of the wiring board of this embodiment, a part of the via conductor 4 formed in a later process enters into the recess 6 which is offset from the center C51 of the first opening 51 in a plan view, so the via conductor 4 is difficult to rotate along the circumferential direction. Therefore, the via conductor 4 is difficult to move relative to the conductor layer 22 and the insulating layer 32. In other words, delamination of the via conductor 4 from the conductor layer 22 is unlikely to occur.

[0059] In the manufacturing method of the wiring board according to this embodiment, a recess 6 is formed on the surface 2a of the conductor layer 22 exposed to the through-hole 5 through the formation of the through-hole 5. That is, the recess 6 is not formed in a separate process or by a separate means after the formation of the through-hole 5, but rather the through-hole 5 and the recess 6 are formed in a series of processes, such as irradiation with laser light LB, within the same process. Thus, in the manufacturing method of the wiring board according to this embodiment, the recess 6, which can contribute to preventing the peeling of the via conductor 4, is formed through the formation of the through-hole 5 in the process of forming the through-hole 5, so the recess 6 can be easily formed in a short time. Therefore, it is considered that the manufacturing method of the wiring board according to this embodiment makes it possible to manufacture a wiring board with good internal connection reliability more easily than conventional methods.

[0060] The through-holes 5 and recesses 6 formed by this series of processes are formed to have similar characteristics in terms of shape. For example, the wall surfaces of the through-holes 5 and recesses 6, both of which have a tapered shape, may have a specific relationship with respect to the angle with respect to the Z direction. That is, in the cross-section shown in Figure 4F, if the angle θ1 of one of the two wall surfaces of the insulating layer 32 facing each other across the through-hole 5 is greater than the angle θ2 of the other wall surface, then the angle θ3 on the same side as angle θ1 of the two wall surfaces of the conductive layer 22 facing each other across the recess 6 is greater than the angle θ4 on the same side as angle θ2. On the other hand, if angle θ2 is greater than angle θ1, then angle θ4 is greater than angle θ3. In Figure 4F, angle θ1 is greater than angle θ2, and therefore angle θ3 is greater than angle θ4.

[0061] Therefore, in Figure 4F, the tip 6a of the recess 6 is offset with respect to the center C6 of the recess 6 on the surface 2a of the conductor layer 22 in the same direction as the offset of the center C52 of the second opening 52 with respect to the center C51 of the first opening 51 of the through hole 5. Furthermore, in a plan view, the tip 6a of the recess 6 is offset with respect to the center C51 of the first opening 51, and the magnitude of this offset is greater than the offset of the center C6 of the recess 6 on the surface 2a of the conductor layer 22 with respect to the center C51 of the first opening 51.

[0062] After the through-holes 5 and recesses 6 are formed, the protective film PF is removed, for example, using a suitable release agent.

[0063] As shown in Figure 4G, a metal film 4a, for example made of copper, is formed on the upper surface 32a of the insulating layer 32 and inside the through-hole 5 by electroless plating or sputtering.

[0064] As shown in Figure 4H, a conductor layer 23 is formed on the upper surface 32a of the insulating layer 32. Via conductors 4 are formed inside the through holes 5 formed in the insulating layer 32. Via conductors 4 are also formed in recesses 6 formed on the upper surface 2a of the conductor layer 22 that are exposed to the through holes 5. The recesses 6 are filled with the conductor constituting the via conductors 4. The conductor layer 23 is formed in the same manner as the conductor layers 21 and 22. For example, the conductor layer 23 is formed by a semi-additive method. That is, a plating resist (not shown) is formed on a metal film 4a (see Figure 4G), having openings corresponding to the conductor patterns included in the conductor layer 23 and also having openings above the through holes 5. An electroplated film is deposited in the openings of the plating resist by electroplating using the metal film 4a as a power supply layer. Via conductors 4 are formed inside the through holes 5. After the electroplated film is formed, the plating resist is removed, and the portion of the metal film 4a exposed by the removal of the plating resist is removed, for example, by quick etching. A conductor layer 23 containing individual conductor patterns that are separated from each other is formed.

[0065] As shown in Figure 4I, an insulating layer 33, a conductive layer 24, and a via conductor 4 penetrating the insulating layer 33 are formed in the same manner as the previously described method for forming the insulating layer 31, conductive layer 23, and via conductor 4. Then, a solder resist 72 is formed on the conductive layer 24 and the insulating layer 33. The solder resist 72 is formed by any method, such as spraying, laminating, or coating, using, for example, a photosensitive polyimide resin or epoxy resin. Note that the solder resist 72 may be formed not immediately after the formation of the conductive layer 24, but after the removal of the metal film layer ML2 of the support substrate SP, as described below.

[0066] As shown in Figure 4J, the core layer GS of the support substrate SP is removed. The lower surface of the metal film layer ML2 of the support substrate SP is exposed. The core layer GS is removed, for example, by softening the adhesive layer AL by laser irradiation, and then peeling the metal film layer ML2 from the adhesive layer AL. The metal film layer ML2 is then removed by etching. The lower surfaces of the conductor layer 21 and the insulating layer 31 are exposed.

[0067] As shown in Figure 4K, solder resist 71 covering the lower surfaces of the conductor layer 21 and the insulating layer 31 is formed in the same manner as the solder resist 72 is formed. Openings are formed in the solder resists 71 and 72 to expose the conductor layer 21 or the conductor layer 24. The openings in the solder resists 71 and 72 are formed, for example, by photolithography including exposure and development steps, or by irradiation with laser light. For example, by going through the above steps, the wiring board 1 illustrated in Figure 1 is completed.

[0068] The wiring boards of the embodiments are not limited to those having the structures illustrated in each drawing, or the structures, shapes, and materials illustrated herein. As stated above, the wiring boards of the embodiments may have any laminated structure. A recess 6 communicating with a through hole may be formed on the surface exposed to a through hole in any of the conductor layers of the wiring board of the embodiments. In the wiring board of the embodiments, the surface of at least one conductor layer has a recess communicating with a through hole in which a via conductor connected to that conductor layer is formed. The wiring boards of the embodiments are not limited to so-called coreless substrates, such as the wiring board 1 in Figure 1, and may include a core substrate and build-up layers formed on both sides thereof.

[0069] The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to each drawing. For example, the method for forming each insulating layer and each conductor layer is not limited to the method described with reference to Figures 4A to 4K. Conductor layers 21 to 24 may be formed by a method other than the semi-additive method, such as the fully additive method. Insulating layers 31 to 33 may be formed using any form of resin, not limited to a film-like resin. The formation of recesses on the surface of the conductor layers through the formation of through holes may be performed by means other than using a protective film on the insulating layer, but as described above, using a protective film makes it easy to form recesses. The protective film may be made of a material other than PEN and PET. The method for manufacturing the wiring board of the embodiment may include any additional steps other than those described above, and some of the described steps may be omitted. [Explanation of Symbols]

[0070] 1 Wiring board 21-24 Conductor layer 2a Surface (top surface) of the conductor layer 2c Third wall 2d 4th wall 31-33 Insulating layer 3a 1st wall 3b 2nd wall 4 via conductors 5 Through hole 51 First opening 52 Second opening 6 recesses 6a Tip Center of the first opening of C51 Center of the second opening of C52 C6 Center of the recess on the surface of each conductive layer D1 Offset of the tip of the recess relative to the center of the first opening D2 The deviation of the center of the recess on the surface of each conductor layer relative to the center of the first opening. LB laser light LBS Spot PF protective film θ1 Angle of the first wall (first angle) θ2 Angle of the second wall (second angle) θ3 Angle of the third wall (third angle) θ4 Angle of the fourth wall (fourth angle) +X 1st direction (+X direction)

Claims

1. Conductor layer, An insulating layer covering the aforementioned conductive layer, A through-hole that penetrates the insulating layer and has a first opening on the side opposite to the conductor layer and a second opening facing the conductor layer, A via conductor formed inside the through hole and connected to the conductor layer, A wiring board comprising, The surface of the conductor layer on the via conductor side has a recess that communicates with the through hole, The recess is smaller than the second opening in a plan view and has a conical shape that tapers toward the opposite side from the via conductor. The center of the recess on the surface of the conductive layer is offset from the center of the first opening in a plan view.

2. A wiring board according to claim 1, The tip of the recess facing away from the through hole is offset from the center of the first opening in a plan view. The deviation of the tip from the center of the first opening is greater than the deviation of the center of the recess on the surface from the center of the first opening.

3. A wiring board according to claim 1, In a plan view, the center of the second opening is offset in a first direction relative to the center of the first opening. The tip of the recess facing away from the through hole is offset in the first direction in a plan view with respect to the center of the recess on the surface.

4. A wiring board according to claim 1, In a cross-section along the thickness direction of the wiring board, drawn by a cutting line passing through the center of the through-hole, the first wall surface of the insulating layer, which is one of the first and second wall surfaces facing each other across the through-hole, has a first angle with respect to the thickness direction. The second wall surface has a second angle with respect to the thickness direction, In the cross-section, the third wall surface located on the side of the first wall surface among the two wall surfaces of the conductor layer facing each other across the recess has a third angle with respect to the thickness direction. The fourth wall surface, located on the side of the second wall surface among the two wall surfaces, has a fourth angle with respect to the thickness direction. If the first angle is greater than the second angle, then the third angle is greater than the fourth angle, If the second angle is greater than the first angle, then the fourth angle is greater than the third angle.

5. Forming a conductive layer, Forming an insulating layer to cover the aforementioned conductive layer, The insulating layer is formed to have a through hole having a first opening that opens facing the opposite side from the conductor layer, A via conductor connected to the conductor layer is formed inside the through hole, A method for manufacturing a wiring board, including, Forming the through-hole involves forming a recess on the insulating layer side surface of the conductor layer, having a conical shape that tapers toward the opposite side of the through-hole, such that, in a plan view, the center of the recess is offset from the center of the first opening.

6. A method for manufacturing a wiring board according to claim 5, Forming the insulating layer includes forming a resin layer having a protective film on the surface opposite to the conductor layer as the insulating layer. Forming the through-holes involves irradiating the protective film with laser light.

7. A method for manufacturing a wiring board according to claim 6, wherein forming the through hole includes irradiating the through hole with a laser beam in the ultraviolet band.

8. A method for manufacturing a wiring board according to claim 6, wherein the protective film contains polyethylene naphthalate.

9. A method for manufacturing a wiring board according to claim 6, wherein irradiating with laser light includes using the protective film to increase the power of the central part of the laser light spot compared to the peripheral part of the spot.

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