Methods for processing chroma signals

Abstract

This invention provides a video processing method and system for signaling parameters for encoding chroma signals. [Solution] The decoding method includes determining the value of pps_chroma_tool_offsets_present_flag in a picture parameter set (PPS) associated with a video sequence, and decoding one or more picture-level chroma deblocking parameters in a bitstream associated with a video sequence in response to the value of pps_chroma_tool_offsets_present_flag being equal to 1, wherein one or more picture-level chroma deblocking parameters include tc_offset.

Description

Technical Field

[0001] Cross - reference to Related Applications

[0001] This disclosure claims the benefit of priority of U.S. Provisional Patent Application No. 62 / 980,120, filed on Feb. 21, 2020, which is hereby incorporated by reference in its entirety.

[0002] Technical Field

[0002] This disclosure generally relates to video processing, and more particularly to methods and apparatus for signaling parameters (e.g., chroma residual scaling parameters, chroma de - blocking parameters, etc.) for coding a chroma signal.

Background Art

[0003] Background

[0003] Video is a set of static pictures (or "frames") that capture visual information. To reduce memory and transmission bandwidth, video can be compressed before storage or transmission and decompressed before display. The compression process is usually called encoding, and the decompression process is usually called decoding. Most commonly, there are various video coding formats that use standardized video coding techniques based on prediction, transformation, quantization, entropy coding, and in - loop filtering. Video coding standards such as the High Efficiency Video Coding (HEVC / H.265) standard, the Versatile Video Coding (VVC / H.266) standard, and the AVS standard that specify a particular video coding format have been formulated by standardization organizations. As more advanced video coding techniques are adopted in video standards, the coding efficiency of new video coding standards becomes higher.

Summary of the Invention

Means for Solving the Problems

[0004] Summary of the Disclosure

[0004] Embodiments of the present disclosure provide a video decoding method. This method includes receiving a sequence parameter set (SPS) and determining whether chroma residual scaling is enabled or disabled with respect to a slice associated with the SPS, based on a first flag signaled within the SPS.

[0005]

[0005] Embodiments of the present disclosure also provide a video coding method, which includes signaling a first flag in a sequence parameter set (SPS) associated with a slice, indicating whether chroma residual scaling is enabled or disabled with respect to the slice.

[0006]

[0006] Embodiments of the present disclosure also provide a video encoder, which includes a memory for storing a set of instructions and at least one processor, the at least one processor configured to cause the system to execute a set of instructions to receive a sequence parameter set (SPS) and to determine whether chroma residual scaling is enabled or disabled with respect to a slice associated with the SPS, based on a first flag signaled in the SPS.

[0007]

[0007] Embodiments of the present disclosure also provide a video decoder. The video decoder includes a memory for storing a set of instructions and at least one processor, the at least one processor executing a set of instructions to generate a first flag indicating whether chroma residual scaling is enabled or disabled with respect to a slice, a sequence parameter set associated with the slice. The system is configured to perform signaling using SPS.

[0008]

[0008] Embodiments of the present disclosure also provide a non-temporary computer-readable medium for storing a set of instructions, the set of instructions being executable by at least one processor of a computer system for causing the computer system to perform a method for decoding video content. The method includes receiving a sequence parameter set (SPS) and determining whether chroma residual scaling is enabled or disabled with respect to a slice associated with the SPS, based on a first flag signaled in the SPS.

[0009]

[0009] Embodiments of the present disclosure also provide a non-temporary computer-readable medium for storing a set of instructions, the set of instructions being executable by at least one processor of a computer system to cause the computer system to perform a method for encoding video content. The method includes signaling a first flag in a sequence parameter set (SPS) associated with a slice to indicate whether chroma residual scaling is enabled or disabled with respect to the slice.

[0010]

[0010] Embodiments of the present disclosure provide a video processing method. This method includes determining whether a video sequence is monochrome, and, in response to the determination that the video sequence is not monochrome, signaling a chroma deblocking parameter in the bitstream associated with the video sequence, wherein if the video sequence is monochrome, the chroma deblocking parameter is not signaled in the bitstream.

[0011]

[0011] Embodiments of the present disclosure also provide video processing equipment, which includes memory for storing sets of instructions and at least one processor, the at least one processor configured to execute sets of instructions to determine whether a video sequence is monochrome and, in response to the determination that the video sequence is not monochrome, to signal a chroma deblocking parameter in the bitstream associated with the video sequence, the chroma deblocking parameter not signaled in the bitstream if the video sequence is monochrome.

[0012]

[0012] Embodiments of the present disclosure also provide a non-temporary computer-readable medium for storing a set of instructions, the set of instructions being executable by at least one processor of a computer system for causing the computer system to perform a method for processing video content. The method includes determining whether a video sequence is monochrome, and, in response to the determination that the video sequence is not monochrome, signaling a chroma deblocking parameter in the bitstream associated with the video sequence, while if the video sequence is monochrome, no chroma deblocking parameter is signaled in the bitstream.

[0013] Brief explanation of the drawing

[0013] Embodiments and various aspects of the present disclosure are shown in the following detailed description and accompanying drawings. Various features shown in the figures are not drawn to scale. [Brief explanation of the drawing]

[0014] [Figure 1]

[0014] This is a schematic diagram showing the structure of an example of a video sequence according to some embodiments of the present disclosure. [Figure 2A]

[0015] This is a schematic diagram illustrating an exemplary encoding process of a hybrid video encoding system consistent with embodiments of the present disclosure. [Figure 2B]

[0016] A schematic diagram showing another exemplary encoding process of a hybrid video coding system that conforms to an embodiment of the present disclosure. [Figure 3A]

[0017] A schematic diagram showing an exemplary decoding process of a hybrid video coding system that conforms to an embodiment of the present disclosure. [Figure 3B]

[0018] A schematic diagram showing another exemplary decoding process of a hybrid video coding system that conforms to an embodiment of the present disclosure. [Figure 4]

[0019] A block diagram of an exemplary device for encoding or decoding video according to some embodiments of the present disclosure. [Figure 5]

[0020] A syntax table showing an exemplary picture header (PH) level luma mapping chroma scaling (LMCS) syntax that conforms to an embodiment of the present disclosure. [Figure 6]

[0021] A syntax table showing an exemplary slice level LMCS syntax that conforms to an embodiment of the present disclosure. [Figure 7]

[0022] An example of implementing the syntax shown in FIGS. 5 and 6 that conforms to an embodiment of the present disclosure is shown. [Figure 8]

[0023] A syntax table showing an exemplary PH level LMCS syntax that conforms to an embodiment of the present disclosure. [Figure 9]

[0024] A syntax table showing an exemplary slice level LMCS syntax that conforms to an embodiment of the present disclosure. [Figure 10]

[0025] An example of implementing the syntax shown in FIGS. 8 and 9 that conforms to an embodiment of the present disclosure is shown. [Figure 11]

[0026] A syntax table showing an exemplary PH level LMCS syntax that conforms to an embodiment of the present disclosure. [Figure 12]

[0027] This is a syntax table showing exemplary slice-level LMCS syntax consistent with embodiments of the present disclosure. [Figure 13]

[0028] This is a syntax table showing exemplary PH level syntax for signaling chromatodeblocking parameters, consistent with embodiments of the present disclosure. [Figure 14]

[0029] This is a syntax table showing exemplary slice-level syntax for signaling chromatodeblocking parameters, consistent with embodiments of the present disclosure. [Figure 15]

[0030] This is a syntax table showing exemplary picture parameter set (PPS) syntax for signaling chromatodeblocking parameters, consistent with embodiments of the present disclosure. [Figure 16]

[0031] This is a syntax table showing exemplary PPS syntax consistent with embodiments of the present disclosure, in which pps_chroma_tool_offsets_present_flag is replaced with ChromaArrayType. [Figure 17]

[0032] This is a syntax table showing exemplary PPS syntax for signaling chromatodeblocking parameters, consistent with embodiments of the present disclosure. [Figure 18]

[0033] This is a flowchart illustrating an exemplary method for signaling LMCS parameters, consistent with embodiments of the present disclosure. [Figure 19]

[0034] This is a flowchart illustrating an exemplary method for signaling LMCS parameters, consistent with embodiments of the present disclosure. [Figure 20]

[0035] This is a flowchart illustrating an exemplary method for signaling chromatodeblocking parameters, consistent with embodiments of the present disclosure. [Modes for carrying out the invention]

[0015] Detailed explanation

[0036] Here, the examples refer in detail to the exemplary embodiments shown in the accompanying drawings. The following description refers to the accompanying drawings, where, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described below in the description of the exemplary embodiments do not represent all implementations consistent with the present invention. Rather, they are merely examples of equipment and methods consistent with the embodiments relating to the present invention enumerated in the accompanying claims. . Specific aspects of this disclosure are described in more detail below. In the event of any conflict between terms and / or definitions invoked by reference and those specified herein, the terms and definitions set forth herein shall prevail.

[0016]

[0037] The Joint Video Experts Team (JVET) of the ITU-T Video Coding Expert Group (ITU-T VCEG) and the ISO / IEC Moving Picture Expert Group (ISO / IEC MPEG) is currently developing the Versatile Video Coding (VVC / H.266) standard. The VVC standard aims to double the compression efficiency of its predecessor, the High Efficiency Video Coding (HEVC / H.265) standard. In other words, the goal of VVC is to achieve the same subjective quality as HEVC / H.265 using half the bandwidth.

[0017]

[0038] To achieve the same subjective quality as HEVC / H.265 using half the bandwidth, JVET uses the Joint Exploration Model (JEM) reference software. We are developing a technology that surpasses HEVC using this method. Because the coding technology has been incorporated into JEM, JEM has achieved substantially higher coding performance than HEVC.

[0018]

[0039] The VVC standard is a relatively recent development and continues to incorporate more coding technologies that result in better compression performance. VVC is based on the same hybrid video coding system used in modern video compression standards such as HEVC, H.264 / AVC, MPEG2, and H.263.

[0019]

[0040] An image is a set of still pictures (or "frames") arranged in chronological order to store visual information. An image capture device (e.g., a camera) can be used to capture and store these pictures in chronological order, and an image playback device (e.g., a television, computer, smartphone, tablet computer, video player, or any end-user terminal with display capabilities) can be used to display such pictures in chronological order. Furthermore, in some applications, for surveillance, conferences, or live broadcasts, the image capture device can transmit the captured image to an image playback device (e.g., a computer with a monitor) in real time.

[0020]

[0041] To reduce the memory space and transmission bandwidth required by such applications, video can be compressed before storage and transmission and decompressed before display. This compression and decompression can be implemented by software executed by a processor (e.g., a general-purpose computer processor) or dedicated hardware. The module for compression is generally called an "encoder," and the module for decompression is generally called a "decoder." Encoders and decoders can be collectively called a "codec." Encoders and decoders can be implemented as various appropriate hardware, software, or combinations thereof. For example, a hardware implementation of an encoder and decoder may include circuits such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), rewritable gate arrays (FPGAs), discrete logic, or any combination thereof. A software implementation of an encoder and decoder may include program code, computer executable instructions, firmware, or algorithms or processes implemented by any appropriate computer fixed in a computer-readable medium. Video compression and decompression can be implemented using various algorithms or standards such as MPEG-1, MPEG-2, MPEG-4, and the H.26x series. In some applications, a codec can decompress video from a first encoding standard and then recompress the decompressed video using a second encoding standard; in this case, the codec can be called a "transcoder."

[0021]

[0042] A video encoding process can identify and retain useful information that can be used to reconstruct a picture, while ignoring information that is not important for reconstruction. If the ignored, non-essential information cannot be completely reconstructed, such an encoding process is called "lossy." It is possible to do so. Otherwise, such an encoding process can be called "reversible." Most encoding processes are reversible, which is a trade-off to reduce the required memory space and transmission bandwidth.

[0022]

[0043] Useful information in an encoded picture (referred to as the "current picture") includes changes relative to a reference picture (e.g., a previously encoded and reconstructed picture). Such changes can include changes in pixel position, brightness, or color, of which position changes are the most important. Changes in the position of a group of pixels representing an object may reflect the movement of the object between the reference picture and the current picture.

[0023]

[0044] A picture that is coded without referencing another picture (i.e., such a picture is its own reference picture) is called an "I picture". A picture that is coded using a past picture as a reference picture is called a "P picture". A picture that is coded using both a past picture and a future picture as reference pictures (i.e., the reference is "bidirectional") is called a "B picture".

[0024]

[0045] Figure 1 shows the structure of an example of a video sequence 100 according to some embodiments of the present disclosure. The video sequence 100 may be live video or captured and archived video. The video 100 may be real video, computer-generated video (e.g., computer game video), or a combination thereof (e.g., real video with augmented reality effects). The video sequence 100 may be input from a video capture device (e.g., a camera), a video archive containing previously captured video (e.g., video files stored in a storage device), or a video feed interface for receiving video from a video content provider (e.g., a video broadcast transceiver).

[0025]

[0046] As shown in Figure 1, the video sequence 100 may include a series of pictures arranged in time along a timeline, including pictures 102, 104, 106, and 108. Pictures 102-106 are sequential, with more pictures between picture 106 and picture 108. In Figure 1, picture 102 is an I picture, and its reference picture is picture 102 itself. Picture 104 is a P picture, and as indicated by the arrow, its reference picture is picture 102. Picture 106 is a B picture, and as indicated by the arrow, its reference pictures are pictures 104 and 108. In some embodiments, the reference picture of a picture (e.g., picture 104) may not be immediately before or after that picture. For example, the reference picture of picture 104 may be a picture preceding picture 102. It should be noted that the reference pictures 102-106 are merely examples, and this disclosure does not limit the embodiments of the reference pictures to the examples shown in Figure 1.

[0026]

[0047] Typically, a video codec does not encode or decode all pictures at once because such a task is computationally complex. Rather, a video codec can divide a picture into basic segments and encode or decode the picture segment by segment. In this disclosure, such basic segments are referred to as basic processing units ("BPUs"). For example, structure 110 in Figure 1 shows an example of the structure of a picture (e.g., any of pictures 102-108) in video sequence 100. In structure 110, the picture is divided into 4x4 basic processing units, the boundaries of which are indicated by dashed lines. In some embodiments, basic processing units may be referred to as "macroblocks" in some video encoding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC) and as "encoded tree units" ("CTUs") in some other video encoding standards (e.g., H.265 / HEVC or H.266 / VVC). 128x128, 64x64, 32x32, 16x16, 4x8, 16x32, or any shape and size of pixels, etc. This processing unit can have a variable size within the picture. The size and shape of the basic processing unit can be selected for the picture based on a balance between coding efficiency and the level of detail to be maintained within the basic processing unit.

[0027]

[0048] A basic processing unit can be a logical unit that may contain various types of video data stored in computer memory (e.g., a video frame buffer). For example, a basic processing unit of a color picture may include a luminance component (Y) representing achromatic luminance information, one or more chroma components (e.g., Cb and Cr) representing color information, and associated syntax elements of the basic processing unit in which the lumina and chroma components may have the same size. In some video encoding standards (e.g., H.265 / HEVC or H.266 / VVC), the lumina and chroma components may be called a "coding tree block" ("CTB"). Any operation performed on a basic processing unit can be repeated on its lumina and chroma components, respectively.

[0028]

[0049] Video encoding involves multiple operational stages, examples of which are shown in Figures 2A-2B and 3A-3B. For each stage, the size of the basic processing unit may still be too large to process and can therefore be further divided into segments referred to in this disclosure as “basic processing subunits.” In some embodiments, a basic processing subunit may be referred to as a “block” in some video encoding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC) or as an “encoded unit” (“CU”) in other video encoding standards (e.g., H.265 / HEVC or H.266 / VVC). A basic processing subunit may be the same size as or smaller than a basic processing unit. Like a basic processing unit, a basic processing subunit is a logical unit that may contain various types of video data (e.g., Y, Cb, Cr, and associated syntax elements) stored in computer memory (e.g., a video frame buffer). Any operation performed on the basic processing subunit can be repeated on its luma and chroma components, respectively. It should be noted that such divisions may be performed at further levels as needed. It should also be noted that various stages can divide the basic processing unit using various methods.

[0029]

[0050] For example, during the mode determination stage (an example of which is shown in Figure 2B), the encoder can determine which prediction mode (e.g., intra-picture prediction or inter-picture prediction) to use for a basic processing unit, and the basic processing unit may be too large to make such a decision. The encoder can divide the basic processing unit into multiple basic processing subunits (e.g., CUs in H.265 / HEVC or H.266 / VVC) and determine the type of prediction for each basic processing subunit.

[0030]

[0051] In another example (shown in Figures 2A and 2B), during the prediction phase, the encoder can perform prediction operations at the level of the basic processing subunit (e.g., CU). However, in some cases, the basic processing subunit may still be too large to process. The encoder can further divide the basic processing subunit into smaller segments (e.g., called "prediction blocks" or "PBs" in H.265 / HEVC or H.266 / VVC) and perform prediction operations at that level.

[0031]

[0052] In another example (shown in Figures 2A-2B), during the conversion stage, the encoder can perform conversion operations on residual subunits (e.g., CUs). However, in some cases, the subunit may still be too large to process. The encoder can further divide the subunit into smaller segments (e.g., called "conversion blocks" or "TBs" in H.265 / HEVC or H.266 / VVC) and perform conversion operations at that level. The same subunit can be divided into the following methods: It should be noted that the prediction and conversion phases may differ. For example, in H.265 / HEVC or H.266 / VVC, the prediction and conversion blocks of the same CU may have different sizes and numbers.

[0032]

[0053] In the structure 110 of Figure 1, the basic processing unit 112 is further divided into 3x3 basic processing subunits, with the boundaries indicated by dotted lines. Different basic processing units of the same picture can be divided into basic processing subunits in different ways.

[0033]

[0054] In some implementations, to provide parallel processing and error tolerance for video encoding and decoding, a picture can be divided into processing regions, thereby ensuring that the encoding or decoding process does not depend on information from any other region of the picture. In other words, each region of the picture can be processed independently. This allows the codec to process different regions of the picture in parallel, thus increasing the efficiency of encoding. Furthermore, if data in a region is corrupted during processing or lost during network transmission, the codec can correctly encode or decode other regions of the same picture without relying on the corrupted or lost data, thus providing error tolerance. Some video encoding standards allow a picture to be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC offer two types of regions: "slices" and "tiles." It should also be noted that the various pictures in video sequence 100 may have various division schemes for dividing the picture into regions.

[0034]

[0055] For example, in Figure 1, structure 110 is divided into three regions 114, 116, and 118, with their boundaries shown as solid lines within structure 110. Region 114 contains four basic processing units. Regions 116 and 118 each contain six basic processing units. It should be noted that the basic processing units, basic sub-units, and regions of structure 110 in Figure 1 are merely examples, and this disclosure does not limit its embodiments.

[0035]

[0056] Figure 2A shows a schematic diagram of an example of an encoding process 200A consistent with embodiments of the present disclosure. For example, the encoding process 200A may be performed by an encoder. As shown in Figure 2A, the encoder can encode a video sequence 202 into a video bitstream 228 according to process 200A. Similar to the video sequence 100 in Figure 1, the video sequence 202 may include a set of pictures (referred to as “original pictures”) arranged in chronological order. Similar to the structure 110 in Figure 1, each original picture in the video sequence 202 may be divided by the encoder into a basic processing unit, a basic processing subunit, or a region for processing. In some embodiments, the encoder can perform process 200A at the level of a basic processing unit with respect to each original picture in the video sequence 202. For example, the encoder can perform process 200A in an iterative manner, in which case the encoder can encode a basic processing unit in a single iteration of process 200A. In some embodiments, the encoder can execute process 200A in parallel for each region of the original picture in the video sequence 202 (e.g., regions 114-118).

[0036]

[0057] In Figure 2A, the encoder can feed the basic processing unit of the original picture of the video sequence 202 (referred to as the "original BPU") to the prediction stage 204 to generate predicted data 206 and the predicted BPU 208. The encoder can subtract the predicted BPU 208 from the original BPU to generate the residual BPU 210. The encoder can feed the residual BPU 210 to the conversion stage 212 and the quantization stage 214 to generate the quantized conversion coefficients 216. The encoder can feed the predicted data 206 and the quantized conversion coefficients 216 to the binary encoding stage 226 to generate the video bitstream 228. Components 202, 204, 206, 208, 210, 212, 21 Components 4, 216, 226, and 228 can be called the “forward path”. During process 200A, after the quantization stage 214, the encoder can feed the quantized transformation coefficients 216 to the inverse quantization stage 218 and the inverse transformation stage 220 to generate the reconstructed residual BPU 222. The encoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction criterion 224 to be used in the prediction stage 204 of the next iteration of process 200A. Components 218, 220, 222, and 224 of process 200A can be called the “reconstruction path”. The reconstruction path can be used to ensure that both the encoder and the decoder use the same reference data for prediction.

[0037]

[0058] The encoder can iteratively perform process 200A to encode each original BPU of the original picture (in the forward path) and generate a prediction criterion 224 for encoding the next original BPU of the original picture (in the reconstruction path). After encoding all the original BPUs of the original picture, the encoder can proceed to encoding the next picture in the video sequence 202.

[0038]

[0059] Referring to process 200A, the encoder can receive a video sequence 202 generated by a video acquisition device (e.g., a camera). As used herein, the term “receive” can mean any action of any means of receiving, inputting, acquiring, retrieving, obtaining, reading, accessing, or inputting data.

[0039]

[0060] In prediction stage 204, in the current iteration, the encoder receives the original BPU and prediction criterion 224 and can perform prediction operations to generate prediction data 206 and the predicted BPU 208. The prediction criterion 224 may be generated from the reconstruction path of the previous iteration in process 200A. The purpose of prediction stage 204 is to reduce information redundancy by extracting prediction data 206, which can be used to reconstruct the original BPU as the predicted BPU 208 from the prediction data 206 and prediction criterion 224.

[0040]

[0061] Ideally, the predicted BPU208 can be identical to the original BPU. However, due to less-than-ideal prediction and reconstruction operations, the predicted BPU208 is generally slightly different from the original BPU. To record such differences, the encoder can generate the predicted BPU208 and then subtract it from the original BPU to produce the residual BPU210. For example, the encoder can subtract the pixel values ​​(e.g., grayscale or RGB values) of the predicted BPU208 from the corresponding pixel values ​​of the original BPU. As a result of such subtraction between the corresponding pixels of the original BPU and the predicted BPU208, each pixel of the residual BPU210 may have a residual value. Compared to the original BPU, the predicted data 206 and residual BPU210 may have fewer bits, but they can be used to reconstruct the original BPU without significantly degrading quality.

[0041]

[0062] To further compress the residual BPU 210, in the transformation step 212, the encoder can reduce the spatial redundancy of the residual BPU 210 by decomposing it into a set of two-dimensional "basis patterns," each basis pattern being associated with a "transformation coefficient." The basis patterns can have the same size (e.g., the size of the residual BPU 210). Each basis pattern can represent the variation frequency (e.g., luminance variation frequency) component of the residual BPU 210. None of the basis patterns can be reconstructed from any combination (e.g., a linear combination) of any other basis pattern. In other words, the decomposition can decompose the variation of the residual BPU 210 into the frequency domain. Such decomposition is analogous to the discrete Fourier transform of a function, the basis patterns are analogous to the basis functions of the discrete Fourier transform (e.g., trigonometric functions), and the transformation coefficients are analogous to the coefficients associated with the basis functions.

[0042]

[0063] Various transformation algorithms can use various basis patterns. For example, various transformation algorithms can be used in transformation stage 212, such as discrete cosine transform and discrete sine transform. The transformation in transformation stage 212 is reversible. That is, the encoder can reconstruct the residual BPU 210 by the inverse operation of the transformation (called the "inverse transform"). For example, to reconstruct the pixels of the residual BPU 210, the inverse transform may be to multiply the values ​​of the corresponding pixels in the basis pattern by the respective coefficients in question, and then add the products to obtain a weighted sum. In the video coding standard, both the encoder and the decoder can use the same transformation algorithm (and therefore the same basis pattern). Therefore, the encoder can record only the transformation coefficients, and the decoder can reconstruct the residual BPU 210 from the transformation coefficients without receiving the basis pattern from the encoder. Although the transformation coefficients may have fewer bits than the residual BPU 210, the transformation coefficients can be used to reconstruct the residual BPU 210 without significantly degrading the quality. Therefore, the residual BPU210 is further compressed.

[0043]

[0064] The encoder can further compress the conversion coefficients in the quantization stage 214. In the conversion process, various basis patterns can represent various fluctuation frequencies (e.g., luminance fluctuation frequencies). Since the human eye is generally good at recognizing low-frequency fluctuations, the encoder can ignore high-frequency fluctuation information without causing significant quality degradation during decoding. For example, in the quantization stage 214, the encoder can generate quantized conversion coefficients 216 by dividing each conversion coefficient by an integer value (called a "quantization parameter") and rounding the quotient to its nearest integer. After this operation, some conversion coefficients of the high-frequency basis pattern can be converted to zero, and the conversion coefficients of the low-frequency basis pattern can be converted to smaller integers. The encoder can ignore the zero-value quantized conversion coefficients 216, thereby further compressing the conversion coefficients. The quantization process is also reversible, and the quantized conversion coefficients 216 can be reconstructed into conversion coefficients by the inverse operation of quantization (called "inverse quantization").

[0044]

[0065] Because the encoder ignores the remainder of division in rounding operations, the quantization stage 214 can be irreversible. Typically, the quantization stage 214 can contribute the greatest information loss within process 200A. The greater the information loss, the fewer bits the quantized conversion coefficients 216 may require. To obtain various levels of information loss, the encoder can use various values ​​of the quantization parameter or any other parameter of the quantization process.

[0045]

[0066] In the binary encoding stage 226, the encoder can encode the predicted data 206 and the quantized conversion coefficients 216 using a binary encoding technique such as entropy encoding, variable-length encoding, arithmetic encoding, Huffman encoding, context-adaptive binary arithmetic encoding, or any other lossless or lossy compression algorithm. In some embodiments, in addition to the predicted data 206 and the quantized conversion coefficients 216, the encoder can encode other information in the binary encoding stage 226, such as the prediction mode used in the prediction stage 204, parameters of the prediction operation, the type of transformation in the transformation stage 212, parameters of the quantization process (e.g., quantization parameters), and encoder control parameters (e.g., bitrate control parameters). The encoder can use the output data from the binary encoding stage 226 to generate a video bitstream 228. In some embodiments, the video bitstream 228 can be further packetized for network transmission.

[0046]

[0067] Referring to the reconstruction path of process 200A, in the inverse quantization step 218, the encoder can perform inverse quantization on the quantized conversion coefficients 216 to generate reconstructed conversion coefficients. In the inverse conversion step 220, the encoder can generate reconstructed residual BPU 222 based on the reconstructed conversion coefficients. The encoder is reconstructed The residual BPU222, in addition to the predicted BPU208, can be used to generate a prediction criterion 224 that will be used in the next iteration of process 200A.

[0047]

[0068] It should be noted that other variations of process 200A can be used to encode the video sequence 202. In some embodiments, the encoder may perform the steps of process 200A in a different order. In some embodiments, one or more steps of process 200A may be combined into a single step. In some embodiments, a single step of process 200A may be divided into multiple steps. For example, the transformation step 212 and the quantization step 214 may be combined into a single step. In some embodiments, process 200A may include additional steps. In some embodiments, process 200A may omit one or more steps of Figure 2A.

[0048]

[0069] Figure 2B shows a schematic diagram of another example 200B of an encoding process consistent with embodiments of the present disclosure. Process 200B may be modified from process 200A. For example, process 200B may be used by an encoder compliant with a hybrid video encoding standard (e.g., the H.26x series). Compared with process 200A, the forward path of process 200B further includes a mode determination stage 230 and divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044. The reconstruction path of process 200B additionally includes a loop filter stage 232 and a buffer 234.

[0049]

[0070] Generally, prediction techniques can be classified into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-picture prediction or "intra-prediction") can use one or more already coded pixels of neighboring BPUs within the same picture to predict the current BPU. That is, the prediction criterion 224 in spatial prediction may include neighboring BPUs. Spatial prediction can reduce the inherent spatial redundancy of a picture. Temporal prediction (e.g., inter-picture prediction or "inter-prediction") can use one or more already coded regions of a picture to predict the current BPU. That is, the prediction criterion 224 in temporal prediction may include coded pictures. Temporal prediction can reduce the inherent temporal redundancy of a picture.

[0050]

[0071] Referring to process 200B, in the forward path, the encoder performs prediction operations in the spatial prediction stage 2042 and the temporal prediction stage 2044. For example, in the spatial prediction stage 2042, the encoder can perform intra-prediction. With respect to the original BPU of the picture being encoded, the prediction criterion 224 may include one or more neighboring BPUs within the same picture that are encoded (in the forward path) and reconstructed (in the reconstruction path). The encoder can generate a predicted BPU 208 by extrapolating neighboring BPUs. Extrapolation techniques may include, for example, linear extrapolation or linear interpolation, polynomial extrapolation or polynomial interpolation, etc. In some embodiments, the encoder can perform extrapolation at the pixel level, for example, by extrapolating the values ​​of the corresponding pixels for each pixel of the predicted BPU 208. The adjacent BPUs used for extrapolation may be located relative to the original BPU from various directions, such as vertically (e.g., above the original BPU), horizontally (e.g., to the left of the original BPU), diagonally (e.g., below left, below right, above left, or above right of the original BPU), or in any direction specified by the video encoding standard used. In intra-prediction, the prediction data 206 may include, for example, the location (e.g., coordinates) of the adjacent BPUs used, the size of the adjacent BPUs used, the extrapolation parameters, and the orientation of the adjacent BPUs used relative to the original BPU.

[0051]

[0072] In another example, during the temporal prediction stage 2044, the encoder can perform interpretation. With respect to the original BPU of the current picture, the prediction criterion 224 may include one or more pictures (referred to as "reference pictures") that are encoded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference pictures are encoded per BPU. It can be reconstructed. For example, the encoder can generate a reconstructed BPU by adding the reconstructed residual BPU222 to the predicted BPU208. Once all the reconstructed BPUs of the same picture have been generated, the encoder can generate a reconstructed picture as a reference picture. The encoder can perform a "motion estimation" operation to find a matching region within a range of the reference picture (called a "search window"). The position of the search window in the reference picture can be determined based on the position of the original BPU in the current picture. For example, the search window can be centered in the reference picture at a position with the same coordinates as the original BPU in the current picture and can be extended over a given distance. The encoder can then find a region similar to the original BPU within the search window (e.g., using a PEL recursive algorithm, a block matching algorithm). By identifying (using rhythm, etc.), the encoder can determine that region is a match region. The match region may have different dimensions from the original BPU (e.g., smaller, equal, larger, or different shape). Since the reference picture and the current picture are separated in time within the timeline (e.g., as shown in Figure 1), the match region can be considered to "move" to the position of the original BPU over time. The encoder can record the direction and distance of such movement as a "motion vector". If multiple reference pictures are used (e.g., picture 106 in Figure 1), the encoder can search for a match region for each reference picture and determine its associated motion vector. In some embodiments, the encoder can assign weights to the pixel values ​​of the match region for each matching reference picture.

[0052]

[0073] Motion estimation can be used to identify various types of motion, such as translation, rotation, and scaling. In interpretation, the prediction data 206 may include, for example, the location of the matching region (e.g., coordinates), motion vectors associated with the matching region, the number of reference pictures, and weights associated with the reference pictures.

[0053]

[0074] To generate the predicted BPU 208, the encoder can perform a “motion compensation” operation. Motion compensation can be used to reconstruct the predicted BPU 208 based on prediction data 206 (e.g., motion vectors) and prediction criteria 224. For example, the encoder can move the matching region of a reference picture according to the motion vector, within which the encoder can predict the original BPU of the current picture. If multiple reference pictures are used (e.g., picture 106 in Figure 1), the encoder can move the matching region of each reference picture according to the individual motion vectors and average the pixel values ​​of the matching region. In some embodiments, if the encoder assigns weights to the pixel values ​​of the matching region of each matching reference picture, the encoder can add up the weighted sum of the pixel values ​​of the moved matching region.

[0054]

[0075] In some embodiments, interpretation can be unidirectional or bidirectional. Unidirectional interpretation can use one or more reference pictures that are in the same temporal direction relative to the current picture. For example, picture 104 in Figure 1 is a unidirectional interpretation picture in which the reference picture (e.g., picture 102) precedes picture 104. Bidirectional interpretation can use one or more reference pictures that are in both temporal directions relative to the current picture. For example, picture 106 in Figure 1 is a bidirectional interpretation picture in which the reference pictures (e.g., pictures 104 and 108) are in both temporal directions relative to picture 104.

[0055]

[0076] Continuing to refer to the forward path of process 200B, after the spatial prediction stage 2042 and the temporal prediction stage 2044, in the mode determination stage 230, the encoder may select a prediction mode (e.g., one of intra-prediction or inter-prediction) for the current iteration of process 200B. For example, the encoder may perform a rate distortion optimization technique, in which the encoder determines the bit rate of the candidate prediction mode and the candidate prediction mode. Depending on the distortion of the reconstructed reference picture below, a prediction mode can be selected to minimize the value of the cost function. Depending on the selected prediction mode, the encoder can generate the corresponding predicted BPU208 and predicted data206.

[0056]

[0077] In the reconstruction path of process 200B, if intra-prediction mode is selected in the forward path, after generating prediction criterion 224 (e.g., the current BPU being encoded and reconstructed within the current picture), the encoder can directly feed prediction criterion 224 to spatial prediction stage 2042 for later use (e.g., to extrapolate the next BPU of the current picture). If inter-prediction mode is selected in the forward path, after generating prediction criterion 224 (e.g., the current picture with all BPUs encoded and reconstructed), the encoder can feed prediction criterion 224 to loop filtering stage 232, where the encoder can apply loop filtering to prediction criterion 224 to reduce or eliminate distortions (e.g., blocking artifacts) caused by inter-prediction. Various loop filtering techniques can be applied in loop filtering stage 232, such as deblocking, sample-adaptive offset, and adaptive loop filtering. The loop-filtered reference picture can be stored in buffer 234 (or “decode picture buffer”) for later use (for example, to be used as an inter-predictive reference picture for future pictures in video sequence 202). The encoder may store one or more reference pictures in buffer 234 for use in the temporal prediction stage 2044. In some embodiments, the encoder may encode the loop filter parameters (e.g., the strength of the loop filter) along with the quantized transformation coefficients 216, the prediction data 206, and other information in the binary encoding stage 226.

[0057]

[0078] Figure 3A shows a schematic diagram of an example of a decoding process 300A consistent with embodiments of the present disclosure. Process 300A may be a decompression process corresponding to the compression process 200A in Figure 2A. In some embodiments, process 300A may be similar to the reconstruction path of process 200A. The decoder can decode the video bitstream 228 into a video stream 304 according to process 300A. The video stream 304 may be very similar to the video sequence 202. However, due to information loss in the compression and decompression processes (e.g., the quantization stage 214 in Figures 2A-2B), the video stream 304 is generally not identical to the video sequence 202. Similar to processes 200A and 200B in Figures 2A-2B, the decoder can execute process 300A at the level of basic processing units (BPUs) for each picture encoded within the video bitstream 228. For example, the decoder can execute process 300A in an iterative manner, in which case the decoder can decode a basic processing unit in one iteration of process 300A. In some embodiments, the decoder can execute process 300A in parallel for each region of picture (e.g., regions 114-118) encoded within the video bitstream 228.

[0058]

[0079] In Figure 3A, the decoder can feed a portion of the video bitstream 228 associated with the basic processing unit of the encoded picture (referred to as the "encoded BPU") to the binary decoding stage 302. In the binary decoding stage 302, the decoder can decode this portion into prediction data 206 and quantized transformation coefficients 216. The decoder can feed the quantized transformation coefficients 216 to the inverse quantization stage 218 and the inverse transformation stage 220 to generate the reconstructed residual BPU 222. The decoder can feed the prediction data 206 to the prediction stage 204 to generate the predicted BPU 208. The decoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction criterion 224. In some embodiments, the prediction criterion 224 may be stored in a buffer (e.g., a decoded picture buffer in computer memory). The decoder processes The prediction criterion 224 can be fed to the prediction stage 204 in order to perform the prediction operation in the next iteration of Seth 300A.

[0059]

[0080] The decoder can iteratively perform process 300A to decode each encoded BPU of the encoded picture and generate a predictive criterion 224 for encoding the next encoded BPU of the encoded picture. After decoding all encoded BPUs of the encoded picture, the decoder can output the picture to the video stream 304 for display and proceed to decode the next encoded picture in the video bitstream 228.

[0060]

[0081] In the binary decoding stage 302, the decoder can perform the inverse operation of the binary encoding technique used by the encoder (e.g., entropy encoding, variable-length encoding, arithmetic encoding, Huffman encoding, context-adaptive binary arithmetic encoding, or any other arbitrary lossless compression algorithm). In some embodiments, in addition to the predicted data 206 and the quantized conversion coefficients 216, the decoder can decode other information in the binary decoding stage 302, such as the prediction mode, parameters of the prediction operation, type of conversion, parameters of the quantization process (e.g., quantization parameters), and encoder control parameters (e.g., bitrate control parameters). In some embodiments, if the video bitstream 228 is transmitted in packets over the network, the decoder can depacketize the video bitstream 228 and then feed it to the binary decoding stage 302.

[0061]

[0082] Figure 3B shows a schematic diagram of another example 300B of a decoding process consistent with embodiments of the present disclosure. Process 300B may be modified from process 300A. For example, process 300B may be used by a decoder compliant with a hybrid video coding standard (e.g., the H.26x series). Compared to process 300A, process 300B further divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and additionally includes a loop filter stage 232 and a buffer 234.

[0062]

[0083] In process 300B, with respect to the encoded basic processing unit ("current BPU") of the encoded picture being decoded ("current picture"), the prediction data 206 decoded by the decoder from binary decoding stage 302 may contain various types of data depending on which prediction mode was used by the encoder to encode the current BPU. For example, if intra-prediction is used by the encoder to encode the current BPU, the prediction data 206 may include prediction mode indicators (e.g., flag values) indicating the intra-prediction, parameters of the intra-prediction operation, etc. Parameters of the intra-prediction operation may include, for example, the location (e.g., coordinates) of one or more adjacent BPUs used as a reference, the size of the adjacent BPU, extrapolation parameters, the orientation of the adjacent BPU relative to the original BPU, etc. In another example, if inter-prediction is used by the encoder to encode the current BPU, the prediction data 206 may include prediction mode indicators (e.g., flag values) indicating the inter-prediction, parameters of the inter-prediction operation, etc. The parameters for the interpretation operation may include, for example, the number of reference pictures associated with the current BPU, the weights associated with each reference picture, the location (e.g., coordinates) of one or more matching regions within each reference picture, and one or more motion vectors associated with each matching region.

[0063]

[0084] Based on the prediction mode indicator, the decoder can decide whether to perform a spatial prediction (e.g., intra-prediction) in spatial prediction stage 2042 or a temporal prediction (e.g., inter-prediction) in temporal prediction stage 2044. Details of the execution of such spatial or temporal predictions are shown in Figure 2B and will not be repeated below. After performing such spatial or temporal predictions, the decoder can generate the predicted BPU208. As shown in Figure 3A, the decoder can generate the predicted BPU208 and the reconstructed residual BPU By adding 222, a prediction criterion 224 can be generated.

[0064]

[0085] In process 300B, the decoder can feed the prediction criterion 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 to perform a prediction operation in the next iteration of process 300B. For example, if the current BPU is decoded using intra-prediction in spatial prediction stage 2042, after generating the prediction criterion 224 (e.g., the decoded current BPU), the decoder can directly feed the prediction criterion 224 to spatial prediction stage 2042 for later use (e.g., to extrapolate the next BPU of the current picture). If the current BPU is decoded using inter-prediction in temporal prediction stage 2044, after generating the prediction criterion 224 (e.g., the reference picture from which all BPUs have been decoded), the encoder can feed the prediction criterion 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder can apply a loop filter to the prediction criterion 224 in the manner described in Figure 2B. The loop-filtered reference picture can be stored in buffer 234 (e.g., a decode picture buffer in computer memory) for later use (e.g., for use as an inter-prediction reference picture for future encoded pictures of the video bitstream 228). The decoder may store one or more reference pictures in buffer 234 for use in the temporal prediction stage 2044. In some embodiments, if the prediction mode indicator of the prediction data 206 indicates that inter-prediction was used to encode the current BPU, the prediction data may further include loop filter parameters (e.g., loop filter strength).

[0065]

[0086] Figure 4 is a block diagram of an example of a device 400 for encoding or decoding video, consistent with embodiments of the present disclosure. As shown in Figure 4, the device 400 may include a processor 402. When the processor 402 executes instructions described herein, the device 400 can become a dedicated machine for encoding or decoding video. The processor 402 may be any type of circuit capable of manipulating or processing information. For example, the processor 402 may include any combination of any number of central processing units ("CPUs"), graphics processing units ("GPUs"), neural processing units ("NPUs"), microcontroller units ("MCUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general-purpose array logic (GALs), composite programmable logic units (CPLDs), rewritable gate arrays (FPGAs), systems on a chip (SoCs), application-specific integrated circuits (ASICs), and the like. In some embodiments, the processor 402 may be a set of processors grouped together as a single logical component. For example, as shown in Figure 4, the processor 402 may include a plurality of processors, including processor 402a, processor 402b, and processor 402n.

[0066]

[0087] The device 400 may also include a memory 404 configured to store data (e.g., sets of instructions, computer code, intermediate data, etc.). For example, as shown in Figure 4, the stored data may include program instructions (e.g., program instructions for implementing stages within processes 200A, 200B, 300A, or 300B) and processing data (e.g., video sequence 202, video bitstream 228, or video stream 304). The processor 402 can access the program instructions and processing data (e.g., via a bus 410) and execute the program instructions to perform operations or processing on the processing data. The memory 404 may include a high-speed random-access memory or a non-volatile memory. In some embodiments, the memory 404 may include any number of random-access memories (RAM), read-only memories (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, and memory chips. This may include any combination of RISTIC, CompactFlash® (CF) cards, etc. Memory 404 may also be a group of memories (not shown in Figure 4) that are grouped as a single logical component.

[0067]

[0088] Buses 410, such as an internal bus (e.g., a CPU memory bus) or an external bus (e.g., a universal serial bus port, a peripheral component interconnection express port), may be communication devices that transfer data between components within the device 400.

[0068]

[0089] To simplify the explanation without causing ambiguity, the processor 402 and other data processing circuits are collectively referred to as the “data processing circuits” in this disclosure. The data processing circuits may be implemented entirely in hardware, or as a combination of software, hardware, or firmware. In addition, the data processing circuits may be a single, independent module, or may be fully or partially integrated into any other component of the device 400.

[0069]

[0090] The device 400 may further include a network interface 406 for providing wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communication network, etc.). In some embodiments, the network interface 406 may include any number of network interface controllers (NICs), radio frequency (RF) modules, transponders, transceivers, modems, routers, gateways, wired network adapters, wireless network adapters, Bluetooth® adapters, infrared adapters, and Near Field Communication ("NFC") adapters. This may include any combination of PTA, cellular network chip, etc.

[0070]

[0091] In some embodiments, the device 400 may optionally further include a peripheral device interface 408 for providing connectivity to one or more peripheral devices. As shown in Figure 4, peripheral devices may include, but are not limited to, a cursor control device (e.g., mouse, touchpad or touchscreen), a keyboard, a display (e.g., cathode ray tube display, liquid crystal display or light-emitting diode display), a video input device (e.g., a camera or input interface coupled to a video archive), and the like.

[0071]

[0092] It should be noted that a video codec (for example, a codec that runs processes 200A, 200B, 300A, or 300B) can be implemented as any combination of any software or hardware modules within the device 400. For example, some or all stages of processes 200A, 200B, 300A, or 300B may be implemented as one or more software modules of the device 400, such as program instructions that can be loaded into memory 404. In another example, some or all stages of processes 200A, 200B, 300A, or 300B may be implemented as one or more hardware modules of the device 400, such as dedicated data processing circuits (e.g., FPGA, ASIC, NPU, etc.).

[0072]

[0093] In the VVC decoding process, an encoding tool called luma mapping with chroma scaling (LMCS) is added as a new processing block before the loop filter. LMCS has two main components. One component is in-loop mapping of the luma component based on an adaptive piecewise linear model. In-loop mapping of the luma component improves compression efficiency by adjusting the dynamic range of the input signal through the redistribution of codewords across the dynamic range. The other component is the application of luma-dependent chroma residual scaling to the chroma component. Chroma residual scaling is designed to compensate for the interaction between the luma signal and its corresponding chroma signal.

[0073]

[0094] VVC Draft 8 allows for control of chroma-scaling-based lumamapping (LMCS) signaling at both the picture and slice levels. The LMCS syntax for picture and slice headers is shown in Figures 5 and 6, respectively.

[0074]

[0095] As shown in Figure 5, if the picture-level LMCS flag ph_lmcs_enabled_flag is equal to 0, the flag signals that both chroma mapping and chroma residual scaling are disabled for all slices associated with the picture. If ph_lmcs_enabled_flag is equal to 1 and ChromaArrayType is not equal to 0, an additional flag ph_chroma_residual_scale_flag is signaled. ph_chroma_residual_scale_flag is a picture-level LMCS flag. Specifies whether chroma residual scaling is used when decoding the kucha.

[0075]

[0096] As shown in Figure 6, if ph_lmcs_enabled_flag is equal to 1, the slice-level LMCS flag slice_lmcs_enabled_flag is signaled. The LMCS flag slice_lmcs_enabled_flag is associated with the slice header. This specifies that chroma mapping should be enabled for that slice, and whether chroma scaling is used depends on the value of ph_chroma_residual_scale_flag. If slice_lmcs_enabled_flag is equal to 1 and ph_chroma_residual_scale_flag is equal to 1, then for that slice... Chroma residual scaling is enabled. If slice_lmcs_enabled_flag is equal to 1 and ph_chroma_residual_scale_flag is equal to 0, chroma residual scaling is disabled for that slice.

[0076]

[0097] A slice level LMCS flag slice_lmcs_enabled_flag equal to 0 is currently Specifies that neither luminous mapping nor chroma residual scaling should be enabled for the slice.

[0077]

[0098] A drawback of VVC Draft 8 is that it does not allow independent control of chroma residual scaling for each individual slice when a picture contains multiple slices.

[0078]

[0099] Specifically, using the syntax shown in Figures 5 and 6, whether residual scaling is used is consistent across all slices within a given picture. In other words, all of these slices are either on or all off. Consider an example where there are two slices in a picture and LMCS is enabled for both slices. In this example, the following combinations are not supported: -Slice 1: Luminous mapping is on, chroma residual scaling is off. - Slice 2: Luminous mapping is on, chroma residual scaling is on.

[0079]

[0100] Figure 7 shows three examples of slice-level LMCS control. Figure 7 shows examples A, B, and C. In all three examples, sps_lmcs_enabled_flag, ph_lmcs_enabled_flag, And the value of slice_lmcs_enabled_flag is equal to 1. Picture-level chroma residual scaling The flag is equal to 0 in case A and equal to 1 in case B. Since the picture level ph_chroma_residual_scale_flag is equal to 0, in case A both slice 1 and slice 2 chroma Residual scaling is turned off. In case B, ph_chroma_residual_scale_flag is equal to 1. Therefore, chroma residual scaling is turned on for both slices. In case C, chroma residual scaling is turned off and on for slices 1 and 2, respectively. VVC Draft 8 accepts cases A and B, but does not accept case C.

[0080]

[0101] This disclosure provides an LMCS method to solve the aforementioned shortcomings.

[0081]

[0102] In some embodiments, the picture-level chroma residual scaling flag is removed. This can be replaced by a slice-level chroma residual scaling flag. The disclosed method allows enabling or disabling chroma residual scaling for individual slices where LMCS is enabled at the picture level. The semantics of the newly added slice-level chroma residual scaling flag are defined as follows: slice_chroma_residual_scale_flag equal to 1 specifies that chroma residual scaling is enabled for the slice, and slice_chroma_residual_scale_flag equal to 0 specifies that chroma residual scaling is disabled for the slice. If slice_chroma_residual_scale_flag is not present, this flag is inferred to be equal to 0.

[0082]

[0103] Figures 8 and 9 illustrate the picture header syntax and slice header syntax, respectively, for the method described above. As shown in the picture header syntax of Figure 8, syntax element 301 (in VVC) is removed. As shown in the picture header syntax of Figure 9, syntax element 401 is revised from VVC.

[0083]

[0104] Figure 10 shows a schematic diagram of the slice level control of luma mapping and chroma residual scaling in the exemplary method described above, according to some embodiments of the present disclosure. Figure 10 shows examples A, B, and C. In all three examples, luma mapping is on. In example A, chroma residual scaling is off for both slices 1 and 2. In example B, chroma residual scaling is on for both slices 1 and 2. In example C, chroma residual coding is off for slice 1 and chroma residual scaling is on for slice 2. The syntax given in Figures 8 and 9 enables all three examples in Figure 10, whereas VVC Draft 8 only enables examples A and B in Figure 10.

[0084]

[0105] In some embodiments, chroma residual scaling can be controlled at both the picture level and the slice level. Similar to VVC Draft 8, ph_chroma_residual_scale_flag is signaled in the picture header. The semantics of ph_chroma_residual_scale_flag are defined as follows: ph_chroma_residual_scale_flag equal to 1 is at the picture level. Specifies that chroma residual scaling can be enabled for one or more slices related to the picture header, and ph_chroma_residual_scale_flag equal to 0 is related to the picture header. Specifies that chroma residual scaling is disabled for all consecutive slices. If ph_chroma_residual_scale_flag is not present, this flag is inferred to be equal to 0.

[0085]

[0106] The syntax for picture headers and slice headers is shown in Figures 11 and 12, respectively. As shown in Figure 11, the PH level syntax table is the same as that in VVC Draft 8. As shown by syntax element 601 in Figure 12, slice_chroma_residual_scale_flag is signaled if all of the following conditions are met: slice_lmcs_enabled_flag is equal to 1, ChromaArrayType is not equal to 0, and ph_chroma_residual_scale_flag is equal to 1.

[0086]

[0107] The semantics of the slice-level chroma residual scaling flag are the same as above: a slice_chroma_residual_scale_flag equal to 1 specifies that chroma residual scaling is enabled for the slice, and a slice_chroma_residual_scale_flag equal to 0 specifies that chroma residual scaling is disabled for the slice. If slice_chroma_residual_scale_flag is not present, this flag is inferred to be equal to 0.

[0087]

[0108] The advantage of the embodiments shown in Figures 11 and 12 is that when chroma residual scaling is turned off for all slices related to PH, there is no need to signal slice level flags, thus saving signaling overhead.

[0088]

[0109] The above embodiment allows the LMCS syntax to be moved to the slice level. This allows enabling and disabling chroma residual scaling for individual slices, thus improving the level of granularity of LMCS control. In accordance with this disclosure, in some situations, such as the embodiments described below, it may be beneficial to move the chroma coding control syntax to the picture header.

[0089]

[0110] In VVC Draft 8, chroma deblocking parameters (e.g., beta offset and tc offset) are signaled in the picture header or slice header even if there are no chroma color components in the picture. However, if there are no chroma color components in the picture, it is not necessary to signal the chroma deblocking parameters.

[0090]

[0111] Embodiments of this disclosure provide a method for processing video content along with signaling of chroma deblocking parameters.

[0091]

[0112] In some embodiments, chroma deblocking parameters are signaled only if the chroma component is present in the video sequence (i.e., the video sequence is not monochrome). Figures 13 and 14 show exemplary picture header syntax and slice header syntax for signaling chroma deblocking parameters, respectively. As shown in Figures 13 and 14, proposed changes to the syntax in VVC Draft 8 are marked with dashed boxes. These drawings show that the beta and tc offsets of Cb and Cr are signaled only if ChromaArrayType != 0. This indicates that it will be used. For a detailed definition of ChromaArrayType, refer to the V reference incorporated herein. It can be found in VC Draft 8.

[0092]

[0113] In the embodiments shown in Figures 13 and 14, if ChromaArrayType is not equal to 0 The chroma deblocking parameters of the PPS syntax are signaled only in this case. Since the value of ChromaArrayType can only be obtained after decoding the SPS syntax, relying on ChromaArrayType creates an unwanted further dependency on SPS. To avoid the SPS / PPS dependency, separate_colour_plane_flag and chroma_format_idc are used. We propose signaling not only in SPS but also in PPS. For example, we can introduce two additional flags, whose semantics are shown below.

[0093]

[0114] A flag equal to 1, pps_separate_colour_plane_flag, specifies that the three color components of a 4:4:4 chroma format are coded separately. A flag equal to 0, pps_separate_colour_plane_flag, specifies that the color components are not coded separately. The value of pps_separate_colour_plane_flag is equal to the value of separate_colour_plane_flag.

[0094]

[0115] The parameter pps_chroma_format_idc is used for chroma sampling. Specify the pull. The value of pps_chroma_format_idc is equal to the value of chroma_format_idc.

[0095]

[0116] Depending on the value of pps_separate_colour_plane_flag, the value of the variable ChromaArrayType is changed. It can be specified as follows: If pps_separate_colour_plane_flag is equal to 0, ChromaArrayType is set to equal to pps_chroma_format_idc; otherwise (pps_separate_colour_plane_flag is equal to 1), ChromaArrayType is set to equal to 0.

[0096]

[0117] Figure 15 shows the pps_separate_colour_plane_flag and pps_chroma_format_idc. An example of PPS syntax for Gunnaring is shown. Syntax elements shown in the dashed boxes are changes to the syntax in VVC Draft 8.

[0097]

[0118] In some embodiments, in addition to the signaling of PPS's pps_separate_colour_plane_flag and pps_chroma_format_idc, the signaling of pps_chroma_tool_offsets_present_flag is also used. The ring can be skipped. Figure 16 shows exemplary PPS syntax without using pps_chroma_tool_offsets_present_flag. Syntax elements shown in the dashed boxes are changes to the syntax in VVC Draft 8.

[0098]

[0119] In some embodiments, the PPS syntax pps_chroma_tool_offsets_present_flag can be replaced with pps_chroma_tool_present_flag. In these embodiments, if pps_chroma_tool_present_flag is equal to 1, all chroma-related syntax in PPS is signaled. Similar to VVC Draft 8, separate_colour_plane_flag and chroma_format_idc are signaled only in SPS and not in PPS. stomach.

[0099]

[0120] The semantics of pps_chroma_tool_present_flag are given as follows: A flag equal to 1 for pps_chroma_tool_present_flag indicates that the chroma tool-related syntax elements are within the raw byte sequence payload (RBSP) syntax structure of the PPS, and a flag equal to 0 for pps_chroma_tool_present_flag indicates that the chroma tool offset-related syntax elements are not within the RBSP syntax structure of the PPS. If ChromaArrayType is equal to 0, the value of pps_chroma_tool_present_flag is equal to 0. Let's assume that.

[0100]

[0121] Figure 17 shows an exemplary PPS syntax using the proposed pps_chroma_tool_present_flag. Syntax elements within the dashed boxes are changes from the syntax in VVC Draft 8. It is shown that chroma-related syntax is signaled when pps_chroma_tool_present_flag is not equal to 0. Similar to VVC Draft 8, separate_colour_plane_flag and chroma_format_idc are signaled only in SPS. It is disabled and not signaled in PPS.

[0101]

[0122] In some embodiments, signaling of slice-level chroma deblocking parameters such as slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2, and slice_cb_beta_offset_div2 depends on the value of pps_chroma_tool_present_flag. If pps_chroma_tool_present_flag is equal to 0, slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2, and slice_cb_beta_offset_div2 are not signaled. If pps_chroma_tool_present_flag is equal to 1, slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2, or slice_cb_beta_offset_div2 will be signaled.

[0102]

[0123] In some embodiments, the signaling of picture-level chroma deblocking parameters such as ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, and ph_cb_beta_offset_div2 depends on the value of pps_chroma_tool_present_flag. If pps_chroma_tool_present_flag is equal to 0, ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, and ph_cb_beta_offset_div2 are not signaled. If pps_chroma_tool_present_flag is equal to 1, then ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, or ph_cb_beta_offset_div2 will be signaled.

[0103]

[0124] Figure 18 is a flowchart of exemplary method 1800 for signaling LMCS parameters, consistent with the embodiments described with respect to Figures 5 to 12. In some embodiments, method 1800 may be performed by a decoder and one or more software or hardware components of a device (e.g., device 400 in Figure 4). For example, a processor (e.g., processor 402 in Figure 4) may perform method 1800. In some embodiments, program code or the like may be executed by a computer (e.g., device 400 in Figure 4). Method 1800 can be implemented by a computer program product embodied in a computer-readable medium containing computer-executable instructions. As shown in Figure 18, this method may include the following steps:

[0104]

[0125] In step 1801, a bitstream containing encoded video data is received. The bitstream contains at least one sequence parameter set (SPS).

[0105]

[0126] In step 1803, it is determined whether chroma residual scaling is enabled or disabled for the slice associated with the SPS based on the SPS-level chroma scaling flag (e.g., slice_chroma_residual_scale_flag) signaled by the received SPS. If the flag has a value equal to 1, it is determined that chroma residual scaling is enabled for the slice. If the flag has a value equal to 0, it is determined that chroma residual scaling is disabled for the slice.

[0106]

[0127] Figure 19 is a flowchart of an exemplary method 1900 for signaling LMCS parameters, consistent with the embodiments described with respect to Figures 5 to 12. In some embodiments, method 1900 may be performed by one or more software or hardware components of an encoder and a device (e.g., device 400 in Figure 4). For example, a processor (e.g., processor 402 in Figure 4) can perform method 1900. In some embodiments, method 1900 may be implemented by a computer program product embodied in a computer-readable medium containing computer-executable instructions, such as program code executed by a computer (e.g., device 400 in Figure 4). As shown in Figure 19, method 1900 may include the following steps:

[0107]

[0128] In step 1901, determine whether chroma residual scaling is enabled or disabled for the slice.

[0108]

[0129] In step 1903, based on the determination result, a flag (e.g., slice_chroma_residual_scale_flag) is signaled in the sequence parameter set (SPS) associated with the slice to indicate whether chroma residual scaling is enabled or disabled for that slice. If chroma residual scaling is enabled for that slice, the flag value is set to 1. If chroma residual scaling is disabled for that slice, the flag value is set to 0.

[0109]

[0130] Figure 20 is a flowchart of an exemplary method 2000 for signaling chromadeblocking parameters, consistent with the embodiments described with respect to Figures 13 to 17. In some embodiments, method 2000 may be performed by one or more software or hardware components of an encoder, decoder, and device (e.g., device 400 in Figure 4). For example, a processor (e.g., processor 402 in Figure 4) can perform method 2000. In some embodiments, method 2000 may be implemented by a computer program product embodied in a computer-readable medium containing computer-executable instructions, such as program code executed by a computer (e.g., device 400 in Figure 4). As shown in Figure 20, method 2000 may include the following steps:

[0110]

[0131] Step 2001 determines whether the video sequence is monochrome.

[0111]

[0132] In step 2003, if the video sequence is not monochrome, it is determined that the chroma deblocking parameter is signaled within the bitstream associated with the video sequence, whereas if the video sequence is monochrome, the bitstream Within the system, it is determined that the chromatic deblocking parameters are not signaled.

[0112]

[0133] Embodiments can be further described using the following clauses: 1. A video decoding method implemented by a computer, Receiving a Sequence Parameter Set (SPS), and Based on the first flag signaled by SPS, determine whether chroma residual scaling is enabled or disabled for slices associated with SPS. Methods that include... 2. In response to the value of the first flag being equal to 1, determine that chroma residual scaling is enabled for the slice. The method described in Clause 1, further including the following: 3. In response to the value of the first flag being equal to 0, determine that chroma residual scaling is disabled for the slice. The method described in Clause 1 or 2, further including the following: 4. Receiving the second SPS, and If the second SPS does not have the first flag, determine that chroma residual scaling is disabled for the slice associated with the second SPS. The method described in any one of the clauses 1 to 3, further including the method described in any one of the clauses 1 to 3. 5. The method described in any one of the clauses 1 to 4, wherein the first flag is signaled based on a second flag signaled in the picture header associated with the slice. 6. The first value of the second flag indicates that chroma residual scaling is enabled for one or more slices associated with the picture header. The second value of the second flag indicates that chroma residual scaling is disabled for all slices associated with the picture header. The method described in Article 5. 7. Receiving the picture header, and In response to the second flag signaled in the picture header having the first value, determine that chroma residual scaling is disabled for all slices associated with the picture header. The method described in any one of the clauses 1 to 4, including the method described in any one of the clauses 1 to 4. 8. Determine whether luma mapping is enabled or disabled for a slice based on a second flag signaled by SPS. The method described in any one of the clauses 1 to 4, including the method described in any one of the clauses 1 to 4. 9. A video encoding method performed by a computer, Signal a first flag in the slice-related sequence parameter set (SPS) indicating whether chroma residual scaling is enabled or disabled for a given slice. Methods that include... 10. In response to enabling chroma residual scaling for a slice, set the value of the first flag to 1. The method described in Article 9, including the method described in Article 9. 11. In response to chroma residual scaling being disabled for the slice, set the value of the first flag to 0. The method described in Clause 9 or 10, including the method described in Clause 9 or 10. 12. Signal a second flag in the picture header to indicate whether chroma residual scaling is enabled for pictures associated with the picture header. The method described in any one of the clauses 9 to 11, further including the method described in any one of the clauses 9 to 11. 13. The method as described in Clause 12, wherein the slice is part of a picture, and the signaling of the first flag is in response to the value of the second flag being equal to 1, and the first flag is not signaled in the SPS if the value of the second flag is equal to 0. 14. Signal a second flag in SPS indicating whether luma mapping is enabled or disabled for a given slice. The method described in any one of the clauses 9 to 11, further including the method described in any one of the clauses 9 to 11. 15.1 Memory for storing sets of instructions, It includes at least one processor, and at least one processor is Receiving a Sequence Parameter Set (SPS), and Based on the first flag signaled by SPS, determine whether chroma residual scaling is enabled or disabled for slices associated with SPS. A video decoder configured to execute a set of instructions in order to have the system perform the task. 16. At least one processor, In response to the value of the first flag being equal to 1, determine that chroma residual scaling is enabled for the slice. A video decoder as described in Clause 15, configured to execute a set of instructions in order to cause the system to perform the following action. 17. At least one processor, In response to the value of the first flag being equal to 0, determine that chroma residual scaling is disabled for the slice. A video decoder as described in Clause 15 or 16, configured to execute a set of instructions in order to cause the system to perform the following action. 18. At least one processor, Receiving the second SPS, and If the second SPS does not have the first flag, determine that chroma residual scaling is disabled for the slice associated with the second SPS. A video decoder as described in any one of clauses 15-17, configured to execute a set of instructions in order to cause the system to perform the following action. 19. A video decoder as described in any one of clauses 15-18, wherein the first flag is signaled based on a second flag signaled in the picture header associated with the slice. 20. The first value of the second flag indicates that chroma residual scaling is enabled for one or more slices associated with the picture header. The second value of the second flag indicates that chroma residual scaling is disabled for all slices associated with the picture header. The video decoder described in Article 19. 21. At least one processor, Receiving the picture header, and In response to the second flag signaled in the picture header having the first value, determine that chroma residual scaling is disabled for all slices associated with the picture header. A video decoder as described in any one of clauses 15-18, configured to execute a set of instructions in order to cause the system to perform the following action. 22. At least one processor, Based on a second flag signaled by SPS, determine whether luma mapping is enabled or disabled for a slice. A video decoder as described in any one of clauses 15-18, configured to execute a set of instructions in order to cause the system to perform the following action. 23.1 Memory for storing sets of instructions, It includes at least one processor, and at least one processor is Signal a first flag in the slice-related sequence parameter set (SPS) indicating whether chroma residual scaling is enabled or disabled for a given slice. A video encoder configured to execute a set of instructions in order to have the system perform a certain action. 24. At least one processor, In response to enabling chroma residual scaling for a slice, set the value of the first flag to 1. A video encoder as described in Clause 23, configured to execute a set of instructions in order to cause the system to perform the following action. 25. At least one processor, In response to chroma residual scaling being disabled for the slice, set the value of the first flag to 0. A video encoder as described in Clause 23 or 24, configured to execute a set of instructions in order to cause the system to perform the following actions. 26. At least one processor, Signal a second flag in the picture header to indicate whether chroma residual scaling is enabled for pictures associated with the picture header. A video encoder, as described in any one of clauses 23 to 25, configured to execute a set of instructions in order to cause the system to perform the following action. 27. The image encoder described in Clause 26, wherein the slice is part of a picture, and the signaling of the first flag is in response to the value of the second flag being equal to 1, and the first flag is not signaled in the SPS if the value of the second flag is equal to 0. 28. At least one processor, Signal a second flag in SPS indicating whether luma mapping is enabled or disabled for a slice. A video encoder, as described in any one of clauses 23 to 25, configured to execute a set of instructions in order to cause the system to perform the following action. 29. A non-temporary computer-readable medium for storing a set of instructions, wherein the set of instructions is executable by at least one processor of a computer system to cause the computer system to perform a method for decoding video content, Receiving a Sequence Parameter Set (SPS), and Based on the first flag signaled by SPS, determine whether chroma residual scaling is enabled or disabled for slices associated with SPS. Non-temporary computer-readable media, including [specific examples of such media]. 30. A set of instructions is, In response to the value of the first flag being equal to 1, determine that chroma residual scaling is enabled for the slice. A non-temporary computer-readable medium as described in Clause 29, which further causes at least one processor to perform the following. 31. A set of commands is: In response to the value of the first flag being equal to 0, determine that chroma residual scaling is disabled for the slice. A non-temporary computer-readable medium as described in Clause 29 or 30, which further causes at least one processor to perform the following. 32. A set of commands is: Receiving the second SPS, and If the second SPS does not have the first flag, determine that chroma residual scaling is disabled for the slice associated with the second SPS. A non-temporary computer-readable medium as described in any one of clauses 29 to 31, which further causes at least one processor to perform the following. 33. A non-temporary computer-readable medium as described in any one of clauses 29 to 32, in which the first flag is signaled based on a second flag signaled in the picture header associated with the slice. 34. The first value of the second flag indicates that chroma residual scaling is enabled for one or more slices associated with the picture header. The second value of the second flag indicates that chroma residual scaling is disabled for all slices associated with the picture header. Non-temporary computer-readable media as defined in Article 33. 35. A set of commands is, Receiving the picture header, and In response to the second flag signaled in the picture header having the first value, determine that chroma residual scaling is disabled for all slices associated with the picture header. A non-temporary computer-readable medium as described in any one of clauses 29 to 32, which further causes at least one processor to perform the following. 36. A set of commands is: Based on a second flag signaled by SPS, determine whether luma mapping is enabled or disabled for a slice. A non-temporary computer-readable medium as described in any one of clauses 29 to 32, which further causes at least one processor to perform the following. 37. A non-temporary computer-readable medium for storing a set of instructions, wherein the set of instructions is executable by at least one processor of a computer system to cause the computer system to perform a method for encoding video content, Signal a first flag in the slice-related sequence parameter set (SPS) indicating whether chroma residual scaling is enabled or disabled for a given slice. Non-temporary computer-readable media, including [specific examples of such media]. 38. A set of commands, In response to enabling chroma residual scaling for a slice, set the value of the first flag to 1. A non-temporary computer-readable medium as described in Clause 37, which causes at least one processor to perform the following additionally. 39. A set of commands, In response to chroma residual scaling being disabled for the slice, set the value of the first flag to 0. A non-temporary computer-readable medium as described in Clause 37 or 38, which further causes at least one processor to perform the following. 40. A set of commands, Signal a second flag in the picture header to indicate whether chroma residual scaling is enabled for pictures associated with the picture header. A non-temporary computer-readable medium as described in any one of clauses 37 to 39, which further causes at least one processor to perform the following. 41. Non-temporary computer-readable media as described in Clause 40, where the slice is part of a picture, and the signaling of the first flag is in response to the value of the second flag being equal to 1, and the first flag is not signaled in the SPS if the value of the second flag is equal to 0. 42. A set of commands, Signal a second flag in SPS indicating whether luma mapping is enabled or disabled for a slice. A non-temporary computer-readable medium as described in any one of clauses 37 to 39, which further causes at least one processor to perform the following. 43. A method performed by a computer for processing video content, Determining whether a video sequence is monochrome, and In response to a determination that the video sequence is not monochrome, signal the chroma deblocking parameter within the bitstream associated with the video sequence. Includes, If the video sequence is monochrome, the chroma deblocking parameter is not signaled within the bitstream. method. 44. The method described in Clause 43, wherein chroma deblocking parameters are signaled in the picture header. 45. The method according to clause 43 or 44, wherein chromate deblocking parameters are signaled in the slice header. 46. ​​The value of ChromaArrayType can be used to determine whether a video sequence is monochrome or not. The method described in any one of the clauses 43 to 45, based on the above. 47. Signaling a first flag indicating whether the video sequence contains multiple separately coded color components, and a second flag indicating information regarding chromasampling versus luminasampling, in the picture parameter set (PPS) associated with the video sequence. The method described in Article 46, further including the method described in Article 46. 48. In response to the value of the first flag being equal to 0, set ChromaArrayType to the second flag Set it to be equal to the value of The method described in Article 47, further including the method described in Article 47. 49. In response to the value of the first flag being equal to 1, set ChromaArrayType to equal to 0. Set it to The method described in Article 47, further including the method described in Article 47. 50. Signal a flag in the PPS associated with the video sequence indicating that the raw byte sequence payload (RBSP) syntax structure of the PPS contains chromatool-related syntax. The method described in any one of the clauses 43 to 49, further including the method described in any one of the clauses 43 to 49. 51. The method described in clause 50, wherein the flag is pps_chroma_tool_present_flag. 52. In response to pps_chroma_tool_present_flag being equal to 1, signal one or more slice-level chroma deblocking parameters. It further includes, If pps_chroma_tool_present_flag is equal to 0, slice-level chroma deblocking parameters are not signaled. The method described in Article 51. 53. One or more slice-level chromate-blocking parameters slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2 , or slice_cb_beta_offset_div2 The method described in Article 52, including the method described in Article 52. 54. In response to pps_chroma_tool_present_flag being equal to 1, signal one or more picture-level chroma deblocking parameters. It further includes, If pps_chroma_tool_present_flag is equal to 0, the picture-level chroma deblocking parameter is not signaled. The method described in Article 51. 55. One or more slice-level chromate deblocking parameters ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, and ph_cb_beta_offset_div2 The method described in Article 54, including the method described in Article 54. 56. Memory for storing instruction sets, It includes at least one processor, and at least one processor is Determining whether a video sequence is monochrome, and In response to a determination that the video sequence is not monochrome, signal the chroma deblocking parameter within the bitstream associated with the video sequence. It is configured to execute a set of instructions in order to have the system do this, If the video sequence is monochrome, the chroma deblocking parameter is not signaled within the bitstream. device. 57. At least one processor, Signaling chroma deblocking parameters in the picture header. The device described in Clause 51, configured to execute a set of instructions in order to cause the system to perform the following actions. 58. At least one processor, Signaling chromatomorphic deblocking parameters in the slice header. The device described in Clause 51 or 52, configured to execute a set of instructions in order to cause the system to perform the following. 59. The value of ChromaArrayType can be used to determine whether a video sequence is monochrome. Equipment as described in any one of clauses 51 to 53, based on the above. 60. At least one processor, Signaling a first flag indicating whether the video sequence contains multiple separately coded color components, and a second flag indicating information regarding chromasampling versus luminasampling, in the picture parameter set (PPS) associated with the video sequence. The device described in Clause 54, configured to execute a set of instructions in order to cause the system to perform the following actions. 61. At least one processor, In response to the value of the first flag being equal to 0, the ChromaArrayType is set to the value of the second flag. Set them to be equal. The equipment described in Clause 55, configured to execute a set of instructions in order to cause the system to perform the following actions. 62. At least one processor, In response to the value of the first flag being equal to 1, set ChromaArrayType to equal to 0. To determine The equipment described in Clause 55, configured to execute a set of instructions in order to cause the system to perform the following actions. 63. At least one processor, Signal a flag in the PPS associated with the video sequence indicating that the raw byte sequence payload (RBSP) syntax structure of the PPS contains chromatool-related syntax. A device as described in any one of clauses 51 to 57, configured to execute a set of instructions in order to cause the system to perform a certain action. 64. The equipment described in Clause 63, whose flag is pps_chroma_tool_present_flag. 65. At least one processor, In response to pps_chroma_tool_present_flag being equal to 1, signal one or more slice-level chroma deblocking parameters. It is configured to execute a set of instructions in order to have the system do this, If pps_chroma_tool_present_flag is equal to 0, slice-level chroma deblocking parameters are not signaled. The equipment described in Article 64. 66. One or more slice-level chromatoblocking parameters slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2 , or slice_cb_beta_offset_div2 The equipment described in Clause 65, including the equipment described in Clause 65. 67. At least one processor, In response to pps_chroma_tool_present_flag being equal to 1, signal one or more picture-level chroma deblocking parameters. It is configured to execute a set of instructions in order to have the system do this, If pps_chroma_tool_present_flag is equal to 0, the picture-level chroma deblocking parameter is not signaled. The equipment described in Article 64. 68. One or more slice-level chromatoblocking parameters ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, and ph_cb_beta_offset_div2 The equipment described in Clause 67, including the equipment described in Clause 67. 69. A non-temporary computer-readable medium for storing a set of instructions, wherein the set of instructions is executable by at least one processor of the computer system to cause the computer system to perform a method, Determining whether a video sequence is monochrome, and In response to a determination that the video sequence is not monochrome, signal the chroma deblocking parameter within the bitstream associated with the video sequence. Includes, If the video sequence is monochrome, the chroma deblocking parameter is not signaled within the bitstream. Non-temporary computer-readable media. 70. A set of commands, Signaling chroma deblocking parameters in the picture header. A non-temporary computer-readable medium as described in Clause 59, which further causes at least one processor to perform the following. 71. A set of commands, Signaling chromatomorphic deblocking parameters in the slice header. A non-temporary computer-readable medium as described in Clause 59 or 60, which further causes at least one processor to perform the following. 72. The value of ChromaArrayType can be used to determine whether a video sequence is monochrome. A non-temporary computer-readable medium as described in any one of the clauses 59 to 61, based on the above. 73. A set of commands, Signaling a first flag indicating whether the video sequence contains multiple separately coded color components, and a second flag indicating information regarding chromasampling versus luminasampling, in the picture parameter set (PPS) associated with the video sequence. A non-temporary computer-readable medium as described in Clause 62, which causes at least one processor to perform the following additionally. 74. A set of commands, In response to the value of the first flag being equal to 0, the ChromaArrayType is set to the value of the second flag. Set them to be equal. A non-temporary computer-readable medium as described in Clause 63, which causes at least one processor to perform the following additionally. 75. A set of commands, In response to the value of the first flag being equal to 1, set ChromaArrayType to equal to 0. To determine The non-transient computing described in Clause 63 further causes at least one processor to perform the same task. A readable medium. 76. A set of commands, Signaling a flag in the PPS associated with the video sequence indicates that the raw byte sequence payload (RBSP) syntax structure of the PPS contains chromatool-related syntax. A non-temporary computer-readable medium as described in any one of clauses 59 to 65, which further causes at least one processor to perform the following. 77. Non-temporary computer-readable media as described in Clause 76, whose flag is pps_chroma_tool_present_flag. 78. A set of commands, In response to pps_chroma_tool_present_flag being equal to 1, signal one or more slice-level chroma deblocking parameters. Let at least one more processor perform this further. If pps_chroma_tool_present_flag is equal to 0, slice-level chroma deblocking parameters are not signaled. Non-temporary computer-readable media as defined in Article 77. 79. One or more slice-level chromatoblocking parameters slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2 , or slice_cb_beta_offset_div2 Non-temporary computer-readable media as defined in Clause 78, including the above. 80. A set of commands, In response to pps_chroma_tool_present_flag being equal to 1, signal one or more picture-level chroma deblocking parameters. Let at least one more processor perform this further. If pps_chroma_tool_present_flag is equal to 0, the picture-level chroma deblocking parameter is not signaled. Non-temporary computer-readable media as defined in Article 77. 81. One or more slice-level chromatoblocking parameters ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, and ph_cb_beta_offset_div2 Non-temporary computer-readable media as described in Clause 80, including the above.

[0113]

[0134] In some embodiments, non-temporary computer-readable storage media containing instructions are also provided, which can be executed by devices for performing the above-described methods (such as disclosed encoders and decoders). Common non-temporary media include, for example, floppy disks, flexible disks, hard disks, solid-state drives, magnetic tapes or any other magnetic data storage media, CD-ROMs, any other optical data storage media, any physical media having a pattern of holes, RAM, PROMs and EPROMs, FLASH®-EPROMs or any other flash memory, NVRAMs, caches, registers, any other memory chips or cartridges and networked versions thereof. Devices may include one or more processors (CPUs), input / output interfaces, network interfaces and / or memory.

[0114]

[0135] It should be noted that relational terms such as “first” and “second” in this specification are used solely to distinguish one entity or operation from another, and do not require or imply any actual relationship or order between those entities or operations. Furthermore, “includes,” “has,” “contains,” and “incorporates,” as well as other similar forms of terms, are intended to be equivalent in meaning and are intended to be non-restrictive in that the items following any one of these terms are not intended to be an exhaustive list of such items, nor are they intended to be limited to only the listed items. do.

[0115]

[0136] When used herein, unless otherwise specified, the word “or” encompasses all possible combinations, except in impractical cases. For example, if it is stated that a database may contain A or B, then unless otherwise specified or impractical, that database may contain A or B or A and B. As a second example, if it is stated that a database may contain A, B, or C, then unless otherwise specified or impractical, that database may contain A, B, C, A and B, A and C, B and C, A and B and C.

[0116]

[0137] It will be understood that the embodiments described above can be implemented by hardware, software (program code), or a combination of hardware and software. When implemented by software, the software can be stored on the computer-readable medium described above. When the software is executed by a processor, it can perform the disclosed methods. The computing units and other functional units described in this disclosure can be implemented by hardware, software, or a combination of hardware and software. It will also be understood by those skilled in the art that multiple of the above modules / units can be combined into a single module / unit, and each of the above modules / units can be further divided into multiple submodules / subunits.

[0117]

[0138] This specification has described embodiments with respect to numerous specific details that may vary depending on the implementation. Certain adaptations and modifications may be made to the embodiments described. Other embodiments may become apparent to those skilled in the art by examining this specification and practicing the invention disclosed herein. This specification and examples are provided for illustrative purposes only, and the true scope and spirit of this disclosure are intended to be shown by the appended claims. The order of steps shown in the figures is for illustrative purposes only and is not intended to limit the order of steps to any particular set. Therefore, those skilled in the art will understand that the steps may be performed in different orders while implementing the same method.

[0118]

[0139] Exemplary embodiments have been disclosed in the drawings and this specification. However, many variations and modifications can be made to those embodiments. Accordingly, although specific terms have been used, they are used only in a general and descriptive sense, not for limiting purposes.

Claims

1. A computer-based image processing method, Receiving a Sequence Parameter Set (SPS), and Based on a first flag signaled by the SPS, it is determined whether chroma residual scaling is enabled or disabled for the slice associated with the SPS. Methods that include...

2. In response to the value of the first flag being equal to 1, it is determined that the chroma residual scaling is enabled for the slice. The method according to claim 1, further comprising:

3. In response to the value of the first flag being equal to 0, it is determined that the chroma residual scaling is disabled with respect to the slice. The method according to claim 1, further comprising:

4. Receiving the second SPS, and If the second SPS does not have the first flag, it is determined that the chroma residual scaling is disabled with respect to the slice associated with the second SPS. The method according to claim 1, further comprising:

5. The method according to claim 1, wherein the first flag is signaled based on a second flag signaled in a picture header associated with the slice.

6. The first value of the second flag indicates that the chroma residual scaling is enabled for one or more slices associated with the picture header. The second value of the second flag indicates that the chroma residual scaling is disabled for all slices associated with the picture header. The method according to claim 5.

7. Receiving the picture header, and In response to the second flag signaled by the picture header having a first value, it is determined that the chroma residual scaling is disabled for all slices associated with the picture header. The method according to claim 1, including the method described in claim 1.

8. Based on the second flag signaled by the SPS, it is determined whether luma mapping is enabled or disabled for the slice. The method according to claim 1, including the method described in claim 1.

9. A method performed by a computer to process video content, Determining whether a video sequence is monochrome, and In response to the determination that the aforementioned video sequence is not monochrome, signaling a chroma deblocking parameter within the bitstream associated with the aforementioned video sequence. Includes, If the video sequence is monochrome, the chroma deblocking parameter is not signaled within the bitstream. method.

10. The method according to claim 9, wherein the chromadeblocking parameter is signaled in the picture header.

11. The method according to claim 9, wherein the chromatodeblocking parameters are signaled in the slice header.

12. The determination of whether the aforementioned video sequence is monochrome is made using ChromaArrayType. The method according to claim 9, based on a value.

13. Signaling a first flag indicating whether the video sequence contains multiple separately coded color components, and a second flag indicating information regarding chromasampling for luminasampling, in the picture parameter set (PPS) associated with the video sequence. The method according to claim 12, further comprising:

14. In response to the value of the first flag being equal to 0, ChromaArrayType is set to the second flag Set it to be equal to the value of 'g'. The method according to claim 13, further comprising:

15. In response to the value of the first flag being equal to 1, ChromaArrayType is set to be equal to 0. Set it to The method according to claim 13, further comprising:

16. Signal a flag in the PPS associated with the video sequence indicating that the raw byte sequence payload (RBSP) syntax structure of the PPS includes chromatool-related syntax. The method according to claim 9, further comprising:

17. Signal a flag in the PPS associated with the video sequence indicating whether the raw byte sequence payload (RBSP) syntax structure of the PPS includes chromatool-related syntax. The method according to claim 9, further comprising:

18. The method according to claim 17, wherein the flag is pps_chroma_tool_present_flag.

19. In response to the pps_chroma_tool_present_flag being equal to 1, signal one or more slice-level chromatomatic deblocking parameters. It further includes, If the aforementioned pps_chroma_tool_present_flag is equal to 0, the slice-level chroma deblocking parameters are not signaled. The method according to claim 18.

20. The one or more slice-level chromatoblocking parameters mentioned above are slice_cb_beta_offset_div2, slice_cb_tc_offset_div2, slice_cr_beta_offset_div2 , or slice_cb_beta_offset_div2 The method according to claim 19, including the method described in claim 19.

21. In response to the pps_chroma_tool_present_flag being equal to 1, signal one or more picture-level chroma deblocking parameters. It further includes, If the aforementioned pps_chroma_tool_present_flag is equal to 0, the picture-level chroma deblocking parameter is not signaled. The method according to claim 18.

22. The one or more slice-level chromatoblocking parameters mentioned above are ph_cb_beta_offset_div2, ph_cb_tc_offset_div2, ph_cr_beta_offset_div2, or ph_cb_beta_offset_div2 The method according to claim 21, including the method described in claim 21.

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