Semiconductor manufacturing equipment and method for adjusting its parameters
The semiconductor manufacturing apparatus and method automatically adjust alignment and overlay recipe parameters based on real-time measurements, addressing accuracy issues and maintaining process stability.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-06
- Publication Date
- 2026-03-18
AI Technical Summary
Existing semiconductor manufacturing processes face challenges in maintaining alignment and overlay accuracy due to changes in manufacturing parameters, leading to reduced yield and production capacity.
A semiconductor manufacturing apparatus and method that automatically adjusts alignment and overlay recipe parameters by measuring alignment marks on a wafer, generating position and quality data, and correcting recipe parameters in real-time to improve accuracy.
Enhances overlay accuracy and prevents decreases in semiconductor process yield and production capacity by immediately adapting to process changes.
Smart Images

Figure 2026049207000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor device, and more particularly to a semiconductor manufacturing apparatus and a method for adjusting parameters thereof.
Background Art
[0002] In a semiconductor manufacturing process, alignment marks can be formed on a wafer to inspect the alignment between a front layer and a back layer. However, due to changes in the manufacturing process, optimized alignment recipe parameters and overlay recipe parameters may become inapplicable, which may affect the yield and production capacity of the semiconductor process.
Summary of the Invention
Problems to be Solved by the Invention
[0003] The present invention provides a semiconductor manufacturing apparatus and a method for adjusting parameters thereof, which can automatically and immediately correct alignment recipe parameters and overlay recipe parameters to improve overlay accuracy and avoid a decrease in the yield and production capacity of the semiconductor process.
Means for Solving the Problems
[0004] The semiconductor manufacturing apparatus of the present invention includes a process apparatus, a measurement apparatus, and a control apparatus. The measurement apparatus measures alignment marks on a wafer before the process apparatus executes a patterning process, and generates position data and quality data of the alignment marks. The control apparatus is coupled to the process apparatus and the measurement apparatus, and corrects alignment recipe parameters used when the process apparatus executes a patterning process and wafer bonding, and overlay recipe parameters used when the measurement apparatus measures the relative position of alignment marks on the wafer, based on the position data and the quality data.
[0005] The present invention further provides a method for adjusting the parameters of a semiconductor manufacturing apparatus. The semiconductor manufacturing apparatus includes a process apparatus and a measuring apparatus, and the method for adjusting the parameters of the semiconductor manufacturing apparatus includes the following steps: Before the process apparatus performs the patterning process, it measures the alignment marks on the wafer and generates position data and quality data for the alignment marks. Based on the position data and quality data, it corrects the alignment recipe parameters used when the process apparatus performs the patterning process and wafer bonding, and the overlay recipe parameters used when the measuring apparatus measures the relative positions of the alignment marks on the wafer. [Effects of the Invention]
[0006] Based on the above, embodiments of the present invention measure the alignment marks on the wafer before executing the patterning process, generate position data and quality data for the alignment marks, and correct the alignment recipe parameters used when executing the patterning process and wafer bonding, and the overlay recipe parameters used by the measuring device when measuring the relative position of the alignment marks on the wafer, based on the position data and quality data, and automatically and immediately correct the alignment recipe parameters and overlay recipe parameters in response to process changes, thereby improving overlay accuracy and avoiding a decrease in semiconductor process yield and production capacity. [Brief explanation of the drawing]
[0007] [Figure 1] This is a schematic diagram of a semiconductor manufacturing apparatus as shown in accordance with the present invention. [Figure 2] This is a flowchart illustrating a method for adjusting the parameters of a semiconductor manufacturing apparatus, as shown in one embodiment of the present invention. [Figure 3] This is a flowchart illustrating a method for adjusting the parameters of a semiconductor manufacturing apparatus, as shown in one embodiment of the present invention. [Modes for carrying out the invention]
[0008] To facilitate understanding of the present invention, embodiments in which the invention can be carried out are illustrated below. Furthermore, wherever possible, the same reference numerals are used in the drawings and embodiments to represent identical or similar parts of elements / components / steps.
[0009] Referring below to Figure 1, which is a schematic diagram of a semiconductor manufacturing apparatus shown according to one embodiment of the present invention. The semiconductor manufacturing apparatus may include a control device 102, an Engineering Data Analysis System 104, a Manufacturing Execution System 106, an Advanced Process Control System 108, a Litho Integrated Automation System 110, a measuring device 112, and a process apparatus 114. The control device 102 is coupled to the Engineering Data Analysis System 104, the Manufacturing Execution System 106, the Advanced Process Control System 108, the Litho Integrated Automation System 110, the measuring device 112, and the process apparatus 114.
[0010] The control device 102 may, but is not limited to, a host computer. The control device 102 includes a central processing unit (CPU) 116, read-only memory (ROM) 118, random access memory (RAM) 120, a display unit 122, and an input unit 124. The central processing unit 116, read-only memory 118, random access memory 120, display unit 122, and input unit 124 may be connected via a bus.
[0011] The central processing unit 116 can execute a pattern formation support program that assists in pattern formation on a wafer, such as assisting in the position correction of multiple patterns. The pattern formation support program is a computer program executable on a computer-readable recording medium. The computer-readable recording medium may include multiple commands for calculating position correction parameters necessary for pattern position correction. The computer can execute the calculation process of position correction parameters based on the commands of the pattern formation support program. The pattern formation support program may be stored in a read-only memory 118 and loaded into a random access memory 120 via a bus.
[0012] The input unit 124 may include, for example, a mouse and / or keyboard, and can receive command information input from an external source by the user and transmit the command information to the central processing unit 116.
[0013] The central processing unit 116 reads a pattern formation support program from the read-only memory 118 based on a command entered by the user from the input unit 124, expands the pattern formation support program in the program storage area of the random access memory 120, and can execute each type of processing. The central processing unit 116 temporarily stores the various data generated in each type of processing in a data storage area formed in the random access memory 120.
[0014] The display unit 122 may be a display device such as a liquid crystal display, and displays the status of the semiconductor manufacturing equipment, measurement data, etc., based on commands from the central processing unit 116.
[0015] The engineering data analysis system 104, the manufacturing execution system 106, the advanced process control system 108, and the lithography integrated automation system 110 may be executed and controlled by the control device 102. Here, the engineering data analysis system 104 may be used to analyze process data and to elucidate the causes of process parameter variations or output losses; the manufacturing execution system 106 may be used to monitor and control the manufacturing process and manufacturing management of semiconductor manufacturing equipment; the advanced process control system 108 may be used to perform fault detection and classification (FDC) and run-to-run control (R2R); and the lithography integrated automation system 110 may be used to perform automated control of the lithography process. A computer integrated manufacturing system consisting of the engineering data analysis system 104, the manufacturing execution system 106, the advanced process control system 108, and the lithography integrated automation system 110 can integrate and manage activities in the semiconductor process.
[0016] The process apparatus 114 may include, but is not limited to, patterning tools such as an exposure machine and a wafer bonder. The measuring apparatus 112 may include, but is not limited to, measuring tools such as a stand-alone pre-aligner or an overlay metrology machine. The measuring apparatus 112 can measure the alignment marks on the wafer and generate position data and quality data of the alignment marks before the process apparatus 114 performs the patterning process. Here, the position data may include, for example, the absolute position of the alignment marks (e.g., coordinate position), and the quality data may include, but is not limited to, the measuring apparatus 112 that measures the contrast of the image obtained by the reflected light generated by the reflection of the incident beam by the alignment marks. For example, the quality data may include, but is not limited to, a normalized image log slope, a correlation coefficient, etc.
[0017] As shown in Figure 2, the measuring device 112 can first measure the alignment marks on the wafer in step S202 and generate position data and quality data for the alignment marks. In step S204, the control device 102 can automatically perform calculations to correct the recipe parameters. For example, based on the position data and quality data for the alignment marks, it corrects the alignment recipe parameters used by the process apparatus 114 during the patterning process and wafer bonding, and the overlay recipe parameters used by the measuring device 112 when measuring the relative position of the alignment marks on the wafer. Subsequently, the corrected alignment recipe parameters and overlay recipe parameters are fed forward in real time to the patterning and wafer bonding step S206 and the overlay error measurement step S208. The patterning process and wafer bonding are performed using the corrected alignment recipe parameters, and the overlay error measurement is performed using the corrected overlay recipe parameters. After step S208, it is possible to determine whether the overlay error is less than a predetermined value. If the overlay error is less than the predetermined value, the adjustment of the alignment recipe parameters and overlay recipe parameters can be stopped. If the overlay error is not less than the predetermined value, the process returns to step S204, and the alignment recipe parameters and overlay recipe parameters can be corrected again.
[0018] More specifically, the method by which the control device 102 corrects the alignment recipe parameters and overlay recipe parameters may be as shown in Figure 3. First, the receiving measurement device 112 measures the position data and quality data generated by the alignment marks, such as received position data and quality data provided by a standalone pre-aligner (step S302). Next, it generates a first subtraction result by subtracting position data from reference position data (for example, subtracting absolute position coordinates from predetermined position coordinates, but not limited to this) and a second subtraction result by subtracting quality data from reference quality data (for example, subtracting the contrast of the alignment mark image from a predetermined contrast, but not limited to this) (step S304). Here, the reference position data and reference quality data may be, for example, the reference position data and reference quality data of the current batch (lot) or previous batch in an engineering data analysis system.
[0019] The control device 102 determines whether the first subtraction result is less than the first threshold and whether the second subtraction result is less than the second threshold (step S306). If the first subtraction result is less than the first threshold and the second subtraction result is less than the second threshold, the calculation of the recipe parameters may be terminated. If the first subtraction result is greater than or equal to the first threshold, or if the second subtraction result is greater than or equal to the second threshold, the control device 102 may correct the alignment recipe parameters and overlay recipe parameters based on the first subtraction result and the second subtraction result. For example, the k-means clustering method can be used to cluster the first subtraction result and the second subtraction result to generate multiple clusters (step S308), then optimized alignment recipe parameters or overlay recipe parameters can be quickly derived for each cluster to generate predicted alignment recipe parameters and predicted overlay recipe parameters (step S310), and the alignment recipe parameters (e.g., pattern position compensation value or alignment correction model) can be corrected using the result of subtracting absolute position coordinates from predetermined position coordinates, and the overlay recipe parameters (e.g., wavelength of measurement beam) can be corrected using the result of subtracting the contrast of the alignment mark image from a predetermined contrast, but this is not limited to this. In some embodiments, position data, quality data, reference position data, and reference quality data may be input to a machine learning model to determine the type of alignment mark, the optimized wavelength or color, the measurement focus, the measurement position, etc. Based on this, the alignment recipe parameters and overlay recipe parameters may be corrected to generate predicted alignment recipe parameters and predicted overlay recipe parameters.
[0020] The control device 102 registers the predicted alignment recipe parameters and predicted overlay recipe parameters with the lithography integrated automation system 110 (step S312), and controls the control lithography integrated automation system 110 and the manufacturing execution system 106 to immediately replace the alignment recipe parameters used by the process apparatus 114 and the overlay recipe parameters used by the measuring apparatus 112 (step S314) with the predicted alignment recipe parameters and predicted overlay recipe parameters. This enables the process apparatus 114 and the measuring apparatus 112 to accurately perform the patterning process, wafer bonding, and overlay error measurement using the predicted alignment recipe parameters and predicted overlay recipe parameters, thereby improving overlay accuracy and avoiding a decrease in semiconductor process yield and production capacity.
[0021] Furthermore, the control device 102 may, but is not limited to, modify the contents and model of the cache memory for the process apparatus 114 in the advanced process control system 108 for each cluster based on the first subtraction result, for example, by modifying the pattern position compensation value stored in the advanced process control system 108 (step S316). The control device 102 may also further control the manufacturing execution system 106 before the coating step to provide automatic wafer splitting commands and batch customization commands (step S318).
[0022] In summary, in the embodiment of the present invention, before executing the patterning process, the alignment marks of the wafer are measured, position data and quality data of the alignment marks are generated, and based on the position data and quality data, the alignment recipe parameters and measurement devices used when executing the patterning process and wafer bonding correct the overlay recipe parameters used when measuring the relative positions of the alignment marks of the wafer, and automatically and immediately correct the alignment recipe parameters and the overlay recipe parameters according to the change of the process, improve the overlay accuracy, and avoid the reduction of the yield and production capacity of the semiconductor process.
Industrial Applicability
[0023] The semiconductor manufacturing apparatus and its parameter adjustment method of the present invention can be used for semiconductor measurement and manufacturing.
Explanation of Signs
[0024] 102: Control device 104: Engineering data analysis system 106: Manufacturing execution system 108: Advanced process control system 110: Lithography integration automation system 112: Measuring device 114: Process device 116: Central processing unit 118: Read-only memory 120: Random access memory 122: Display unit 124: Input unit S202~S210, S302~S318: Parameter adjustment method of semiconductor manufacturing apparatus
Claims
1. Process equipment and Before the process apparatus performs the patterning process, a measuring device measures the alignment marks on the wafer and generates position data and quality data for the alignment marks. A control device coupled to the process apparatus and the measuring apparatus corrects the alignment recipe parameters used by the process apparatus during the patterning process and wafer bonding, and the overlay recipe parameters used by the measuring apparatus when measuring the relative positions of the alignment marks on the wafer, based on the position data and the quality data. A semiconductor manufacturing device equipped with the following features.
2. The control device is coupled with a manufacturing execution system and a lithography integrated automation system, The control device further generates a first subtraction result by subtracting the position data from the reference position data, generates a second subtraction result by subtracting the quality data from the reference quality data, and, in response to whether the first subtraction result is greater than or equal to a first threshold, or whether the second subtraction result is greater than or equal to a second threshold, calculates the alignment recipe parameter and the overlay recipe parameter based on the first subtraction result and the second subtraction result. The semiconductor manufacturing apparatus according to claim 1.
3. The control device uses a clustering algorithm to cluster the first subtraction result and the second subtraction result to generate a plurality of clusters, optimizes the alignment recipe parameters or overlay recipe parameters corresponding to each cluster, generates predicted alignment recipe parameters and predicted overlay recipe parameters, and controls the lithography integrated automation system and the manufacturing execution system to replace the alignment recipe parameters used by the process apparatus and the overlay recipe parameters used by the measuring apparatus with the predicted alignment recipe parameters and predicted overlay recipe parameters. The semiconductor manufacturing apparatus according to claim 2.
4. The control device is equipped with an advanced process control system, The semiconductor manufacturing apparatus according to claim 2, wherein the control device modifies the contents and model of the cache memory for the process apparatus in the advanced process control system based on the first subtraction result.
5. The semiconductor manufacturing apparatus according to claim 4, wherein the control device further modifies the pattern position compensation values stored in the advanced process control system.
6. The manufacturing execution system is coupled to the control device, The semiconductor manufacturing apparatus according to claim 1, further comprising the control device, which controls the manufacturing execution system and provides an automatic wafer splitting command and a batch customization command.
7. The semiconductor manufacturing equipment, process equipment and measuring equipment are included, The parameter adjustment method for the semiconductor manufacturing apparatus is: Before the process apparatus performs the patterning process, it measures the alignment marks on the wafer and generates position data and quality data for the alignment marks. Based on the position data and the quality data, the alignment recipe parameters used by the process apparatus during the patterning process and wafer bonding, and the overlay recipe parameters used by the measuring apparatus when measuring the relative positions of the alignment marks on the wafer, A method for adjusting the parameters of semiconductor manufacturing equipment, including the method described above.
8. The process involves subtracting the position data from the reference position data to generate a first subtraction result, and subtracting the quality data from the reference quality data to generate a second subtraction result. In response to whether the first subtraction result is greater than or equal to a first threshold, or whether the second subtraction result is greater than or equal to a second threshold, the alignment recipe parameter and the overlay recipe parameter are calculated based on the first subtraction result and the second subtraction result. A method for adjusting the parameters of a semiconductor manufacturing apparatus according to claim 7, including the method described in claim 7.
9. The semiconductor manufacturing apparatus comprises a manufacturing execution system and a lithography integrated automation system, and the parameter adjustment method for the semiconductor manufacturing apparatus is: Using a clustering algorithm, the first subtraction result and the second subtraction result are clustered to generate multiple clusters, Optimize the alignment recipe parameters or overlay recipe parameters corresponding to each cluster, and generate predicted alignment recipe parameters and predicted overlay recipe parameters. Controlling the lithography integrated automation system and the manufacturing execution system to replace the alignment recipe parameters used by the process apparatus and the overlay recipe parameters used by the measuring apparatus with the predicted alignment recipe parameters and the predicted overlay recipe parameters, A method for adjusting the parameters of a semiconductor manufacturing apparatus according to claim 8, including the method described in claim 8.
10. The semiconductor manufacturing apparatus includes an advanced process control system, and the parameter adjustment method for the semiconductor manufacturing apparatus is, A method for adjusting the parameters of a semiconductor manufacturing apparatus according to claim 8, comprising modifying the contents and model of the cache memory for the process apparatus in the advanced process control system based on the first subtraction result.
11. The semiconductor manufacturing apparatus includes an advanced process control system, and the parameter adjustment method for the semiconductor manufacturing apparatus is, A method for adjusting the parameters of a semiconductor manufacturing apparatus according to claim 7, comprising correcting pattern position compensation values stored in the advanced process control system.
12. The semiconductor manufacturing apparatus comprises a manufacturing execution system, and a method for adjusting the parameters of the semiconductor manufacturing apparatus is provided. A method for adjusting the parameters of a semiconductor manufacturing apparatus according to claim 7, comprising controlling the manufacturing execution system and providing an automatic wafer splitting command and a batch customization command.
Citation Information
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