Microcontroller-to-microcontroller communication circuit

Abstract

This circuit provides a way to protect terminals in the event of a power failure in one of two microcontroller-to-microcontroller communication systems without degrading frequency response. [Solution] The microcontroller-to-microcontroller communication circuit includes a signal line 30 that connects the input terminal 12 of a first microcontroller 10 having a first power supply V1 and the output terminal 22 of a second microcontroller 20 having a second power supply V2, and sends the signal output from the second microcontroller to the input terminal of the first microcontroller; a transistor 40 provided on the signal line that switches between on and off based on a signal input to the gate terminal from the second microcontroller, and energizes the drain terminal and source terminal when on; a node N3 provided between the transistor and the input terminal of the first microcontroller; and a voltage inversion element (inverter 60) provided on the signal line between the output terminal of the second microcontroller and the transistor and the input terminal of the first microcontroller. Known CMOS buffer gates CB can be applied to the transistor and inverter.

Description

Technical Field

[0001] The present invention relates to a communication circuit between microcontrollers.

Background Art

[0002] Conventionally, there is known a redundant system in which a target device such as a motor is controlled by a plurality of control units, and when one system stops, the other system detects it and operates only with the other system. For example, Patent Document 1 discloses a redundant system of two systems in which two drive control units capable of communicating with each other control respective two motor windings.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, for communication between two control units (microcontrollers), for example, serial communication called so-called SPI (Serial Peripheral Interface) communication is used. Each microcontroller has an independent power supply, and is configured such that even if a malfunction occurs in one microcontroller, the other microcontroller can detect it and continue control only with the other microcontroller.

[0005] However, a microcontroller may be damaged when a voltage higher than the power supply voltage is applied to an input terminal or a current exceeding the rated current flows through an output terminal. Therefore, although the terminals can be protected by increasing the current limiting resistance, a low-pass filter (LPF: Low Pass Filter) may be formed due to the input terminal capacitance, and the frequency responsiveness may decrease. Also, when a pull-down resistor is required, a voltage drop due to resistor division may occur.

[0006] This disclosure aims to solve the aforementioned problems and provide a microcontroller-to-microcontroller communication method that protects terminals even when one of the power supplies fails, without degrading frequency responsiveness in communication between two microcontrollers. [Means for solving the problem]

[0007] To achieve the above-mentioned objective, a microcontroller-to-microcontroller communication circuit according to one aspect of the present disclosure includes: an input terminal of a first microcontroller having a first power supply; an output terminal of a second microcontroller having a second power supply; a signal line connecting the input terminal of the first microcontroller and the output terminal of the second microcontroller, and sending a signal output from the output terminal of the second microcontroller to the input terminal of the first microcontroller; a transistor provided on the signal line, which switches between on and off based on a signal input to the gate terminal from the second microcontroller, and which energizes the drain terminal and source terminal when on; a node provided between the transistor and the input terminal of the first microcontroller; and a voltage inverting element provided on the signal line between the output terminal of the second microcontroller and the transistor, or between the node and the input terminal of the first microcontroller, which inverts the voltage of a signal input from the second microcontroller and outputs it to the first microcontroller. [Effects of the Invention]

[0008] According to this disclosure, in communication between two microcontrollers, the terminals can be protected even when one of the power supplies fails, without degrading the frequency response. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a schematic diagram showing an example of the general configuration of a microcontroller-to-microcontroller communication circuit according to the first embodiment. [Figure 2] Figure 2 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the second embodiment. [Figure 3] Figure 3 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the third embodiment. [Figure 4]Figure 4 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the fourth embodiment. [Figure 5] Figure 5 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the fifth embodiment. [Figure 6] Figure 6 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the sixth embodiment. [Figure 7] Figure 7 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the seventh embodiment. [Figure 8] Figure 8 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the eighth embodiment. [Figure 9] Figure 9 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the ninth embodiment. [Figure 10] Figure 10 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 10th embodiment. [Figure 11] Figure 11 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 11th embodiment. [Figure 12] Figure 12 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 12th embodiment. [Modes for carrying out the invention]

[0010] The embodiments of this disclosure will be described in detail below with reference to the drawings. However, the invention is not limited by these embodiments. Furthermore, the components in the embodiments described below include those that are easily substituted, substantially identical, or equivalent to those that can be substituted by those skilled in the art. In addition, the components in the embodiments described below can be omitted, substituted, or modified in various ways without departing from the spirit of this disclosure. In the embodiments described below, necessary components will be described to illustrate the embodiments, other components will be omitted, and identical components will be denoted by the same reference numerals, while different components will be denoted by different reference numerals.

[0011] <First Embodiment> Figure 1 is a schematic diagram showing an example of the general configuration of a microcontroller-to-microcontroller communication circuit according to the first embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 1 is a circuit that communicates between a first microcontroller 10 and a second microcontroller 20. The first microcontroller 10 and the second microcontroller 20 are control units that control the first and second systems, respectively, in a redundant system, and control a predetermined controlled device by coordinating the two systems that are configured in parallel. A redundant system is used, for example, in an electric steering system of a vehicle and is applied to a system that controls the drive of a motor that provides steering assist force to the steering shaft of the vehicle.

[0012] In a redundant system, if both the first microcontroller 10 and the second microcontroller 20 are functioning correctly and inter-microcontroller communication is normal, the first and second systems are coordinated to control the controlled device. In a redundant system, for example, the first microcontroller 10 and the second microcontroller 20 request each other to send a normal operation signal indicating that they are operating normally. Upon receiving requests from each other, the first microcontroller 10 and the second microcontroller 20 each send a normal operation signal. In a redundant system, for example, if an abnormality occurs in the first microcontroller 10, the first system is stopped, and the controlled device is controlled only by the second system using the second microcontroller 20. Also, in a redundant system, for example, if an abnormality occurs in the second microcontroller 20, the second system is stopped, and the controlled device is controlled only by the first system using the first microcontroller 10.

[0013] In the example shown in Figure 1, only the components around one input terminal 12 of the first microcontroller 10 are shown, and only the components around one output terminal 22 of the second microcontroller 20 are shown. Other internal configurations of the first microcontroller 10 and the second microcontroller 20 are omitted. As shown in Figure 1, the microcontroller-to-microcontroller communication circuit of the first embodiment is composed of the input terminal 12 of the first microcontroller 10, the output terminal 22 of the second microcontroller 20, a signal line 30 connecting them, a transistor 40 as a voltage conversion element, a pull-up resistor 50, and an inverter 60 as a voltage inversion element.

[0014] In FIG. 1, as components of the first microcontroller 10, a first power supply V1, an input terminal 12, an input buffer 14, and protection diodes 16 and 18 are shown. The first power supply V1 applies a voltage to each circuit element of the first microcontroller 10. [[ID=!]]

[0015] The input terminal 12 is connected to the output terminal 22 of the second microcontroller 20 via a signal line 30, and receives a predetermined signal output from the output terminal 22 of the second microcontroller 20. An arbitrary channel is assigned to the input terminal 12. The internal circuit of the first microcontroller 10 includes a circuit corresponding to the input terminal 12. Although one input terminal 12 is shown in FIG. 1, there may be two or more. Different channels are assigned to the plurality of input terminals 12. In this case, the first microcontroller 10 includes a circuit corresponding to each input terminal 12.

[0016] The input buffer 14 receives a predetermined signal output by the output buffer 24 via the input terminal 12. The input buffer 14 is provided between the first power supply V1 and the ground.

[0017] The protection diodes 16 and 18 are provided between the first power supply V1 and the ground, and rectify from the ground to the first power supply V1. The protection diodes 16 and 18 are provided between the first power supply V1 and the ground such that the direction from the ground to the first power supply V1 side is the forward direction. The protection diode 16 is provided between the first power supply V1 and the connection node N1. The protection diode 18 is provided between the connection node N1 and the ground. The protection diodes 16 and 18 function as protection elements for discharging the current from the input terminal 12 (signal line 30) to the first power supply V1.

[0018] In FIG. 1, as components of the second microcontroller 20, a second power supply V2, an output terminal 22, and an output buffer 24 are shown. The second power supply V2 applies a voltage to each circuit element of the second microcontroller 20. The second power supply V2 is a separate power supply from the first power supply V1.

[0019] The output terminal 22 is connected to the input terminal 12 of the first microcontroller 10 via the signal line 30 and transmits a predetermined signal to the input terminal 12 of the first microcontroller 10. An arbitrary channel can be assigned to the output terminal 22. The internal circuit of the second microcontroller 20 includes a circuit corresponding to the output terminal 22. Although only one output terminal 22 is shown in Figure 1, there may be two or more. Multiple output terminals 22 are each assigned a different channel. In this case, the second microcontroller 20 includes a circuit corresponding to each output terminal 22.

[0020] The output buffer 24 outputs a predetermined signal to be transmitted via the output terminal 22. The output buffer 24 is located between the second power supply V2 and ground. The predetermined signal includes, for example, a clock signal for synchronizing with the first microcontroller 10, a normal operation signal indicating that the second microcontroller 20 is operating normally, or a signal requesting that the first microcontroller 10 transmit a normal operation signal indicating that it is operating normally.

[0021] The signal line 30 is provided with, in order from the output side (second microcontroller 20) to the input side (first microcontroller 10), a connection node N2 connected to the pull-down resistor 26, an inverter 60, a transistor 40, and a connection node N3 connected to the pull-up resistor 50.

[0022] The pull-down resistor 26 is provided between the connection node N2 and ground in the signal line 30, and is a logic fixing resistor to avoid a Hi-Z undefined state immediately after the second power supply V2 of the second microcontroller 20 is turned on. Alternatively, a pull-up resistor may be used instead of the pull-down resistor 26 for logic fixing.

[0023] Transistor 40 is provided on the signal line 30 between the output terminal 22 of the second microcontroller 20 and the input terminal 12 of the first microcontroller 10. In the first embodiment, transistor 40 is provided between a connection node N2 connected to the pull-down resistor 26 and the input terminal 12 of the first microcontroller 10. In the first embodiment, transistor 40 is an N-channel type metal-oxide-semiconductor field-effect transistor (MOSFET). Transistor 40 includes a gate terminal connected to the output terminal 22 of the second microcontroller 20 via the inverter 60 and connection node N2, a drain terminal connected to the input terminal 12 of the first microcontroller 10 via connection node N3, and a source terminal connected to ground. The gate terminal is isolated from the drain terminal and the source terminal. Transistor 40 switches between ON and OFF based on a signal input to the gate terminal from the second microcontroller 20 side.

[0024] The pull-up resistor 50 is provided on the signal line 30 between the connection node N3 and the first power supply V1. The connection node N3 is provided on the signal line 30 between the drain terminal of the transistor 40 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of the transistor 40 is connected to the input terminal 12 of the first microcontroller 10 via the connection node N3, and also to the first power supply V1, which is the same power supply as the first microcontroller 10, via the connection node N3 and the pull-up resistor 50. When the transistor 40 is ON, the drain terminal side and the source terminal side are connected and power is supplied from the first power supply V1, and current flows from the drain terminal side to the source terminal side.

[0025] The inverter 60 is a logic inversion gate (voltage inversion element) provided between the second power supply V2, which is the same power supply as the second microcontroller 20, and ground. It inverts the voltage of the signal input from the second microcontroller 20 and outputs it to the first microcontroller 10. In the first embodiment, the inverter 60 is provided between the output terminal 22 of the second microcontroller 20 and the transistor 40, more specifically, between the connection node N2 connected to the pull-down resistor 26 and the transistor 40. In the signal line 30, the input terminal of the inverter 60 is connected to the output terminal 22 of the second microcontroller 20 via the connection node N2, and the output terminal is connected to the gate terminal of the transistor 40. In the first embodiment, known CMOS buffer gates CB can be used for the transistor 40 (MOSFET) and the inverter 60.

[0026] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to the inverter 60. As a result, the inverter 60 outputs a LOW signal, and the transistor 40 turns OFF. This disconnects the drain terminal and source terminal of the transistor 40, and disconnects the first power supply V1 side from the ground side. Therefore, the HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10.

[0027] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, the transistor 40 turns OFF. However, since the first power supply V1 is 0[V], 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0028] With both the first power supply V1 and the second power supply V2 supplying power, when LOW is output from the output buffer 24 of the second microcontroller 20, LOW is input to the inverter 60. As a result, HIGH is output from the inverter 60, and transistor 40 turns ON. Then, the drain terminal and source terminal of transistor 40 are connected, and current flows from the first power supply V1 to ground, so the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0029] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a LOW signal is output from the output buffer 24 of the second microcontroller 20, the transistor 40 turns ON. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0030] When the first power supply V1 is supplying power and the second power supply V2 is lost, the inverter 60 is also powered and remains LOW, causing transistor 40 to remain OFF. This disconnects the drain terminal and source terminal of transistor 40, and disconnects the first power supply V1 from ground. As a result, a HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage is always applied to the input terminal 12, but since this voltage is from the first power supply V1, it will never exceed the rated voltage of the input terminal 12.

[0031] In other words, the microcontroller-to-microcontroller communication circuit of the first embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, the logic is inverted in advance using an inverter 60 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0032] <Second Embodiment> Figure 2 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the second embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 2 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the first embodiment shown in Figure 1.

[0033] In the microcontroller-to-microcontroller communication circuit of the second embodiment, components similar to those in the first embodiment are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 2, the microcontroller-to-microcontroller communication circuit of the second embodiment differs from the microcontroller-to-microcontroller communication circuit of the first embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0034] In the second embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, to the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, an inverter 60, a transistor 42, and a connection node N3 connected to the pull-down resistor 52.

[0035] Transistor 42 is provided on the signal line 30 between the output terminal 22 of the second microcontroller 20 and the input terminal 12 of the first microcontroller 10, more specifically, between the connection node N2 connected to the pull-down resistor 26 and the input terminal 12 of the first microcontroller 10. In the second embodiment, transistor 42 is provided between the inverter 60 and the input terminal 12 of the first microcontroller 10. In the second embodiment, transistor 42 is a P-channel MOSFET. Transistor 42 includes a gate terminal connected to the output terminal 22 of the second microcontroller 20 via the inverter 60 and the connection node N2, a source terminal connected to the first power supply V1 of the first microcontroller 10, and a drain terminal connected to the input terminal 12 of the first microcontroller 10 via the connection node N3. The gate terminal is isolated from the source terminal and the drain terminal. Transistor 42 switches between ON and OFF based on a signal input to the gate terminal from the second microcontroller 20 side.

[0036] The pull-down resistor 52 is provided on the signal line 30 between the connection node N3 and ground. The connection node N3 is provided on the signal line 30 between the drain terminal of transistor 42 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 42 is connected to the input terminal 12 of the first microcontroller 10 via the connection node N3, and is also connected to ground via the connection node N3 and the pull-down resistor 52. When transistor 42 is ON, its source terminal and drain terminal are connected and power is supplied from the first power supply V1, and current flows from the source terminal to the drain terminal.

[0037] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to the inverter 60. As a result, the inverter 60 outputs a LOW signal, and the transistor 42 turns ON. Then, the source terminal and drain terminal of the transistor 42 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0038] When the second power supply V2 is supplying power and the first power supply V1 is lost, a HIGH signal is output from the output buffer 24 of the second microcontroller 20, and a HIGH signal is input to the inverter 60. As a result, a LOW signal is input to the transistor 42, but since the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0039] With both the first power supply V1 and the second power supply V2 supplying power, when LOW is output from the output buffer 24 of the second microcontroller 20, LOW is input to the inverter 60. As a result, HIGH is output from the inverter 60, and transistor 42 turns OFF. Then, the source terminal and drain terminal of transistor 42 are disconnected, the first power supply V1 is disconnected, and the pull-down resistor 52 is disconnected, and the input terminal 12 of the first microcontroller 10 is grounded, so a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0040] When the second power supply V2 is supplying power and the first power supply V1 is lost, if LOW is output from the output buffer 24 of the second microcontroller 20, HIGH is output from the inverter 60, and transistor 42 turns OFF. Since the input terminal 12 of the first microcontroller 10 is grounded, 0[V] is also applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0041] When the first power supply V1 is supplying power and the second power supply V2 is lost, the inverter 60 is also powered and remains LOW, causing transistor 42 to remain ON. As a result, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage will always be applied to the input terminal 12, but since this voltage is from the first power supply V1, the applied voltage will not exceed the rated voltage of the input terminal 12.

[0042] In other words, the microcontroller-to-microcontroller communication circuit of the second embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the logic is inverted in advance using an inverter 60 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0043] <Third Embodiment> Figure 3 is a schematic diagram showing an example of the general configuration of a microcontroller-to-microcontroller communication circuit according to the third embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 3 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit shown in Figure 1 according to the first embodiment.

[0044] In the microcontroller-to-microcontroller communication circuit of the third embodiment, components similar to those in the first embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 3, the microcontroller-to-microcontroller communication circuit of the third embodiment differs from the microcontroller-to-microcontroller communication circuit of the first embodiment in that it includes an inverter 62 instead of an inverter 60.

[0045] In the third embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, to the input side, the first microcontroller 10, a pull-down resistor 26, a transistor 40, a connection node N3 connected to the pull-up resistor 50, and an inverter 62.

[0046] The inverter 62, like the inverter 60 of the first embodiment, is a logic inversion gate (voltage inversion element) provided between the first power supply V1, which is the same power supply as the first microcontroller 10, and ground, and inverts the voltage of the signal input from the second microcontroller 20 and outputs it to the first microcontroller 10. The inverter 62 of the third embodiment is provided between the connection node N3, which is connected to the drain terminal of the transistor 40 and the pull-up resistor 50, and the input terminal 12 of the first microcontroller 10. In the signal line 30, the input terminal of the inverter 62 is connected to the drain terminal of the transistor 40 via the connection node N3, and the output terminal is connected to the input terminal 12 of the first microcontroller 10. That is, the inverter 60 of the first embodiment is located on the second microcontroller 20 side of the connection node N3 connected to the transistor 40 and the pull-up resistor 50, whereas the inverter 62 of the third embodiment is located on the first microcontroller 10 side.

[0047] Therefore, in the third embodiment, the gate terminal of the transistor 40 is connected to the output terminal 22 of the second microcontroller 20 via the connection node N2, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via the connection node N3 and the inverter 62. In addition, the connection node N3 in the third embodiment is located on the signal line 30 between the drain terminal of the transistor 40 and the inverter 62. That is, the drain terminal of the transistor 40 in the third embodiment is connected to the input terminal 12 of the first microcontroller 10 via the connection node N3 and the inverter 62, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via the connection node N3 and the pull-up resistor 50.

[0048] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to the transistor 40, causing it to turn ON. As a result, the drain terminal and source terminal of the transistor 40 are connected, and current flows from the first power supply V1 to ground. This causes the gate terminal of the inverter 62 to be at the same potential as LOW, and a LOW voltage is input to the inverter 62. Consequently, a HIGH signal is output from the inverter 62, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0049] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, the transistor 40 turns ON. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50, the inverter 62, and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0050] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 40, causing it to turn OFF. This disconnects the drain terminal and source terminal of transistor 40, and the HIGH voltage pulled up via the first power supply V1 is input to inverter 62. As a result, inverter 62 outputs a LOW signal, and this LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0051] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a LOW signal is output from the output buffer 24 of the second microcontroller 20, the transistor 40 turns OFF. However, since the first power supply V1 is 0[V], 0[V] is applied to the inverter 62 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0052] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 40 is always OFF. In this state, the drain terminal and source terminal of transistor 40 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is input to inverter 62. As a result, inverter 62 outputs LOW, and the LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0053] In other words, the microcontroller-to-microcontroller communication circuit of the third embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, the logic is inverted by an inverter 62 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0054] <Fourth Embodiment> Figure 4 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the fourth embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 4 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the third embodiment shown in Figure 3.

[0055] In the microcontroller-to-microcontroller communication circuit of the fourth embodiment, components similar to those in the third embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 4, the microcontroller-to-microcontroller communication circuit of the fourth embodiment differs from the microcontroller-to-microcontroller communication circuit of the third embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0056] In the fourth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 42, a connection node N3 connected to the pull-down resistor 52, and an inverter 62.

[0057] The configuration of transistor 42 and pull-down resistor 52 is the same as that of transistor 42 and pull-down resistor 52 in the second embodiment, so a description will be omitted. In the fourth embodiment, the gate terminal of transistor 42 is connected to the output terminal 22 of the second microcontroller 20 via connection node N2, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N3 and inverter 62. In addition, connection node N3 in the fourth embodiment is located between the drain terminal of transistor 42 and inverter 62 on the signal line 30. That is, the drain terminal of transistor 42 in the fourth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3 and inverter 62, and is also connected to ground via connection node N3 and pull-down resistor 52.

[0058] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 42, causing it to turn OFF. This disconnects the source and drain terminals of transistor 42, and disconnects the first power supply V1 and the pull-down resistor 52, resulting in a LOW voltage being input to inverter 62. Consequently, inverter 62 outputs a HIGH signal, and this HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0059] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, transistor 42 turns OFF. This disconnects the source and drain terminals of transistor 42, and disconnects the first power supply V1 and the pull-down resistor 52. As a result, a LOW voltage is input to the inverter 62, but since the first power supply V1 is 0[V], 0[V] is applied to both the inverter 62 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0060] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 42, causing it to turn ON. As a result, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is input to inverter 62. Consequently, a LOW signal is output from inverter 62, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0061] When the second power supply V2 is supplying power and the first power supply V1 is lost, the output buffer 24 of the second microcontroller 20 outputs LOW. However, since the first power supply V1 is 0[V], the transistor 42 does not turn ON, and 0[V] is applied to the pull-down resistor 52, the inverter 62, and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0062] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 42 is always ON. In this state, the source terminal and drain terminal of transistor 42 are connected, and a HIGH voltage is input to inverter 62. As a result, inverter 62 outputs LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, input terminal 12 will not be damaged.

[0063] In other words, the microcontroller-to-microcontroller communication circuit of the fourth embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the logic is inverted by an inverter 62 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 for the input side, the first microcontroller 10 and transistor 44, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0064] <Fifth Embodiment> Figure 5 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the fifth embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 5 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the third embodiment shown in Figure 3.

[0065] In the microcontroller-to-microcontroller communication circuit of the fifth embodiment, components similar to those in the third embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 5, the microcontroller-to-microcontroller communication circuit of the fifth embodiment differs from the microcontroller-to-microcontroller communication circuit of the third embodiment in that it includes a transistor 44 and a pull-up resistor 54 instead of an inverter 62.

[0066] In the fifth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, to the input side, the first microcontroller 10, a pull-down resistor 26, a transistor 40, a connection node N3 connected to the pull-up resistor 50, a transistor 44, and a connection node N4 connected to the pull-up resistor 54.

[0067] Transistor 44 is provided on the signal line 30 between connection node N3, which is connected to the pull-up resistor 50, and input terminal 12 of the first microcontroller 10. In the fifth embodiment, transistor 44 is an N-channel MOSFET. Transistor 44 includes a gate terminal connected to the drain terminal of transistor 40 via connection node N3, a drain terminal connected to the input terminal 12 of the first microcontroller 10 via connection node N4, and a source terminal connected to ground. The gate terminal is isolated from the drain terminal and the source terminal. Transistor 44 switches between ON and OFF based on a signal input to the gate terminal from the transistor 40 side.

[0068] The pull-up resistor 54 is provided on the signal line 30 between the connection node N4 and the first power supply V1. The connection node N4 is provided on the signal line 30 between the drain terminal of transistor 44 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 44 is connected to the input terminal 12 of the first microcontroller 10 via the connection node N4, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via the connection node N4 and the pull-up resistor 50. When transistor 44 is ON, the drain terminal side and the source terminal side are connected and power is supplied from the first power supply V1, and current flows from the drain terminal side to the source terminal side.

[0069] Thus, in this fifth embodiment, a transistor 44, a connection node N4, and a pull-up resistor 54 are provided instead of the inverter 62 of the third embodiment. That is, the transistor 44 of the fifth embodiment functions as a voltage inverting element that inverts the voltage of the signal input from the second microcontroller 20 and outputs it to the first microcontroller 10.

[0070] In the fifth embodiment, the drain terminal of transistor 40 is connected to the input terminal 12 of the first microcontroller 10 via connection node N4, which is connected to connection node N3, transistor 44, and pull-up resistor 54. In addition, connection node N3 in the fifth embodiment is located on the signal line 30 between the drain terminal of transistor 40 and the gate terminal of transistor 44. That is, the drain terminal of transistor 40 in the fifth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, transistor 44, and connection node N4, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via connection node N3 and pull-up resistor 50.

[0071] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 40, turning it ON. Then, the drain terminal and source terminal of transistor 40 are connected, and current flows from the first power supply V1 to ground, causing the gate terminal of transistor 44 to be at the same potential as LOW. When a LOW signal is input to transistor 44, turning it OFF, the drain terminal and source terminal of transistor 44 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10.

[0072] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, transistor 40 turns ON. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50. Transistor 44 is also input LOW and turns OFF, disconnecting the drain and source terminals of transistor 44. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 54 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0073] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 40, causing it to turn OFF. This disconnects the drain and source terminals of transistor 40, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 44, causing it to turn ON. As a result, the drain and source terminals of transistor 44 are connected, and current flows from the first power supply V1 to ground. Consequently, the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0074] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a LOW signal is output from the output buffer 24 of the second microcontroller 20, transistor 40 turns OFF. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50. Transistor 44 also receives a LOW signal and turns OFF, disconnecting the drain and source terminals of transistor 44. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 54 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0075] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 40 is always OFF. In this state, the drain terminal and source terminal of transistor 40 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 44, turning it ON. As a result, the drain terminal and source terminal of transistor 44 are connected, and current flows from the first power supply V1 to ground, so the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0076] In other words, the microcontroller-to-microcontroller communication circuit of the fifth embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, the transistor 44 and the pull-up resistor 54 invert HIGH and LOW to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. In other words, in the fifth embodiment, the transistor 44 and the pull-up resistor 54 are voltage inversion means corresponding to a logic inversion gate (inverter). Since the first power supply V1 connected to the drain terminal of the transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0077] <Sixth Embodiment> Figure 6 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the sixth embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 6 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the fifth embodiment shown in Figure 5.

[0078] In the microcontroller-to-microcontroller communication circuit of the sixth embodiment, components similar to those in the fifth embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 6, the microcontroller-to-microcontroller communication circuit of the sixth embodiment differs from the microcontroller-to-microcontroller communication circuit of the fifth embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0079] In the sixth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 42, a connection node N3 connected to the pull-down resistor 52, a transistor 44, and a connection node N4 connected to the pull-up resistor 54.

[0080] The configuration of transistor 42 and pull-down resistor 52 is the same as that of transistor 42 and pull-down resistor 52 in the second and fourth embodiments, so a description will be omitted. In the sixth embodiment, the gate terminal of transistor 42 is connected to the output terminal 22 of the second microcontroller 20 via connection node N2, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N4, which is connected to connection node N3, transistor 44, and pull-up resistor 54. In addition, connection node N3 in the sixth embodiment is located on the signal line 30 between the drain terminal of transistor 42 and the gate terminal of transistor 44. That is, the drain terminal of transistor 42 in the sixth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, transistor 44, and connection node N4, and is also connected to ground via connection node N3 and pull-down resistor 52.

[0081] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 42, causing it to turn OFF. This disconnects the source and drain terminals of transistor 42, and disconnects the first power supply V1 and the pull-down resistor 52, causing the gate terminal of transistor 44 to be at the same potential as LOW. When a LOW signal is input to transistor 44, causing it to turn OFF, the drain and source terminals of transistor 44 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10.

[0082] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, transistor 42 turns OFF. As a result, the source and drain terminals of transistor 42 are disconnected, and the first power supply V1 and the pull-down resistor 52 are disconnected, so the gate terminal of transistor 44 becomes at the same potential as LOW. Transistor 44 is turned OFF by the input of LOW, but since the first power supply V1 is 0[V], 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0083] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 42, causing it to turn ON. As a result, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is input to the gate terminal of transistor 44, causing it to turn ON. This connects the drain and source terminals of transistor 44, causing current to flow from the first power supply V1 to ground. Consequently, the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0084] When the second power supply V2 is supplying power and the first power supply V1 is lost, even if LOW is output from the output buffer 24 of the second microcontroller 20, the transistor 42 will not turn ON because the first power supply V1 is 0[V], and 0[V] will be applied to the gate terminal of transistor 44. Transistor 44 will turn OFF when LOW is input, but because the first power supply V1 is 0[V], 0[V] will be applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0085] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 42 is always ON. Then, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is input to the gate terminal of transistor 44, which is also turned ON. As a result, the drain and source terminals of transistor 44 are connected, and current flows from the first power supply V1 to ground, so the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0086] In other words, the microcontroller-to-microcontroller communication circuit of the sixth embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the logic is inverted using a transistor 44 and a pull-up resistor 54 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0087] <Seventh Embodiment> Figure 7 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the seventh embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 7 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the fifth embodiment shown in Figure 5.

[0088] In the microcontroller-to-microcontroller communication circuit of the seventh embodiment, components similar to those in the fifth embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 7, the microcontroller-to-microcontroller communication circuit of the seventh embodiment differs from the microcontroller-to-microcontroller communication circuit of the fifth embodiment in that it includes a transistor 46 and a pull-down resistor 56 instead of a transistor 44 and a pull-up resistor 54.

[0089] In the seventh embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to a pull-down resistor 26, a transistor 40, a connection node N3 connected to a pull-up resistor 50, a transistor 46, and a connection node N4 connected to a pull-down resistor 56.

[0090] Transistor 46 is provided on the signal line 30 between the output terminal 22 of the second microcontroller 20 and the input terminal 12 of the first microcontroller 10, more specifically between connection node N2 connected to the pull-down resistor 26 and the input terminal 12 of the first microcontroller 10. In the seventh embodiment, transistor 46 is provided between transistor 40 and the input terminal 12 of the first microcontroller 10, more specifically between connection node N3 and the input terminal 12 of the first microcontroller 10. In the seventh embodiment, transistor 46 is a P-channel MOSFET. Transistor 46 includes a gate terminal connected to the output terminal 22 of the second microcontroller 20 via connection node N3, transistor 40 and connection node N2, a source terminal connected to the first power supply V1 of the first microcontroller 10, and a drain terminal connected to the input terminal 12 of the first microcontroller 10 via connection node N4. The gate terminal is isolated from the source terminal and the drain terminal. Transistor 46 switches between ON and OFF based on a signal input to its gate terminal from the second microcontroller 20.

[0091] The pull-down resistor 56 is provided on the signal line 30 between the connection node N4 and ground. The connection node N4 is provided on the signal line 30 between the drain terminal of transistor 46 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 46 is connected to the input terminal 12 of the first microcontroller 10 via the connection node N4, and is also connected to ground via the connection node N4 and the pull-down resistor 56. When transistor 46 is ON, its source terminal and drain terminal are connected and power is supplied from the first power supply V1, and current flows from the source terminal to the drain terminal.

[0092] In the seventh embodiment, the drain terminal of transistor 40 is connected to the input terminal 12 of the first microcontroller 10 via connection node N4, which is connected to connection node N3, transistor 46, and pull-down resistor 56. In addition, connection node N3 in the seventh embodiment is located on the signal line 30 between the drain terminal of transistor 40 and the gate terminal of transistor 46. That is, the drain terminal of transistor 40 in the seventh embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, transistor 46, and connection node N4, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via connection node N3 and pull-up resistor 50.

[0093] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 40, causing it to turn ON. As a result, the drain terminal and source terminal of transistor 40 are connected, and current flows from the first power supply V1 to ground. This causes the gate terminal of transistor 46 to be at the same potential as LOW, and transistor 46 turns ON. Consequently, the drain terminal and source terminal of transistor 46 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0094] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, transistor 40 turns ON. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50. As a result, LOW is input to transistor 46. However, since the first power supply V1 is 0[V], the input terminal 12 of the first microcontroller 10 is grounded, and therefore 0[V] is applied to the input terminal 12 of the first microcontroller 10. Consequently, the input terminal 12 is not damaged.

[0095] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 40, causing it to turn OFF. This disconnects the drain and source terminals of transistor 40, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 46, causing it to turn OFF. This disconnects the source and drain terminals of transistor 46, disconnects the first power supply V1 and the pull-down resistor 56, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0096] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a LOW signal is output from the output buffer 24 of the second microcontroller 20, transistor 40 turns OFF. However, since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50. As a result, a LOW signal is input to transistor 46. However, since the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0097] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 40 is always OFF. In this case, the drain terminal and source terminal of transistor 40 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 46, which is also OFF. In this case, the source terminal and drain terminal of transistor 46 are disconnected, the first power supply V1 is disconnected, and the pull-down resistor 56 is disconnected, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0098] In other words, the microcontroller-to-microcontroller communication circuit of the seventh embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, the logic is inverted using a transistor 46 and a pull-down resistor 56 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0099] <Eighth Embodiment> Figure 8 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the eighth embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 8 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the seventh embodiment shown in Figure 7.

[0100] In the microcontroller-to-microcontroller communication circuit of the eighth embodiment, components similar to those in the seventh embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 8, the microcontroller-to-microcontroller communication circuit of the eighth embodiment differs from the microcontroller-to-microcontroller communication circuit of the seventh embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0101] In the eighth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 42, a connection node N3 connected to the pull-down resistor 52, a transistor 46, and a connection node N4 connected to the pull-down resistor 56.

[0102] The configuration of transistor 42 and pull-down resistor 52 is the same as that of transistor 42 and pull-down resistor 52 in the second, fourth, and sixth embodiments, so a description will be omitted. In the eighth embodiment, the gate terminal of transistor 42 is connected to the output terminal 22 of the second microcontroller 20 via connection node N2, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N4, which is connected to connection node N3, transistor 46, and pull-down resistor 56. In addition, connection node N3 in the eighth embodiment is located between the drain terminal of transistor 42 and the gate terminal of transistor 46 on the signal line 30. That is, the drain terminal of transistor 42 in the eighth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, transistor 46, and connection node N4, and is also connected to ground via connection node N3 and pull-down resistor 52.

[0103] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 42, causing it to turn OFF. This disconnects the source and drain terminals of transistor 42, and disconnects the first power supply V1 from the pull-down resistor 52. As a result, the gate terminal of transistor 46 becomes at the same potential as LOW, and transistor 46 turns ON. This connects the drain and source terminals of transistor 46, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0104] When the second power supply V2 is supplying power and the first power supply V1 is lost, and a HIGH signal is output from the output buffer 24 of the second microcontroller 20, transistor 42 turns OFF. As a result, the source terminal and drain terminal of transistor 42 are disconnected, and the first power supply V1 and the pull-down resistor 52 are disconnected, so the gate terminal of transistor 46 becomes at the same potential as LOW. Although LOW is input to transistor 46, the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, so 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0105] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 42, turning it ON. Then, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is input to the gate terminal of transistor 46, turning it OFF. Then, the source and drain terminals of transistor 46 are disconnected, the first power supply V1 is disconnected from the pull-down resistor 56, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0106] When the second power supply V2 is supplying power and the first power supply V1 is lost, even if LOW is output from the output buffer 24 of the second microcontroller 20, the transistor 42 does not turn ON because the first power supply V1 is 0[V], and 0[V] is applied to the gate terminal of transistor 46. Therefore, although LOW is input to transistor 46, the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, so 0[V] is applied to the input terminal 12 of the first microcontroller 10. Consequently, the input terminal 12 is not damaged.

[0107] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 42 is always ON. Then, the source and drain terminals of transistor 42 are connected, and a HIGH voltage is input to the gate terminal of transistor 46, turning it OFF. Then, the source and drain terminals of transistor 46 are disconnected, the first power supply V1 is disconnected from the pull-down resistor 56, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0108] In other words, the microcontroller-to-microcontroller communication circuit of the eighth embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the logic is inverted using a transistor 46 and a pull-down resistor 56 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0109] <Ninth Embodiment> Figure 9 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the ninth embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 9 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the fifth embodiment shown in Figure 5.

[0110] In the microcontroller-to-microcontroller communication circuit of the ninth embodiment, components similar to those in the fifth embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 9, the microcontroller-to-microcontroller communication circuit of the ninth embodiment differs from the microcontroller-to-microcontroller communication circuit of the fifth embodiment in that it includes a transistor 48 and a pull-up resistor 58 instead of a transistor 44 and a pull-up resistor 54.

[0111] In the ninth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 48, a connection node N5 connected to the pull-up resistor 58, a transistor 40, and a connection node N3 connected to the pull-up resistor 50.

[0112] Transistor 48 is located on the signal line 30 between the output terminal 22 of the second microcontroller 20 and transistor 40, more specifically between connection node N2 connected to the pull-down resistor 26 and transistor 40. In the ninth embodiment, transistor 48 is an N-channel MOSFET. Transistor 48 includes a gate terminal connected to the output terminal 22 of the second microcontroller 20 via connection node N2, a drain terminal connected to the input terminal 12 of the first microcontroller 10 via connection node N5, transistor 40 and connection node N3, and a source terminal connected to ground. The gate terminal, drain terminal and source terminal are isolated from each other. Transistor 48 switches between ON and OFF based on a signal input to the gate terminal from the second microcontroller 20.

[0113] The pull-up resistor 58 is provided on the signal line 30 between connection node N5 and the second power supply V2. Connection node N5 is provided on the signal line 30 between the output terminal 22 of the second microcontroller 20 and the gate terminal of transistor 40, more specifically between connection node N2, which is connected to the pull-down resistor 26, and the gate terminal of transistor 40. That is, the drain terminal of transistor 48 is connected to the input terminal 12 of the first microcontroller 10 via connection node N5, transistor 40, and connection node N3, and is also connected to the second power supply V2, which is the same power supply as the second microcontroller 20, via connection node N5 and the pull-up resistor 58. When transistor 48 is ON, the drain terminal side and the source terminal side are connected and power is supplied from the second power supply V2, and current flows from the drain terminal side to the source terminal side.

[0114] In the ninth embodiment, the gate terminal of transistor 40 is connected to the drain terminal of transistor 48 via connection node N5, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N3. Furthermore, the connection node N3 in the ninth embodiment is located on the signal line 30 between the drain terminal of transistor 40 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 40 in the ninth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via connection node N3 and pull-up resistor 50.

[0115] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 48, turning it ON. Then, the drain terminal and source terminal of transistor 48 are connected, and current flows from the second power supply V2 to ground, causing the gate terminal of transistor 40 to be at the same potential as LOW. When a LOW signal is input to transistor 40, turning it OFF, the drain terminal and source terminal of transistor 40 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10.

[0116] When the second power supply V2 is supplying power and the first power supply V1 is lost, a HIGH signal is output from the output buffer 24 of the second microcontroller 20, which inputs a HIGH signal to transistor 48 and turns it ON. As a result, the drain terminal and source terminal of transistor 48 are connected, and current flows from the second power supply V2 to ground, causing the gate terminal of transistor 40 to be at the same potential as LOW. Transistor 40 turns OFF, but since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0117] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 48, causing it to turn OFF. This disconnects the drain and source terminals of transistor 48, and the HIGH voltage pulled up via the second power supply V2 is input to transistor 40, causing it to turn ON. As a result, the drain and source terminals of transistor 40 are connected, and current flows from the first power supply V1 to ground. Consequently, the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0118] When the second power supply V2 is supplying power and the first power supply V1 is lost, a LOW signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 48 to be input to LOW and turn OFF. This disconnects the drain and source terminals of transistor 48, and the HIGH voltage pulled up via the second power supply V2 is input to transistor 40. Transistor 40 turns ON, but because the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0119] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 48 is always OFF. However, since the second power supply V2 is 0[V], 0[V] is applied to the pull-up resistor 58 and the gate terminal of transistor 40. Transistor 40 is OFF, and the drain terminal and source terminal of transistor 40 are disconnected, and the first power supply V1 and ground are disconnected. As a result, a HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage is always applied to the input terminal 12. However, since this voltage is from the first power supply V1, a voltage exceeding the rated voltage of the input terminal 12 is never applied.

[0120] Thus, the microcontroller-to-microcontroller communication circuit of the ninth embodiment has the same configuration as the microcontroller-to-microcontroller communication circuit of the fifth embodiment in that two N-channel MOSFETs are provided on the signal line 30. However, the transistor 40 on the second microcontroller 20 side of the fifth embodiment is energized from the first power supply V1 when ON, whereas the transistor 48 on the second microcontroller 20 side of the ninth embodiment is energized from the second power supply V2 when ON. That is, in the fifth embodiment, the transistor 40 on the second microcontroller 20 side converts the voltage from the second power supply V2 to the voltage from the first power supply V1, and the transistor 40 on the first microcontroller 10 side inverts HIGH and LOW, whereas in the ninth embodiment, the transistor 48 on the second microcontroller 20 side inverts HIGH and LOW, and the transistor 40 on the first microcontroller 10 side converts the voltage from the second power supply V2 to the voltage from the first power supply V1.

[0121] In other words, the microcontroller-to-microcontroller communication circuit of the ninth embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, a transistor 48 and a pull-up resistor 58 are used to invert HIGH and LOW, so that the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10 are matched. Since the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0122] <Tenth Embodiment> Figure 10 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 10th embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 10 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the 9th embodiment shown in Figure 9.

[0123] In the microcontroller-to-microcontroller communication circuit of the 10th embodiment, components similar to those in the 9th embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 10, the microcontroller-to-microcontroller communication circuit of the 10th embodiment differs from the microcontroller-to-microcontroller communication circuit of the 9th embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0124] In the tenth embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 48, a connection node N5 connected to the pull-up resistor 58, a transistor 42, and a connection node N3 connected to the pull-down resistor 52.

[0125] The configuration of transistor 42 and pull-down resistor 52 is the same as that of transistor 42 and pull-down resistor 52 in the second, fourth, sixth, and eighth embodiments, so a description will be omitted. In the tenth embodiment, the gate terminal of transistor 42 is connected to the drain terminal of transistor 48 via connection node N5, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N3. In addition, the connection node N3 in the tenth embodiment is located on the signal line 30 between the drain terminal of transistor 42 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 42 in the tenth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, and is also connected to ground via connection node N3 and pull-down resistor 52.

[0126] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 48, causing it to turn ON. As a result, the drain terminal and source terminal of transistor 48 are connected, and current flows from the second power supply V2 to ground. This causes the gate terminal of transistor 42 to be at the same potential as LOW, and transistor 42 turns ON. Consequently, the drain terminal and source terminal of transistor 42 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0127] When the second power supply V2 is supplying power and the first power supply V1 is lost, a HIGH signal is output from the output buffer 24 of the second microcontroller 20, which inputs a HIGH signal to transistor 48, causing it to turn ON. As a result, the drain terminal and source terminal of transistor 48 are connected, and current flows from the second power supply V2 to ground, causing the gate terminal of transistor 42 to be at the same potential as LOW. Although LOW is input to transistor 42, the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, so 0[V] is also applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0128] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 48, causing it to turn OFF. This disconnects the drain and source terminals of transistor 48, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 42, causing it to turn OFF. This disconnects the source and drain terminals of transistor 42, disconnects the first power supply V1 and the pull-down resistor 52, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0129] When the second power supply V2 is supplying power and the first power supply V1 is lost, a LOW signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 48 to be input to LOW and turn OFF. This disconnects the drain and source terminals of transistor 48, and the HIGH voltage pulled up via the first power supply V1 is input to transistor 42, causing it to turn OFF. Since the input terminal 12 of the first microcontroller 10 is grounded, 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0130] When the first power supply V1 is supplying power and the second power supply V2 is lost, transistor 48 is always OFF. However, since the second power supply V2 is 0[V], 0[V] is applied to the pull-up resistor 58 and the gate terminal of transistor 42. Transistor 42 turns ON, and the source and drain terminals of transistor 42 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage is always applied to the input terminal 12, but since this voltage is from the first power supply V1, a voltage exceeding the rated voltage of the input terminal 12 is never applied.

[0131] In other words, the microcontroller-to-microcontroller communication circuit of the 10th embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the logic is inverted using a transistor 48 and a pull-up resistor 58 to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0132] <Embodiment 11> Figure 11 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 11th embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 11 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the 9th embodiment shown in Figure 9.

[0133] In the microcontroller-to-microcontroller communication circuit of the 11th embodiment, components similar to those in the 9th embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 11, the microcontroller-to-microcontroller communication circuit of the 11th embodiment differs from the microcontroller-to-microcontroller communication circuit of the 9th embodiment in that it includes a transistor 49 and a pull-down resistor 59 instead of a transistor 48 and a pull-up resistor 58.

[0134] In the 11th embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 49, a connection node N5 connected to the pull-down resistor 59, a transistor 40, and a connection node N3 connected to the pull-up resistor 50.

[0135] Transistor 49 is located on the signal line 30 between the output terminal 22 of the second microcontroller 20 and transistor 40, more specifically between connection node N2 connected to the pull-down resistor 26 and transistor 40. In the eleventh embodiment, transistor 49 is a P-channel MOSFET. Transistor 49 includes a gate terminal connected to the output terminal 22 of the second microcontroller 20 via connection node N2, a source terminal connected to the second power supply V2, and a drain terminal connected to the input terminal 12 of the first microcontroller 10 via connection node N5, transistor 40, and connection node N3. The gate terminal, drain terminal, and source terminal are isolated from each other. Transistor 49 switches between ON and OFF based on a signal input to the gate terminal from the second microcontroller 20.

[0136] The pull-down resistor 59 is provided on the signal line 30 between the connection node N5 and ground. The connection node N5 is provided on the signal line 30 between the drain terminal of transistor 49 and the gate terminal of transistor 40. That is, the drain terminal of transistor 49 is connected to the input terminal 12 of the first microcontroller 10 via the connection node N5, transistor 40 and connection node N3, and is also connected to ground via the connection node N5 and the pull-down resistor 59. When transistor 49 is ON, its source terminal and drain terminal are connected and power is supplied from the first power supply V1, and current flows from the source terminal to the drain terminal.

[0137] In the 11th embodiment, the gate terminal of transistor 40 is connected to the drain terminal of transistor 49 via connection node N5, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N3. Furthermore, the connection node N3 in the 11th embodiment is located on the signal line 30 between the drain terminal of transistor 40 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 40 in the 11th embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, and is also connected to the first power supply V1, which is the same power supply as the first microcontroller 10, via connection node N3 and pull-up resistor 50.

[0138] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 49, causing it to turn OFF. This disconnects the source and drain terminals of transistor 49, and disconnects the second power supply V2 and the pull-down resistor 59, causing the gate terminal of transistor 40 to be at the same potential as LOW. When a LOW signal is input to transistor 40, causing it to turn OFF, the drain and source terminals of transistor 40 are disconnected, and the HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10.

[0139] When the second power supply V2 is supplying power and the first power supply V1 is lost, a HIGH signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 49 to be input to HIGH and turn OFF. As a result, the source and drain terminals of transistor 49 are disconnected, and the second power supply V2 and the pull-down resistor 59 are disconnected, causing the gate terminal of transistor 40 to be at the same potential as LOW. Transistor 40 turns OFF, but since the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0140] With both the first power supply V1 and the second power supply V2 supplying power, when LOW is output from the output buffer 24 of the second microcontroller 20, LOW is input to transistor 49 and it turns ON. Then, the source terminal and drain terminal of transistor 49 are connected, and a HIGH voltage is input to the gate terminal of transistor 40 and it turns ON. As a result, the drain terminal and source terminal of transistor 40 are connected, and current flows from the first power supply V1 to ground, so the input terminal 12 of the first microcontroller 10 becomes at the same potential as LOW, and a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0141] When the second power supply V2 is supplying power and the first power supply V1 is lost, a LOW signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 49 to be input to LOW and turn ON. Then, the source and drain terminals of transistor 49 are connected, and a HIGH voltage is input to the gate terminal of transistor 40. Transistor 40 turns ON, but because the first power supply V1 is 0[V], 0[V] is applied to the pull-up resistor 50 and the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0142] When the first power supply V1 is supplying power and the second power supply V2 is lost, 0[V] is always applied to the gate terminal of transistor 49. However, because the second power supply V2 is 0[V], 0[V] is also applied to the gate terminal of transistor 40. As a result, LOW is input to transistor 40, turning it OFF, disconnecting the drain terminal and source terminal of transistor 40, and a HIGH voltage pulled up via the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage is always applied to the input terminal 12, but since this voltage is from the first power supply V1, a voltage exceeding the rated voltage of the input terminal 12 is never applied.

[0143] In other words, the microcontroller-to-microcontroller communication circuit of the 11th embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 40 and a pull-up resistor 50. In this case, since HIGH and LOW are inverted, a transistor 49 and a pull-down resistor 59 are used to invert HIGH and LOW, so that the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10 are matched. Since the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0144] <Twelfth Embodiment> Figure 12 is a schematic diagram showing an example of the general configuration of the microcontroller-to-microcontroller communication circuit according to the 12th embodiment. The microcontroller-to-microcontroller communication circuit shown in Figure 12 is a circuit that communicates between a first microcontroller 10 that controls the first system and a second microcontroller 20 that controls the second system in a redundant system, similar to the microcontroller-to-microcontroller communication circuit according to the 11th embodiment shown in Figure 11.

[0145] In the microcontroller-to-microcontroller communication circuit of the 12th embodiment, components similar to those in the 11th embodiment and the like are denoted by the same reference numerals and their descriptions are omitted. As shown in Figure 12, the microcontroller-to-microcontroller communication circuit of the 12th embodiment differs from the microcontroller-to-microcontroller communication circuit of the 11th embodiment in that it includes a transistor 42 and a pull-down resistor 52 instead of a transistor 40 and a pull-up resistor 50.

[0146] In the 12th embodiment, the signal line 30 is provided with, in order from the output side, the second microcontroller 20, toward the input side, the first microcontroller 10, a connection node N2 connected to the pull-down resistor 26, a transistor 49, a connection node N5 connected to the pull-down resistor 59, a transistor 42, and a connection node N3 connected to the pull-down resistor 52.

[0147] The configuration of transistor 42 and pull-down resistor 52 is the same as that of transistor 42 and pull-down resistor 52 in the second, fourth, sixth, eighth, and tenth embodiments, so a description will be omitted. In the twelfth embodiment, the gate terminal of transistor 42 is connected to the drain terminal of transistor 49 via connection node N5, and the drain terminal is connected to the input terminal 12 of the first microcontroller 10 via connection node N3. In addition, the connection node N3 of the twelfth embodiment is located on the signal line 30 between the drain terminal of transistor 42 and the input terminal 12 of the first microcontroller 10. That is, the drain terminal of transistor 42 in the twelfth embodiment is connected to the input terminal 12 of the first microcontroller 10 via connection node N3, and is also connected to ground via connection node N3 and pull-down resistor 52.

[0148] With both the first power supply V1 and the second power supply V2 supplying power, when a HIGH signal is output from the output buffer 24 of the second microcontroller 20, a HIGH signal is input to transistor 49, causing it to turn OFF. This disconnects the source and drain terminals of transistor 49, and disconnects the second power supply V2 and the pull-down resistor 59, causing the gate terminal of transistor 42 to reach the same potential as LOW, and transistor 42 turns ON. As a result, the drain and source terminals of transistor 42 are connected, and a HIGH voltage is applied to the input terminal 12 of the first microcontroller 10.

[0149] When the second power supply V2 is supplying power and the first power supply V1 is lost, a HIGH signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 49 to be input to HIGH and turn OFF. As a result, the source terminal and drain terminal of transistor 49 are disconnected, and the second power supply V2 side and the pull-down resistor 59 side are disconnected, so the gate terminal of transistor 42 becomes at the same potential as LOW. Although LOW is input to transistor 42, the first power supply V1 is 0[V] and the input terminal 12 of the first microcontroller 10 is grounded, so 0[V] is also applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 is not damaged.

[0150] With both the first power supply V1 and the second power supply V2 supplying power, when a LOW signal is output from the output buffer 24 of the second microcontroller 20, a LOW signal is input to transistor 49, turning it ON. Then, the source and drain terminals of transistor 49 are connected, and a HIGH voltage is input to the gate terminal of transistor 42, turning it OFF. Then, the source and drain terminals of transistor 42 are disconnected, the first power supply V1 is disconnected from the pull-down resistor 52, and since the input terminal 12 of the first microcontroller 10 is grounded, a LOW voltage is applied to the input terminal 12 of the first microcontroller 10.

[0151] When the second power supply V2 is supplying power and the first power supply V1 is lost, a LOW signal is output from the output buffer 24 of the second microcontroller 20, causing transistor 49 to be input to LOW and turn ON. Then, the source and drain terminals of transistor 49 are connected, and a HIGH voltage is input to the gate terminal of transistor 42, causing it to turn OFF. Since the input terminal 12 of the first microcontroller 10 is grounded, 0[V] is applied to the input terminal 12 of the first microcontroller 10. Therefore, the input terminal 12 will not be damaged.

[0152] When the first power supply V1 is supplying power and the second power supply V2 is lost, 0[V] is always applied to the gate terminal of transistor 49. However, because the second power supply V2 is 0[V], 0[V] is also applied to the gate terminal of transistor 42. As a result, LOW is input to transistor 42, turning it ON, and the drain terminal and source terminal of transistor 42 are connected, applying a HIGH voltage to the input terminal 12 of the first microcontroller 10. If the second power supply V2 is lost, a HIGH voltage will always be applied to the input terminal 12, but since this voltage is from the first power supply V1, the applied voltage will not exceed the rated voltage of the input terminal 12.

[0153] In other words, the microcontroller-to-microcontroller communication circuit of the 12th embodiment is a circuit that converts the voltage from the second power supply V2 to the voltage from the first power supply V1 using a transistor 42 and a pull-down resistor 52. In this case, since HIGH and LOW are inverted, the transistor 49 and the pull-down resistor 59 invert HIGH and LOW to match the HIGH / LOW of the voltage output by the second microcontroller 20 and the voltage input to the first microcontroller 10. Since the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, the first microcontroller 10, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10.

[0154] <Other Embodiments> In the fifth to twelfth embodiments, the logic inversion gates (inverters 60, 62) were replaced with transistors 44, 46, 48, and 49, which are MOSFET open-drain circuits. However, the MOSFET open-drain circuits may be replaced with open-collector circuits.

[0155] (Effects of the embodiment) The microcontroller-to-microcontroller communication circuit described in the embodiment can be understood, for example, as follows.

[0156] The microcontroller-to-microcontroller communication circuit of the first embodiment includes an input terminal 12 of a first microcontroller 10 having a first power supply V1, an output terminal 22 of a second microcontroller 20 having a second power supply V2, a signal line 30 that connects the input terminal 12 of the first microcontroller 10 and the output terminal 22 of the second microcontroller 20 and sends the signal output from the output terminal 22 of the second microcontroller 20 to the input terminal 12 of the first microcontroller 10, and a terminal provided on the signal line 30 that switches between on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and saw The system includes transistors 40 and 42 that conduct energy at their terminals, a node (connection node N3) provided between transistors 40 and 42 and the input terminal 12 of the first microcontroller 10, and a voltage inversion element (inverter 60, 62, or transistors 44, 46, 48, 49) provided on the signal line 30 between the output terminal 22 of the second microcontroller 20 and transistor 40, or between the node (connection node N3) and the input terminal 12 of the first microcontroller 10, which inverts the voltage of the signal input from the second microcontroller 20 and outputs it to the first microcontroller 10.

[0157] With the above configuration, the microcontroller-to-microcontroller communication circuit of the first embodiment uses transistors 40 and 42 to configure a circuit that converts the voltage from the second power supply V2 of the second microcontroller 20 to the voltage from the first power supply V1 of the first microcontroller 10. Therefore, since only the voltage from the first power supply V1 is applied to the input terminal 12 of the first microcontroller 10, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will not be applied. For this reason, it is not necessary to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and thus the terminal (input terminal 12) can be protected even when one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0158] Furthermore, the microcontroller-to-microcontroller communication circuit of the second embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, The transistor 40 is further equipped with a pull-up resistor 50 provided between the node (connection node N3) and the first power supply V1. The transistor 40 has a gate terminal connected to the output terminal 22 of the second microcontroller 20, a source terminal connected to ground, and a drain terminal connected to the node (connection node N3). When ON, current flows from the drain terminal to the source terminal.

[0159] With the above configuration, the first power supply V1 connected to the drain terminal of transistor 40 is the same first power supply V1 as the input side, first microcontroller 10. Therefore, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10. For this reason, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12. Thus, the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0160] Furthermore, the microcontroller-to-microcontroller communication circuit of the third embodiment is the same as the microcontroller-to-microcontroller communication circuit of the first embodiment, further comprising a pull-down resistor 52 provided between the node (connection node N3) and ground, and the transistor 42 has a gate terminal connected to the output terminal 22 of the second microcontroller 20, a source terminal connected to the first power supply V1, and a drain terminal connected to the node (connection node N3), and when turned on, current flows from the source terminal to the drain terminal.

[0161] With the above configuration, the first power supply V1 connected to the source terminal of transistor 42 is the same first power supply V1 as the input side, first microcontroller 10. Therefore, a voltage higher than the power supply voltage of the first microcontroller 10 is never applied to the input terminal 12 of the first microcontroller 10. For this reason, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12. Thus, the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0162] Furthermore, the microcontroller-to-microcontroller communication circuit of the fourth embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, wherein transistor 40 is the first transistor, node (connection node N3) is the first node, voltage inversion element is a second transistor (transistor 44) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 44) is provided between the first node (connection node N3) and the input terminal 12 of the first microcontroller 10, and a second node (connection node N4) is provided between the second transistor (transistor 44) and the input terminal 12 of the first microcontroller 10, and a first pull-up resistor (pull-up resistor) is provided between the node (connection node N3) and the first power supply V1. The device further comprises a pull-up resistor (50) and a second pull-up resistor (54) provided between the second node (connection node N4) and the first power supply V1. The first transistor (transistor 40) has a first gate terminal connected to the output terminal 22 of the second microcontroller 20, a first source terminal connected to ground, and a first drain terminal connected to the first node (connection node N3), and when ON, current flows from the first drain terminal to the first source terminal. The second transistor (transistor 44) has a second gate terminal connected to the first node (connection node N3), a second source terminal connected to ground, and a second drain terminal connected to the second node (connection node N4), and when ON, current flows from the second drain terminal to the second source terminal.

[0163] With the above configuration, the first transistor (transistor 40) converts the voltage from the second power supply V2 of the second microcontroller 20 to the voltage from the first power supply V1 of the first microcontroller 10, and the second transistor (transistor 44) forms a circuit that inverts the voltage between HIGH and LOW. Since the first power supply V1 connected to the drain terminal of the first transistor (transistor 40) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. Therefore, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Consequently, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0164] Furthermore, the microcontroller-to-microcontroller communication circuit of the fifth embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, where transistor 42 is the first transistor, node (connection node N3) is the first node, voltage inversion element is a second transistor (transistor 44) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 44) is provided between the first node (connection node N3) and the input terminal 12 of the first microcontroller 10, and a second node (connection node N4) is provided between the second transistor (transistor 44) and the input terminal 12 of the first microcontroller 10, and a pull-down is provided between the first node (connection node N3) and ground. The system further includes a resistor 52 and a pull-up resistor 54 provided between the second node (connection node N4) and the first power supply V1. The first transistor (transistor 42) has a first gate terminal connected to the output terminal 22 of the second microcontroller 20, a first source terminal connected to the first power supply V1, and a first drain terminal connected to the first node (connection node N3), and when it is on, current flows from the first source terminal to the first drain terminal. The second transistor (transistor 44) has a second gate terminal connected to the first node (connection node N3), a second source terminal connected to ground, and a second drain terminal connected to the second node (connection node N4), and when it is on, current flows from the second drain terminal to the second source terminal.

[0165] With the above configuration, the first transistor (transistor 42) converts the voltage from the second power supply V2 of the second microcontroller 20 to the voltage from the first power supply V1 of the first microcontroller 10, and the second transistor (transistor 44) forms a circuit that inverts the voltage between HIGH and LOW. Since the first power supply V1 connected to the source terminal of the first transistor (transistor 42) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. For this reason, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Therefore, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and thus the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0166] Furthermore, the microcontroller-to-microcontroller communication circuit of the sixth embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, where transistor 40 is the first transistor, node (connection node N3) is the first node, voltage inverting element is a second transistor (transistor 46) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 46) is provided between the first node (connection node N3) and the input terminal 12 of the first microcontroller 10, and a second node (connection node N4) is provided between the second transistor (transistor 46) and the input terminal 12 of the first microcontroller 10, and a pin is provided between the first node (connection node N3) and the first power supply V1 The system further includes a pull-up resistor 50 and a pull-down resistor 56 provided between the second node (connection node N4) and ground. The first transistor (transistor 40) has a first gate terminal connected to the output terminal 22 of the second microcontroller 20, a first source terminal connected to ground, and a first drain terminal connected to the first node (connection node N3), and when ON, current flows from the first drain terminal to the first source terminal. The second transistor (transistor 46) has a second gate terminal connected to the first node (connection node N3), a second source terminal connected to the first power supply V1, and a second drain terminal connected to the second node (connection node N4), and when ON, current flows from the second source terminal to the second drain terminal.

[0167] With the above configuration, the first transistor (transistor 40) converts the voltage from the second power supply V2 of the second microcontroller 20 to the voltage from the first power supply V1 of the first microcontroller 10, and the second transistor (transistor 46) forms a circuit that inverts the voltage between HIGH and LOW. Since the first power supply V1 connected to the drain terminal of the first transistor (transistor 40) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. Therefore, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Consequently, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0168] Furthermore, the microcontroller-to-microcontroller communication circuit of the seventh embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, where transistor 42 is the first transistor, node (connection node N3) is the first node, voltage inversion element is a second transistor (transistor 46) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 46) is provided between the first node (connection node N3) and the input terminal 12 of the first microcontroller 10, and a second node (connection node N4) is provided between the second transistor (transistor 46) and the input terminal 12 of the first microcontroller 10, and a first pull-down resistor (pull-down resistor) is provided between the first node (connection node N3) and ground. The device further comprises a resistor 52) and a second pull-down resistor (pull-down resistor 56) provided between the second node (connection node N4) and ground. The first transistor (transistor 42) has a first gate terminal connected to the output terminal 22 of the second microcontroller 20, a first source terminal connected to the first power supply V1, and a first drain terminal connected to the first node (connection node N3), and when it is on, current flows from the first source terminal to the first drain terminal. The second transistor (transistor 46) has a second gate terminal connected to the first node (connection node N3), a second source terminal connected to the first power supply V1, and a second drain terminal connected to the second node (connection node N4), and when it is on, current flows from the second source terminal to the second drain terminal.

[0169] With the above configuration, the first transistor (transistor 42) converts the voltage from the second power supply V2 of the second microcontroller 20 to the voltage from the first power supply V1 of the first microcontroller 10, and the second transistor (transistor 46) forms a circuit that inverts the voltage between HIGH and LOW. Since the first power supply V1 connected to the source terminal of the first transistor (transistor 42) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. For this reason, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Therefore, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and thus the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0170] Furthermore, the microcontroller-to-microcontroller communication circuit of the eighth embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, wherein transistor 40 is the first transistor, node (connection node N3) is the first node, voltage inversion element is a second transistor (transistor 48) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 48) is provided between the output terminal 22 of the second microcontroller 20 and the first transistor (transistor 40), and a second node (connection node N5) is provided between the second transistor (transistor 48) and the first transistor (transistor 40), and a first pull-up resistor is provided between the first node (connection node N3) and the first power supply V1. The system further includes a pull-up resistor (50) and a second pull-up resistor (58) provided between the second node (connection node N5) and the second power supply V2. The first transistor (transistor 40) has a first gate terminal connected to the second node (connection node N5), a first source terminal connected to ground, and a first drain terminal connected to the first node (connection node N3), and when ON, current flows from the first drain terminal to the first source terminal. The second transistor (transistor 48) has a second gate terminal connected to the output terminal 22 of the second microcontroller 20, a second source terminal connected to ground, and a second drain terminal connected to the second node (connection node N5), and when ON, current flows from the second drain terminal to the second source terminal.

[0171] With the above configuration, the second transistor (transistor 48) inverts the HIGH and LOW voltages of the second power supply V2 of the second microcontroller 20, and the first transistor (transistor 40) converts this voltage into the voltage of the first power supply V1 of the first microcontroller 10. Since the first power supply V1 connected to the drain terminal of the first transistor (transistor 40) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. For this reason, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Therefore, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and thus the terminal (input terminal 12) can be protected even if one power supply (first power supply V1) fails without reducing the frequency response.

[0172] Furthermore, the microcontroller-to-microcontroller communication circuit of the ninth embodiment is the same as the microcontroller-to-microcontroller communication circuit of the first embodiment, where transistor 42 is the first transistor, node (connection node N3) is the first node, the voltage inversion element is a second transistor (transistor 48) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when it is on, the drain terminal and source terminal are energized, the second transistor (transistor 48) is provided between the output terminal 22 of the second microcontroller 20 and the first transistor (transistor 42), and a second node (connection node N5) is provided between the second transistor (transistor 48) and the first transistor (transistor 42), and a pull-down resistor is provided between the first node (connection node N3) and ground. The device further comprises 52 and a second pull-up resistor (pull-up resistor 58) provided between the second node (connection node N5) and the second power supply V2. The first transistor (transistor 42) has a first gate terminal connected to the second node (connection node N5), a first source terminal connected to the first power supply V1, and a first drain terminal connected to the first node (connection node N3), and when it is on, current flows from the first source terminal to the first drain terminal. The second transistor (transistor 48) has a second gate terminal connected to the output terminal 22 of the second microcontroller 20, a second source terminal connected to ground, and a second drain terminal connected to the second node (connection node N5), and when it is on, current flows from the second drain terminal to the second source terminal.

[0173] With the above configuration, the second transistor (transistor 48) inverts the HIGH and LOW voltages of the second power supply V2 of the second microcontroller 20, and the first transistor (transistor 42) converts this voltage into the voltage of the first power supply V1 of the first microcontroller 10. Since the first power supply V1 connected to the source terminal of the first transistor (transistor 42) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. For this reason, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Therefore, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and thus the terminal (input terminal 12) can be protected even if one of the power supplies (first power supply V1) fails without reducing the frequency response.

[0174] Furthermore, the microcontroller-to-microcontroller communication circuit of the tenth embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, wherein transistor 40 is the first transistor, node (connection node N3) is the first node, voltage inversion element is a second transistor (transistor 49) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 49) is provided between the output terminal 22 of the second microcontroller 20 and the first transistor (transistor 40), and a second node (connection node N5) is provided between the second transistor (transistor 49) and the first transistor (transistor 40), and a pull is provided between the first node (connection node N3) and the first power supply V1 The system further includes an up resistor 50 and a second pull-down resistor (pull-down resistor 59) provided between the second node (connection node N5) and ground. The first transistor (transistor 40) has a first gate terminal connected to the second node (connection node N5), a first source terminal connected to ground, and a first drain terminal connected to the first node (connection node N3), and when ON, current flows from the first drain terminal to the first source terminal. The second transistor (transistor 49) has a second gate terminal connected to the output terminal 22 of the second microcontroller 20, a second source terminal connected to the second power supply V2, and a second drain terminal connected to the second node (connection node N5), and when ON, current flows from the second source terminal to the second drain terminal.

[0175] With the above configuration, the second transistor (transistor 49) inverts the HIGH and LOW voltages of the second power supply V2 of the second microcontroller 20, and the first transistor (transistor 40) converts this voltage into the voltage of the first power supply V1 of the first microcontroller 10. Since the first power supply V1 connected to the drain terminal of the first transistor (transistor 40) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. Therefore, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Consequently, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and the terminal (input terminal 12) can be protected even if one power supply (first power supply V1) fails without reducing the frequency response.

[0176] Furthermore, the microcontroller-to-microcontroller communication circuit of the 11th embodiment is the microcontroller-to-microcontroller communication circuit of the first embodiment, wherein transistor 42 is the first transistor, node (connection node N3) is the first node, voltage inverting element is a second transistor (transistor 49) that switches on and off based on a signal input to the gate terminal from the second microcontroller 20, and when on, the drain terminal and source terminal are energized, the second transistor (transistor 49) is provided between the output terminal 22 of the second microcontroller 20 and the first transistor (transistor 42), and a second node (connection node N5) is provided between the second transistor (transistor 49) and the first transistor (transistor 42), and a first pull-down resistor (pull) is provided between the first node (connection node N3) and ground. The system further includes a pull-down resistor 52) and a second pull-down resistor (pull-down resistor 59) provided between the second node (connection node N5) and ground. The first transistor (transistor 42) has a first gate terminal connected to the second node (connection node N5), a first source terminal connected to the first power supply V1, and a first drain terminal connected to the first node (connection node N3), and when it is ON, current flows from the first source terminal to the first drain terminal. The second transistor (transistor 49) has a second gate terminal connected to the output terminal 22 of the second microcontroller 20, a second source terminal connected to the second power supply V2, and a second drain terminal connected to the second node (connection node N5), and when it is ON, current flows from the second source terminal to the second drain terminal.

[0177] With the above configuration, the second transistor (transistor 49) inverts the HIGH and LOW voltages of the second power supply V2 of the second microcontroller 20, and the first transistor (transistor 42) converts this voltage into the voltage of the first power supply V1 of the first microcontroller 10. Since the first power supply V1 connected to the source terminal of the first transistor (transistor 42) is the same first power supply V1 as the input side, the input terminal 12 of the first microcontroller 10 will never have a voltage higher than the power supply voltage of the first microcontroller 10 applied to it. Therefore, even if the first power supply V1 fails, a voltage higher than the power supply voltage of the first microcontroller 10 will never be applied. Consequently, there is no need to provide a resistor to limit the input current and set its resistance value high in order to reduce the current entering the input terminal 12, and the terminal (input terminal 12) can be protected even if one power supply (first power supply V1) fails without reducing the frequency response.

[0178] Furthermore, the microcontroller-to-microcontroller communication circuit of the twelfth embodiment is a microcontroller-to-microcontroller communication circuit of any of the first to third embodiments, and the voltage inversion element is an inverter.

[0179] With the above configuration, a microcontroller-to-microcontroller communication circuit can be realized at a lower cost compared to the case where two transistors are used as in the fourth to eleventh embodiments. [Explanation of Symbols]

[0180] 10 First microcontroller 12 Input terminals 14 Input Buffers 16, 18 Protection diodes 20 Second microcontroller 22 output terminals 24 Output buffers 26 pull-down resistors 30 signal lines 40, 42, 44, 46, 48, 49 transistors 50, 54, 58 pull-up resistors 52, 56, 59 Pull-down resistors 60, 62 inverter CB CMOS buffer gate N1, N2, N3, N4, N5 Connecting nodes (nodes) V1 1st power supply V2 2nd power supply

Claims

1. The input terminal of the first microcontroller having the first power supply, The output terminal of the second microcontroller having a second power supply, A signal line connects the input terminal of the first microcontroller to the output terminal of the second microcontroller, and sends the signal output from the output terminal of the second microcontroller to the input terminal of the first microcontroller. A transistor is provided on the signal line, which switches between on and off based on a signal input to the gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. A node is provided between the transistor and the input terminal of the first microcontroller, A voltage inverting element is provided on the signal line between the output terminal of the second microcontroller and the transistor, or between the node and the input terminal of the first microcontroller, and inverts the voltage of the signal input from the second microcontroller and outputs it to the first microcontroller. Equipped with, Microcontroller-to-microcontroller communication circuit.

2. The system further includes a pull-up resistor provided between the node and the first power supply, The aforementioned transistor is A gate terminal connected to the output terminal of the second microcontroller, The source terminal is connected to the ground, A drain terminal connected to the aforementioned node, It has the ability to conduct current from the drain terminal to the source terminal when it is ON, The microcontroller-to-microcontroller communication circuit according to claim 1.

3. The system further includes a pull-down resistor provided between the node and ground, The aforementioned transistor is A gate terminal connected to the output terminal of the second microcontroller, A source terminal connected to the first power supply, A drain terminal connected to the aforementioned node, It has the ability to conduct current from the source terminal to the drain terminal when it is ON, The microcontroller-to-microcontroller communication circuit according to claim 1.

4. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the first node and the input terminal of the first microcontroller. A second node is provided between the second transistor and the input terminal of the first microcontroller, A first pull-up resistor is provided between the first node and the first power supply, A second pull-up resistor is provided between the second node and the first power supply, Furthermore, The first transistor described above is A first gate terminal connected to the output terminal of the second microcontroller, A first source terminal connected to ground, A first drain terminal connected to the first node, It has a power supply that, when turned on, energizes from the first drain terminal to the first source terminal, The second transistor described above is A second gate terminal connected to the first node, A second source terminal that connects to ground, A second drain terminal connected to the second node, It has a function that, when turned on, conducts current from the second drain terminal to the second source terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

5. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the first node and the input terminal of the first microcontroller. A second node is provided between the second transistor and the input terminal of the first microcontroller, A pull-down resistor is provided between the first node and ground, A pull-up resistor is provided between the second node and the first power supply, Furthermore, The first transistor described above is A first gate terminal connected to the output terminal of the second microcontroller, A first source terminal connected to the first power supply, A first drain terminal connected to the first node, It has a function that, when turned on, energizes from the first source terminal to the first drain terminal, The second transistor described above is A second gate terminal connected to the first node, A second source terminal that connects to ground, A second drain terminal connected to the second node, It has a function that, when turned on, conducts current from the second drain terminal to the second source terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

6. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the first node and the input terminal of the first microcontroller. A second node is provided between the second transistor and the input terminal of the first microcontroller, A pull-up resistor is provided between the first node and the first power supply, A pull-down resistor is provided between the second node and ground, Furthermore, The first transistor described above is A first gate terminal connected to the output terminal of the second microcontroller, A first source terminal connected to ground, A first drain terminal connected to the first node, It has a power supply that, when turned on, energizes from the first drain terminal to the first source terminal, The second transistor described above is A second gate terminal connected to the first node, A second source terminal connected to the first power supply, A second drain terminal connected to the second node, It has a function that, when turned on, energizes from the second source terminal to the second drain terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

7. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the first node and the input terminal of the first microcontroller. A second node is provided between the second transistor and the input terminal of the first microcontroller, A first pull-down resistor is provided between the first node and ground, A second pull-down resistor is provided between the second node and ground, Furthermore, The first transistor described above is A first gate terminal connected to the output terminal of the second microcontroller, A first source terminal connected to the first power supply, A first drain terminal connected to the first node, It has a function that, when turned on, energizes from the first source terminal to the first drain terminal, The second transistor described above is A second gate terminal connected to the first node, A second source terminal connected to the first power supply, A second drain terminal connected to the second node, It has a function that, when turned on, energizes from the second source terminal to the second drain terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

8. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the output terminal of the second microcontroller and the first transistor. A second node is provided between the second transistor and the first transistor, A first pull-up resistor is provided between the first node and the first power supply, A second pull-up resistor is provided between the second node and the second power supply, Furthermore, The first transistor described above is The first gate terminal connected to the second node, A first source terminal connected to ground, A first drain terminal connected to the first node, It has a power supply that, when turned on, energizes from the first drain terminal to the first source terminal, The second transistor described above is A second gate terminal connected to the output terminal of the second microcontroller, A second source terminal that connects to ground, A second drain terminal connected to the second node, It has a function that, when turned on, conducts current from the second drain terminal to the second source terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

9. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the output terminal of the second microcontroller and the first transistor. A second node is provided between the second transistor and the first transistor, A pull-down resistor is provided between the first node and ground, A pull-up resistor is provided between the second node and the second power supply, Furthermore, The first transistor described above is The first gate terminal connected to the second node, A first source terminal connected to the first power supply, A first drain terminal connected to the first node, It has a function that, when turned on, energizes from the first source terminal to the first drain terminal, The second transistor described above is A second gate terminal connected to the output terminal of the second microcontroller, A second source terminal that connects to ground, A second drain terminal connected to the second node, It has a function that, when turned on, conducts current from the second drain terminal to the second source terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

10. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the output terminal of the second microcontroller and the first transistor. A second node is provided between the second transistor and the first transistor, A pull-up resistor is provided between the first node and the first power supply, A pull-down resistor is provided between the second node and ground, Furthermore, The first transistor described above is The first gate terminal connected to the second node, A first source terminal connected to ground, A first drain terminal connected to the first node, It has a power supply that, when turned on, energizes from the first drain terminal to the first source terminal, The second transistor described above is A second gate terminal connected to the output terminal of the second microcontroller, A second source terminal connected to the second power supply, A second drain terminal connected to the second node, It has a function that, when turned on, energizes from the second source terminal to the second drain terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

11. The transistor is the first transistor, The aforementioned node is the first node, The voltage inversion element is a second transistor that switches between on and off based on a signal input to its gate terminal from the second microcontroller, and when it is on, the drain terminal and source terminal are energized. The second transistor is provided between the output terminal of the second microcontroller and the first transistor. A second node is provided between the second transistor and the first transistor, A first pull-down resistor is provided between the first node and ground, A second pull-down resistor is provided between the second node and ground, Furthermore, The first transistor described above is The first gate terminal connected to the second node, A first source terminal connected to the first power supply, A first drain terminal connected to the first node, It has a function that, when turned on, energizes from the first source terminal to the first drain terminal, The second transistor described above is A second gate terminal connected to the output terminal of the second microcontroller, A second source terminal connected to the second power supply, A second drain terminal connected to the second node, It has a function that, when turned on, energizes from the second source terminal to the second drain terminal. The microcontroller-to-microcontroller communication circuit according to claim 1.

12. The aforementioned voltage inversion element is an inverter. A microcontroller-to-microcontroller communication circuit according to any one of claims 1 to 3.

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