Filter device

Abstract

This suppresses the degradation of attenuation characteristics caused by spurious emissions in the filter device. [Solution] The filter device 100 comprises a laminate 110 in which multiple dielectric layers LY1 to LY14 are stacked, an input terminal T1, an output terminal T2, a ground terminal GND, a first path and a second path, and capacitor electrodes PC20 to PC23. The first path is connected to the input terminal T1. The second path is connected to the output terminal T2. Capacitor electrode PC22 is connected to the first path. Capacitor electrode PC23 is connected to the second path. Capacitor electrode PC20 is connected to both the first and second paths. When viewed from the stacking direction of the laminate 110, at least a portion of capacitor electrode PC20, at least a portion of capacitor electrode PC22, and at least a portion of capacitor electrode PC23 overlap with capacitor electrode PC21.

Description

Technical Field

[0001] The present disclosure relates to a filter device, and more particularly to a technique for improving the attenuation characteristics of a stop band in a filter device.

Background Art

[0002] Japanese Patent No. 4738218 (Patent Document 1) discloses a low-pass filter which is an example of a multilayer electronic component. In the low-pass filter of Patent Document 1, a configuration is described in which at least a part of a plurality of ground side electrodes arranged on the side surface of a laminate is not connected to an insulating substrate, thereby controlling the frequency of an attenuation pole generated by a parasitic inductor.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a low-pass filter, due to the stray capacitance of an inductor constituting a resonance circuit and / or structural asymmetry due to manufacturing variations, etc., unintended spurs occur in the stop band on the higher frequency side than the pass band, and the attenuation characteristics of the stop band may deteriorate.

[0005] In recent years, mobile communication devices such as smartphones and mobile phones have adopted configurations that use radio waves in the microwave frequency band below 6 GHz, such as Wi-Fi, and radio waves in the millimeter-wave frequency band such as 28 GHz and 39 GHz, which are compatible with 5G communication standards. In such communication devices, if spurious signals like those described above occur in the millimeter-wave band in the low-pass filter used in the circuit that processes microwave band radio waves, the attenuation characteristics of the millimeter-wave band will deteriorate, which may lead to noise generation in that frequency band and a decrease in communication quality.

[0006] This disclosure was made to solve the above-mentioned problems, and its purpose is to suppress the deterioration of attenuation characteristics caused by spurious emissions in a filter device. [Means for solving the problem]

[0007] A filter device according to a certain aspect of the present disclosure comprises an input terminal, an output terminal, a ground terminal, and a first resonator connected to the input terminal and the output terminal. The first resonator includes a first terminal connected to the input terminal, a second terminal connected to the output terminal, a first inductor and a second inductor, and first to third capacitors. One end of the first inductor is connected to the first terminal. One end of the second inductor is connected to the second terminal, and the other end is connected to the other end of the first inductor. One end of the first capacitor is connected to the first terminal. One end of the second capacitor is connected to the second terminal, and the other end is connected to the other end of the first capacitor. The third capacitor is connected between the other end of the first inductor and the other end of the first capacitor.

[0008] A filter device relating to another aspect of this disclosure comprises a laminate in which a plurality of dielectrics are stacked, an input terminal, an output terminal, a ground terminal, a first path and a second path, and first to fourth capacitor electrodes. The first path is connected to the input terminal. The second path is connected to the output terminal. The first capacitor electrode is connected to the first path. The second capacitor electrode is connected to the second path. The third capacitor electrode is connected to both the first and second paths. When viewed from the stacking direction of the laminate in plan view, at least a portion of the first capacitor electrode, at least a portion of the second capacitor electrode, and at least a portion of the third capacitor electrode overlap with the fourth capacitor electrode. [Effects of the Invention]

[0009] In the filter device according to this disclosure, a spurious adjustment capacitor (third capacitor) is placed between the intermediate portion of the inductor and the intermediate portion of the capacitor of the resonator, in a filter device including an LC parallel resonator connected between the input terminal and the output terminal. By setting the capacitance of the adjustment capacitor to be larger than the stray capacitance of the inductor, the frequency of the generated spurious signals can be reduced, and spurious signals can be generated in frequency bands other than the target frequency band. Therefore, the deterioration of the attenuation characteristics caused by spurious signals generated in the filter device can be suppressed. [Brief explanation of the drawing]

[0010] [Figure 1] This is an equivalent circuit diagram of the filter device according to Embodiment 1. [Figure 2] This is an external perspective view of the filter device according to Embodiment 1. [Figure 3] Figure 2 is an exploded perspective view showing an example of the stacked structure of a filter device. [Figure 4] This is the equivalent circuit diagram of the comparative filter device. [Figure 5] This figure illustrates the filter characteristics of the filter apparatus in Embodiment 1 and the Comparative Example. [Figure 6]Figure 1 for explaining the reason for spurious generation. [Figure 7] Figure 2 for explaining the reason for spurious generation. [Figure 8] A diagram for explaining the filter characteristics when adjusting the line length of the inductor of the resonator. [Figure 9] Equivalent circuit diagram of the filter device of Modification 1. [Figure 10] Equivalent circuit diagram of the filter device of Modification 2. [Figure 11] Equivalent circuit diagram of the filter device according to Embodiment 2. \] [Figure 12] Exploded perspective view showing an example of the stacked structure of the filter device of Embodiment 2. [Figure 13] Figure 1 for explaining the reason why the level of spurious can be adjusted. [Figure 14] Figure 2 for explaining the reason why the level of spurious can be adjusted. [Figure 15] A diagram for explaining the filter characteristics of the filter device of Embodiment 2. [Figure 16] Equivalent circuit diagram of the filter device of Modification 3. [Figure 17] Equivalent circuit diagram of the filter device of Modification 4. [Figure 18] Equivalent circuit diagram of the filter device of Modification 5. [Figure 19] Equivalent circuit diagram of the filter device according to Embodiment ③. [Figure 20] A diagram for explaining the filter characteristics of the filter device of Embodiment 3. [Figure 21] Equivalent circuit diagram of the filter device according to Embodiment 4. [Figure 22] A diagram for explaining the filter characteristics of the filter device of Embodiment 4. [Figure 23] Equivalent circuit diagram of the filter device of Modification 6. [Figure 24] A diagram for explaining the filter characteristics of the filter device of Modification 6. [Modes for carrying out the invention]

[0011] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and their descriptions will not be repeated.

[0012] [Embodiment 1] Figure 1 is an equivalent circuit diagram of a filter device 100 according to Embodiment 1. The filter device 100 includes an input terminal T1, an output terminal T2, a ground terminal GND, resonators RC0 and RC1, capacitors C1 and C2, and an inductor L31. Resonator RC0 includes an inductor L11 and a capacitor C11. Resonator RC1 includes capacitors C21 to C23 and inductors L21 and L22.

[0013] The resonator RC0 is connected to input terminal T1. More specifically, one end of inductor L11 is connected to input terminal T1, and capacitor C11 is connected in parallel with inductor L11.

[0014] One end of inductor L31 is connected to output terminal T2. The other end of inductor L11, which is included in resonator RC0, is connected to terminal N1 (first terminal) of resonator RC1, and the other end of inductor L31 is connected to terminal N2 (second terminal) of resonator RC1.

[0015] In the resonator RC1, inductors L21 and L22 are connected in series between terminal N1, which is connected to inductor L11, and terminal N2, which is connected to inductor L31. One end of capacitor C21 is connected to terminal N1, and the other end is connected to one end of capacitor C22. The other end of capacitor C22 is connected to terminal N2. In other words, capacitors C21 and C22, which are connected in series, are connected in parallel to inductors L21 and L22, which are connected in series. Capacitor C23 is connected between connection node N11 between inductors L21 and L22, and connection node N12 between capacitors C21 and C22.

[0016] Capacitor C1 is connected between terminal N1 of resonator RC1 and the ground terminal GND. Capacitor C2 is connected between terminal N2 of resonator RC1 and the ground terminal GND. In other words, the filter device 100 constitutes a so-called fifth-order low-pass filter.

[0017] In this specification, the expression "connected" includes not only cases where two elements are directly connected, but also cases where they are connected through other elements.

[0018] Next, the structure of the filter device 100 will be described using Figures 2 and 3. Figure 2 is an external perspective view of the filter device 100, and Figure 3 is an exploded perspective view showing an example of the stacked structure of the filter device 100.

[0019] Referring to Figures 2 and 3, the filter device 100 comprises a rectangular or substantially rectangular parallelepiped laminate 110 in which multiple dielectric layers LY1 to LY14 are stacked in the stacking direction. The dielectric layers LY1 to LY14 are formed of ceramics such as low-temperature co-fired ceramics (LTCC) or resin. Inside the laminate 110, the inductor and capacitor described in Figure 1 are formed by multiple electrodes provided in each dielectric layer and multiple vias provided between the dielectric layers. In this specification, "via" refers to a columnar conductor provided in a dielectric layer to connect electrodes provided in different dielectric layers. Vias are formed by conductive paste, plating, and / or metal pins, for example.

[0020] In the following explanation, the stacking direction of dielectric layers LY1 to LY14 in the laminate 110 will be referred to as the "Z-axis direction," the direction perpendicular to the Z-axis direction and along the long side of the laminate 110 will be referred to as the "X-axis direction," and the direction along the short side of the laminate 110 will be referred to as the "Y-axis direction." Furthermore, in the following, the positive direction of the Z-axis in each figure may be referred to as the upper side, and the negative direction as the lower side.

[0021] A directional mark DM for identifying the direction of the filter device 100 is placed on the upper surface 111 (dielectric layer LY1) of the laminate 110. External terminals (input terminal T1, output terminal T2, and ground terminal GND) for connecting the filter device 100 to external equipment are placed on the lower surface 112 (dielectric layer LY14) of the laminate 110. Each of the input terminal T1, output terminal T2, and ground terminal GND is a flat electrode with a substantially rectangular shape, and is an LGA (Land Grid Array) terminal regularly arranged on the lower surface 112 of the laminate 110.

[0022] The input terminal T1 is located along the short side in the positive direction of the X-axis on the lower surface 112. The output terminal T2 is located along the short side in the negative direction of the X-axis on the lower surface 112. The ground terminal GND is located between the input terminal T1 and the output terminal T2 in the X-axis direction.

[0023] The input terminal T1 is connected by via V10 to a flat electrode P1 located in the dielectric layer LY13. The flat electrode P1 is an electrode that has a roughly L-shape when viewed from the stacking direction (Z-axis direction) in a plan view. The flat electrode P1 is connected by via V11 to a capacitor electrode PC10 located in the dielectric layer LY9, a capacitor electrode PC11 located in the dielectric layer LY7, and a flat electrode PL10 located in the dielectric layer LY2.

[0024] The flat electrode PL10, positioned in the dielectric layer LY2, is a linear, strip-shaped electrode extending in the Y-axis direction. A via V11 is connected to the first end of the flat electrode PL10, and a via V12 is connected to the second end.

[0025] Via V12 is connected to a flat electrode PL11 located in the dielectric layer LY4. When viewed from the stacking direction in a plan view, the flat electrode PL11 has an approximately L-shape. Via V12 is connected to the first end of the flat electrode PL11, and via V13 is connected to the second end.

[0026] Via V13 is connected to the flat electrode PL20 located in the dielectric layer LY2. Via V13 is also connected to the capacitor electrode PC22 located in the dielectric layer LY7, the capacitor electrode PC12 located in the dielectric layer LY8, and the capacitor electrode PC3 located in the dielectric layer LY9.

[0027] Capacitor electrode PC3 is connected to capacitor electrode PC1 located in dielectric layer LY11 via via V14. When viewed from the stacking direction in plan view, at least a portion of capacitor electrode PC1 overlaps with ground electrode PG1 located in dielectric layer LY12. Ground electrode PG1 is connected to ground terminal GND on the lower surface 112 by multiple vias VG1. That is, capacitor electrode PC1 and ground electrode PG1 constitute capacitor C1 in Figure 1. Furthermore, inductor L11 in Figure 1 is formed by a path (first path) from input terminal T1 to capacitor electrode PC1 via vias V10~V14, capacitor electrode PC3, and flat plate electrodes P1, PL10, PL11.

[0028] The capacitor electrode PC11 of dielectric layer LY7 and the capacitor electrode PC10 of dielectric layer LY9 are electrodes of the same shape, having a roughly L-shape, and overlap each other when viewed from the stacking direction in a plan view. Each of the capacitor electrodes PC10 and PC11 partially overlaps with the capacitor electrode PC12 of dielectric layer LY8 when viewed from the stacking direction in a plan view. In other words, the capacitor C11 in Figure 1 is formed by the capacitor electrodes PC10 to PC12.

[0029] The flat electrode PL20 is an electrode that has a roughly L-shape when viewed from the stacking direction in a plan view. Via V13 is connected to the first end of the flat electrode PL20, and via V20 is connected to the second end. Via V20 is connected to the capacitor electrode PC20 located in the dielectric layer LY5. Via V21 is also connected to the capacitor electrode PC20. Via V21 is connected to the flat electrode PL30 located in the dielectric layer LY2.

[0030] The flat electrode PL30 is an electrode that has a roughly L-shape when viewed from the stacking direction in a plan view. Via V21 is connected to the first end of the flat electrode PL30, and via V22 is connected to the second end. Via V22 is connected to the flat electrode PL31 located in the dielectric layer LY4, the capacitor electrode PC23 located in the dielectric layer LY7, and the capacitor electrode PC4 located in the dielectric layer LY9.

[0031] Capacitor electrode PC4 is connected to capacitor electrode PC2, which is located in dielectric layer LY11, via via V23. When viewed from the stacking direction in plan view, at least a portion of capacitor electrode PC2 overlaps with ground electrode PG1, which is located in dielectric layer LY12. That is, capacitor electrode PC2 and ground electrode PG1 constitute capacitor C2 in Figure 1.

[0032] The flat electrode PL31 of the dielectric layer LY4 is an electrode that has a substantially L-shape when viewed from the stacking direction in a plan view. A via V21 is connected to the first end of the flat electrode PL31, and a via V30 is connected to the second end. Via V30 is connected to a flat electrode PL32 located in the dielectric layer LY3. The flat electrode PL32 is a linear, strip-shaped electrode extending in the Y-axis direction. A via V30 is connected to the first end of the flat electrode PL32, and a via V31 is connected to the second end. Via V31 is connected to the output terminal T2 on the lower surface 112 via a flat electrode P4 located in the dielectric layer LY13 and via V32.

[0033] Inductor L31 in Figure 1 is formed by a path (second path) from output terminal T2 to capacitor electrode PC2 via vias V22, V23, V30~V32, capacitor electrode PC4, and flat electrode P4, PL31, PL32. Inductor L21 in Figure 1 is formed by a path from flat electrode PL11 to capacitor electrode PC20 via vias V13, V20, and flat electrode PL20. Inductor L22 in Figure 1 is formed by a path from capacitor electrode PC20 to flat electrode PL31 via vias V21, V22, and flat electrode PL30.

[0034] At least a portion of the capacitor electrode PC20 in dielectric layer LY5 overlaps with the capacitor electrode PC21 located in dielectric layer LY6 when viewed from the stacking direction. Capacitor electrode PC21 is connected to capacitor electrode PC24 located in dielectric layer LY8 by vias V40 and V41. Capacitor electrodes PC21 and PC24 partially overlap with capacitor electrodes PC22 and PC23 located in dielectric layer LY7, and capacitor electrodes PC3 and PC4 located in dielectric layer LY9, when viewed from the stacking direction.

[0035] Capacitor C21 in Figure 2 is formed by capacitor electrodes PC21 and PC24, and capacitor electrodes PC22 and PC3. Capacitor C22 in Figure 2 is formed by capacitor electrodes PC21 and PC24, and capacitor electrodes PC23 and PC4. Furthermore, capacitor C23 in Figure 2 is formed by capacitor electrodes PC20 and PC21.

[0036] The features of the filter device 100 of Embodiment 1 will be explained using the configuration of the filter device of the comparative example. Figure 4 is an equivalent circuit diagram of the filter device 100X of the comparative example. In the filter device 100X of the comparative example, the resonator RC1 in the filter device 100 is replaced by the resonator RC1X. The resonator RC1X has a configuration in which an inductor L21X and a capacitor C21X are connected in parallel. In other words, it corresponds to the configuration in the filter device 100 of Embodiment 1 in which the capacitor C23 of the resonator RC1 is removed.

[0037] In filter devices where each element is arranged within a laminated structure as shown in Figures 2 and 3, a certain amount of stray capacitance can generally occur for each element. In particular, with respect to inductors, stray capacitance and / or structural asymmetry due to manufacturing variations can form unintended resonant circuits, and spurious signals can be generated depending on the resonant frequency of these circuits. Since stray capacitance is relatively small, the frequency of the resulting spurious signals is generally higher than the passband of the low-pass filter.

[0038] In recent years, mobile communication devices such as smartphones and mobile phones have adopted configurations that use radio waves in the microwave frequency band below 6 GHz, such as Wi-Fi, and radio waves in the millimeter-wave frequency band such as 28 GHz and 39 GHz, which are compatible with 5G communication standards. In such communication devices, if spurious signals like those described above occur in the millimeter-wave band in the low-pass filter used in the circuit that processes microwave band radio waves, the attenuation characteristics of the millimeter-wave band will deteriorate, which may lead to noise generation in that frequency band and a decrease in communication quality.

[0039] Stray capacitance in an inductor is difficult to predict during the design phase, and it is also difficult to prevent spurious emissions by suppressing the generation of stray capacitance itself. Therefore, in the filter device 100 of Embodiment 1, a capacitor with a capacitance relatively larger than the stray capacitance (capacitor C23 in Figure 1) is incorporated into the resonator in advance. This reduces the frequency of spurious emissions caused by stray capacitance, causing spurious emissions to occur in the non-passband between the two frequency bands of the target radio waves used for communication. With this configuration, it is possible to suppress the deterioration of attenuation characteristics caused by unintended spurious emissions in the target passband.

[0040] Figure 5 is a diagram illustrating the filter characteristics of the filter device 100 of Embodiment 1 and the filter device 100X of the comparative example. The left column of Figure 5 shows the simulation results of the pass-through characteristics of the filter device 100 of Embodiment 1, and the right column shows the simulation results of the pass-through characteristics of the filter device 100X of the comparative example.

[0041] In the graphs for each pass-through characteristic, the horizontal axis shows frequency, and the vertical axis shows reflection loss (LN14~LN17, LN19) and insertion loss (line LN10~LN13, LN18). The graphs for the pass-through characteristics of filter device 100 also include graphs showing the results when the capacitance value of capacitor C23 is varied. The frequency band BW1 of the signal targeted by this embodiment 1 filter device 100 is, for example, in the microwave band range of 0~6GHz, while the frequency band BW2 of other signals within the communication device is in the millimeter-wave band range of 27.5GHz~40GHz.

[0042] Referring to Figure 5, in the comparative example filter device 100X, as shown by line LN18 in the right figure, good insertion loss is obtained in the microwave frequency band BW1. However, spurious signals occur around 33 GHz in the millimeter-wave frequency band BW2, and the attenuation decreases in this spurious region, resulting in a deterioration of the attenuation characteristics.

[0043] In contrast, in the filter device 100 of Embodiment 1, although spurious signals are generated, the frequency at which the spurious signals are generated is between the frequency bands BW1 and BW2 of the two signals (17 GHz to 24 GHz). As a result, the amount of attenuation in the millimeter-wave frequency band BW2 is ensured, and the desired attenuation characteristics are obtained.

[0044] As shown in the left diagram of Figure 5, as the capacitance of capacitor C23 in Figure 1 increases, the frequency of the generated spurious signals decreases and approaches the attenuation pole of the filter device 100. The capacitance of capacitor C23 is appropriately selected considering its effect on the two frequency bands BW1 and BW2.

[0045] The magnitude of the spurious emissions generated varies depending on the structural asymmetry of the resonator RC1. Specifically, in Figure 1, if the resonant frequency when the resonator is constructed with inductor L21 and capacitor C21 differs from the resonant frequency when the resonator is constructed with inductor L22 and capacitor C22, the effect of spurious emissions will be greater.

[0046] Here, we will explain in more detail the reasons for spurious emissions using Figures 6 and 7. Figure 6(A) on the left shows the portion of the resonator RC1X in the comparative example, and Figure 6(B) on the right shows the portion of the resonator RC1 in the filter device 100 of Embodiment 1. Figure 7 shows the insertion loss (solid lines LN71, LN75) and reflection loss (dashed lines LN72, LN76) in the resonator RC1.

[0047] Let L0 be the inductance of inductor L21X in resonator RC1X, and C0 be the capacitance of capacitor C21X. Also, let L01 and L02 be the inductances of inductors L21 and L22 in resonator RC1, respectively, and let C01, C02, and C02 be the capacitances of capacitors C21 to C23, respectively. Note that the inductance L0 of inductor L21X is equal to the sum of the inductances L01 and L02 of inductors L21 and L22 (L0 = L01 + L02). Also, the reciprocal of the capacitance C0 of capacitor C21X is equal to the sum of the reciprocals of the capacitances C01 and C02 of capacitors C21 and C22 (1 / C0 = 1 / C01 + 1 / C02).

[0048] In this case, the resonant frequency F0 of the resonator RC1X can be expressed by the following equation (1).

[0049] F0 = 1 / {2π(L0·C0)} 1 / 2} … (1) As described above, since L0 = L01 + L02 and 1 / C0 = 1 / C01 + 1 / C02, the resonant frequency of the entire resonator RC1 is also F0.

[0050] Furthermore, if we denote the resonant frequency of the resonator composed of inductor L21 and capacitor C21 in resonator RC1 as F1, and the resonant frequency of the resonator composed of inductor L22 and capacitor C22 as F2, then these resonant frequencies can be expressed by the following equations (2) and (3), respectively.

[0051] F1 = 1 / {2π(L01·C01)} 1 / 2} … (2) F2 = 1 / {2π(L02·C02)} 1 / 2} … (3) In the configuration of the resonator RC1, when the resonant frequencies F1 and F2 are equal (F1=F2), no spurious signals occur at frequencies higher than the overall resonant frequency F0, as shown in the left diagram of Figure 7. In the actual structure of the resonator, due to limitations in the size of the equipment or errors in the arrangement and processing of the electrodes forming each element, a stray capacitance Ca, typically represented as a capacitor C23, may occur. Due to the influence of this stray capacitance, the element parameters become unbalanced, and when the resonant frequencies F1 and F2 are different (F1≠F2), spurious signals may occur at frequencies higher than the resonant frequency F0, as shown in the right diagram of Figure 7.

[0052] In this case, when the magnitude of the stray capacitance Ca changes, the spurious frequency fs changes. Specifically, as the stray capacitance Ca increases, the spurious frequency fs gradually decreases to fs3, fs2, fs1, and so on, approaching the resonant frequency F0. However, even if the stray capacitance Ca changes, the overall resonant frequency F0 hardly changes.

[0053] Generally, unintentionally occurring stray capacitance is small, so spurious signals tend to occur on the relatively high-frequency side. In the filter device 100 of Embodiment 1, a capacitor C23 having a capacitance value larger than the stray capacitance Ca is pre-connected to the stray capacitance Ca portion. Therefore, the influence of the capacitor C23 on the spurious frequency becomes dominant over the influence of unintentionally occurring stray capacitance. In other words, by adjusting the capacitance value Ca of capacitor C23, it is possible to adjust the spurious frequency while intentionally generating spurious signals.

[0054] Figure 8 illustrates the filter characteristics when the resonant frequencies F1 and F2, as explained in Figure 6, are adjusted by adjusting the line lengths of the inductors L21 and L22 of the resonator RC1 in the filter device 100. In Figure 8, the solid lines LN20 and LN25 show the filter characteristics after adjusting the resonant frequencies F1 and F2 to a similar extent by adjusting the line lengths, while the dashed lines LN21 and LN26 show the filter characteristics before adjusting the line lengths. As shown in Figure 8, by adjusting the resonant frequencies F1 and F2 to a similar extent by adjusting the line lengths, the level of spurious emissions occurring around 16 GHz is reduced.

[0055] Thus, in an LC parallel resonator that constitutes a filter device, the frequency at which spurious emissions occur can be intentionally adjusted by placing a capacitor between the intermediate portion of the resonator's inductor and the intermediate portion of the capacitor. Furthermore, in the same resonator, the level of spurious emissions can be reduced by adjusting the lengths of the two inductors connected to the spurious emission adjustment capacitor, thereby adjusting the resonant frequencies F1 and F2 formed on the input and output sides of the capacitor to approximately the same extent.

[0056] In Embodiment 1, an example was described in which a capacitor for spurious emission adjustment is placed with respect to the resonator RC1. However, if the spurious emission generated by the resonator RC0 overlaps with the passband of the target signal, a capacitor for spurious emission adjustment may be placed with respect to the resonator RC0.

[0057] In Embodiment 1, "Resonator RC1" corresponds to "First Resonator" in this Disclosure. In Embodiment 1, "Inductor L21", "Inductor L22", "Inductor L11", and "Inductor L31" correspond to "First Inductor" to "Fourth Inductor", respectively in this Disclosure. In Embodiment 1, "Capacitor C21", "Capacitor C22", and "Capacitor C23" correspond to "First Capacitor" to "Third Capacitor", respectively in this Disclosure. In Embodiment 1, "Capacitor C1" and "Capacitor C2" correspond to "Fifth Capacitor" and "Sixth Capacitor", respectively in this Disclosure. In Embodiment 1, "Capacitor C11" corresponds to "Seventh Capacitor", respectively in this Disclosure. In Embodiment 1, "Frequency Band BW1" and "Frequency Band BW2" correspond to "First Frequency Band" and "Second Frequency Band", respectively in this Disclosure.

[0058] In Embodiment 1, "capacitor electrode PC22," "capacitor electrode PC23," "capacitor electrode PC20," and "capacitor electrode PC21" correspond to "first capacitor electrode" to "fourth capacitor electrode," respectively, in this disclosure.

[0059] (Variation 1) In Embodiment 1, a configuration was described in which a capacitor for spurious adjustment is placed between the intermediate portion of the inductor and the intermediate portion of the capacitor in an LC parallel resonator. In the modified example, a configuration is described in which an LC series resonator is placed between the intermediate portion of the inductor and the intermediate portion of the capacitor in an LC parallel resonator to adjust the spurious frequency.

[0060] Figure 9 is an equivalent circuit diagram of filter device 100A of Modification 1. In filter device 100A, an inductor L23 is added to the capacitor C23 in the configuration of filter device 100 shown in Figure 1. More specifically, inductor L23 is placed between the connection node N11 between inductors L21 and L22 and between capacitor C23. The other configurations in Figure 9 are the same as in Figure 1, and the explanation of elements that overlap with Figure 1 will not be repeated.

[0061] Thus, even when using an LC series resonator as a spurious frequency adjustment circuit, the frequency of the generated spurious signals can be adjusted by adjusting the resonant frequency of the LC series resonator. In particular, by using an LC series resonator instead of just a capacitor, the capacitance of the capacitor required for the frequency adjustment circuit can be reduced, thus reducing the size of the equipment.

[0062] Note that the arrangement of inductor L23 and capacitor C23 may be reversed. That is, capacitor C23 may be connected to connection node N11, and inductor L23 may be connected between capacitor C23 and connection node N12.

[0063] (Modification 2) In Embodiment 1 and Modification 1, the case where the filter device is a fifth-order low-pass filter was described, but the features of this disclosure are also applicable to third-order low-pass filters.

[0064] Figure 10 is an equivalent circuit diagram of filter device 100B of modified example 2. Filter device 100B has the same configuration as filter device 100 shown in Figure 1, but without the resonator RC0 and inductor L31. In other words, filter device 100B is a third-order low-pass filter consisting of a resonator RC1 and shunt capacitors C1 and C2.

[0065] Even in such a configuration, spurious signals can be generated due to the stray capacitance of the inductors constituting the LC parallel resonator. Therefore, by providing a capacitor connecting the central part of the inductors constituting the parallel resonator to the central part of the capacitor, and making the capacitance of this capacitor larger than the stray capacitance, the frequency of the spurious signals can be intentionally reduced, and the spurious signals can be prevented from overlapping with the passband of the high-frequency signals, thereby suppressing the deterioration of the attenuation characteristics of the non-passband of the low-pass filter.

[0066] [Embodiment 2] Embodiment 2 describes a configuration in which a circuit for reducing spurious emissions is added to the configuration of Embodiment 1.

[0067] Figure 11 is an equivalent circuit diagram of the filter device 100C according to Embodiment 2. Referring to Figure 11, in the filter device 100C, a capacitor C25 is added between the capacitor C23 used for adjusting the spurious frequency in the resonator RC1 of the filter device 100 of Embodiment 1 and the ground terminal GND. In the filter device 100C of Figure 11, the explanation of elements that overlap with the filter device 100 of Figure 1 will not be repeated.

[0068] More specifically, a capacitor C25 is placed between the connection node N11 between inductors L21 and L22 and the ground terminal GND.

[0069] In this way, the potential of capacitor C23 for spurious emission adjustment can be determined with respect to the ground potential by capacitor C25. Furthermore, by adjusting the magnitude of capacitor C25 after adjusting the spurious frequency with capacitor C23, the anti-resonant frequency and resonant frequency of the spurious emission can be brought closer together. As a result, the level of spurious emissions can be reduced by the cancellation of the anti-resonant and resonant points.

[0070] Figure 12 is an exploded perspective view showing an example of the stacked structure of the filter device 100C of Embodiment 2. In Figure 12, vias V20 and V21 in the exploded perspective view of the filter device 100 shown in Figure 3 are replaced with vias V20C and V21C, respectively. Furthermore, capacitor electrodes PC25 and PC26 are connected to the ends of vias V20C and V21C, respectively.

[0071] More specifically, via V20C is connected to the plate electrode PL20 in dielectric layer LY2 and the capacitor electrode PC20 in dielectric layer LY5, as well as to the capacitor electrode PC25 located in dielectric layer LY10. Similarly, via V21C is connected to the plate electrode PL30 in dielectric layer LY2 and the capacitor electrode PC20 in dielectric layer LY5, as well as to the capacitor electrode PC26 located in dielectric layer LY10.

[0072] Each of the capacitor electrodes PC25 and PC26 is a strip-shaped electrode extending in the X-axis direction, and at least a portion of it overlaps with the ground electrode PG1 of the dielectric layer LY12 when viewed from the stacking direction in a plan view. In other words, the capacitor C25 in Figure 11 is formed by the capacitor electrodes PC25 and PC26 and the ground electrode PG1.

[0073] Next, we will explain the change in spurious levels due to the size of capacitor C25 using Figures 13 and 14. Figure 13 shows the resonator RC1 and capacitors C1 and C2 in the filter device 100C shown in Figure 11. In other words, Figure 13 is a low-pass filter from filter device 100C with the resonator RC0 and inductor L31 removed.

[0074] FIG. 14 shows the simulation results of the insertion loss (solid lines LN81, LN83, LN85) and reflection loss (dashed lines LN82, LN84, LN86) when the capacitance value Cb of capacitor C25 is changed in the filter of FIG. 13. The middle figure of FIG. 14 shows the case where the capacitance value Cb of capacitor C25 is near a specific capacitance value Copt (Cb≈Copt). The left figure shows the case where the capacitance value Cb is greater than the capacitance value Copt (Cb > Copt), and the right figure shows the case where the capacitance value Cb is less than the capacitance value Copt (Cb < Copt).

[0075] As shown in FIG. 14, when the capacitance value Cb of capacitor C25 is approximately the same as the capacitance value Copt, the level of spurious is low. When the capacitance value Cb is greater than the capacitance value Copt (left figure), a resonance point occurs on the lower frequency side than the frequency fs at which spurious occurs, and an anti-resonance point occurs on the higher frequency side than the frequency fs. On the other hand, when the capacitance value Cb is less than the capacitance value Copt (right figure), an anti-resonance point occurs on the lower frequency side than the frequency fs at which spurious occurs, and a resonance point occurs on the higher frequency side than the frequency fs. That is, the capacitance value Copt is the capacitance value when the resonance point and the anti-resonance point that cause spurious coincide. As a result, the amplitude at the anti-resonance point that inhibits attenuation is canceled out by the amplitude at the resonance point, and the level of spurious is reduced.

[0076] As shown in FIG. 14, even if the capacitance value Cb is changed, the resonance frequency F0 of the entire filter and the frequency fs of spurious hardly change. That is, by changing the capacitance value Cb of capacitor C25, it is possible to adjust the level of spurious while suppressing the influence on the resonance frequency F0 and the frequency fs of spurious of the filter device.

[0077] Figure 15 is a diagram illustrating the filter characteristics of the filter device 100C of Embodiment 2. In Figure 15, the solid line LN30 represents the insertion loss, and the dashed line LN35 represents the reflection loss. Compared with Figures 5 and 8 in Embodiment 1, it can be seen that the level of spurious emissions occurring around 15 GHz has been significantly reduced.

[0078] As mentioned above, there is an optimal capacitance value Copt for capacitor C25 in relation to the filter device configuration, and the spurious level increases if the capacitance value is greater or less than this optimal value. When the capacitance value is greater than the optimal value, the spurious resonance point and anti-resonance point appear in that order from the low frequency side to the high frequency side. Conversely, when the capacitance value is smaller than the optimal value, the spurious anti-resonance point and resonance point appear in that order from the low frequency side to the high frequency side. By setting the capacitance value of capacitor C25 so that the resonance point and anti-resonance point of the generated spurious signal are close together, the spurious level can be reduced by the cancellation of the anti-resonance point and the resonance point.

[0079] As described above, by adding a capacitor between the spurious frequency adjustment capacitor and the ground terminal and adjusting its capacitance value, the level of spurious emissions can be reduced.

[0080] In Embodiment 2, "Capacitor C25" corresponds to an example of the "fourth capacitor" in this disclosure. In Embodiment 2, "Capacitor electrode PC25" and "Capacitor electrode PC26" correspond to the "fifth capacitor electrode" and "sixth capacitor electrode," respectively, in this disclosure.

[0081] (Variation 3) In Embodiment 2, a configuration was described in which a capacitor is added between the electrodes on the inductor L21 and L22 sides and the ground terminal GND in the capacitor C23 for adjusting the frequency of spurious signals. In Modification 3, a configuration is described in which a capacitor is added between the electrodes on the capacitor C21 and C22 sides and the ground terminal GND in the capacitor C23.

[0082] Figure 16 is an equivalent circuit diagram of the filter device 100D of Modification 3. Referring to Figure 16, in the filter device 100D, a capacitor C26 is added between the capacitor C23 in the resonator RC1 of the filter device 100 and the ground terminal GND. More specifically, the capacitor C26 is placed between the connection node N12 between capacitors C21 and C22 and the ground terminal GND.

[0083] Even in this configuration, the potential of the spurious emission adjustment capacitor C23 relative to the ground potential can be determined. Furthermore, by adjusting the size of capacitor C26 after adjusting the spurious frequency with capacitor C23, the anti-resonant frequency and resonant frequency of the spurious emission can be brought closer together. As a result, the level of spurious emissions can be reduced through the cancellation of the anti-resonant and resonant points.

[0084] The "capacitor C26" in Modification Example 3 corresponds to an example of the "fourth capacitor" in this disclosure.

[0085] (Modification 4) Modification 4 describes a configuration in which an LC series resonator is placed in the shunt capacitor portion for adjusting the spurious level in the configuration of Embodiment 2.

[0086] Figure 17 is an equivalent circuit diagram of the filter device 100E of the modified example 4. In the filter device 100E, an inductor L25 is added to the filter device 100C of the second embodiment described in Figure 11. More specifically, the inductor L25 is placed between the capacitor C25 and the ground terminal GND. The capacitor C25 and the inductor L25 constitute an LC series resonator.

[0087] In this way, by placing an LC series resonator between the spurious frequency adjustment capacitor and the ground terminal GND, the anti-resonance frequency and resonance frequency of the spurious signal can be brought closer together. As a result, the level of spurious signals can be reduced through the cancellation of the anti-resonance point and the resonance point.

[0088] Note that the connections of the inductor L25 and capacitor C25 in the LC series resonator may be reversed.

[0089] (Variation 5) Modification 5 describes a configuration in which an LC series resonator is placed in the shunt capacitor section for adjusting the spurious level, as in the configuration of Modification 3.

[0090] Figure 18 is an equivalent circuit diagram of the filter device 100F of Modification 5. In filter device 100F, an inductor L26 is added to the filter device 100D of Modification 3 described in Figure 16. More specifically, the inductor L26 is placed between the capacitor C26 and the ground terminal GND. The capacitor C26 and the inductor L26 form an LC series resonator.

[0091] In this way, by placing an LC series resonator between the spurious frequency adjustment capacitor and the ground terminal GND, the anti-resonance frequency and resonance frequency of the spurious signal can be brought closer together. As a result, the anti-resonance point and the resonance point cancel each other out, reducing the level of spurious emissions.

[0092] Note that the connections of the inductor L26 and capacitor C26 in the LC series resonator may be reversed.

[0093] [Embodiment 3] Embodiment 3 describes a configuration in which the features of this disclosure are applied to a 7th-order low-pass filter.

[0094] Figure 19 is an equivalent circuit diagram of the filter device 100G according to Embodiment 3. The filter device 100G is configured by adding a resonator RC2 having the same configuration as resonator RC1, a capacitor C45 for adjusting the spurious level, and a shunt capacitor C3 to the filter device 100C of Embodiment 2 shown in Figure 11.

[0095] Referring to Figure 19, in the filter device 100G, resonator RC2 is connected between terminal N2 of resonator RC1 and inductor L31. Resonator RC2 includes inductors L41 and L42, and capacitors C41 to C43.

[0096] In the resonator RC2, inductors L41 and L42 are connected in series between terminal N3 (third terminal), which is connected to terminal N2 of resonator RC1, and terminal N4 (fourth terminal), which is connected to inductor L31. One end of capacitor C41 is connected to terminal N3, and the other end is connected to one end of capacitor C42. The other end of capacitor C42 is connected to terminal N4. In other words, capacitors C41 and C42, which are connected in series, are connected in parallel to inductors L41 and L42, which are connected in series. Capacitor C43 for spurious frequency adjustment is connected between connection node N31 between inductor L41 and inductor L42, and connection node N32 between capacitor C41 and capacitor C42.

[0097] Furthermore, a capacitor C45 for adjusting spurious levels is connected between the connection node N31 between inductors L41 and L42 and the ground terminal GND. In addition, a capacitor C3 is connected between terminal N4 and the ground terminal GND.

[0098] With this configuration, the filter device 100G constitutes a 7th-order low-pass filter. Furthermore, capacitors C43 and C45 can reduce the frequency and level of spurious signals generated by the inductor of the resonator RC2, thereby improving the attenuation characteristics of the low-pass filter.

[0099] Figure 20 is a diagram illustrating the filter characteristics of the filter device 100G of Embodiment 3. In Figure 20, the horizontal axis shows frequency, and the vertical axis shows insertion loss (solid line LN40) and reflection loss (dashed line LN45). As shown by line LN40 in Figure 20, spurious emissions occur around 13 GHz between the microwave frequency band BW1 and the millimeter-wave frequency band BW2. Furthermore, the attenuation characteristics in the non-passband above 13 GHz are almost flat with an attenuation of 30 dB or more.

[0100] As described above, even in a 7th-order low-pass filter, by placing a frequency-adjusting capacitor between the intermediate portion of the inductor and the intermediate portion of the capacitor in the LC parallel resonator, and by placing a shunt capacitor between the frequency-adjusting capacitor and the capacitor, the frequency and level at which spurious emissions occur can be adjusted, thereby suppressing a decrease in the attenuation characteristics of the low-pass filter.

[0101] In addition, in the filter device 100G, the capacitors C43 and C45 may be replaced with an LC series resonator as shown in Figure 9. Furthermore, as shown in Figure 16 or Figure 18, a capacitor or an LC series resonator may be placed between the connection node N32 between capacitor C41 and capacitor C42 and the ground terminal GND.

[0102] In Embodiment 3, "Resonator RC2" corresponds to "Second Resonator" in this Disclosure. In Embodiment 3, "Capacitor C3," "Capacitor C41," "Capacitor C42," and "Capacitor C43" correspond to "Eighth Capacitor to Eleventh Capacitor," respectively, in this Disclosure. In Embodiment 3, "Inductor L41" and "Inductor L42" correspond to "Fifth Inductor" and "Sixth Inductor," respectively, in this Disclosure.

[0103] [Embodiment 4] In the embodiments and modifications described above, examples in which the filter device is a low-pass filter were explained. Embodiment 4 describes a configuration in which the features of this disclosure are applied to a third-order or higher band-pass filter using an LC parallel resonator.

[0104] Figure 21 is an equivalent circuit diagram of the filter device 100H according to Embodiment 4. In the filter device 100H, the capacitors C1 and C2 in the third-order low-pass filter device 100B shown in Figure 10 are replaced with resonators RC3 and RC4, respectively.

[0105] Resonator RC3 includes an inductor L51 and a capacitor C51 connected in parallel between terminal N1 and ground terminal GND of resonator RC1. Similarly, resonator RC4 includes an inductor L52 and a capacitor C52 connected in parallel between terminal N2 and ground terminal GND of resonator RC1. Thus, resonators RC3 and RC4 constitute an LC parallel resonator, and the filter device 100H functions as a third-order bandpass filter.

[0106] Figure 22 is a diagram illustrating the filter characteristics of the filter device 100H of Embodiment 4. In Figure 22, in addition to the insertion loss (solid line LN50) and reflection loss (solid line LN55) of the filter device 100H, the insertion loss (dashed line LN51) and reflection loss (dashed line LN56) of the comparative example in Figure 21, which does not have a capacitor C23, are also shown.

[0107] As shown in Figure 22, in the comparative example configuration, spurious emissions that occurred around 31 GHz in the millimeter-wave frequency band BW2 have shifted to around 8 GHz in the filter device 100H. This reduces the impact on the millimeter-wave frequency band BW2.

[0108] As described above, even in a bandpass filter, the frequency of spurious signals generated by the inductor of the resonator RC1 can be adjusted by the capacitor C23 included in the resonator RC1 to a frequency that does not affect the passband of other signals. Therefore, the deterioration of the attenuation characteristics in the bandpass filter can be suppressed.

[0109] In Embodiment 4, "Resonator RC3" and "Resonator RC4" correspond to "Third Resonator" and "Fourth Resonator" in this Disclosure, respectively. In Embodiment 4, "Inductor L51" and "Inductor L52" correspond to "Seventh Inductor" and "Eighth Inductor" in this Disclosure, respectively. In Embodiment 4, "Capacitor C51" and "Capacitor C52" correspond to "Twelfth Capacitor" and "Thirteenth Capacitor" in this Disclosure, respectively.

[0110] (Experimental variation 6) Modification 6 describes a configuration in which an LC series resonator for adjusting the spurious level is further added to the filter device 100H of Embodiment 4.

[0111] Figure 23 is an equivalent circuit diagram of the filter device 100I of Modification 6. In the filter device 100I, similar to Modification 4 shown in Figure 17, an LC series resonator consisting of inductor L25 and capacitor C25 is placed between the connection node N11 between inductors L21 and L22 in the resonator RC1 and the ground terminal GND. This configuration allows for adjustment of the frequency at which spurious emissions occur and reduction of the level of generated spurious emissions.

[0112] Figure 24 is a diagram illustrating the filter characteristics of the filter device 100I of modified example 6. In Figure 24, the insertion loss (solid line LN60) and reflection characteristics (dashed line LN65) of the filter device 100I are shown.

[0113] Referring to Figure 22 along with Figure 24, it can be seen that in filter device 100I, the spurious emission level generated around 8 GHz has decreased by more than ten dB compared to the case in Figure 22.

[0114] Thus, even in a bandpass filter, the frequency and level of spurious signals generated by the inductor included in the filter can be adjusted by connecting a shunt capacitor to the capacitor used for adjusting the spurious signal frequency.

[0115] [Aspect] Those skilled in the art will understand that the above-described exemplary embodiments are specific examples of the following embodiments.

[0116] (Section 1) A filter device according to one embodiment comprises an input terminal and an output terminal, and a first resonator connected to the input terminal and the output terminal. The first resonator includes a first terminal connected to the input terminal, a second terminal connected to the output terminal, a first inductor and a second inductor, and first to third capacitors. One end of the first inductor is connected to the first terminal. One end of the second inductor is connected to the second terminal, and the other end is connected to the other end of the first inductor. One end of the first capacitor is connected to the first terminal. One end of the second capacitor is connected to the second terminal, and the other end is connected to the other end of the first capacitor. The third capacitor is connected between the other end of the first inductor and the other end of the first capacitor.

[0117] (Section 2) The filter device described in Section 1 further comprises a fourth capacitor connected between the third capacitor and the ground terminal.

[0118] (Article 3) In the filter device described in Article 2, the fourth capacitor is connected between the other end of the first inductor and the ground terminal.

[0119] (Article 4) In the filter device described in Article 2, the fourth capacitor is connected between the other end of the first capacitor and the ground terminal.

[0120] (Article 5) The filter device described in any one of Articles 1 to 4 further comprises a grounding terminal, a fifth capacitor connected between the first terminal and the grounding terminal, and a sixth capacitor connected between the second terminal and the grounding terminal.

[0121] (Section 6) In the filter device described in Section 5, the filter device uses a first frequency band as the passband and a frequency band higher than the first frequency band as the non-passband. The third capacitor generates spurious signals in the frequency band between the second frequency band included in the non-passband and the first frequency band.

[0122] (Section 7) The filter device described in Section 5 further comprises a third inductor connected between the input terminal and the first terminal, a seventh capacitor connected in parallel with the third inductor, and a fourth inductor connected between the output terminal and the second terminal.

[0123] (Section 8) The filter device described in Section 7 further comprises a second resonator connected between the second terminal and the fourth inductor, and an eighth capacitor connected between the connection node of the second resonator and the fourth inductor and the ground terminal. The second resonator includes a third terminal connected to the second terminal, a fourth terminal connected to the fourth inductor, a fifth inductor and a sixth inductor, and capacitors 9 to 11. One end of the fifth inductor is connected to the third terminal. One end of the sixth inductor is connected to the fourth inductor, and the other end is connected to the other end of the fifth inductor. One end of the ninth capacitor is connected to the third terminal. One end of the tenth capacitor is connected to the fourth inductor, and the other end is connected to the other end of the fifth capacitor. The eleventh capacitor is connected between the other end of the fifth inductor and the other end of the ninth capacitor.

[0124] (Section 9) The filter device described in any one of Sections 1 to 4 further comprises a ground terminal, a third resonator connected between the first terminal and the ground terminal, and a fourth resonator connected between the second terminal and the ground terminal. The third resonator includes a seventh inductor connected between the first terminal and the ground terminal, and a twelfth capacitor connected in parallel to the seventh inductor. The fourth resonator includes an eighth inductor connected between the second terminal and the ground terminal, and a thirteenth capacitor connected in parallel to the eighth inductor.

[0125] (Clause 10) A filter device according to one embodiment comprises a laminate in which a plurality of dielectric layers are stacked, an input terminal, an output terminal, a ground terminal, a first path and a second path, and first to fourth capacitor electrodes. The first path is connected to the input terminal. The second path is connected to the output terminal. The first capacitor electrode is connected to the first path. The second capacitor electrode is connected to the second path. The third capacitor electrode is connected to both the first and second paths. When viewed in plan from the stacking direction of the laminate, at least a portion of the first capacitor electrode, at least a portion of the second capacitor electrode, and at least a portion of the third capacitor electrode overlap with the fourth capacitor electrode.

[0126] (Clause 11) In the filter apparatus described in paragraph 10, the first capacitor electrode and the second capacitor electrode are arranged in the same dielectric layer. The fourth capacitor electrode is arranged in the dielectric layer between the dielectric layer on which the first and second capacitor electrodes are arranged and the dielectric layer on which the third capacitor electrode is arranged.

[0127] (Section 12) The filter device described in Section 10 or 11 further comprises a ground electrode connected to a ground terminal, and a fifth capacitor electrode and a sixth capacitor electrode connected to a third capacitor electrode. When viewed in plan from the stacking direction of the laminate, at least a portion of the fifth capacitor electrode and at least a portion of the sixth capacitor electrode overlap with the ground electrode.

[0128] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of Symbols]

[0129] 100, 100A~100I, 100X filter device, 110 laminate, 111 top surface, 112 bottom surface, C1~C3, C11, C21~C23, C21X, C25, C26, C41~C43, C45, C51, C52, Cb capacitor, DM direction mark, GND ground terminal, L11, L21~L23, L25, L26, L21X, L31, L41, L42, L51, L52 inductor, LY1~LY14 dielectric layer, N1~N4 terminal, N11, N12, N31, N32 connection node, P1, P4, PL10, PL11, PL20, PL30~PL32 flat electrode, PC1~PC4, PC10~PC12, PC20~PC26 Capacitor electrode, PG1 ground electrode, RC0~RC4, RC1X resonators, T1 input terminal, T2 output terminal, V10~V14, V20~V23, V20C, V21C, V31, V32, V40, V41, VG1 vias.

Claims

1. A laminate in which multiple dielectric layers are stacked, The laminate includes an input terminal, an output terminal, and a ground terminal, A first path connected to the input terminal, A second path connected to the output terminal, A first capacitor electrode connected to the first path, A second capacitor electrode connected to the second path, A third capacitor electrode connected to the first and second paths, It comprises a fourth capacitor electrode, When viewed in plan from the stacking direction of the aforementioned laminate, A filter device in which at least a portion of the first capacitor electrode, at least a portion of the second capacitor electrode, and at least a portion of the third capacitor electrode overlap with the fourth capacitor electrode.

2. The first capacitor electrode and the second capacitor electrode are arranged in the same dielectric layer. The filter device according to claim 1, wherein the fourth capacitor electrode is disposed in a dielectric layer between the dielectric layer on which the first capacitor electrode and the second capacitor electrode are disposed and the dielectric layer on which the third capacitor electrode is disposed.

3. A grounding electrode connected to the grounding terminal, The device further comprises a fifth capacitor electrode and a sixth capacitor electrode connected to the third capacitor electrode, The filter device according to claim 1 or claim 2, wherein, when viewed in plan from the stacking direction of the laminate, at least a portion of the fifth capacitor electrode and at least a portion of the sixth capacitor electrode overlap with the ground electrode.

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