Indication device

Abstract

To provide a display device that reduces voltage fluctuations in the display panel. [Solution] One embodiment of the present disclosure provides a display device in which, among a plurality of touch electrodes, a touch drive signal is supplied to some of the touch electrodes, a touch drive compensation signal is supplied to the remaining touch electrodes, and the touch drive compensation signal and the touch drive signal are out of phase with respect to each other.

Description

Technical Field

[0001] The present disclosure relates to a display device.

Background Art

[0002] Display devices are applied to various electronic devices such as televisions, mobile phones, notebook computers, and tablets.

[0003] Display devices include organic light-emitting display devices (OLEDs) that output light by themselves, and liquid crystal display devices (LCDs) that require a separate light source.

[0004] In recent years, display devices including light-emitting devices (LEDs) have attracted attention as next-generation display devices. Since light-emitting devices are made of inorganic materials instead of organic materials, they have a faster lighting speed, better luminous efficiency, and can display high-brightness images compared to liquid crystal display devices and organic light-emitting display devices.

[0005] A display device can include a display panel that displays a screen and a touch panel through which a user can input information on the screen. Due to the electrical coupling with the touch panel, the display panel can be affected by the drive signal of the touch panel. In this case, noise can be generated in the display panel by the drive signal of the touch panel. In particular, it can affect the cathode electrode of the light-emitting device, and the voltage of the cathode electrode can fluctuate. As a result, the image quality of the display device can deteriorate.

Summary of the Invention

Problems to be Solved by the Invention

[0006] An object of the present disclosure is to provide a display device that reduces voltage fluctuations in a display panel.

[0007] The problems that this disclosure seeks to solve are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0008] This disclosure provides a display device that includes a touch panel including a plurality of touch electrodes, and a touch integrated circuit that supplies touch driving signals or touch driving compensation signals to the plurality of touch electrodes via a plurality of channels, wherein some of the plurality of touch electrodes receive touch driving signals and other touch electrodes receive touch driving compensation signals, and the touch driving compensation signals and touch driving signals are out of phase with respect to each other.

[0009] Specific details, other than the solutions to the problems mentioned above, are included in the following descriptions and drawings. [Effects of the Invention]

[0010] According to one embodiment of the present disclosure, voltage fluctuations in the display panel can be reduced.

[0011] The effects of this disclosure are not limited to those mentioned above, and any other effects not mentioned will be clearly understood by those skilled in the art from the claims. [Brief explanation of the drawing]

[0012] [Figure 1] This is an exploded perspective view of a display device according to the embodiments described herein. [Figure 2] This is a plan view of a display device according to an embodiment of this specification. [Figure 3] This is an enlarged view of a display device according to the embodiments described herein. [Figure 4] This figure shows the circuit structure according to the examples described herein. [Figure 5] This is a plan view of a display device according to an embodiment of this specification. [Figure 6] This is a plan view of a display device according to an embodiment of this specification. [Figure 7] It is a plan view of a display device according to an embodiment of this specification. [Figure 8] It is a cross-sectional view of a display device according to an embodiment of this specification. [Figure 9] It is a cross-sectional view of a display device according to an embodiment of this specification. [Figure 10] It is a diagram showing drive timings of a display panel and a touch panel according to an embodiment of this specification. [Figure 11] It is an enlarged view of a display device according to an embodiment of this specification. [Figure 12] It is a plan view of a display device according to an embodiment of this specification. [Figure 13] It is a block diagram of a touch integrated circuit according to an embodiment of this specification. [Figure 14] It is a block diagram of a signal selection part of a touch integrated circuit according to an embodiment of this specification. [Figure 15] It is a waveform diagram showing an example of a drive pulse according to FIG. 14. [Figure 16] It is a diagram showing a device to which a display device according to an embodiment of this specification is applied. [Figure 17] It is a diagram showing a device to which a display device according to an embodiment of this specification is applied. [Figure 18] It is a diagram showing a device to which a display device according to an embodiment of this specification is applied. [Figure 19] It is a diagram showing a device to which a display device according to an embodiment of this specification is applied.

MODE FOR CARRYING OUT THE INVENTION

[0013] Advantages, features, and methods for achieving them of this specification will become clear by referring to embodiments described in detail later together with the attached drawings. However, this specification is not limited to the embodiments disclosed below, but is embodied in various different forms, and merely these embodiments are provided so that the disclosure of this specification becomes complete and that those having ordinary knowledge in the technical field to which this specification belongs can be completely informed of the scope of the invention.

[0014] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the figures for explaining the embodiments of this specification are exemplary, and this specification is not limited to the matters shown in the figures. Throughout the specification, the same reference numerals refer to the same components. In addition, in the description of this specification, when it is determined that the specific description of related known technologies may unnecessarily obscure the gist of this specification, the detailed description thereof is omitted. When terms such as "including", "having", "consisting of", etc. mentioned in this specification are used, other parts may be added unless "only" is used. When a component is expressed in the singular, it includes the case of including a plurality unless there are specific descriptions to the contrary.

[0015] In interpreting a component, even if there is no separate explicit description regarding the error range, it is interpreted as including the error range.

[0016] In the case of an explanation of the positional relationship, for example, when the positional relationship between two parts is explained by "above", "on the upper part", "on the lower part", "next to", or "adjacent to", etc., unless "immediately", "directly", or "close" is used, one or more other parts can also be located between the two parts.

[0017] In the case of an explanation regarding the time relationship, when the chronological relationship is explained by "after", "subsequent to", "next", or "before", etc., unless "immediately" or "directly" is used, it can also include the case where it is not continuous.

[0018] First, second, etc. are used to explain various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component mentioned below may also be the second component within the technical idea of this specification.

[0019] In describing the components of this specification, terms such as 1st, 2nd, A, B, (a), or (b) may be used. Such terms are used solely to distinguish a component from other components, and do not limit the nature, order, sequence, or number of the component.

[0020] Where it is stated that one component "connects," "joins," "connects," or "adheres" to another component, it should be understood that the component may directly connect, join, connect, or adhere to the other component, but that other components may also be interposed between each component that can indirectly connect, join, connect, or adhere to the other component unless otherwise explicitly stated.

[0021] Where it is stated that a component or layer "contacts" or "overlaps" with another component or layer, it should be understood that the component or layer may directly contact or overlap with another component or layer, but other components may be interposed between each component that may indirectly contact or overlap, unless otherwise explicitly stated.

[0022] "At least one" must be understood to include all combinations of one or more of the relevant components. For example, "at least one of the first, second, and third components" could mean not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0023] The terms "first direction," "second direction," "third direction," "X-axis direction," "Y-axis direction," and "Z-axis direction" should not be interpreted as referring only to geometric relationships where the relationship between them is perpendicular, but rather may mean that there are broader directions within the range in which the configuration specified herein can function.

[0024] Each feature of the various embodiments described herein can be combined or combined with one another, either partially or as a whole, and various technical interdependencies and drives are possible. Each embodiment may be implemented independently of one another, or it may be implemented in association with one another.

[0025] Various embodiments of this specification will be described in detail below with reference to the attached figures. The scales of the components shown in the figures are different from those of reality for the sake of explanation and are not limited to those shown in the figures.

[0026] Figure 1 is an exploded perspective view showing a display device 1000 according to an embodiment of this specification.

[0027] Referring to Figure 1, the display device 1000 according to the embodiment of this specification may include a display panel 100, a cover member 120, a support substrate 190, and a drive circuit unit 300.

[0028] The display panel 100 can be configured to display information, videos, and / or images provided to the user. The display panel 100 can also be configured to sense user touch.

[0029] The cover member 120 can be placed on the display panel 100. The cover member 120 may be a member for protecting the display panel 100. The cover member 120 may be made of a transparent material. For example, the cover member 120 may be a cover window or cover glass.

[0030] The display device 1000 may further include a polarizing layer 180 and an adhesive layer 185.

[0031] The polarizing layer 180 can be placed on the display panel 100. The polarizing layer 180 can be placed (or interposed) between the display panel 100 and the cover member 120. The polarizing layer 180 can be configured to prevent or reduce light generated from an external light source from entering the inside of the display panel 100 and affecting the light-emitting elements, etc.

[0032] The adhesive layer 185 can adhere the cover member 120 to the display panel 100. The adhesive layer 185 can be positioned (or interposed) between the polarizing layer 180 and the cover member 120, allowing the cover member 120 to adhere to the polarizing layer 180. The adhesive layer 185 may include, but is not limited to, optically cleared adhesive (OCA), optically cleared resin (OCR), or pressure-sensitive adhesive (PSA).

[0033] The support substrate 190 can be positioned on the back of the display panel 100. The support substrate 190 can be configured to reinforce the rigidity of the display panel 100. For example, the support substrate 190 may be made of plastic or metal, but the embodiments herein are not limited thereto. The support substrate 190 may be a backplate, but the embodiments herein are not limited thereto.

[0034] A portion of the display panel 100 can be bent to wrap around the side of the support substrate 190 and positioned on the back of the support substrate 190.

[0035] The drive circuit unit 300 can be configured to be electrically connected to the display panel 100. The drive circuit unit can be configured to generate the signals necessary to display (or materialize) an image on the display panel 100 and to supply the signals to the display panel 100. The drive circuit unit 300 may include a flexible circuit board 310 and a printed circuit board 330.

[0036] The flexible circuit board 310 and the printed circuit board 330 can be positioned below the display panel 100. The flexible circuit board 310 and the printed circuit board 330 can be positioned at least at one end of the display panel 100, but the embodiments herein are not limited thereto. One side of the flexible circuit board 310 can be attached to the display panel 100 and the other side can be attached to the printed circuit board 330, but the embodiments herein are not limited thereto. The flexible circuit board 310 can be a flexible film, but the embodiments herein are not limited thereto.

[0037] The flexible circuit board 310 and the printed circuit board 330 can be placed on the back of the support board 190. The support board 190 can be placed between the display panel 100 and the printed circuit board 330.

[0038] The printed circuit board 330 may include at least one hole 331, but the embodiments herein are not limited thereto. An internal component for sensing ambient light, temperature, etc., which can be supplied to multiple sensors, may be placed in the area corresponding to at least one hole 331. For example, the internal component may include an ambient light sensor (ALS) or a temperature sensor, but the embodiments herein are not limited thereto. For example, the hole 331 may be a transparent hole, but the embodiments herein are not limited thereto.

[0039] The display device 1000 according to the embodiments of this specification may further include a touch panel 200.

[0040] The touch panel 200 can be configured to sense user touch on the display panel 100. For example, the touch panel 200 can be configured to sense user touch via a stylus or finger.

[0041] A touch panel 200 according to one embodiment of this specification can be interposed or positioned between the display panel 100 and the cover member 120. For example, the touch panel 200 can be interposed or positioned between the cover member 120 and the polarizing layer 180. The touch panel 200 can be connected to or attached to the back surface of the cover member 120 by a transparent adhesive member. The touch panel 200 may include a touch electrode layer having touch electrodes for sensing a user's finger or pen touch on the display panel 100. The touch electrode layer may be configured to sense changes in the capacitance of the touch electrodes due to user touch. For example, the touch electrode layer may include an electrode structure corresponding to a Mutual-Capacitance Type, where a plurality of touch driving electrodes and a plurality of touch sensing electrodes intersect, or a Self-Capacitance Type, consisting only of a plurality of touch sensing electrodes.

[0042] The drive circuit unit 300 can be electrically connected to the touch panel 200. The drive circuit unit 300 can also be configured to sense changes in the capacitance of the touch electrodes configured on the touch panel 200, generate touch coordinate data corresponding to the user's touch position, and provide it to the host control unit (not shown).

[0043] Figure 2 is a plan view of the display device 1000 according to an embodiment of this specification, and Figure 3 is an enlarged view of the display device 1000 according to an embodiment of this specification.

[0044] Referring to Figures 2 and 3, the display device 1000 may include a display panel 100, a flexible circuit board 310, and a printed circuit board 330.

[0045] The display panel 100 may include a substrate 110. The substrate 110 may be a member that supports other components of the display device 1000. The substrate 110 may be made of an insulating material. For example, the substrate 110 may be made of glass or resin. The substrate 110 may also be made of a flexible material. For example, the substrate 110 may be made of a flexible plastic material such as polyimide (PI), but the embodiments herein are not limited thereto.

[0046] A display panel 100 according to one embodiment of this specification may include a display area (AA) and a non-display area (NA). For example, a substrate 110 may include a display area (AA) and a non-display area (NA). The display area (AA) and non-display area (NA) may be described not only in relation to the substrate 110 but also in relation to the entire display device 1000.

[0047] The display area (AA) may be the area on which an image is displayed. The display area (AA) may contain multiple pixels (PX). Each of the multiple pixels (PX) may consist of multiple subpixels. For example, each of the multiple pixels (PX) may contain multiple subpixels. Each of the multiple subpixels may contain multiple light-emitting elements. The multiple light-emitting elements may be configured differently depending on the type of display device 1000. For example, if the display device 1000 is an inorganic light-emitting display device, the light-emitting elements may be LEDs (Light-emitting Diodes), Micro LEDs (Micro Light-emitting Diodes), or Mini LEDs (Mini Light-emitting Diodes), but the embodiments herein are not limited thereto.

[0048] The display area (AA) can be configured in various shapes depending on the design of the display device 1000. For example, the display area (AA) can be configured as a rectangle with rounded corners, but the embodiments described herein are not limited to this. As another example, the display area (AA) can be configured as a rectangle or circle with right-angled corners, but the embodiments described herein are not limited to this.

[0049] Referring to Figure 3, multiple pixel driver circuits (PDs) can be arranged in the display area (AA). These multiple pixel driver circuits (PDs) may be circuits for driving multiple sub-pixel light-emitting elements. Each of the multiple pixel driver circuits (PDs) includes multiple transistors, including a drive transistor, and storage capacitors, and can supply control signals, power, and drive current to the multiple sub-pixel light-emitting elements to control the light-emitting operation of the multiple light-emitting elements. For example, each of the multiple pixel driver circuits (PDs) can be electrically connected to power wiring arranged (or configured) in the display area (AA), and signal wiring for controlling the on / off and / or light-emitting time of the light-emitting elements. For example, each of the multiple pixel driver circuits (PDs) may be a single minute-sized semiconductor packaging element containing multiple transistors and storage capacitors as a microchip or chipset. For example, each of the multiple pixel driver circuits (PDs) may be a drive driver manufactured on a semiconductor substrate using a MOSFET (Metal-oxide-silicon field effect transistor) manufacturing process, but the embodiments herein are not limited thereto.

[0050] The non-display area (NA) may be an area surrounding the display area (AA). The non-display area (NA) may be an area where no image is displayed. The non-display area (NA) may include various wirings and drive circuits 311 for driving multiple pixels (PX) arranged (or configured) in the display area (AA). For example, various wirings and drive circuits 311 can be mounted in the non-display area (NA), and pads (PADs) to which integrated circuits and printed circuit boards can be connected can be placed, but the embodiments described herein are not limited thereto.

[0051] According to one embodiment of this specification, the drive circuit 311 may include a drive integrated circuit. For example, the drive circuit 311 may be a data drive circuit and / or a gate drive circuit, but the embodiments of this specification are not limited thereto. A non-display area (NA) may contain wiring that supplies control signals for controlling the drive circuit 311. For example, the control signals may include various timing signals, including a clock signal, an input data enable signal, and a synchronization signal, but the embodiments of this specification are not limited thereto. The control signals may be received via a pad (PAD). For example, a link wiring (LL) for transmitting signals to the non-display area (NA) may be provided. For example, a pad (PAD) may be electrically connected to the drive circuit 300.

[0052] According to one embodiment of this specification, the non-display area (NA) may include a first non-display area (NA1), a bendable area (BA), and a second non-display area (NA2). For example, the first non-display area (NA1) may be an area surrounding at least a portion of the display area (AA). The bendable area (BA) is an area extending from at least one of the multiple sides of the first non-display area (NA1) and may be a bendable area. The second non-display area (NA2) is an area extending from the bendable area (BA), and a pad portion (PAD) may be placed in the second non-display area (NA2). For example, the bendable area (BA) may be in a bent state, and the remaining area of ​​the substrate 110 excluding the bendable area (BA) may be in a flat state. In this case, the bending of the bendable area (BA) may allow the second non-display area (NA2) to be located on the back of the display area (AA), but the embodiments of this specification are not limited thereto.

[0053] According to one embodiment of this specification, a plurality of link wirings (LL) can be arranged in the non-display area (NA). The plurality of link wirings (LL) may be wiring that transmits various signals from one or more flexible circuit boards 310 and printed circuit boards 330 to the display area (AA). The plurality of link wirings (LL) extend from a plurality of pad electrodes (PE) in the second non-display area (NA2) toward the bending area (BA) and the first non-display area (NA1), and are electrically connected to a plurality of drive wirings (VL) in the display area (AA). The plurality of pixel drive circuits (PD) can be driven by receiving signals from one or more flexible circuit boards 310 and printed circuit boards 330 via the drive wirings (VL) in the display area (AA) and the link wirings (LL) in the non-display area (NA).

[0054] According to one embodiment of this specification, the multiple drive lines (VL), together with the multiple link lines (LL), may be lines for transmitting signals output from the flexible circuit board 310 and the printed circuit board 330 to the multiple pixel drive circuits (PD). The multiple drive lines (VL) are arranged in the display area (AA) and can be electrically connected to each of the multiple pixel drive circuits (PD). The multiple drive lines (VL) can extend from the display area (AA) toward the non-display area (NA) and be electrically connected to the multiple link lines (LL). Therefore, signals output from the flexible circuit board 310 and the printed circuit board 330 can be transmitted to each of the multiple pixel drive circuits (PD) via the multiple link lines (LL) and the multiple drive lines (VL).

[0055] According to one embodiment of this specification, when the bending region (BA) bends, a portion of the multiple link wiring (LL) may also bend. Stress can concentrate on the portion of the bent link wiring (LL), which can cause cracks to form in the link wiring (LL). Therefore, the multiple link wiring (LL) can be made of a highly flexible conductive material to reduce cracking when the bending region (BA) is bent. For example, the multiple link wiring (LL) can be made of a highly flexible conductive material such as gold (Au), silver (Ag), or aluminum (Al), but the embodiments of this specification are not limited to these. Alternatively, the multiple link wiring (LL) can be made of one of the various conductive materials used in the display region (AA). For example, the multiple link wiring (LL) can be made of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys of silver (Ag) and magnesium (Mg), or alloys thereof, but the embodiments of this specification are not limited to these. Multiple link wiring (LL) can be constructed in a multilayer structure containing various conductive materials. For example, multiple link wiring (LL) can be constructed in a triple layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but the examples herein are not limited to this.

[0056] Multiple link wirings (LLs) can be configured in various shapes to reduce stress. At least a portion of the multiple link wirings (LLs) arranged on a bending region (BA) can extend in the same direction as the extension of the bending region (BA), or in a different direction to reduce stress. For example, if the bending region (BA) extends in one direction from a first non-display region (NA1) to a second non-display region (NA2), at least a portion of the link wirings (LLs) arranged on the bending region (BA) can extend in a direction inclined from that direction. As another example, at least a portion of the multiple link wirings (LLs) can be configured in various shaped patterns. For example, at least a portion of the multiple link wirings (LLs) arranged on a bending region (BA) may be a shape in which conductive patterns having at least one shape from diamond, rhombus, trapezoidal wave, triangular wave, sawtooth wave, sinusoidal wave, circular, and omega (Ω) shapes are repeatedly arranged, but the embodiments herein are not limited thereto. Therefore, in order to minimize the stress concentrated in the multiple link wirings (LL) and the resulting cracks, the shapes of the multiple link wirings (LL) can consist of various shapes, including the shapes described above, but the embodiments herein are not limited thereto.

[0057] In one embodiment of this specification, the width of a second non-display area (NA2) where multiple pad electrodes (PE) are arranged may be wider than the width of a bent area (BA) where only multiple link wirings (LL) are arranged. Similarly, the width of a display area (AA) where multiple subpixels are arranged may be wider than the width of a bent area (BA) where only multiple link wirings (LL) are arranged. In the figure, the width of the bent area (BA) is shown to be narrower than the width of other areas of the substrate 110, but the shape of the substrate 110 including the bent area (BA) is illustrative and the embodiments of this specification are not limited thereto.

[0058] A pad section (PAD) containing multiple pad electrodes (PE) can be placed in the second non-display area (NA2). The drive circuit section 300, including the flexible circuit board 310 and the printed circuit board 330, can be attached to or bonded to the pad section (PAD). The multiple pad electrodes (PE) of the pad section (PAD) are electrically connected to one or more flexible circuit boards 310, and can transmit various signals (or power) received from the printed circuit board 330 and the flexible circuit board 310 to multiple pixel drive circuits (PD) in the display area (AA).

[0059] The flexible circuit board 310 may be a film on which various components are arranged on a flexible base film. For example, the flexible circuit board 310 may have a drive integrated circuit 311 which includes one or more gate driver integrated circuits and data driver integrated circuits, but the embodiments herein are not limited thereto. The drive integrated circuit 311 may be a component which processes data and drive signals for displaying an image. The drive integrated circuit 311 may be arranged in a manner such as chip-on-glass (COG), chip-on-film (COF), or tape carrier package (TCP), depending on the mounting method, but the embodiments herein are not limited thereto. The flexible circuit board 310 may be attached to or bonded to a plurality of pad electrodes (PE) via a conductive adhesive layer, but the embodiments herein are not limited thereto.

[0060] The printed circuit board 330 may be a component that is electrically connected to one or more flexible circuit boards 310 and supplies signals to the drive integrated circuit 311. The printed circuit board 330 is located on one side of the flexible circuit board 310 and can be electrically connected to the flexible circuit board 310. The printed circuit board 330 may further contain circuit components such as memory or various passive circuit elements for supplying various signals to the drive integrated circuit 311.

[0061] The drive circuit 300 according to the embodiments of this specification may further include a timing controller 350 and a power management integrated circuit (PMIC).

[0062] The timing controller 350 can be mounted on the printed circuit board 330. The timing controller 350 receives video data and timing synchronization signals from the host control unit, converts the video data into pixel data and provides it to the drive integrated circuit 311, and can control the drive timing of the drive integrated circuit 311 and each of the multiple pixel drive circuits (PDs) based on the timing synchronization signals.

[0063] The power management integrated circuit 370 can be configured to generate and output various power supplies for driving the display device 1000. For example, the power management integrated circuit 370 can be configured to generate and output a power supply voltage, a reference voltage, a cathode-on voltage, and a cathode-off voltage, etc., based on the input power supply and under the control of the timing controller 350. For example, the drive voltage may be a voltage for driving a drive circuit or integrated circuit, the reference voltage may be a voltage for adjusting (or determining) the brightness (or luminance) of the image or light emitted from the light-emitting element displayed in the display area (AA), the cathode-on voltage may be a voltage for turning on (or emitting light) the light-emitting element, and the cathode-off voltage may be a voltage for turning off the light-emitting element. For example, the cathode-on voltage may be a first common voltage or a first low-potential power supply voltage, and the cathode-off voltage may be a second common voltage or a second low-potential power supply voltage, but the embodiments herein are not limited thereto.

[0064] The drive circuit 300 according to the embodiments of this specification may further include a touch integrated circuit 390.

[0065] The touch integrated circuit 390 can be configured to electrically connect to the touch electrodes (TEs) on the touch panel 200. The touch integrated circuit 390 can supply touch drive signals to the touch electrodes (TEs) in response to touch synchronization signals supplied from the timing controller 350, generate touch raw data corresponding to the capacitance changes of the touch electrodes (TEs), and provide the generated touch raw data to the timing controller 350 or the host control unit, but the embodiments herein are not limited thereto. For example, the touch integrated circuit 390 can also be configured to generate touch coordinate data based on the touch raw data and provide it to the host control unit. For example, the touch integrated circuit 390 can be integrated into or built into the drive integrated circuit 311.

[0066] The timing controller 350 can be configured to control the voltage output from the power management integrated circuit 370 based on user touch information provided by the touch integrated circuit 390 or the host control unit. For example, when a user adjusts the screen brightness (or brightness) of the display device 1000 via the touch panel 200 or button operation, the timing controller 350 can be configured to generate a screen brightness signal corresponding to the user operation (or setting) and to supply reference voltage data and cathode-off voltage data (or second common voltage data) corresponding to the screen brightness signal to the power management integrated circuit 370. The power management integrated circuit 370 can be configured to generate and output the reference voltage and cathode-off voltage based on the reference voltage data and cathode-off voltage data provided by the timing controller 350, respectively.

[0067] Figure 4 shows the circuit structure according to the embodiment described herein. Figure 4 shows one microdriver included in each of the multiple pixel driving circuits shown in Figure 3.

[0068] Figure 4 illustrates, but is not limited to, a single light-emitting element (ED) connected to a microdriver (μDriver). For example, eight light-emitting elements (EDs) can be connected to one microdriver. For example, eight light-emitting elements (EDs) on different lines (or horizontal lines or low lines) can be connected to one microdriver. As another example, sixteen light-emitting elements (EDs) can be connected to one microdriver, or 32 or 64 light-emitting elements (EDs) can be connected to one microdriver simultaneously (or in common). For example, a light-emitting element (ED) may be a micro-light-emitting element, a micro-light-emitting diode, or a micro-light-emitting diode chip. For example, a light-emitting element (ED) can have a scale of 1 μm to 100 μm, but the embodiments herein are not limited to this.

[0069] A single microdriver (μDriver) may include a driver transistor (TDR) and a light-emitting transistor (TEM), but the embodiments herein are not limited to this.

[0070] In one embodiment of this specification, a high-potential power supply voltage (VDD) may be applied to the first electrode of a drive transistor (TDR), the first electrode of a light-emitting transistor (TEM) may be connected to the second electrode of the drive transistor (TDR), and a scan signal (SC) may be applied to the gate electrode of the drive transistor (TDR). The scan signal (SC) applied to the gate electrode of the drive transistor (TDR) is a DC power supply, and a fixed reference voltage (Vref) may be applied for each frame, but the embodiments of this specification are not limited thereto. For example, the reference voltage (Vref) may be changed for each frame or more. For example, the reference voltage (Vref) may be adjusted (or varied) according to the brightness of the screen in response to user operation (or setting).

[0071] The first electrode of a light-emitting transistor (TEM) is connected to the second electrode of a drive transistor (TDR), a light-emitting element (ED) is connected to the second electrode of the light-emitting transistor (TEM), and a light-emitting signal (EM) may be applied to the gate electrode of the light-emitting transistor (TEM). The light-emitting signal (EM) applied to the gate electrode of the light-emitting transistor (TEM) may be a pulse width modulation signal that varies from frame to frame, but the embodiments herein are not limited thereto. For example, the light-emitting signal (EM) may include a duty-on interval that turns on the light-emitting transistor (TEM) and a duty-off interval that turns off the light-emitting transistor (TEM). For example, the duty-on interval of the light-emitting signal (EM) may be set (or adjusted) by the grayscale corresponding to the pixel data.

[0072] The first electrode of the light-emitting element (ED) is connected to the second electrode of the light-emitting transistor (TEM), and the second electrode of the light-emitting element (ED) can be connected. For example, the first electrode of the light-emitting element (ED) may be the anode electrode and the second electrode may be the cathode electrode, but the embodiments herein are not limited thereto. For example, the voltage applied from the light-emitting transistor (TEM) to the first electrode of the light-emitting element (ED) may be the anode voltage. For example, the voltage applied to a low-potential power line may be the cathode voltage (Vce). For example, the voltage applied to a low-potential power line may be the cathode-on voltage (Vce-on) or the cathode-off voltage (Vce_off).

[0073] The driver transistor (TDR) and the light-emitting transistor (TEM) can be an n-type transistor or a p-type transistor, respectively.

[0074] In a microdriver (μDriver), the drive transistor (TDR) can be turned on by a scan signal (SC) applied from the pixel drive circuit (PD), and the light-emitting transistor (TEM) can be turned on by a light-emitting signal (EM) applied from the pixel drive circuit (PD). As a result, a drive current is applied to the light-emitting element (ED) via the drive transistor (TDR) and the light-emitting transistor (TEM) by a high-potential power supply voltage (VDD) applied to the first electrode of the drive transistor (TDR), causing the light-emitting element (ED) to emit light. For example, the light-emitting element (ED) can emit light when a cathode-on voltage (Vce-on) is applied to a low-potential power line, and can remain non-emitting when a cathode-off voltage (Vce-off) is applied to the low-potential power line.

[0075] Figures 5 to 7 are plan views of a display device 1000 according to an embodiment of this specification. For example, Figure 5 is an enlarged view of a display area including a portion of multiple pixels (PX). For example, Figure 6 is an enlarged view of a display area (AA) including one of the multiple pixels (PX). For example, Figure 7 is an enlarged view of a display area (AA) including a portion of multiple pixels (PX).

[0076] Figures 5 and 6 show multiple signal lines (TL), multiple communication lines (NL), multiple first electrodes (CE1), multiple banks (BNK), and multiple light-emitting elements (ED), but the embodiments described herein are not limited thereto. Figure 7 is an enlarged view in which, for convenience, multiple second electrodes (CE2) are additionally arranged, and for convenience, the area overlapping with the second electrodes (CE2) is shown with a dotted line.

[0077] Referring to Figures 5 to 7, a display area (AA) can be configured with multiple pixels (PX) consisting of multiple subpixels (SP). Each of the multiple subpixels (SP) includes a light-emitting element (ED) and can emit light independently. The multiple subpixels (SP) can be arranged in a matrix configuration, consisting of multiple rows and multiple columns, but the embodiments herein are not limited to this.

[0078] The subpixels (SP) may include a first subpixel (SP1), a second subpixel (SP2), and a third subpixel (SP3). For example, the subpixels may include a first subpixel (SP1), a second subpixel (SP2), and a third subpixel (SP3) arranged along a row direction (or first direction (X)). For example, one of the first subpixel (SP1), second subpixel (SP2), and third subpixel (SP3) may be a red subpixel, another a green subpixel, and the rest blue subpixels. The types of subpixels are illustrative, and the embodiments herein are not limited thereto.

[0079] Each of multiple pixels (PX) may contain one or more first subpixels (SP1), one or more second subpixels (SP2), and one or more third subpixels (SP3). For example, a single pixel (PX) may contain a pair of first subpixels (SP1), a pair of second subpixels (SP2), and a pair of third subpixels (SP3).

[0080] A pair of first subpixels (SP1) may consist of a 1-1 subpixel (SP1a) and a 1-2 subpixel (SP1b). A pair of second subpixels (SP2) may consist of a 2-1 subpixel (SP2a) and a 2-2 subpixel (SP2b). A pair of third subpixels (SP3) may consist of a 3-1 subpixel (SP3a) and a 3-2 subpixel (SP3b). For example, a single pixel (PX) may include a 1-1 subpixel (SP1a), a 1-2 subpixel (SP1b), a 2-1 subpixel (SP2a), a 2-2 subpixel (SP2b), a 3-1 subpixel (SP3a), and a 3-2 subpixel (SP3b), but the embodiments herein are not limited thereto.

[0081] Multiple subpixels constituting a single pixel (PX) can be arranged in various ways. For example, a pair of first subpixels (SP1), a pair of second subpixels (SP2), and a pair of third subpixels (SP3) can be arranged in the same column within a single pixel (PX). The first subpixels (SP1), second subpixels (SP2), and third subpixels (SP3) can be arranged in the same row. The number and arrangement of multiple subpixels constituting a single pixel (PX) are illustrative examples, and the embodiments herein are not limited thereto.

[0082] Multiple signal lines (TLs) can be arranged in the region between multiple subpixels. Multiple signal lines (TLs) can be extended in the column direction (or second direction (Y)) between multiple subpixels (SPs). Multiple signal lines (TLs) may be lines that transmit anode voltage from a pixel driver circuit (PD in Figure 3) (or microdriver (μDriver)) to multiple subpixels (SPs). For example, multiple signal lines (TLs) can be electrically connected to multiple pixel driver circuits (PD in Figure 3) and the first electrodes (CE1) of multiple subpixels (SPs). The anode voltage output from the pixel driver circuit (PD in Figure 3) can be transmitted to the first electrodes (CE1) of multiple subpixels (SPs) via the multiple signal lines (TLs). For example, the first electrode (CE1) may be an electrode electrically connected to the anode electrode (134 in Figure 9) of a light-emitting element (ED). Therefore, the anode voltage from the signal wiring (TL) can be transmitted to the anode electrode (134 in Figure 9) of the light-emitting element (ED) via the first electrode (CE1).

[0083] Therefore, instead of forming multiple transistors and storage capacitors for each of the multiple subpixels (SPs), the structure of the display device 1000 can be simplified by using a pixel driver circuit (PD in Figure 3) that integrates multiple pixel circuits. Furthermore, by integrating the circuits that were previously located in each of the multiple subpixels into a single pixel driver circuit (PD in Figure 3), highly efficient, low-power driving may become possible.

[0084] Multiple signal lines (TLs) may include a first signal line (TL1), a second signal line (TL2), a third signal line (TL3), a fourth signal line (TL4), a fifth signal line (TL5), and a sixth signal line (TL6). Each of the first signal line (TL1) and the second signal line (TL2) can be electrically connected to each of a pair of first subpixels (SP1). Each of the third signal line (TL3) and the fourth signal line (TL4) can be electrically connected to each of a pair of second subpixels (SP2). Each of the fifth signal line (TL5) and the sixth signal line (TL6) can be electrically connected to each of a pair of third subpixels (SP3).

[0085] A first signal line (TL1) can be placed on one side of a pair of first subpixels (SP1), and a second signal line (TL2) can be placed on the other side of the pair of first subpixels (SP1). The first signal line (TL1) can be electrically connected to the first electrode (CE1) of one of the first subpixels (SP1) of the pair, for example, the 1-1 subpixel (SP1a). The second signal line (TL2) can be electrically connected to the first electrode (CE1) of the remaining first subpixel (SP1) of the pair, for example, the 1-2 subpixel (SP1b).

[0086] A third signal line (TL3) can be placed on one side of a pair of second subpixels (SP2), and a fourth signal line (TL4) can be placed on the other side of the pair of second subpixels (SP2). For example, the third signal line (TL3) can be placed adjacent to the second signal line (TL2). The third signal line (TL3) can be electrically connected to the first electrode (CE1) of one of the second subpixels (SP2) of the pair, for example, the 2-1 subpixel (SP2a). The fourth signal line (TL4) can be electrically connected to the first electrode (CE1) of the remaining second subpixel (SP2) of the pair, for example, the 2-2 subpixel (SP2b).

[0087] A fifth signal line (TL5) can be placed on one side of a pair of third subpixels (SP3), and a sixth signal line (TL6) can be placed on the other side of the pair of third subpixels (SP3). For example, the fifth signal line (TL5) can be placed adjacent to the fourth signal line (TL4). The sixth signal line (TL6) can be placed adjacent to the first signal line (TL1) connected to an adjacent pixel (PX). The fifth signal line (TL5) can be electrically connected to the first electrode (CE1) of one of the third subpixels (SP3) of the pair, for example, the 3-1 subpixel (SP3a). The sixth signal line (TL6) can be electrically connected to the first electrode (CE1) of the remaining third subpixel (SP3) of the pair, for example, the 3-2 subpixel (SP3b).

[0088] Multiple signal lines (TLs) can be made of conductive materials. For example, multiple signal lines (TLs) can be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but the examples herein are not limited to these. As another example, multiple signal lines (TLs) can be made of a multilayer structure of conductive materials. For example, multiple signal lines (TLs) can be made of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the examples herein are not limited to these.

[0089] Multiple communication lines (NL) can be arranged in the region between multiple pixels (PX). Multiple communication lines (NL) can be arranged extending in the row direction in the region between multiple pixels (PX). Multiple communication lines (NL) can be arranged in the region between multiple second electrodes (CE2) and can not overlap with the multiple second electrodes (CE2). For example, multiple communication lines (NL) may be used for short-range communication such as NFC (Near Field Communication). Multiple communication lines (NL) can function as antennas. For example, multiple communication lines (NL) may be multiple connection lines, etc., but the embodiments herein are not limited to these.

[0090] According to one embodiment of this specification, a bank (BNK) can be arranged in each of a plurality of subpixels (SPs). The plurality of banks (BNKs) may be structures on which a plurality of light-emitting elements (EDs) are attached. The plurality of banks (BNKs) can guide the positions of the plurality of light-emitting elements (EDs) in a transfer process for transferring the plurality of light-emitting elements (EDs). In the transfer process for the plurality of light-emitting elements (EDs), the plurality of light-emitting elements (EDs) can be transferred onto the plurality of banks (BNKs). The entire area of ​​the light-emitting elements (EDs) may overlap with the bank (BNKs). For example, in planar terms, the overall size of the light-emitting elements (EDs) may be smaller than the bank (BNKs). For example, the plurality of banks (BNKs) may be a bank pattern, a structure, or a protruding pattern, but the embodiments of this specification are not limited thereto.

[0091] The banks (BNK) of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) can be arranged spaced apart from each other along the row direction (or second direction (Y)). The banks (BNK) of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) can be configured to be separated from each other. This makes it easy to identify the banks (BNK) of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) to which different types of light-emitting elements (EDs) are transferred during the process of transferring light-emitting elements to subpixels, thereby preventing or minimizing transfer defects during the light-emitting element transfer process.

[0092] According to one embodiment of this specification, the bank (BNK) of the 1-1 subpixel (SP1a) and the bank (BNK) of the 1-2 subpixel (SP1b) can be connected to each other, or separated or formed apart from each other. For example, considering the design such as the requirements of the transfer process, the bank (BNK) of the 1-1 subpixel (SP1a) and the bank (BNK) of the 1-2 subpixel (SP1b) in which the same type of light-emitting element (ED) is arranged can be connected to each other, or separated or formed apart from each other. Similarly, the bank (BNK) of the 2-1 subpixel (SP2a) and the bank (BNK) of the 2-2 subpixel (SP2b) can be connected to each other, or separated or formed apart from each other. The bank (BNK) of the 3-1 subpixel (SP3a) and the bank (BNK) of the 3-2 subpixel (SP3b) can be connected to each other, or separated or formed apart from each other. Therefore, the banks (BNK) of a pair of first subpixels (SP1), a bank (BNK) of a pair of second subpixels (SP2), and a bank (BNK) of a pair of third subpixels (SP3) can be formed in a variety of ways, and the embodiments herein are not limited thereto.

[0093] According to one embodiment of this specification, the multiple banks (BNKs) may consist of an organic insulating material. The multiple banks (BNKs) may consist of a single layer or multiple layers of the organic insulating material. For example, the multiple banks (BNKs) may consist of photoresist, polyimide (PI), or acrylic material, but the embodiments of this specification are not limited to these.

[0094] A first electrode (CE1) can be placed in each of the multiple subpixels. The first electrode (CE1) can be placed on the bank (BNK) while overlapping with the bank (BNK). The first electrode (CE1) can be electrically connected to one of the multiple signal lines (TL). At least a portion of the first electrode (CE1) can extend outside the bank (BNK) and be electrically connected to the signal line (TL) closest to the first electrode (CE1). A portion of the first electrode (CE1) may overlap with the bank (BNK), while the remainder of the first electrode (CE1) may not overlap with the bank (BNK).

[0095] According to one embodiment of this specification, a portion of the first electrode (CE1) of the first-first subpixel (SP1a) can extend to one side region of the first-first subpixel (SP1a) and be electrically connected to the first signal line (TL1), a portion of the first electrode (CE1) of the first-second subpixel (SP1b) can extend to the other side region of the first-second subpixel (SP1b) and be electrically connected to the second signal line (TL2), a portion of the first electrode (CE1) of the second-first subpixel (SP2a) can extend to one side region of the second-first subpixel (SP2a) and be electrically connected to the third signal line (TL3), and a portion of the first electrode (CE1) of the second-second subpixel (SP2b) can extend to the other side region of the second-second subpixel (SP2b) and be electrically connected to the fourth signal line (TL4). A portion of the first electrode (CE1) of the third-first subpixel (SP3a) can extend to one side of the third-first subpixel (SP3a) and be electrically connected to the fifth signal line (TL5), and a portion of the first electrode (CE1) of the third-second subpixel (SP3b) can extend to the other side of the third-second subpixel (SP3b) and be electrically connected to the sixth signal line (TL6).

[0096] The first electrode (CE1) can be electrically connected to the anode electrode (or anode terminal) (134 in Figure 9) of the light-emitting element (ED). The anode voltage from the pixel driving circuit (PD in Figure 3) can be transmitted to the light-emitting element (ED) sequentially via the signal wiring (TL) and the first electrode (CE1). The pixel driving circuit (PD in Figure 3) can apply the same voltage (or anode voltage) to the first electrode (CE1) of each of the multiple subpixels, but the embodiments herein are not limited thereto. For example, the pixel driving circuit (PD in Figure 3) can apply different voltages to the first electrode (CE1) of each of the multiple subpixels depending on the image displayed on the corresponding subpixel. For example, different voltages can be applied to the first electrode (CE1) of each of the multiple subpixels. Therefore, the first electrode (CE1) can be a pixel electrode, but the embodiments herein are not limited thereto.

[0097] The first electrode (CE1) can be made of a conductive material. For example, the first electrode (CE1) can be integrated with a plurality of signal lines (TLs). For example, the first electrode (CE1) can be made of the same conductive material as the plurality of signal lines (TLs), but the embodiments herein are not limited thereto. In embodiments herein, the first electrode (CE1) can be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but the embodiments herein are not limited thereto. In other embodiments herein, the first electrode (CE1) can be made of a multilayer structure of conductive material. For example, multiple first electrodes (CE1) may consist of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the examples herein are not limited to this.

[0098] Multiple light-emitting elements (EDs) can be arranged on the first electrode (CE1) so as to overlap with the bank (BNK) and the first electrode (CE1). The entire area of ​​the multiple light-emitting elements (EDs) can overlap with the bank (BNK) and the first electrode (CE1). Multiple light-emitting elements (EDs) can be in contact with the first electrode (CE1) so as to overlap with the bank (BNK) and the first electrode (CE1).

[0099] Multiple light-emitting elements (EDs) are arranged on a first electrode (CE1) and can be electrically connected to the first electrode (CE1). Therefore, the light-emitting elements (EDs) can emit light by applying an anode voltage from a pixel driver circuit (PD) via the signal wiring (TL) and the first electrode (CE1).

[0100] The multiple light-emitting elements (EDs) may include a first light-emitting element 130, a second light-emitting element 140, and a third light-emitting element 150.

[0101] The first light-emitting element 130 can be placed in the first subpixel (SP1). The second light-emitting element 140 can be placed in the second subpixel (SP2). The third light-emitting element 150 can be placed in the third subpixel (SP3). For example, one of the first light-emitting element 130, the second light-emitting element 140, and the third light-emitting element 150 may be a red light-emitting element, another may be a green light-emitting element, and the rest may be blue light-emitting elements, but the embodiments herein are not limited thereto. Thus, by mixing the red, green, and blue light emitted from multiple light-emitting elements (EDs), various colors of light, including white, can be realized. The types of multiple light-emitting elements (EDs) are illustrative, and the embodiments herein are not limited thereto.

[0102] The first light-emitting element 130 may include a first-first light-emitting element 130a located in the first-first subpixel (SP1a) and a first-second light-emitting element 130b located in the first-second subpixel (SP1b). The second light-emitting element 140 may include a second-first light-emitting element 140a located in the second-first subpixel (SP2a) and a second-second light-emitting element 140b located in the second-second subpixel (SP2b). The third light-emitting element 150 may include a third-first light-emitting element 150a located in the third-first subpixel (SP3a) and a third-second light-emitting element 150b located in the third-second subpixel (SP3b).

[0103] A second electrode (CE2) can be placed on each of the multiple subpixels. The second electrode (CE2) can be placed on the light-emitting element (ED). The second electrode (CE2) can be electrically connected to the pixel drive circuit (PD in Figure 3) via multiple contact electrodes (CCE). The second electrode (CE2) can be electrically connected to the cathode electrode (or cathode terminal) (135 in Figure 9) of the light-emitting element (ED) and can transmit the cathode voltage (or low-potential power supply voltage) from the pixel drive circuit (PD in Figure 3) to the light-emitting element (ED).

[0104] According to one embodiment of this specification, the cathode voltage applied to each of the second electrodes (CE2) of multiple subpixels (SPs) may be the same. For example, the cathode voltage can be applied in common to each of the second electrodes (CE2) of multiple subpixels (SPs) and to the cathode electrode of the light-emitting element (ED) (135 in Figure 9). Therefore, the second electrode (CE2) may be a common electrode or a common cathode electrode, but the embodiments of this specification are not limited thereto.

[0105] According to other embodiments of this specification, the cathode voltage applied to the second electrode (CE2) of each of the multiple subpixels (SPs) can be changed according to a reference voltage (Vref in Figure 4). For example, the cathode voltage can be adjusted (or varied) according to the brightness of the screen by user operation (or setting).

[0106] A second electrode (CE2) according to one embodiment of this specification may have a size corresponding to one row (or horizontal line). For example, a second electrode (CE2) may have a width corresponding to one row (or horizontal line) and may extend along the column direction (or first direction (X)). For example, a second electrode (CE2) may be commonly connected to the light-emitting elements (EDs) in each of a plurality of pixels (PX) arranged along the column direction (or first direction (X)). For example, a second electrode (CE2) may be commonly connected to the cathode electrode (or cathode terminal) (135 in Figure 9) of the light-emitting elements (EDs) in each of 16 pixels (PX) arranged along the column direction (or first direction (X)), but the embodiments of this specification are not limited thereto. For example, a second electrode (CE2) may be commonly connected to the cathode electrode (or cathode terminal) (135 in Figure 9) of 96 light-emitting elements (EDs) arranged along the column direction (or first direction (X)), but the embodiments of this specification are not limited thereto. For example, the second electrode (CE2) can be connected in common to the cathode electrodes (or cathode terminals) (135 in Figure 9) of 192 light-emitting elements (EDs) in a single row (or horizontal line), but the embodiments herein are not limited thereto.

[0107] According to other embodiments of this specification, some of the second electrodes (CE2) of each of a plurality of subpixels may be arranged separately from each other. For example, the second electrode (CE2) connected to the pixel (PX) of the nth row and the second electrode (CE2) connected to the pixel (PX) of the (n+1)th row may be arranged separately from each other. In embodiments of this specification, a plurality of second electrodes (CE2) may be arranged separately from each other with a plurality of communication lines (NL) extending in the row direction in between. Thus, the number of a plurality of subpixels may be greater than the number of a plurality of second electrodes (CE2).

[0108] Multiple second electrodes (CE2) can be made of a transparent conductive material, but the examples herein are not limited thereto. Multiple second electrodes (CE2) are made of a transparent conductive material and can be configured so that light emitted from the light-emitting element (ED) is directed toward the top of the second electrodes (CE2). For example, the second electrodes (CE2) can be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but the examples herein are not limited thereto.

[0109] Multiple contact electrodes (CCEs) can be arranged on the substrate 110. For example, multiple contact electrodes (CCEs) can be arranged at a distance from multiple banks (BNKs) and multiple signal lines (TLs). Each of the multiple second electrodes (CE2) can be superimposed on at least one contact electrode (CCE). For example, one second electrode (CE2) can be superimposed on multiple contact electrodes (CCEs).

[0110] Multiple contact electrodes (CCEs) can be electrically connected to multiple second electrodes (CE2). The multiple contact electrodes (CCEs) can be positioned between the substrate 110 and the multiple second electrodes (CE2) and configured to transmit the cathode voltage from the pixel driving circuit (PD in Figure 3) to the second electrodes (CE2).

[0111] According to one embodiment of this specification, when the light-emitting element (ED) is composed of a micro-light-emitting diode chip, a display panel 100 can be manufactured by forming multiple micro-light-emitting diode chips on a wafer and transferring the micro-light-emitting diode chips to a substrate 110. Various defects may occur during the process of transferring multiple light-emitting elements (EDs) of a fine size from the wafer to the substrate 110. For example, in some subpixels, a non-transfer defect may occur in which the light-emitting element (ED) is not transferred, and in other subpixels, a defect may occur in which the light-emitting element (ED) is transferred shifted from its designated position due to alignment errors. In addition, even if the transfer process proceeds normally, the transferred light-emitting element (ED) itself may be defective. Therefore, taking into account defects that occur during the transfer process of multiple light-emitting elements (EDs), multiple light-emitting elements (EDs) of the same type can be transferred to a single subpixel. After performing a lighting test on the multiple light-emitting elements (EDs), only the one light-emitting element (ED) that is ultimately judged to be normal can be used.

[0112] According to one embodiment of this specification, a first-first light-emitting element 130a and a first-second light-emitting element 130b are transferred together to a single pixel (PX), and their defects can be inspected. In one embodiment of this specification, if both the first-first light-emitting element 130a and the first-second light-emitting element 130b are determined to be normal, only the first-first light-emitting element 130a can be used, and the first-second light-emitting element 130b can be left unused. In another embodiment of this specification, if only the first-second light-emitting element 130b is determined to be normal, the first-first light-emitting element 130a can be left unused, and only the first-second light-emitting element 130b can be used. Therefore, even if multiple light-emitting elements (EDs) of the same type are transferred to a single pixel (PX), ultimately only one light-emitting element (ED) can be used.

[0113] According to one embodiment of this specification, one of a pair of light-emitting elements (EDs) may be a main (or primary) light-emitting element (ED), and the remaining element may be a redundant light-emitting element (ED). The redundant light-emitting element (ED) may be an extra light-emitting element (ED) that is transferred in preparation for a failure of the primary light-emitting element (ED). If the primary light-emitting element (ED) is faulty, the redundant light-emitting element (ED) can be used in its place. Therefore, by transferring both the primary and redundant light-emitting elements (EDs) together to a single pixel (PX), the degradation of display quality due to failures of the primary and redundant light-emitting elements (EDs) can be minimized. For example, the first-first light-emitting elements 130a, second-first light-emitting elements 140a, and third-first light-emitting elements 150a transferred to a single pixel (PX) may be used as the primary light-emitting element (ED), and the first-second light-emitting elements 130b, second-second light-emitting elements 140b, and third-second light-emitting elements 150b may be used as redundant light-emitting elements (EDs).

[0114] Figure 8 is a cross-sectional view of a display device according to an embodiment of this specification. It is a cross-sectional view of a first light-emitting element according to an embodiment of this specification. For example, Figure 8 is a cross-sectional view of the display area (AA), first non-display area (NA), bending area (BA), and second non-display area (NA2) along the line I-I' shown in Figure 2, and Figure 9 is a cross-sectional view of a portion of the display area (AA).

[0115] Referring to Figure 8, a buffer layer 111 can be placed in the remaining area of ​​the substrate 110, excluding the bending region (BA). The buffer layer 111 may include a first buffer layer 111a and a second buffer layer 111b.

[0116] The first buffer layer 111a and the second buffer layer 111b can be placed in the display area (AA), the first non-display area (NA1), and the second non-display area (NA2). The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be made of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be made of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments herein are not limited thereto.

[0117] According to one embodiment of this specification, portions of the first buffer layer 111a and the second buffer layer 111b located in the bending region (BA) can be removed. The upper surface of the substrate 110 located in the bending region (BA) can be exposed without being covered by the first buffer layer 111a and the second buffer layer 111b. Since portions of the first buffer layer 111a and the second buffer layer 111b, which are made of inorganic insulating material, are removed from the bending region (BA), cracks that occur in the first buffer layer 111a and the second buffer layer 111b when the bending region (BA) is bent can be prevented or minimized.

[0118] Multiple alignment keys (MKs) can be placed between the first buffer layer 111a and the second buffer layer 111b. These alignment keys (MKs) can be configured to identify (or align) the positions of the pixel drive circuits (PDs) during the manufacturing process of the display panel 100. For example, the alignment keys (MKs) can be configured to align the positions of the pixel drive circuits (PDs) transferred onto the adhesive layer 112. For example, the alignment keys (MKs) may be omitted, but the embodiments herein are not limited thereto.

[0119] An adhesive layer 112 can be placed on the second buffer layer 111b. The adhesive layer 112 can be placed in the display area (AA), the first non-display area (NA1), the bending area (BA), and the second non-display area (NA2). For example, at least a portion of the adhesive layer 112 can be removed in the non-display areas (NA1, NA2) including the bending area (BA). For example, the adhesive layer 112 may consist of any one of the following: an adhesive polymer, an epoxy resin, a UV-curable resin, a polyimide-based resin, an acrylate-based resin, a urethane-based resin, and polydimethylsiloxane (PDMS), but the examples herein are not limited to these.

[0120] In the display area (AA), a pixel driver circuit (PD) can be placed on the adhesive layer 112. The pixel driver circuit (PD) can be supported by the buffer layer 111. If the pixel driver circuit (PD) is embodied as a driver (or a driver integrated circuit or driver chip), the driver can be mounted on the adhesive layer 112 by a transfer process, but the embodiments herein are not limited thereto.

[0121] A protective layer 113 can be placed on the adhesive layer 112 and the pixel drive circuit (PD). The protective layer 113 may include a first protective layer 113a and a second protective layer 113b. For example, the first protective layer 113a and the second protective layer 113b can be placed on the adhesive layer 112 and the pixel drive circuit (PD). The first protective layer 113a and the second protective layer 113b can be placed so as to surround the sides of the pixel drive circuit (PD), but the embodiments herein are not limited thereto. For example, the second protective layer 113b can be placed so as to cover at least a portion of the upper surface of the pixel drive circuit (PD). For example, at least one of the first protective layer 113a and the second protective layer 113b placed on the bending region (BA) can be omitted. For example, the first protective layer 113a may be distributed throughout the display area (AA) and non-display area (NA), while the second protective layer 113b may be distributed partially in the display area (AA), the first non-display area (NA1), and the second non-display area (NA2), and not in the bending area (BA). For example, a portion of the second protective layer 113b (or the first protective layer 113a) in the bending area (BA) may be removed, but the embodiments herein are not limited thereto.

[0122] The first protective layer 113a and the second protective layer 113b may be composed of organic insulating materials, but the examples herein are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be composed of photoresist, polyimide (PI), or photoacrylic materials, but the examples herein are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be an overcoat layer, an insulating layer, or an organic insulating layer, but the examples herein are not limited thereto.

[0123] According to one embodiment of this specification, a wiring layer (or pixel wiring layer) can be placed on the protective layer 113b. For example, the wiring layer can be configured to surround or cover a pixel driver circuit (PD). The wiring layer may include a plurality of first connection wirings 121.

[0124] Multiple first connection lines 121 can be arranged on the protective layer 113b. For example, multiple first connection lines 121 can be arranged on the second protective layer 113b in the display area (AA). Multiple first connection lines 121 may be wiring (or intermediate wiring or jumping wiring) configured to electrically connect the pixel driver circuit (PD) to other components and / or wiring in other layers. For example, the pixel driver circuit (PD) can be electrically connected to multiple signal wiring (TL) and multiple contact electrodes (CCE), etc., via multiple first connection lines 121.

[0125] The multiple first connection wires 121 may include, but the embodiments herein are not limited to, first-1 connection wires 121a, first-2 connection wires 121b, first-3 connection wires 121c, and first-4 connection wires 121d. For example, the multiple first-1 connection wires 121a may be arranged on the second protective layer 113b. The multiple first-1 connection wires 121a may be configured to electrically connect to a pixel driver circuit (PD). The multiple first-1 connection wires 121a may be configured to transmit the voltage output from the pixel driver circuit (PD) to the first electrode (CE1) or the second electrode (CE2).

[0126] A third protective layer 114 can be placed on the second protective layer 113b. The third protective layer 114 can be placed entirely in the display area (AA) and the non-display area (NA). In the bending area (BA), the third protective layer 114 can cover the sides of the second protective layer 113b and the top surface of the first protective layer 113a. The third protective layer 114 can be made of an organic insulating material. For example, the third protective layer 114 can be made of a photoresist, polyimide (PI), or photoacrylic material, but the examples herein are not limited to these. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 can be made of the same material, but the examples herein are not limited to this.

[0127] Multiple first- and second connection wires 121b can be arranged on the third protective layer 114. These multiple first- and second connection wires 121b can be connected to the pixel driver circuit (PD) via the first-first connection wire 121a, or directly to the pixel driver circuit (PD). For example, some of the first- and second connection wires 121b can be directly connected to the pixel driver circuit (PD) via contact holes in the third protective layer 114. Other portions of the first- and second connection wires 121b can be electrically connected to the first-first connection wire 121a via contact holes in the third protective layer 114. However, the embodiments herein are not limited thereto. In one embodiment herein, a voltage output from the pixel driver circuit (PD) can be transmitted to a first electrode (CE1) or a second electrode (CE2) via connection wires different from the multiple first- and second connection wires 121b.

[0128] A display device 1000 according to one embodiment of this specification may further include an insulating layer 115 in the wiring layer. The insulating layer 115 can be configured to electrically insulate and cover a plurality of first connection wirings 121. For example, the insulating layer 115 may include first to third insulating layers 115a, 115b, and 115c.

[0129] According to one embodiment of this specification, a first insulating layer 115a can be placed on a plurality of first-to-second connection wirings 121b. The first insulating layer 115a can be placed entirely over the display area (AA) and non-display area (NA), but the embodiments of this specification are not limited thereto. The first insulating layer 115a can be composed of an organic insulating material, but the embodiments of this specification are not limited thereto. For example, the first insulating layer 115a can be composed of a photoresist, polyimide (PI), or photoacrylic material, but the embodiments of this specification are not limited thereto.

[0130] Multiple first- to third connecting wires 121c can be arranged on the first insulating layer 115a. Multiple first- to third connecting wires 121c can be electrically connected to multiple first- to second connecting wires 121b. For example, the first- to third connecting wires 121c can be electrically connected to the first- to second connecting wires 121b through contact holes in the first insulating layer 115a.

[0131] A second insulating layer 115b can be placed on a plurality of first-to-third connecting wires 121c. The second insulating layer 115b can be placed in the remaining areas excluding the bending region (BA), but the embodiments herein are not limited thereto. The second insulating layer 115b can be placed in the display region (AA), the first non-display region (NA1), and the second non-display region (NA2), but the embodiments herein are not limited thereto. For example, at least a portion of the second insulating layer 115b placed in the bending region (BA) can be removed. The second insulating layer 115b can be made of an organic insulating material, but the embodiments herein are not limited thereto. For example, the second insulating layer 115b can be made of a photoresist, polyimide (PI), or photoacrylic material, but the embodiments herein are not limited thereto.

[0132] Multiple first- to fourth connecting wires 121d can be arranged on the second insulating layer 115b. Multiple first- to fourth connecting wires 121d can be electrically connected to multiple first- to third connecting wires 121c. For example, the first- to fourth connecting wires 121d can be electrically connected to the first- to third connecting wires 121c through contact holes in the second insulating layer 115b.

[0133] The first to fourth connecting wires 121d can be connected to the contact electrode (CCE) through the contact hole in the third insulating layer 115c, thereby electrically connecting the contact electrode (CCE) and the pixel driving circuit (PD) by the first connecting wire 121.

[0134] The first to fourth connecting wires 121d can be directly connected to the signal wires (TL) via contact holes provided in the third insulating layer 115c, or they can be electrically connected to the signal wires (TL) via other additional wires or electrodes, thereby enabling the signal wires (TL) and the pixel driving circuit (PD) to be electrically connected by the first connecting wire 121.

[0135] Multiple second connection lines 122 can be arranged on the protective layer 113b in the non-display area (NA). For example, multiple second connection lines 122 can be arranged on the second protective layer 113b in the non-display area (NA). The multiple second connection lines 122 may be wiring for transmitting signals transmitted from the flexible circuit board (310 in Figure 2) and the printed circuit board (330 in Figure 2) via the pad portion (PAD in Figure 2) to the pixel driving circuit (PD) of the display area (AA).

[0136] According to one embodiment of this specification, a plurality of second connection wires 122 are electrically connected to a plurality of pad electrodes (PE) and can receive signals from a flexible circuit board (310 in Figure 2) and a printed circuit board (330 in Figure 2).

[0137] According to one embodiment of this specification, a plurality of second connection wires 122 can be configured to extend from the pad portion (PAD in Figure 2) toward the display area (AA) and transmit signals to the wiring in the display area (AA). In this case, the plurality of second connection wires 122 can function as link wires (LL in Figure 3).

[0138] The multiple second connection wires 122 may include a second-first connection wire 122a, a second-second connection wire 122b, a second-third connection wire 122c, and a second-fourth connection wire 122d.

[0139] Multiple second-first connection lines 122a can be arranged on the second protective layer 113b. Multiple second-first connection lines 122a can extend from the second non-display area (NA2) to the bending area (BA) and the first non-display area (NA1). Multiple second-first connection lines 122a can be configured to transmit signals transmitted from the flexible circuit board (310 in Figure 2) and the printed circuit board (330 in Figure 2) via the pad portion (PAD in Figure 2) to the pixel driving circuit (PD) of the display area (AA).

[0140] According to one embodiment of this specification, a plurality of second-first connection wires 122a can be electrically connected to pad electrodes (PE) and pixel driving circuits (PD), respectively. For example, the second-first connection wires 122a can extend into the display area (AA) and be directly connected to the pixel driving circuits (PD) within the display area (AA), or they can be electrically connected to the pixel driving circuits (PD) via other additional wires or electrodes. Furthermore, the second-first connection wires 122a can be electrically connected to the pad electrodes (PE) in the second non-display area (NA2) via the second-second connection wires 122b, second-third connection wires 122c, and second-fourth connection wires 122d. Thus, the pixel driving circuits (PD) and pad electrodes (PE) can be electrically connected by the second connection wires 122.

[0141] Multiple second-second connection lines 122b can be placed on the third protective layer 114. Multiple second-second connection lines 122b can be placed in the second non-display area (NA2). The second-second connection lines 122b can be electrically connected to the second-first connection lines 122a via contact holes in the third protective layer 114. Therefore, signals from the flexible circuit board (310 in Figure 2) and the printed circuit board (330 in Figure 2) can be transmitted to the second-first connection lines 122a via the second-second connection lines 122b.

[0142] Second- and third connection wirings 122c can be placed on the first insulating layer 115a. The second- and third connection wirings 122c can be placed in the second non-display area (NA2). The second- and third connection wirings 122c can be electrically connected to the second- and second-second connection wirings 122b via the contact holes in the first insulating layer 115a. Therefore, signals from the flexible circuit board (170 in Figure 2) and the printed circuit board (160 in Figure 2) can be transmitted to the second- and first-second connection wirings 122a via the second- and third connection wirings 122c and the second- and second-second connection wirings 122b.

[0143] Second-fourth connecting wires 122d can be placed on the second insulating layer 115b. The second-fourth connecting wires 122d can be placed in the second non-display area (NA2). The second-fourth connecting wires 122d can be electrically connected to the second-third connecting wires 122c via the contact holes in the second insulating layer 115b. The second-fourth connecting wires 122d can be electrically connected to the pad electrodes (PE) via the contact holes in the third insulating layer 115c.

[0144] According to one embodiment of this specification, signals from a flexible circuit board (310 in Figure 2) and a printed circuit board (330 in Figure 2) can be transmitted to the second-first connection wire 122a via the second-fourth connection wire 122d, the second-third connection wire 122c, and the second-second connection wire 122b.

[0145] The multiple first connecting wires 121 and the multiple second connecting wires 122 can be formed from any one of a conductive material with excellent flexibility or a variety of conductive materials used in the display area (AA). In one embodiment of this specification, the second connecting wire 122, which is partially located in the bending area (BA), can be made of a conductive material with excellent flexibility, such as gold (Au), silver (Ag), or aluminum (Al), but the embodiments of this specification are not limited thereto. In other embodiments of this specification, the multiple first connecting wires 121 and the multiple second connecting wires 122 can be made of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys of silver (Ag) and magnesium (Mg), or alloys thereof, but the embodiments of this specification are not limited thereto.

[0146] A third insulating layer 115c can be placed on a plurality of first connecting wires 121 and a plurality of second connecting wires 122. The third insulating layer 115c can be placed in the remaining areas excluding the bending region (BA), but the embodiments herein are not limited thereto. The third insulating layer 115c can be placed in the display region (AA), the first non-display region (NA1), and the second non-display region (NA2). At least a portion of the third insulating layer 115c in the bending region (BA) can be removed. The third insulating layer 115c can be made of an organic insulating material, but the embodiments herein are not limited thereto. For example, the third insulating layer 115c can be made of a photoresist, polyimide (PI), or photoacrylic material, but the embodiments herein are not limited thereto.

[0147] Multiple banks (BNK) can be arranged on the third insulating layer 115c in the display area (AA). Multiple banks (BNK) can be arranged so as to overlap each of multiple subpixels. Multiple banks (BNK) may not be arranged in the first non-display area (NA1), the second non-display area (NA2), and the bending area (BA). One or more light-emitting elements (ED) of the same type can be arranged on top of each of the multiple banks (BNK).

[0148] Multiple signal lines (TLs) can be placed on the third insulating layer 115c in the display area (AA). Multiple signal lines (TLs) can be placed in the area between multiple banks (BNK). For example, multiple signal lines (TLs) can be placed adjacent to any one of the multiple banks (BNK). Each of the multiple signal lines (TLs) can be electrically connected to a first connection line 121, for example, the first to fourth connection lines 121d.

[0149] Multiple contact electrodes (CCEs) can be arranged on the third insulating layer 115c in the display area (AA). The multiple contact electrodes (CCEs) can supply cathode voltage from the pixel driving circuit (PD) to the second electrode (CE2). Each of the multiple contact electrodes (CCEs) can be electrically connected to the first connection wiring 121, for example, the first to fourth connection wirings 121d.

[0150] A first electrode (CE1) can be placed on the bank (BNK). For example, the first electrode (CE1) can be placed extending from an adjacent signal line (TL) toward the top of the bank (BNK). The first electrode (CE1) can be placed on the top surface and the side surface of the bank (BNK). For example, the first electrode (CE1) can be placed extending from a signal line (TL) on the third insulating layer 115c toward the side surface and the top surface of the bank (BNK). The first electrode (CE1) may be a contact electrode. The first electrode (CE1) can be formed integrally with the signal line (TL).

[0151] Referring to Figure 9, the first electrode (CE1) can be composed of multiple conductive layers. For example, the first electrode (CE1) may include a first conductive layer (CE1a), a second conductive layer (CE1b), a third conductive layer (CE1c), and a fourth conductive layer (CE1d), but the embodiments herein are not limited thereto.

[0152] The first conductive layer (CE1a) can be placed on a bank (BNK). The second conductive layer (CE1b) can be placed on the first conductive layer (CE1a). The third conductive layer (CE1c) can be placed on the second conductive layer (CE1b). The fourth conductive layer (CE1d) can be placed on the third conductive layer (CE1c). For example, each of the first conductive layer (CE1a), the second conductive layer (CE1b), the third conductive layer (CE1c), and the fourth conductive layer (CE1d) can be composed of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but the examples herein are not limited thereto.

[0153] According to one embodiment of this specification, among the plurality of conductive layers constituting the first electrode (CE1), some conductive layers with good reflectivity can be composed of alignment keys and / or reflectors for aligning the light-emitting element (ED). For example, among the plurality of conductive layers constituting the first electrode (CE1), the second conductive layer (CE1b) may include a reflective material. For example, the second conductive layer (CE1b) may include aluminum (Al), but the embodiments of this specification are not limited thereto. Thus, the second conductive layer (CE1b) may be composed of a reflector. Furthermore, the high reflectivity of the second conductive layer (CE1b) may facilitate identification in the manufacturing process, so that the position or transfer position of the light-emitting element (ED) can be aligned with respect to the second conductive layer (CE1b).

[0154] According to one embodiment of this specification, in order to form a reflector for the second conductive layer (CE1b), the third conductive layer (CE1c) and the fourth conductive layer (CE1d) covering the second conductive layer (CE1b) can be partially removed or etched. For example, portions of the third conductive layer (CE1c) and the fourth conductive layer (CE1d) placed on a bank (BNK) can be removed or etched to expose the upper surface of the second conductive layer (CE1b). For example, the central portion and edges (or ends) of the third conductive layer (CE1c) and the fourth conductive layer (CE1d) where the solder pattern (SDP) is placed may not be removed, and the remaining portions can be removed. For example, the edges (or ends) and central portions of the third conductive layer (CE1c) made of titanium (Ti) and the fourth conductive layer (CE1d) made of indium tin oxide (ITO) may not be removed or etched. This makes it possible to prevent or minimize corrosion of other conductive layers constituting the first electrode (CE1) by the etching solution (e.g., TMAH (Tetra Methyl Ammonium Hydroxide) solution) used in the masking (or patterning) process of the first electrode (CE1).

[0155] According to one embodiment of this specification, the first conductive layer (CE1a) and the third conductive layer (CE1c) may include titanium (Ti) or molybdenum (Mo). The second conductive layer (CE1b) may include aluminum (Al). The fourth conductive layer (CE1d) may include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) that has good adhesion to the solder pattern (SDP) and is corrosion-resistant and acid-resistant. However, the embodiments of this specification are not limited thereto.

[0156] The first conductive layer (CE1a), the second conductive layer (CE1b), the third conductive layer (CE1c), and the fourth conductive layer (CE1d) can be sequentially deposited and then patterned by photolithography and etching processes, but the examples herein are not limited to these.

[0157] As can be seen from Figures 8 and 9, according to one embodiment of this specification, the signal wiring (TL), contact electrode (CCE), and pad electrode (PE), which are arranged on the same layer as the first electrode (CE1), can be made of a multilayer structure of a conductive material, but the embodiments of this specification are not limited thereto. For example, the signal wiring (TL), contact electrode (CCE), and pad electrode (PE) can consist of a multilayer structure of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of this specification are not limited thereto.

[0158] According to one embodiment of this specification, a solder pattern (SDP) can be placed on a first electrode (CE1) in each of a plurality of subpixels. The solder pattern (SDP) can be used to bond an emitting element (ED) to the first electrode (CE1). The first electrode (CE1) and the emitting element (ED) can be electrically connected via a eutectic junction using the solder pattern (SDP), but the embodiments of this specification are not limited thereto. For example, if the solder pattern (SDP) is made of indium (In) and the anode electrode 134 of the emitting element (ED) is made of gold (Au), the solder pattern (SDP) and the anode electrode 134 can be bonded by applying heat and pressure during the transfer process of the emitting element (ED). The emitting element (ED) can be bonded to the solder pattern (SDP) and the first electrode (CE1) via a eutectic junction without the need for a separate adhesive. For example, the solder pattern (SDP) can be made of indium (In), tin (Sn), or an alloy thereof, but the embodiments of this specification are not limited thereto. For example, a solder pattern (SDP) may be a contact pattern, bonding pad, or joint pad, but the examples herein are not limited to these.

[0159] According to one embodiment of this specification, a passivation layer 116 can be placed on the wiring layer. For example, the passivation layer 116 can be configured to cover the wiring layer in a display area (AA). For example, the passivation layer 116 can be placed on a plurality of signal lines (TL), a plurality of first electrodes (CE1), a plurality of contact electrodes (CCE), and a third insulating layer 115c. For example, the passivation layer 116 can be placed in a display area (AA), a first non-display area (NA1), and a second non-display area (NA2). At least a portion of the passivation layer 116 placed in a bending area (BA) can be removed. A portion of the passivation layer 116 covering a plurality of pad electrodes (PE) in the second non-display area (NA2) can be removed. A portion of the passivation layer 116 covering a plurality of contact electrodes (CCE) in the display area (AA) can be removed. A passivation layer 116 covering a solder pattern (SDP) in the display area (AA) can be removed. The passivation layer 116 can cover the first electrode (CE1). The passivation layer 116 can cover a portion of the upper surface of the exposed second conductive layer (CE1b).

[0160] The passivation layer 116 is positioned to cover the remaining areas while exposing at least a portion of the multiple pad electrodes (PEs), multiple contact electrodes (CCEs), and solder patterns (SDPs), thereby reducing the penetration of moisture or impurities into the light-emitting element (ED). For example, the passivation layer 116 may consist of a single or multiple layer of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments herein are not limited thereto. For example, the passivation layer 116 may be a protective layer, an insulating layer, or an inorganic insulating layer, but the embodiments herein are not limited thereto. For example, the passivation layer 116 may include holes for exposing solder patterns (SDPs) and holes for exposing contact electrodes (CCEs).

[0161] In each of the multiple subpixels, light-emitting elements (EDs) can be placed on the solder pattern (SDP). A first light-emitting element 130 can be placed in the first subpixel (SP1). A second light-emitting element 140 can be placed in the second subpixel (SP2). A third light-emitting element 150 can be placed in the third subpixel (SP3).

[0162] Light-emitting elements (EDs) can be formed on a silicon wafer by methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but the examples herein are not limited to these methods.

[0163] Referring to Figure 9, the first light-emitting element 130 may include an anode electrode 134, a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, a cathode electrode 135, and a sealing film 136, but the embodiments herein are not limited thereto. For example, the sealing film 136 may not be included in the first light-emitting element 130.

[0164] The first semiconductor layer 131 can be placed on a solder pattern (SDP). The second semiconductor layer 133 can be placed on the first semiconductor layer 131.

[0165] According to one embodiment of this specification, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be embodied in a compound semiconductor such as a III-V or II-VI semiconductor, and can be doped with impurities (or dopants). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a semiconductor layer doped with an n-type impurity, and the other may be a semiconductor layer doped with a p-type impurity, but the embodiments of this specification are not limited thereto. For example, at least one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a layer doped with n-type or p-type impurities in a substance such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs), but the examples herein are not limited thereto. For example, n-type impurities may be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but the examples herein are not limited thereto. For example, p-type impurities may include magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but the examples herein are not limited to these.

[0166] According to one embodiment of this specification, the first semiconductor layer 131 and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities and a nitride semiconductor containing p-type impurities, respectively, but the embodiments of this specification are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor containing p-type impurities and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities, but the embodiments of this specification are not limited thereto.

[0167] The active layer 132 can be positioned (or interposed) between the first semiconductor layer 131 and the second semiconductor layer 133. The active layer 132 can emit light by receiving holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. For example, the active layer 132 can be composed of one of the following: a single well structure, a multiple well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum beam structure, but the examples herein are not limited thereto. For example, the active layer 132 can be composed of indium gallium nitride (InGaN) or gallium nitride (GaN), but the examples herein are not limited thereto.

[0168] According to other embodiments of this specification, the active layer 132 may include a multiple quantum well (MQW) structure having a well layer and a barrier layer with a band gap higher than that of the well layer. For example, the active layer 132 may include an indium gallium nitride (InGaN) layer as the well layer and an aluminum gallium nitride (AlGaN) layer as the barrier layer, but the embodiments of this specification are not limited thereto.

[0169] The anode electrode 134 can be positioned (or interposed) between the first semiconductor layer 131 and the solder pattern (SDP). For example, the anode electrode 134 can be configured to electrically connect the first semiconductor layer 131 and the first electrode (CE1). The anode voltage output from the pixel drive circuit (PD) can be applied to the first semiconductor layer 131 via the signal wiring (TL), the first electrode (CE1), and the anode electrode 134. For example, the anode electrode 134 can be made of a conductive material capable of eutectic bonding with the solder pattern (SDP), but the embodiments herein are not limited thereto. For example, the anode electrode 134 can be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or alloys thereof, but the examples herein are not limited to these.

[0170] The cathode electrode 135 can be placed on the second semiconductor layer 133. For example, the cathode electrode 135 can be configured to electrically connect the second semiconductor layer 133 and the second electrode (CE2). The cathode voltage output from the pixel drive circuit (PD) can be applied to the second semiconductor layer 133 via the contact electrode (CCE), the second electrode (CE2), and the cathode electrode 135. The cathode electrode 135 can be made of a transparent conductive material so that the light emitted from the light-emitting element (ED) is directed towards the top of the light-emitting element (ED), but the embodiments herein are not limited thereto. For example, the cathode electrode 135 can be made of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but the embodiments herein are not limited thereto.

[0171] The encapsulation film 136 can be placed on at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the encapsulation film 136 can surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0172] The encapsulation film 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 can be placed on the side surfaces of the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133.

[0173] The sealing film 136 can be placed on at least a portion of the anode electrode 134 and the cathode electrode 135, for example, on the edge portion (or margin or one side) of the anode electrode 134 and the edge portion (or margin or one side) of the cathode electrode 135. At least a portion of the anode electrode 134 can be exposed without being covered by the sealing film 136 to connect the anode electrode 134 to a solder pattern (SDP). For example, at least a portion of the cathode electrode 135 can be exposed without being covered by the sealing film 136 to connect the cathode electrode 135 to a second electrode (CE2). For example, the sealing film 136 can be made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but the embodiments herein are not limited thereto.

[0174] According to other embodiments of this specification, the encapsulation film 136 may have a structure in which a reflective material is dispersed in a resin layer, but the embodiments of this specification are not limited thereto. For example, the encapsulation film 136 can be made of reflectors of various structures, but the embodiments of this specification are not limited thereto. The encapsulation film 136 can reflect light emitted from the active layer 132 upwards, thereby improving the light extraction efficiency. For example, the encapsulation film 136 may be a reflective layer, but the embodiments of this specification are not limited thereto.

[0175] In one embodiment of this specification, the light-emitting element (ED) was described as having a vertical structure, but the embodiments of this specification are not limited thereto. For example, the light-emitting element (ED) may have a lateral structure or a flip-chip structure.

[0176] The first light-emitting element 130 has been described with reference to Figure 9, but the second light-emitting element 140 and the third light-emitting element 150 can have substantially the same structure as the first light-emitting element 130. For example, the second light-emitting element 140 and the third light-emitting element 150 include substantially the same configuration as the first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode electrode 134, cathode electrode 135, and sealing film 136 of the first light-emitting element 130, so a redundant explanation of these will be omitted.

[0177] As can be seen from Figures 8 and 9, the display device 1000 according to one embodiment of this specification may further include optical layers (or light diffusing layers) 117a, 117b, and 117c.

[0178] The optical layers 117a and 117b can be configured to surround multiple light-emitting elements (EDs) in the display area (AA). For example, the optical layers 117a and 117b can be configured to cover multiple light-emitting elements (EDs) in the display area (AA).

[0179] According to one embodiment of this specification, a first optical layer 117a surrounding a plurality of light-emitting elements (EDs) can be arranged in a display area (AA). For example, the first optical layer 117a can be arranged to cover the sides of a plurality of light-emitting elements (EDs) and the sides of a plurality of banks (BNKs) in the area of ​​a plurality of subpixels. For example, the first optical layer 117a can cover a portion of the passivation layer 116. For example, the first optical layer 117a can cover the space between the second electrode (CE2), a portion of the passivation layer 116, and the plurality of light-emitting elements (EDs). The first optical layer 117a can be arranged or cover the space between a plurality of light-emitting elements (EDs) contained in a single pixel (PX), and between a plurality of banks (BNKs). For example, the first optical layer 117a can extend along the row direction (or first direction (X)) of the display area (AA), and a plurality of first optical layers 117a can be spaced apart along the column direction (or second direction (Y)) of the display area (AA). For example, the first optical layer 117a can be positioned between the passivation layer 116 and the second electrode (CE2) to surround the sides of the light-emitting element (ED) and the bank (BNK), but the embodiments herein are not limited thereto. For example, the first optical layer 117a may be a diffusion layer or a sidewall diffusion layer, but the embodiments herein are not limited thereto.

[0180] The first optical layer 117a may include an organic insulating material in which fine particles 117ap are dispersed, but the examples herein are not limited thereto. For example, the first optical layer 117a may consist of a siloxane in which fine metal particles 117ap, such as titanium dioxide (TiO2) particles, are dispersed, but the examples herein are not limited thereto. Light from multiple light-emitting elements (EDs) can be scattered by the fine particles 117ap dispersed in the first optical layer 117a and emitted outside the display panel 100. This allows the first optical layer 117a to improve the extraction efficiency of light emitted from the multiple light-emitting elements (EDs).

[0181] According to one embodiment of this specification, the first optical layer 117a may be placed in each of a plurality of pixels (PX), or it may be placed together in some of the pixels (PX) arranged in the same row of the display area (AA), but the embodiments of this specification are not limited thereto. For example, the first optical layer 117a may be placed in each of a plurality of pixels (PX), or one first optical layer 117a may be arranged so as to share a plurality of pixels (PX). In another embodiment of this specification, each of a plurality of subpixels may separately include the first optical layer 117a, but the embodiments of this specification are not limited thereto.

[0182] According to one embodiment of this specification, a second optical layer 117b can be placed on the passivation layer 116 of the display area (AA). For example, the second optical layer 117b can be placed so as to surround the first optical layer 117a. For example, the second optical layer 117b can be in contact with the side surface of the first optical layer 117a. For example, the second optical layer 117b can be placed in a region (or non-emitting region) between multiple pixels (PX), but the embodiments of this specification are not limited thereto. For example, the second optical layer 117b may be a diffuse layer, a diffuse layer window, or a window diffuse layer, but the embodiments of this specification are not limited thereto.

[0183] The second optical layer 117b may be composed of an organic insulating material, but the examples herein are not limited thereto. The second optical layer 117b may be composed of the same material as the first optical layer 117a, but the examples herein are not limited thereto. For example, the first optical layer 117a may contain fine particles, while the second optical layer 117b may not contain fine particles. For example, the second optical layer 117b may be composed of a siloxane, but the examples herein are not limited thereto.

[0184] According to one embodiment of this specification, the thickness of the first optical layer 117a may be thinner than the thickness of the second optical layer 117b, but the embodiments of this specification are not limited thereto. For example, the upper surface of the second optical layer 117b may be a flat surface, and the upper surface of the first optical layer 117a may be a concave curved surface. Therefore, when viewed in plan, the region where the first optical layer 117a is located may include a recess that is recessed inward from the upper surface of the second optical layer 117b.

[0185] According to one embodiment of this specification, a second electrode (CE2) can be placed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode (CE2) can be electrically connected to a plurality of contact electrodes (CCE) via a contact hole in the second optical layer 117b. For example, the second electrode (CE2) can be placed on a plurality of light-emitting elements (EDs). For example, the second electrode (CE2) may include, but is not limited to, a transparent conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO). For example, the second electrode (CE2) can be in contact with or directly in contact with the cathode electrode 135. For example, the second electrode (CE2) can be superimposed on the entirety of the first optical layer 117a or on a portion of the second optical layer 117b. For example, the second electrode (CE2) can be electrically connected to the contact electrodes (CCE) via the second optical layer 117b. For example, the second electrode (CE2) can be electrically connected to the contact electrode (CCE) via a contact hole formed in the second optical layer 117b.

[0186] The second electrode (CE2) can be continuously extended along the row direction (or first direction (X)) of the substrate 110. This allows the second electrode (CE2) to be commonly connected to multiple light-emitting elements (EDs) located in each of multiple pixels (PX) arranged along the row direction (or first direction (X)) of the substrate 110.

[0187] According to one embodiment of this specification, the second electrode (CE2) can be continuously extended over the first optical layer 117a, the second optical layer 117b, and the light-emitting element (ED). The region on which the first optical layer 117a is located may include a recess that is recessed inward from the upper surface of the second optical layer 117b. This allows the first portion of the second electrode (CE2) located on the first optical layer 117a to be positioned along the recess, and thus lower than the second portion of the second electrode (CE2) located on the second optical layer 117b. For example, the thickness of the first optical layer 117a may decrease from the second optical layer 117b towards the center of the first optical layer 117a due to the electrical connection (or contact) between the first to third light-emitting elements 130, 140, and 150 and the second electrode (CE2).

[0188] A third optical layer 117c can be placed on the second electrode (CE2). The third optical layer 117c can be placed so as to overlap the multiple light-emitting elements (EDs) and the first optical layer 117a. For example, the third optical layer 117c can be placed so as not to overlap the second optical layer 117b. Since the third optical layer 117c is placed on top of the second electrode (CE2) and the multiple light-emitting elements (EDs), it can improve unevenness that may occur in some of the multiple light-emitting elements (EDs). For example, when transferring multiple light-emitting elements (EDs) onto the substrate 110 of the display panel 100, areas where the spacing between the multiple light-emitting elements (EDs) is not uniform may occur due to process deviations, etc. If the spacing between the multiple light-emitting elements (EDs) is uneven, the light-emitting areas of each of the multiple light-emitting elements (EDs) may be formed unevenly, and this may be visible to the user as unevenness. As a result, by further configuring a third optical layer 117c that uniformly diffuses light over the multiple light-emitting elements (EDs), it is possible to reduce or prevent the light emitted from some of the light-emitting elements (EDs) from appearing uneven. Therefore, since the light emitted from the multiple light-emitting elements (EDs) is uniformly diffused by the third optical layer 117c and extracted to the outside of the display panel 100, the brightness uniformity of the display device can be improved.

[0189] The third optical layer 117c may be composed of an organic insulating material in which fine particles 117cp are dispersed, but the examples herein are not limited thereto. For example, the third optical layer 117c may be composed of a siloxane in which fine metal particles 117cp, such as titanium dioxide (TiO2) particles, are dispersed, but the examples herein are not limited thereto. For example, the third optical layer 117c may be composed of the same material as the first optical layer 117a, but the examples herein are not limited thereto. For example, the third optical layer 117c may be a diffusion layer or a top diffusion layer, but the examples herein are not limited thereto.

[0190] According to one embodiment of this specification, light from multiple light-emitting elements (EDs) can be scattered by fine particles 117cp dispersed in a third optical layer 117c and emitted to the outside of the display panel 100. The third optical layer 117c uniformly mixes (or diffuses) the light emitted from the multiple light-emitting elements (EDs), further improving the brightness uniformity of the display device. Furthermore, the light extraction efficiency of the display device can be improved by the light scattered by the fine particles 117cp, thereby enabling the display device to be driven with low power.

[0191] A black matrix (BM) can be placed on the second electrode (CE2), the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c in the display area (AA). For example, the black matrix (BM) can fill the contact holes of the second optical layer 117b. Since the black matrix (BM) is configured to cover the display area (AA), it can reduce the mixing of light and external light reflection of multiple subpixels. For example, since the black matrix (BM) is also placed in the contact holes where the second electrode (CE2) and the contact electrode (CCE) are connected, it can prevent light leakage between multiple adjacent subpixels. For example, the black matrix (BM) can be made of an opaque material, but the examples herein are not limited thereto. For example, the black matrix (BM) can be an organic insulating material to which a black pigment or black dye has been added, but the examples herein are not limited thereto.

[0192] Referring to Figure 8, the display device 1000 according to one embodiment of this specification may further include a cover layer 118.

[0193] The cover layer 118 can be configured to cover the display area (AA). For example, the cover layer 118 can be placed on the black matrix (BM) in the display area (AA). The cover layer 118 can be configured to protect multiple light-emitting elements (EDs). For example, a configuration between the substrate 110 and the cover layer 118 can be protected by the substrate 110 and the cover layer 118. For example, the cover layer 118 can be made of an organic insulating material, but the examples herein are not limited thereto. For example, the cover layer 118 can be made of a photoresist, polyimide (PI), or photoacrylic material, but the examples herein are not limited thereto. For example, the cover layer 118 can be an overcoat layer or an insulating layer, but the examples herein are not limited thereto.

[0194] A polarizing layer 180 can be placed on the cover layer 118 via a first adhesive layer 181. A cover member 120 can be placed on the polarizing layer 180 via a second adhesive layer 185. For example, a touch panel 200 can be placed (or interposed) between the polarizing layer 180 and the second adhesive layer 185. The polarizing layer 180 can be connected (or attached) to the back surface of the touch panel 200 via a third adhesive layer 187. The touch panel 200 can be connected (or attached) to the back surface of the cover member 120 via the second adhesive layer 185. For example, each of the first adhesive layer 181, the second adhesive layer 185, and the third adhesive layer 187 may include, but the embodiments herein are not limited thereto, optically cleared adhesive (OCA), optically cleared resin (OCR), or pressure-sensitive adhesive (PSA).

[0195] According to one embodiment of this specification, a plurality of pad electrodes (PEs) can be arranged on the third insulating layer 115c in the second non-display area (NA2). For example, at least a portion of the plurality of pad electrodes (PEs) can be exposed without being covered by the passivation layer 116. For example, the plurality of pad electrodes (PEs) can be electrically connected to the second-to-fourth connecting wiring 122d via contact holes in the third insulating layer 115c.

[0196] An adhesive film (ACF) can be placed on multiple pad electrodes (PE). The adhesive film (ACF) may be an adhesive layer in which conductive balls are dispersed in an insulating material, but the embodiments herein are not limited thereto. When heat and / or pressure is applied to the adhesive film (ACF), the conductive balls can electrically connect in the heated and / or pressured portion and thus have conductive properties. The adhesive film (ACF) can be placed between the multiple pad electrodes (PE) and the flexible circuit board 170 to adhere or bond the flexible circuit board 310 to the multiple pad electrodes (PE). For example, the adhesive film (ACF) may be a conductive adhesive member, a conductive adhesive film, or an anisotropic conductive film, but the embodiments herein are not limited thereto.

[0197] A flexible circuit board 310 can be placed on an adhesive film (ACF). The flexible circuit board 310 can be electrically connected to a plurality of pad electrodes (PE) via the adhesive film (ACF). Therefore, signals output from the flexible circuit board 310 and the printed circuit board 330 can be transmitted to the pixel driving circuit (PD) in the display area (AA) via the wiring layer. For example, a signal output from the printed circuit board 330 can be transmitted to the pixel driving circuit (PD) in the display area (AA) via the flexible circuit board 310, the plurality of pad electrodes (PE), the second-to-fourth connection wiring 122d, the second-to-third connection wiring 122c, the second-to-second connection wiring 122b, and the second-to-first connection wiring 122a.

[0198] Figure 10 shows the drive timing of the display panel 100 and the touch panel 200 according to the embodiments of this specification.

[0199] Referring to Figure 10, the display device can be driven by a display period (Display_Tn) and a touch period (Touch_Tn). The display period (Display_Tn) is the period during which the display panel 100 is driven, and the touch period (Touch_Tn) may be the period during which the touch panel 200 is driven.

[0200] Here, the display period (Display_Tn) and the touch period (Touch_Tn) can be the same. That is, the display panel 100 and the touch panel 200 can be driven simultaneously. As a result, the display device can display the screen via the display panel 100 while simultaneously recognizing the user's touch via the touch panel 200.

[0201] Figure 11 is an enlarged view of the display device according to the embodiment of this specification. Figure 12 is a plan view of the display device according to the embodiment of this specification.

[0202] Referring to Figure 11, the touch panel 200 can include multiple touch electrodes (TEs). The multiple touch electrodes (TEs) can be provided on the second electrode (CE2).

[0203] Referring to Figure 12, which shows the second electrode (CE2) of the display panel 100 and the multiple touch electrodes (TE) of the touch panel 200. As described above, the second electrode (CE2) has a width corresponding to one row (or horizontal line) and can extend along the column direction (or first direction (X)).

[0204] Multiple touch electrodes (TEs) can be superimposed on a second electrode (CE2). Figure 12 shows, but is not limited to, a configuration in which each of the multiple second electrodes (CE2) is equipped with n multiple touch electrodes (TEs).

[0205] As described above, the multiple touch electrodes (TE) may include an electrode structure corresponding to a Mutual-Capacitance Type, in which multiple touch driving electrodes and multiple touch sensing electrodes intersect. Alternatively, the multiple touch electrodes (TE) may include an electrode structure corresponding to a Self-Capacitance Type, consisting only of multiple touch sensing electrodes. Figure 12 shows an electrode structure corresponding to a Self-Capacitance Type.

[0206] The touch integrated circuit 390 can supply touch drive signals to each of the multiple touch electrodes (TEs) via multiple channels (CH).

[0207] Figure 13 is a block diagram of a touch integrated circuit 390 according to one embodiment of this specification.

[0208] Referring to Figure 13, the touch integrated circuit 390 may include a first signal generation unit 391, a second signal generation unit 392, and a signal selection unit 393.

[0209] The first signal generation unit 391 may include a buffer (BUF) and a first level shifter (LS1). The first signal generation unit 391 can adjust the amplitude of the touch drive signal (V_touch).

[0210] Specifically, in the first signal generation unit 391, the touch drive signal (V_touch) can be applied to the buffer (BUF). Here, the touch drive signal (V_touch) may be a PWM signal.

[0211] The touch drive signal (V_touch), stabilized via a buffer (BUF), can be applied to a first level shifter (LS1). The first level shifter (LS1) can adjust the amplitude of the touch drive signal (V_touch). Therefore, the touch drive signal (V_touch) corrected by the first level shifter (LS1) can have the amplitude required for stable driving of the touch panel 200. In conclusion, the first level shifter (LS1) can output a touch drive signal (V_touch) with adjusted amplitude.

[0212] The second signal generation unit 392 may include an inverter (INV) and a second level shifter (LS2). The second signal generation unit 392 can receive a touch drive signal (V_touch) and output a touch drive compensation signal (V_touch_com). In other words, the second signal generation unit 392 can receive the same signals as the first signal generation unit 391.

[0213] Specifically, the second signal generation unit 392 can apply a touch drive signal (V_touch) to the inverter (INV). In this case, the touch drive signal (V_touch) may be a PWM signal. The inverter (INV) can change the phase of the touch drive signal (V_touch). That is, the signal output from the inverter (INV) may be an inverse phase signal (V_touch_inv) of the touch drive signal.

[0214] The inverse phase signal (V_touch_inv) of the touch drive signal output from the inverter (INV) can be applied to the second level shifter (LS2). The second level shifter (LS2) can adjust the amplitude of the inverse phase signal (V_touch_inv) of the touch drive signal.

[0215] In conclusion, the second level shifter (LS2) can output an inverse phase signal (V_touch_inv) of the amplitude-adjusted touch drive signal. Furthermore, the amplitude of the inverse phase signal (V_touch_inv) output from the second level shifter (LS2) may be the same as the amplitude of the touch drive signal (V_touch) output from the second level shifter (LS2). Here, the inverse phase signal (V_touch_inv) of the touch drive signal can be explicitly expressed as a touch drive compensation signal (V_touch_com).

[0216] The signal selection unit 393 may include multiple sensing units (SENCE), multiple demultiplexers (DMUX), and multiple compensation switches (SW). The signal selection unit 393 can select one of the touch drive signal (V_touch) and the touch drive compensation signal (V_touch_com) and output it to each channel (CH).

[0217] Each of the multiple sensing units (SENCE) can apply a control signal to a demultiplexer (DMUX). For example, the multiple sensing units (SENCE) can distinguish between touch electrodes (TE) that are sensing the user's touch and touch electrodes (TE) that are not sensing the user's touch. The multiple sensing units (SENCE) can generate a control signal according to the sensing information of the touch electrodes (TE). According to the sensing information of the touch electrodes (TE), each of the multiple sensing units (SENCE) can drive the connected demultiplexer (DMUX).

[0218] Each of the multiple demultiplexers (DMUX) can be driven according to the control signal of the sensing unit (SENCE). Each of the multiple demultiplexers (DMUX) can have a touch drive signal (V_touch) applied to it. Depending on the control signal of the sensing unit (SENCE), each of the multiple demultiplexers (DMUX) may or may not output the touch drive signal (V_touch) to multiple output lines (L_out).

[0219] For example, each of the multiple demultiplexers (DMUX) may output touch drive signals (V_touch) to some of its multiple output lines (L_out) and not to the remaining output lines (L_out).

[0220] Figure 13 shows, but is not limited to, a single demultiplexer (DMUX) connected to three output lines (L_out). For example, a single demultiplexer (DMUX) can be connected to more than three output lines (L_out).

[0221] Each of the multiple compensation switches (SW) can be connected between the compensation line (L_com) and the output line (L_out). That is, one end of each of the multiple compensation switches (SW) can be connected to the compensation line (L_com), and the other end of each of the multiple compensation switches (SW) can be connected to each of the multiple output lines (L_out).

[0222] The compensation line (L_com) may be a wire connected to the output terminal of the second signal generation unit 392. That is, the compensation line (L_com) can transmit the touch drive compensation signal (V_touch_com) generated by the second signal generation unit 392 to each of the multiple compensation switches (SW). As a result, the multiple compensation switches (SW) may or may not transmit the touch drive compensation signal (V_touch_com) applied by the second signal generation unit 392 to the output line (L_out).

[0223] For example, among multiple compensation switches (SW), some compensation switches (SW) may transmit the touch drive compensation signal (V_touch_com) to the output line (L_out), while the remaining compensation switches (SW) may not transmit the touch drive compensation signal (V_touch_com) to the output line (L_out).

[0224] Referring to Figure 13, the multiple compensation switches (SW) can include multiple first compensation switches (SW1), multiple second compensation switches (SW2), and multiple third compensation switches (SW3). Each of the multiple first compensation switches (SW1) can be connected between the compensation line (L_com) and the first output line (L_out1). Each of the multiple second compensation switches (SW2) can be connected between the compensation line (L_com) and the second output line (L_out2). Each of the multiple third compensation switches (SW3) can be connected between the compensation line (L_com) and the third output line (L_out3).

[0225] In conclusion, each of the multiple output lines (L_out) can transmit a touch drive signal (V_touch) or a touch drive compensation signal (V_touch_com) to each of the multiple channels (CH).

[0226] Figure 14 is a block diagram of the signal selection unit 393 of a touch integrated circuit 390 according to one embodiment of this specification.

[0227] Referring to Figure 14, a demultiplexer (DMUX) and the first to third compensation switches (SW1 to SW3) are shown. The demultiplexer (DMUX) may contain multiple internal switches (MSW). The internal switches (MSW) can be connected between the input terminal and the output line (L_out) of the demultiplexer (DMUX).

[0228] For example, multiple internal switches (MSWs) may include first to third internal switches (MSW1 to MSW3). The first internal switch (MSW1) can be connected between the input terminal of the demultiplexer (DMUX) and the first output line (L_out1). The second internal switch (MSW2) can be connected between the input terminal of the demultiplexer (DMUX) and the second output line (L_out2). The third internal switch (MSW3) can be connected between the input terminal of the demultiplexer (DMUX) and the third output line (L_out3).

[0229] As described above, the demultiplexer (DMUX) can receive a touch drive signal (V_touch). The internal switch (MSW) of the demultiplexer (DMUX) can be turned on or off in response to the control signal from the sensing unit (SENCE).

[0230] Figure 14 shows a case where the touch electrode (TE) connected to the second output line (L_out2) senses the user's touch, while the touch electrodes (TE) connected to the first and third output lines (L_out1, L_out3) do not sense the user's touch.

[0231] In this case, the control signal from the sensing unit (SENCE) can turn on the second internal switch (MSW2) and turn off the first and third internal switches (MSW1, MSW3). The second internal switch (MSW2) allows the touch drive signal (V_touch) to be applied to the second output line (L_out2). Alternatively, the first and third internal switches (MSW1, MSW3) may prevent the touch drive signal (V_touch) from being applied to the first and third output lines (L_out1, L_out3).

[0232] Each of the multiple compensation switches (SW) can be connected to the same output line (L_out) as the internal switch (MSW). Specifically, the first compensation switch (SW1) and the first internal switch (MSW1) can be electrically connected to the first output line (L_out1). The second compensation switch (SW2) and the second internal switch (MSW2) can be electrically connected to the second output line (L_out2). The third compensation switch (SW3) and the third internal switch (MSW3) can be electrically connected to the third output line (L_out3).

[0233] Each of the multiple compensation switches (SW) can operate in the opposite direction to the connected internal switch (MSW). Specifically, since the second internal switch (MSW2) is in the turned-on state, the second compensation switch (SW2) can be in the turned-off state. Also, since the first and third internal switches (MSW1, MSW3) are in the turned-off state, the first and third compensation switches (SW3) can be in the turned-on state.

[0234] The second compensation switch (SW2) may prevent the touch drive compensation signal (V_touch_com) from being applied to the second output line (L_out2). Alternatively, the first and third internal switches (MSW1, MSW3) can apply the touch drive compensation signal (V_touch_com) to the first and third output lines (L_out1, L_out3).

[0235] In conclusion, the second output line (L_out2) can output a touch drive signal (V_touch), while the first and third output lines (L_out1, L_out3) can output touch drive compensation signals (V_touch_com).

[0236] The touch drive compensation signal (V_touch_com) can compensate for noise caused by the touch drive signal (V_touch). Specifically, when a touch electrode (TE) that receives the touch drive signal (V_touch) performs a sensing function, the touch drive signal (V_touch) can affect a second electrode (CE2) positioned adjacent to the touch electrode (TE). As a result, the touch drive signal (V_touch) can generate a first noise on the second electrode (CE2), causing the voltage applied to the second electrode (CE2) to fluctuate.

[0237] To solve this, the present invention discloses applying a touch drive compensation signal (V_touch_com), which is the inverse phase signal of the touch drive signal (V_touch), to a touch electrode (TE) that does not perform sensing functions. Similar to the touch drive signal (V_touch), the touch drive compensation signal (V_touch_com) may generate a second noise in the second electrode (CE2).

[0238] Here, since the touch drive signal (V_touch) and the touch drive compensation signal (V_touch_com) are out of phase, the first noise and the second noise can also be out of phase. As a result, the first and second noises can cancel each other out. Therefore, the noise from the touch drive signal (V_touch) can be canceled out via the touch drive compensation signal (V_touch_com).

[0239] This prevents voltage fluctuations in the second electrode (CE2) and allows the display panel 100 to be driven stably.

[0240] Figure 15 is a waveform diagram showing an example of a drive pulse according to Figure 14. Specifically, it shows one of the touch drive signals (V_touch) and one of the touch drive compensation signals (V_touch_com).

[0241] Referring to Figure 15, the touch drive signal (V_touch) can include a touch drive pulse (P_touch), where the touch drive pulse (P_touch) may be a sequence of pulses, each having the same amplitude. Similarly, the touch drive compensation signal (V_touch_com) can include a touch drive compensation pulse (P_touch_com), where the touch drive compensation pulse (P_touch_com) may be a sequence of pulses, each having the same amplitude.

[0242] As described above, the touch drive compensation signal (V_touch_com) can be the inverse phase signal of the touch drive signal (V_touch). That is, the phase of the touch drive compensation pulse (P_touch_com) can be the phase of the touch drive pulse (P_touch) delayed by 180°. Also, the touch drive pulse (P_touch) and the touch drive compensation pulse (P_touch_com) can have the same frequency and the same magnitude voltage (V_high).

[0243] Figures 16 to 19 show an apparatus to which the display device 1000 according to the embodiment of this specification is applied.

[0244] Referring to Figures 16 to 19, the display device 1000 according to the embodiments of this specification can be included in a variety of devices or electronic devices. For example, the variety of electronic devices can include a wearable device 1100 as shown in Figure 16, a mobile device 1200 as shown in Figure 17, a notebook 1300 as shown in Figure 18, and a monitor or TV 1400 as shown in Figure 19, but the embodiments of this specification are not limited thereto.

[0245] Each of the wearable device 1100, mobile device 1200, notebook 1300, and monitor or television 1400 may include case portions 1005, 1010, 1015, and 1020 that house the display device 1000 according to the embodiments of this specification described above and show the display panel 100 of the display device 1000.

[0246] For example, the display devices according to the embodiments of this specification can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic organizers, ebooks, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation systems, vehicle display devices, theater display devices, televisions, wallpaper devices, signage devices, game consoles, laptops, monitors, cameras, video cameras, home appliances, and the like.

[0247] This specification, as described above, is not limited by the embodiments and accompanying figures, and it will be apparent to those with ordinary skill in the art to which this specification belongs that various substitutions, modifications, and alterations are possible without departing from the technical matters of this specification. Accordingly, the scope of this specification is indicated by the claims set forth below, and all modified or altered forms derived from the meaning, scope, and equivalent concepts of the claims should be construed as being included within the scope of this specification. [Explanation of Symbols]

[0248] 390: Touch integrated circuit 391: First signal generation section 392:Second signal generation section 393: Signal Selection Section TE: Touch electrode

Claims

1. A touch panel including multiple touch electrodes, Includes a touch integrated circuit that supplies touch drive signals or touch drive compensation signals to the plurality of touch electrodes via a plurality of channels, Of the plurality of touch electrodes, some touch electrodes receive the touch drive signal, and the remaining touch electrodes receive the touch drive compensation signal. A display device in which the touch drive compensation signal and the touch drive signal are out of phase with respect to each other.

2. The aforementioned touch integrated circuit, A first signal generation unit that outputs the touch drive signal, A second signal generation unit that outputs the aforementioned touch drive compensation signal, The display device according to claim 1, further comprising a signal selection unit that outputs the touch drive signal or the touch drive compensation signal to the plurality of channels.

3. The display device according to claim 2, wherein the first signal generation unit includes a first level shifter for adjusting the amplitude of the touch drive signal.

4. The display device according to claim 3, wherein the second signal generation unit generates the touch drive compensation signal by changing the phase of the touch drive signal.

5. The second signal generation unit, An inverter that changes the phase of the touch drive signal, The display device according to claim 3, further comprising a second level shifter that adjusts the amplitude of the signal applied by the inverter and outputs the touch drive compensation signal.

6. The display device according to claim 5, wherein the amplitude of the touch drive signal output from the first level shifter and the amplitude of the touch drive compensation signal output from the second level shifter are the same.

7. The display device according to claim 2, wherein the first signal generation unit supplies the touch drive signal to the signal selection unit, and the second signal generation unit supplies the touch drive compensation signal to the signal selection unit.

8. The signal selection unit, A demultiplexer to which the touch drive signal is applied from the first signal generation unit, A sensing unit that supplies control signals to the demultiplexer, Multiple output lines connected to the aforementioned demultiplexer, The display device according to claim 7, further comprising a plurality of compensation switches that receive the touch drive compensation signal from the second signal generation unit.

9. The display device according to claim 8, wherein the demultiplexer outputs the touch drive signal to some of the multiple output lines and does not output the touch drive signal to the remaining output lines.

10. The second signal generation unit supplies the touch drive compensation signal to each of the multiple compensation switches via the compensation line. The display device according to claim 8, wherein one end of each of the plurality of compensation switches is connected to the compensation line, and the other end of each of the plurality of compensation switches is connected to each of the plurality of output lines.

11. The display device according to claim 8, wherein each of the plurality of compensation switches applies the touch drive compensation signal to some of the output lines among the plurality of output lines, and does not apply the touch drive compensation signal to the remaining output lines.

12. The display device according to claim 8, wherein each of the plurality of output lines outputs only one of the touch drive signal and the touch drive compensation signal.

13. The demultiplexer includes a plurality of internal switches, The display device according to claim 8, wherein one end of each of the plurality of internal switches is connected to the input terminal of the demultiplexer, and the other end of each of the plurality of internal switches is connected to each of the plurality of compensation switches.

14. The display device according to claim 13, wherein the plurality of internal switches are turned on or turned off in response to the control signal of the sensing unit.

15. The plurality of internal switches include a first internal switch, The plurality of compensation switches include a first compensation switch connected to the first internal switch, When the first internal switch is in the turned-on state, the first compensation switch is in the turned-off state. The display device according to claim 14, wherein when the first internal switch is in the turned-off state, the first compensation switch is in the turned-on state.

16. The display device according to claim 8, wherein each of the plurality of output lines is connected to each of the plurality of channels.

17. The touch panel is located below the aforementioned touch panel and further includes a display panel comprising a plurality of subpixels, The display device according to claim 1, wherein the display panel and the touch panel are driven simultaneously.

18. The display device according to claim 1, wherein the touch drive signal and the touch drive compensation signal have the same frequency.

19. The display device according to claim 1, wherein the touch drive signal and the touch drive compensation signal have the same amplitude.

20. The display device according to claim 19, wherein each of the touch drive signal and the touch drive compensation signal includes a sequence of pulses, each of which has the same amplitude.

Images