Time correction system, reference clock, clock to be corrected, time correction method and program

The time correction system addresses inaccuracies in high-precision synchronization by accounting for internal and external delay times, ensuring precise time correction in communication devices.

JP2026057664APending Publication Date: 2026-04-03CASIO COMPUTER CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-24
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing time synchronization methods do not account for delay times within communication devices, which become significant when high precision is required, such as with atomic clocks, leading to inaccuracies.

Method used

A time correction system that includes a reference clock and a correction target clock, where the reference clock transmits synchronization signals after subtracting internal delay times and the correction target clock adds external delay times to ensure accurate time correction.

Benefits of technology

High-precision time correction is achieved by considering both internal and external delay times, enhancing the accuracy of time synchronization in communication devices.

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Abstract

High-precision correction is performed that takes into account the delay time of electrical signals based on the propagation distance within the circuit. [Solution] The time correction system 1000 comprises a reference clock 100 that measures a reference time, and a correction target clock 200 that corrects the time it measures based on the reference time. The reference clock 100 transmits information of the scheduled transmission time, which is the reference time at which it is scheduled to transmit a synchronization signal, to the correction target clock 200. The reference clock 100 transmits the synchronization signal to the correction target clock 200 at a time obtained by subtracting an internal delay time occurring inside the reference clock 100 from the scheduled transmission time. The correction target clock 200 receives the information of the scheduled transmission time, obtains information of an external delay time occurring outside the reference clock 100, and corrects the time it measures so that the time at which it receives the synchronization signal is the scheduled transmission time plus the external delay time.
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Description

[Technical Field]

[0001] This invention relates to a time correction system, a reference clock, a clock to be corrected, a time correction method, and a program. [Background technology]

[0002] Systems for synchronizing time between multiple communication devices have been known for some time. For example, Patent Document 1 discloses a time synchronization method that takes into account the delay time that occurs when transmitting signals between a master station and a slave station. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 5-161181 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] The time synchronization method disclosed in Patent Document 1 includes a delay time calculation circuit 8 that calculates the delay time from the signal transmission time to the signal reception time of the slave station b, taking this delay time into account. In the slave station b, the time on the slave station's clock 6 is synchronized with the time on the master station's clock 2. However, in this time synchronization method, although the delay time that occurs when transmitting signals between the master station and the slave station is taken into consideration, the delay time within the master station or the slave station is not taken into consideration. With the accuracy of a normal high-precision clock (for example, about 1 second per month), such delay time within the circuit is not a particular problem, but it becomes a problem when the accuracy is extremely high, such as in an atomic clock (for example, 1 second in 3000 years).

[0005] This invention has been made in view of the above circumstances, and aims to provide a time correction system, a reference clock, a clock to be corrected, a time correction method, and a program that can perform high-precision correction considering the delay time of electrical signals based on the propagation distance within the circuit.

Means for Solving the Problem

[0006] To achieve the above object, one aspect of the time correction system according to the present invention includes a reference clock that measures a reference time, and a correction target clock that corrects the measured time based on the reference time. The reference clock transmits information on a transmission scheduled time, which is a reference time at which a synchronization signal is to be transmitted, to the correction target clock, and transmits the synchronization signal to the correction target clock at a time obtained by subtracting an internal delay time that occurs inside the reference clock from the transmission scheduled time. The correction target clock receives the information on the transmission scheduled time, acquires information on an external delay time that occurs outside the reference clock, and corrects the time measured by the correction target clock so that the time when the synchronization signal is received becomes the time obtained by adding the external delay time to the transmission scheduled time.

Advantage of the Invention

[0007] According to the present invention, highly accurate correction can be performed in consideration of the delay time of an electrical signal based on the propagation distance inside a circuit.

Brief Description of the Drawings

[0008] [Figure 1] It is a block diagram showing the functional configuration of the time correction system according to the embodiment. [Figure 2] It is an example of a flowchart of time information transmission processing and time information reception processing when the reference clock and the correction target clock are directly connected. [Figure 3] It is an example of a flowchart of time information transmission processing and time information reception processing when the reference clock and the correction target clock are connected by a communication cable. [Figure 4] It is an example of a flowchart of time information transmission processing and time information reception processing when the reference clock and the correction target clock can communicate by radio waves. [Figure 5] It is a diagram for explaining a more precise propagation delay time.

Mode for Carrying Out the Invention

[0009] A time correction system and the like according to an embodiment will be described with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals. As shown in FIG. 1, a time correction system 1000 according to an embodiment includes a reference clock 100 and a correction target clock 200, and is a system that corrects the time measured by the correction target clock 200 based on the time measured by the reference clock 100. Also, as shown in FIG. 1, the functional configurations of the reference clock 100 and the correction target clock 200 are the same, and both include a control unit 110, a storage unit 120, an input / output unit 130, a communication unit 140, a signal switch 141, a baseband processing circuit 142, a synchronization signal transmission / reception circuit 143, an atomic transmitter 150, a first counter 151, and a second counter 152. When it is desired to distinguish each component of the reference clock 100 from each component of the correction target clock 200, "reference" or "target" will be added to the name respectively. For example, the synchronization signal transmission / reception circuit 143 of the reference clock 100 is also called the reference synchronization signal transmission / reception circuit, and the synchronization signal transmission / reception circuit 143 of the correction target clock 200 is also called the target synchronization signal transmission / reception circuit. Also, the counters 151 and 152 of the reference clock 100 are also called reference counters, and the counters 151 and 152 of the correction target clock 200 are also called target counters.

[0010] The control unit 110 includes a processor such as a CPU (Central Processing Unit) or an RTC (Real Time Clock). The processor operates in synchronization with the clock of the RTC. The control unit 110 executes processes for realizing various functions of the reference clock 100 and the correction target clock 200, and the time information transmission process and the time information reception process described later, according to the programs stored in the storage unit 120. Note that the control unit 110 supports multi-thread processing and can execute a plurality of processes in parallel. The storage unit 120 stores programs executed by the control unit 110 and necessary data. The storage unit 120 is equipped with memory such as RAM (Random Access Memory) and ROM (Read Only Memory). The storage unit 120 also has the transmission delay time pre-stored as the transmission internal delay time, which is the delay time required for transmission from the internal time information source (first counter 151 or second counter 152) to the communication connector (communication connector of the communication unit 140), and the reception delay time pre-stored as the reception internal delay time, which is the delay time required for reception from the communication connector (communication connector of the communication unit 140) to the internal time information source (first counter 151 or second counter 152). However, the transmission internal delay time and the reception internal delay time are often the same, so in that case, only one value may be stored and that value may be used for both the transmission internal delay time and the reception internal delay time. Furthermore, in the following, the internal delay time at transmission stored in the memory unit 120 of the reference clock 100 will also be referred to as the reference internal delay time, and the internal delay time at reception stored in the memory unit 120 of the correction target clock 200 will also be referred to as the target internal delay time. The input / output unit 130 includes an output unit and an operation input unit. The output unit is equipped with a display such as a liquid crystal display or an organic EL (Electro-Luminescence) display, and displays, for example, the time. The operation input unit is equipped with a user interface such as a slide switch or a push button switch, and accepts operation input from the user.

[0011] The communication unit 140 includes a device for data communication and pulse signal transmission / reception between the reference clock 100 and the correction target clock 200, a communication connector for wired communication, and an RF (Radio Frequency) circuit and antenna for wireless communication. Communication in the communication unit 140 is possible via both wired and wireless communication. Wired communication has two types: direct connection communication, where communication is performed by directly connecting the communication connectors, and cable communication, where communication is performed by connecting the communication connectors with a communication cable. The communication cable used for cable communication has an integrated circuit (IC) built in which information on the delay time due to propagation within the communication cable (cable delay time) is written. The control unit 110 of the correction target clock 200, to which the communication cable is connected, can acquire this cable delay time information from the communication cable at any time. Furthermore, the signals communicated by the communication unit 140 include two types: binary data signals exchanged through data communication between the respective control units 110 of the reference clock 100 and the correction target clock 200, and pulse signals for timing exchange without going through the control unit 110. The signal switch 141 is a switch for switching which of these signals to communicate, and this switching is performed in advance by the control unit 110. The signal switch 141 can also switch whether these signals are communicated via a wired connection (connected to a communication connector) or wirelessly (connected to an RF circuit and antenna). The baseband processing circuit 142 is a circuit that demodulates the binary data signal so that the control unit 110 can acquire it as binary data. The synchronization signal transmission / reception circuit 143 consists of a circuit (synchronization signal reception circuit) for directly inputting a single pulse signal for timing notification to the counters (first counter 151, second counter 152) described later, and a circuit (synchronization signal transmission circuit) for outputting a single pulse signal to the communication unit 140 via the signal switch 141 in synchronization with the counter count. Such a synchronization signal transmission / reception circuit 143 can be easily implemented using a PLD (Programmable Logic Device) such as an FPGA (Field-Programmable Gate Array).

[0012] Atomic oscillator 150 is the reference signal source for the atomic clock and is a highly accurate oscillator with an error of less than 10^(-10). The first counter 151 of the reference clock 100 functions as a clock that maintains the accurate time based on the oscillations of the atomic oscillator 150. In other words, the first counter 151 of the reference clock 100 is keeping time at the reference time. However, in the correction target clock 200, although the atomic oscillator 150 is emitting accurate timing, the first counter 151 of the correction target clock 200 is not necessarily keeping time at the accurate time. The second counter 152 functions as a timer that can keep accurate time based on the oscillations of the atomic oscillator 150. Each counter 151 and 152 can start or stop counting based on the pulse signal received by the synchronization signal transmission / reception circuit 143, according to the timing of that pulse signal. In addition, the synchronization signal transmission / reception circuit 143 can transmit pulse signals in synchronization with the counting of counters 151 and 152, as well as the start and stop of counting.

[0013] The functional configurations of the reference clock 100 and the correction target clock 200 have been explained above. Next, the process of correcting the time measured by the correction target clock 200 (the time measured by the first counter 151 of the correction target clock 200) based on the time measured by the reference clock 100 (the reference time measured by the first counter 151 of the reference clock 100) will be explained in three types (direct connection, cable connection, and radio wave).

[0014] First, the process of directly connecting the reference clock 100 and the clock to be corrected 200 to correct the time (the process of transmitting time information from the reference clock 100 and the process of receiving time information from the clock to be corrected 200) will be explained with reference to Figure 2. First, the time information transmission process performed by the control unit 110 of the reference clock 100 will be explained with reference to the left side of Figure 2. When the power to the reference clock 100 is turned on, the control unit 110 of the reference clock 100 starts executing the time information transmission process along with other necessary processes. First, the control unit 110 of the reference clock 100 sets the signal switch 141 to connect the communication connector of the communication unit 140 to the baseband processing circuit 142, and determines whether or not it has received a correction request from the clock to be corrected 200 via the communication connector of the communication unit 140 (step S101). A correction request is packet data that the clock to be corrected 200 sends to the reference clock 100 when it corrects its time.

[0015] If no correction request has been received (step S101; No), the control unit 110 of the reference clock 100 returns to step S101 and waits until a correction request is received. Upon receiving a correction request (Step S101; Yes), the control unit 110 of the reference clock 100 transmits information about the scheduled synchronization signal transmission time to the clock to be corrected 200 via the communication connector of the communication unit 140 (Step S102). The scheduled synchronization signal transmission time is the reference time of the reference clock 100 (the time measured by the first counter 151) at the timing when the synchronization signal used to correct the time of the clock to be corrected 200 is transmitted. By transmitting the reference time information for this timing in advance, it is not necessary to transmit time information when transmitting the synchronization signal, and the synchronization signal can be transmitted using a pulse signal that only notifies the timing. The scheduled synchronization signal transmission time can be set to any time after the time obtained by adding the processing time required to transmit the synchronization signal to the current time, but it is also acceptable to simply set the scheduled synchronization signal transmission time to a few seconds after the current time (for example, 1 second later).

[0016] Then, the control unit 110 of the reference clock 100 calculates the corrected scheduled time by subtracting the reference internal delay time stored in the memory unit 120 and the processing time required to transmit the synchronization signal from the scheduled synchronization signal transmission time (step S103). The sum of the reference internal delay time and the processing time required to transmit the synchronization signal is the delay time that occurs inside the reference clock 100, and is therefore collectively called the internal delay time. Then, the control unit 110 of the reference clock 100 sets the signal switch 141 to connect the communication connector of the communication unit 140 and the synchronization signal transmission / reception circuit 143. Next, the control unit 110 of the reference clock 100 reads the first counter 151 and determines whether or not the scheduled correction time has arrived (step S104). If the scheduled correction time has not yet arrived (Step S104; No), return to Step S104 and wait until the scheduled correction time arrives. When the scheduled correction time arrives (Step S104; Yes), the synchronization signal transmission / reception circuit 143 of the reference clock 100 outputs a synchronization signal, which is then transmitted from the communication connector of the communication unit 140 (Step S105). The synchronization signal is a single pulse signal, but it is called a synchronization signal because it is used to correct the time of the clock to be corrected (to synchronize it with the reference clock). The time information transmission process then ends.

[0017] In this time information transmission process, the planned correction time is calculated by subtracting the reference internal delay time and the processing time required to transmit the synchronization signal from the planned synchronization signal transmission time. The synchronization signal is then started to be transmitted at that time. As a result, the synchronization signal reaches the communication connector at the timing of the planned synchronization signal transmission, eliminating the influence of the delay time that occurs inside the reference clock 100.

[0018] Next, the time information reception process performed by the control unit 110 of the clock to be corrected 200 will be explained with reference to the right side of Figure 2. The clock to be corrected 200 may start the time information reception process at any time it wishes to correct its time. For example, it may start the time information reception process based on user instructions, or it may start the time information reception process periodically (for example, once a year). First, the control unit 110 of the clock to be corrected 200 sets the signal switch 141 to connect the communication connector of the communication unit 140 and the baseband processing circuit 142, and sends a correction request to the reference clock 100 via the communication connector of the communication unit 140 (step S201). Then, the control unit 110 of the clock to be corrected 200 receives information about the scheduled synchronization signal transmission time transmitted by the reference clock 100 via the communication connector of the communication unit 140 (step S202). Although not shown in Figure 2 because the flowchart would be complicated, in reality, the control unit 110 of the clock to be corrected 200 waits in step S202 until it receives information about the scheduled synchronization signal transmission time. Next, the control unit 110 of the clock to be corrected 200 calculates a corrected time by adding the target internal delay time stored in the memory unit 120 and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time (step S203). The sum of the target internal delay time and the processing time required to receive the synchronization signal is a delay time that occurs outside the reference clock 100, and is therefore collectively called the external delay time. Then, the control unit 110 of the clock to be corrected 200 sets the corrected time in the first counter 151 (step S204), and sets the signal switch 141 to connect the communication connector of the communication unit 140 and the synchronization signal transmission / reception circuit 143. Then, the synchronization signal transmission / reception circuit 143 of the clock to be corrected 200 directly inputs the synchronization signal transmitted by the reference clock 100 to the first counter 151, thereby starting the count of the first counter 151 when the synchronization signal is received (step S205), and ending the time information reception process.

[0019] In this way, the time information reception process calculates a corrected time by adding the target internal delay time and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time, and then corrects the clock of the target clock 200 (first counter 151) at that time. This eliminates the influence of delay time occurring inside the target clock 200 (outside the reference clock 100). The above describes the time information transmission and reception processes when the reference clock 100 and the correction target clock 200 are directly connected via communication connectors.

[0020] Next, the time information transmission process and time information reception process when the communication connector of the reference clock 100 and the communication connector of the clock to be corrected 200 are connected by a communication cable will be explained with reference to Figure 3. However, even in the case of a cable connection, the time information transmission process performed by the control unit 110 of the reference clock 100 is the same as the time information transmission process in the case of a direct connection, as explained with reference to the left side of Figure 2, so the explanation will be omitted. The time information reception process performed by the control unit 110 of the clock to be corrected 200 when connected by cable will be explained with reference to the right side of Figure 3. When the clock to be corrected 200 wants to correct its time, it may connect the reference clock 100 and the communication connectors with a dedicated communication cable and then start the time information reception process at any time. For example, the time information reception process may be started based on user instructions, or it may be started periodically (for example, once a year).

[0021] First, the control unit 110 of the clock to be corrected 200 sets the signal switch 141 to connect the communication connector of the communication unit 140 to the baseband processing circuit 142, and reads the cable delay time information from the IC built into the communication cable (step S210). The next steps, S211 and S212, are the same as steps S201 and S202 of the time information reception process in the direct connection case, as explained with reference to the right side of Figure 2, so their explanation will be omitted. In step S213, the control unit 110 of the clock to be corrected 200 calculates a corrected time by adding the cable delay time read in step S210, the target internal delay time stored in the memory unit 120, and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time (step S213). The next steps, S214 and S215, are the same as steps S204 and S205 of the time information reception process in the case of direct connection, as explained with reference to the right side of Figure 2, so their explanation will be omitted.

[0022] In this time information reception process, the corrected time is calculated by adding the cable delay time, the target internal delay time, and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time. The clock of the clock to be corrected 200 (first counter 151) is then corrected at that time, thus eliminating the influence of delay time occurring within the communication cable and within the clock to be corrected 200 (outside the reference clock 100). The above describes the time information transmission and reception processes when the communication connector of the reference clock 100 and the communication connector of the clock to be corrected 200 are connected by a communication cable.

[0023] Next, the time information transmission and reception processes when the reference clock 100 and the clock to be corrected 200 communicate by radio waves will be explained with reference to Figure 4. First, the time information transmission process performed by the control unit 110 of the reference clock 100 will be explained with reference to the left side of Figure 2. When the power to the reference clock 100 is turned on, the control unit 110 of the reference clock 100 starts executing the time information transmission process along with other necessary processes. First, the control unit 110 of the reference clock 100 sets the signal switch 141 to connect the antenna of the communication unit 140 and the baseband processing circuit 142, and determines whether or not it has received a correction request from the clock to be corrected 200 via the antenna of the communication unit 140 (step S111). If no correction request has been received (step S111; No), the control unit 110 of the reference clock 100 returns to step S111 and waits until a correction request is received. Upon receiving a correction request (step S111; Yes), the control unit 110 of the reference clock 100 sets the signal switch 141 to connect the antenna of the communication unit 140 with the synchronization signal transmission / reception circuit 143, starts counting (time measurement) with the second counter 152, and transmits the pulse signal (first pulse signal) output from the synchronization signal transmission / reception circuit 143 to the clock to be corrected 200 via the antenna of the communication unit 140 in synchronization with this count (step S112).

[0024] Then, the reference clock 100 directly inputs the pulse signal (second pulse signal) transmitted from the correction target clock 200 to the second counter 152 via the synchronization signal transmission / reception circuit 143, stops the count of the second counter 152 at the timing of the second pulse signal, and the control unit 110 reads the value counted by the second counter 152 and acquires it as the reference delay time (step S113). Then, the control unit 110 of the reference clock 100 sets the signal switch 141 to connect the antenna of the communication unit 140 and the baseband processing circuit 142, and transmits information including the scheduled synchronization signal transmission time and the reference delay time acquired in step S113 to the clock to be corrected 200 (step S114). The processes from step S115 to step S117 are the same as the processes from step S103 to step S105 of the time information transmission process in the case of direct connection, as explained with reference to the left side of Figure 2, so the explanation will be omitted.

[0025] Next, the time information reception process performed by the control unit 110 of the correction target clock 200 when the reference clock 100 and the correction target clock 200 communicate by radio waves will be explained with reference to the right side of Figure 4. The correction target clock 200, which can communicate with the reference clock 100 by radio waves, may start the execution of the time information reception process at any time when it wants to correct the time. For example, the execution of the time information reception process may be started based on user instructions, or it may be started automatically at regular intervals (for example, once a year). First, the control unit 110 of the clock to be corrected 200 sets the signal switch 141 to connect the antenna of the communication unit 140 and the baseband processing circuit 142, and sends a correction request to the reference clock 100 via the antenna of the communication unit 140 (step S221). Then, the control unit 110 of the clock to be corrected 200 directly inputs the pulse signal (first pulse signal) transmitted by the reference clock 100 to the second counter 152 via the synchronization signal transmission / reception circuit 143, and starts counting (time measurement) on the second counter 152 at the timing of the first pulse signal (step S222). Then, the control unit 110 of the clock to be corrected 200 stops the counting of the second counter 152, and simultaneously transmits the pulse signal (second pulse signal) output from the synchronization signal transmission / reception circuit 143 to the reference clock 100 via the antenna of the communication unit 140 in synchronization with the stopping of the counting of the second counter 152, reads the count value of the stopped second counter 152 and acquires it as the target delay time (step S223).

[0026] Then, the control unit 110 of the clock to be corrected 200 sets the signal switch 141 to connect the antenna and RF circuit of the communication unit 140 with the baseband processing circuit 142, and receives information including the scheduled synchronization signal transmission time and reference delay time transmitted by the reference clock 100 via the communication unit 140 (step S224). Next, the control unit 110 of the clock to be corrected 200 calculates the propagation delay time based on the reference delay time and the target delay time (step S225). The propagation delay time can be easily calculated by the following formula (1). Propagation delay time = (Reference delay time - Target delay time) ÷ 2 …(1) However, formula (1) does not take into account the internal delay times of the reference clock 100 and the correction target clock 200, so it may contain some errors. More precise propagation delay times will be discussed later. Next, the control unit 110 of the clock to be corrected 200 calculates a corrected time by adding the propagation delay time, the internal delay time stored in the memory unit 120, and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time (step S226). Then, the control unit 110 of the clock to be corrected 200 sets the corrected time in the first counter 151 (step S227), and sets the signal switch 141 to connect the RF circuit and antenna of the communication unit 140 to the synchronization signal transmission / reception circuit 143. Then, the synchronization signal transmission / reception circuit 143 of the clock to be corrected 200 directly inputs the synchronization signal transmitted by the reference clock 100 to the first counter 151, thereby starting the count of the first counter 151 when the synchronization signal is received (step S228), and ending the time information reception process.

[0027] In this time information reception process, the corrected time is calculated by adding the propagation delay time, the internal delay time, and the processing time required to receive the synchronization signal to the scheduled synchronization signal transmission time. The clock of the clock to be corrected 200 (first counter 151) is then corrected at this time, thus eliminating the influence of delays occurring during radio wave propagation and within the clock to be corrected 200 (outside the reference clock 100). The above describes the time information transmission and reception processes when the reference clock 100 and the correction target clock 200 can communicate via radio waves.

[0028] Next, we will explain the propagation delay time with reference to Figure 5. To simplify the description of the time and date related to the reference clock 100 and the correction target clock 200, the following variables will be introduced. Variables related to the reference clock 100 t BT : The time from when the second counter 152 starts or stops until a pulse reaches the antenna (i.e., the internal delay time during transmission) t BR : The time from when a pulse reaches the antenna until the second counter 152 starts or stops (i.e., the internal delay time during reception) Δt B: The time from when the second counter 152 starts until it stops (i.e., the reference delay time) Variables related to the clock 200 to be corrected t PR : The time from when a pulse arrives at the antenna until the second counter 152 starts or stops (i.e., the internal delay time at reception) t PT : The time from when the second counter 152 starts or stops until a pulse arrives at the antenna (i.e., the internal delay time at transmission) Δt P : The time from when the second counter 152 starts until it stops (i.e., the target delay time)

[0029] First, at step S112 in FIG. 4, an instruction to transmit a pulse signal is issued from the control unit 110 to the synchronization signal transceiver circuit 143, and the counting in the second counter 152 starts. And it takes t BT time until the pulse signal reaches the antenna, and then a pulse signal is transmitted from the antenna and reaches the antenna of the clock 200 to be corrected after a propagation delay of t d time. In the clock 200 to be corrected, it takes t PR time until the pulse signal reaches the second counter 152 from the antenna, and the counting in the second counter 152 starts at step S222 in FIG. 4. Then at step S223, an instruction to transmit a pulse signal is issued from the control unit 110 of the clock 200 to be corrected to the synchronization signal transceiver circuit 143, and the second counter 152 is stopped. And it takes t PT time until the pulse signal reaches the antenna, and then a pulse signal is transmitted from the antenna and reaches the antenna of the reference clock 100 after a propagation delay of t d time. In the reference clock 100, it takes t BR time until the pulse signal reaches the second counter 152 from the antenna. From the above and FIG. 5, the reference delay time Δt B counted by the second counter 152 of the reference clock 100, and the target delay time Δt counted by the second counter 152 of the clock 200 to be correctedP It can be seen that the following relationship (2) holds between them. Δt B =t BT +t d +t PR +Δt P +t PT +t d +t BR …(2) Therefore, the propagation delay time is t d This can be expressed by the following formula (3). t d =( Δt B -Δt P -t BT -t BR -t PT -t PR ) / twenty three)

[0030] Note, BT and t BR These are the internal delay time during transmission and the internal delay time during reception stored in the memory unit 120 of the reference clock 100, and t PT and t PR These are the internal delay time during transmission and the internal delay time during reception stored in the memory unit 120 of the clock to be corrected 200. Therefore, in order to determine the precise propagation delay time using formula (3), the clock to be corrected 200 must be set in advance (for example, between step S111 and step S112, the reference clock 100 is set to t BT and t BR (Sends a message, and between steps S221 and S222, the corrected clock 200 receives them, etc.) BT and t BR You need to obtain it.

[0031] As explained above, in the time correction system 1000, the reference clock 100 first transmits information to the clock to be corrected 200 about the time at which it is scheduled to transmit the synchronization signal (scheduled synchronization signal transmission time), and then transmits the synchronization signal to the clock to be corrected 200 at a time obtained by subtracting the internal delay time that occurs inside the reference clock 100 from the scheduled synchronization signal transmission time. Therefore, the synchronization signal can be transmitted to the clock to be corrected 200 at an accurate timing without being affected by the delay time that occurs inside the reference clock 100. Furthermore, the clock 200 to be corrected is equipped with a synchronization signal transmission / reception circuit 143 that can directly input synchronization signals (pulse signals) to counters 151 and 152, so that the clock can be corrected with high accuracy regardless of the clock speed of the control unit 110. Furthermore, the correction target clock 200 acquires information on external delay time occurring outside the reference clock 100, and corrects the time being measured by the first counter 151 so that the time when the synchronization signal is received becomes the scheduled synchronization signal transmission time plus the external delay time. This allows the time being measured by the correction target clock 200 to be corrected with accurate timing without being affected by delay time occurring outside the reference clock 100. Furthermore, by having the reference clock 100 and the correction target clock 200 exchange a first pulse signal and a second pulse signal, more precise information on the external delay time can be obtained.

[0032] In the above-described embodiment, the reference clock 100 and the clock to be corrected 200 were described separately for the sake of clarity, but in reality, both are communication devices with the same configuration. Therefore, if there are two identical clocks, the clock that is measuring the reference time during time correction is designated as the reference clock 100, and the clock being corrected is designated as the clock to be corrected 200. The above-described process can be performed using either clock as the reference clock 100 or the clock to be corrected 200.

[0033] Furthermore, in the above embodiment, it was described that the programs for various processes executed by the control unit 110 (such as time information transmission processing and time information reception processing) are pre-stored in the storage unit 120. However, a computer capable of executing the above processes may be configured by distributing programs stored on non-temporary computer-readable recording media such as flexible disks, CD-ROMs (Compact Disc Read Only Memory), DVDs (Digital Versatile Discs), MOs (Magneto-Optical discs), memory cards, and USB memory, and then loading and installing those programs into a computer.

[0034] Furthermore, the program can be superimposed on a carrier wave and applied via a communication medium such as the Internet. For example, the program could be posted and distributed on a bulletin board system (BBS) on a communication network. This program could then be launched and executed under the control of the operating system (OS), just like any other application program, to perform the aforementioned processes.

[0035] Furthermore, the control unit 110 may consist of any single processor, such as a single processor, multi-processor, or multi-core processor, or it may be configured by combining any of these processors with processing circuits such as ASICs (Application Specific Integrated Circuits) or FPGAs.

[0036] Although preferred embodiments of the present invention have been described above, the present invention is not limited to these specific embodiments, and the present invention includes the invention described in the claims and its equivalents. [Explanation of symbols]

[0037] 100...Reference clock, 110...Control unit, 120...Storage unit, 130...Input / output unit, 140...Communication unit, 141...Signal switch, 142...Baseband processing circuit, 143...Synchronization signal transmission / reception circuit, 150...Atomic oscillator, 151...First counter, 152...Second counter, 200...Clock to be corrected, 1000...Time correction system

Claims

1. The system comprises a reference clock that measures a reference time, and a correction target clock that corrects the time it measures based on the reference time. The aforementioned reference clock is The information of the scheduled transmission time, which is the reference time at which the synchronization signal is scheduled to be transmitted, is sent to the correction target clock. The synchronization signal is transmitted to the correction target clock at a time obtained by subtracting the internal delay time occurring within the reference clock from the scheduled transmission time. The aforementioned clock to be corrected is Upon receiving the information regarding the scheduled transmission time, Information on external delay time occurring outside the aforementioned reference clock is obtained, The time measured by the clock to be corrected is corrected so that the time at which the synchronization signal is received is the time obtained by adding the external delay time to the scheduled transmission time. Time correction system.

2. The aforementioned clock to be corrected is The system includes a target synchronization signal transmission / reception circuit that has the function of directly inputting the synchronization signal transmitted by the reference clock to a target counter that the correction target clock measures, The synchronization signal is received by the target synchronization signal transmission / reception circuit, and the target counter starts counting. The time correction system according to claim 1.

3. The aforementioned reference clock is The system includes a reference synchronization signal transmission and reception circuit that has the function of outputting a first pulse signal and the synchronization signal in synchronization with the count of a reference counter measured by the reference clock, and the function of directly inputting a second pulse signal transmitted by the correction target clock to the reference counter. The aforementioned target synchronization signal transmission and reception circuit further includes a function to directly input the first pulse signal transmitted by the reference clock to the target counter, and a function to output the second pulse signal in synchronization with the count of the target counter. The reference clock transmits information about the reference delay time, which is the time from the transmission of the first pulse to the reception of the second pulse, to the correction target clock. The correction target clock acquires information on the external delay time based on the reference delay time. The time correction system according to claim 2.

4. The reference time is measured, The information of the scheduled transmission time, which is the reference time at which the synchronization signal is scheduled to be transmitted, is sent to the clock to be corrected. The synchronization signal is transmitted to the correction target clock at a time obtained by subtracting the internal delay time that occurs internally from the scheduled transmission time. Reference clock.

5. The reference clock receives information about the scheduled transmission time, Information on external delay time occurring outside the aforementioned reference clock is obtained, The time to be measured is corrected so that the time at which the synchronization signal transmitted by the reference clock is received is the scheduled transmission time plus the external delay time. The watch to be corrected.

6. A time correction method that corrects the time measured by a clock to be corrected based on a reference time measured by a reference clock, The aforementioned reference clock, The information of the scheduled transmission time, which is the reference time at which the synchronization signal is scheduled to be transmitted, is sent to the correction target clock. The synchronization signal is transmitted to the correction target clock at a time obtained by subtracting the internal delay time occurring within the reference clock from the scheduled transmission time. The aforementioned clock to be corrected is Upon receiving the information regarding the scheduled transmission time, Information on external delay time occurring outside the aforementioned reference clock is obtained, The time measured by the clock to be corrected is corrected so that the time at which the synchronization signal is received is the time obtained by adding the external delay time to the scheduled transmission time. Time correction method.

7. The control unit of the reference clock that measures the reference time, The information of the scheduled transmission time, which is the reference time at which the synchronization signal is scheduled to be transmitted, is sent to the clock to be corrected. The synchronization signal is transmitted to the correction target clock at a time obtained by subtracting the internal delay time that occurs internally from the scheduled transmission time. A program that executes a process.

8. In the control unit of the clock to be corrected, The reference clock receives information about the scheduled transmission time, Information on external delay time occurring outside the aforementioned reference clock is obtained, The time to be measured is corrected so that the time at which the synchronization signal transmitted by the reference clock is received is the scheduled transmission time plus the external delay time. A program that executes a process.

Citation Information

Patent Citations

  • Time synchronization system

    JP1993161181A