Chip anomaly detection method, apparatus, and computer-readable storage medium

Abstract

Embodiments of the present invention provide a chip anomaly detection method, apparatus, and a computer-readable storage medium. [Solution] The method includes acquiring a chip bonding image, acquiring electrode plate parameters and initial abnormality type of the electrode plate of the chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate, performing calculations on the electrode plate parameters, correcting the initial abnormality type of the electrode plate based on the calculation results, and acquiring the corrected abnormality type of the electrode plate.

Description

Technical Field

[0001] The present invention belongs to the field of image processing, and particularly relates to a chip abnormality detection method, a chip abnormality detection device, and a computer-readable storage medium.

Background Art

[0002] The abnormality detection of semiconductor chips can be roughly classified into the abnormality detection of chips before packaging and the abnormality detection of sealed bodies after packaging according to the processing steps of semiconductor chips. Here, in the chip abnormality detection before packaging, an image of the entire chip is often used as a detection source for detection. In actual operation, bonding is an important process before packaging. Currently, for the bonding image derived from a bonding device, generally only whether the bonding balls are deflected is detected for abnormality. Also, in the prior art, conventional image processing methods such as the template matching method are often adopted. Due to the influence of various problems such as on-site light, device shaking, and shielding, the false positive rate of abnormality detection reaches 95% or more.

[0003] Therefore, there is a need for a chip abnormality detection method, device, and medium that can accurately detect chip abnormalities, reduce the false positive rate, and improve the positive rate.

Summary of the Invention

[0004] According to one embodiment of the present invention, in order to solve the above problems, a chip abnormality detection method executed by a chip abnormality detection device is provided, including: obtaining a chip bonding image; obtaining electrode plate parameters of an electrode plate of a chip and an initial abnormality type of the electrode plate based on the chip bonding image, where the electrode plate parameters include size parameters of the electrode plate, bonding ball parameters, and bonding wire parameters; performing calculations on the electrode plate parameters, modifying the initial abnormality type of the electrode plate based on the calculation results, and obtaining a modified abnormality type of the electrode plate.

[0005] According to another embodiment of the present invention, a chip abnormality detection device is provided, which includes: an acquisition unit that acquires a chip bonding image; a detection unit that acquires electrode plate parameters and an initial abnormality type of the electrode plate of a chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate; and a modification unit that performs calculations on the electrode plate parameters, modifies the initial abnormality type of the electrode plate based on the calculation results, and acquires a modified abnormality type of the electrode plate.

[0006] According to another embodiment of the present invention, a chip anomaly detection device is provided, comprising a processor and a memory storing computer program commands, wherein when the computer program commands are executed by the processor, the processor is instructed to perform the following steps: acquire a chip bonding image; acquire electrode plate parameters and an initial anomaly type of the electrode plate based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate; and perform calculations on the electrode plate parameters, correct the initial anomaly type of the electrode plate based on the calculation results, and acquire a corrected anomaly type of the electrode plate.

[0007] According to another embodiment of the present invention, a computer-readable storage medium is provided which stores computer process commands and, when the computer process commands are executed by a processor, enables the following steps: acquiring a chip bonding image; acquiring electrode plate parameters and an initial abnormality type of the electrode plate based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate; and performing calculations on the electrode plate parameters, correcting the initial abnormality type of the electrode plate based on the calculation results, and acquiring a corrected abnormality type of the electrode plate.

[0008] According to the chip anomaly detection method, chip anomaly detection apparatus, and computer-readable storage medium of the present invention, electrode plate parameters and initial anomaly types are obtained from the acquired chip bonding image, and then the initial anomaly type is corrected based on the calculation results of the electrode plate parameters, thereby obtaining more accurate chip anomaly detection results. The chip anomaly detection method, apparatus, and computer-readable storage medium of the present invention can reduce the false alarm rate of chip anomaly detection and effectively improve the positive detection rate. [Brief explanation of the drawing]

[0009] By combining the drawings and describing in detail embodiments of the present invention, the above and other objectives, features, and advantages of the present invention will be further clarified. [Figure 1] Figure 1 is a flowchart of a chip abnormality detection method according to an embodiment of the present invention. [Figure 2] Figure 2 is a chip bonding image according to one example of an embodiment of the present invention. [Figure 3] Figure 3 is an illustrative diagram of a chip bonding image initially obtained from a bonding apparatus, according to an example of an embodiment of the present invention. [Figure 4]Figure 4 shows an example of labeling the first acquired chip bonding image according to one embodiment of the present invention. [Figure 5] Figure 5 shows a chip bonding image obtained by performing data augmentation on the original chip bonding image, according to one example of an embodiment of the present invention. [Figure 6] Figure 6 is a schematic diagram illustrating how to obtain statistics on the arrangement direction of bonding wires according to one example of an embodiment of the present application. [Figure 7] Figure 7 is a schematic diagram illustrating the acquisition of statistics on the alignment direction of bonding wires, according to another embodiment of the present invention. [Figure 8] Figure 8 is a schematic diagram illustrating how to obtain the average position of the center of a bonding ball according to one example of an embodiment of the present invention. [Figure 9] Figure 9 is a schematic diagram illustrating how to obtain the average position of the center of a bonding ball, according to another embodiment of the present invention. [Figure 10] Figure 10 is a schematic diagram illustrating how to obtain the average radius of bonding balls according to one embodiment of the present invention. [Figure 11] Figure 11 is a flowchart for determining the abnormal type of electrode plate according to one embodiment of the present invention. [Figure 12] Figure 12 is a block diagram of a chip abnormality detection device according to an embodiment of the present application. [Figure 13] Figure 13 is a block diagram of a chip abnormality detection device according to an embodiment of the present application. [Modes for carrying out the invention]

[0010] The following describes, with reference to the drawings, a chip anomaly detection method, apparatus, and computer-readable storage medium according to embodiments of the present invention. In the drawings, the same reference numerals refer to the same components throughout. It should be understood that the embodiments described herein are illustrative only and should not be construed as limiting the scope of the present invention.

[0011] Figure 1 is a flowchart of the chip abnormality detection method 100 according to an embodiment of the present invention. The chip abnormality detection method according to an embodiment of the present invention will be described below with reference to Figure 1.

[0012] In step S101, a chip bonding image is obtained.

[0013] In this step, a chip bonding image generated during the bonding process can be obtained by a method derived from the bonding apparatus. Figure 2 is a chip bonding image according to an example of an embodiment of the present invention. As shown in Figure 2, the chip bonding image may include at least one electrode plate, each electrode plate may have bonding balls on it and may be connected by bonding wires. In the bonding process, the presence or absence of abnormalities in the electrode plates can be determined by the size and position of the electrode plates and the condition of the bonding balls and / or bonding wires on the electrode plates as they appear in the chip bonding image.

[0014] In step S102, the electrode plate parameters and the initial abnormality type of the electrode plate of the chip are obtained based on the chip bonding image, and the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate.

[0015] In embodiments of the present invention, the content of each item in the electrode plate parameters can be shown in various ways. Selectively, among the electrode plate parameters, the electrode plate size parameter can be represented by the center coordinates, width, and height of the rectangular bounding box of the electrode plate, or by the coordinates of each corner point of the electrode plate. Also, among the electrode plate parameters, the bonding ball parameter may include parameters such as the center coordinates of the bonding ball and the radius / diameter of the bonding ball. Selectively, among the electrode plate parameters, the bonding wire parameter may include the coordinates of each endpoint of the wire on the electrode plate. For example, if the bonding wire is a straight segment, the bonding wire parameter may include the coordinates of the two endpoints of the segment. Furthermore, if the bonding wire is curved or bent, for example, the bonding wire parameter may further include one or more coordinates at the curved or bent point of the bonding wire. The above methods of displaying the content of each item in the electrode plate parameters are merely examples, and in actual applications, any corresponding electrode plate parameters can be selected and displayed according to the application scene, and are not limited thereto.

[0016] In embodiments of the present invention, electrode plate parameters and initial anomaly types can be obtained using a neural network. For example, by first constructing an end-to-end deep learning network model, electrode plate parameters and initial anomaly types of the electrode plates of the chip can be obtained based on the chip bonding image. In this process, a training chip bonding image and labeled electrode plate parameters and labeled anomaly types of the electrode plates in the training chip bonding image can be selected as input to the neural network. Here, labeled electrode plate parameters, including the electrode plate size parameter, bonding ball parameter, and bonding wire parameter of the electrode plates, can also be input to the training chip bonding image, and anomaly types can be labeled thereto. After obtaining the training chip bonding image and the labeled electrode plate parameters and labeled anomaly types of its electrode plates, the neural network can be trained based on this, and the parameters of the neural network can be adjusted to converge the loss function of the neural network.

[0017] In an embodiment of the present invention, the training chip bonding image used for training a neural network may be the initially collected chip bonding image, or may be a chip bonding image obtained by performing data augmentation on the original chip bonding image. For example, the training chip bonding image can be obtained by performing at least one transformation such as scaling, translation, inversion, and brightness adjustment on the original chip bonding image. Regarding the labeled electrode plate parameters corresponding to the original chip bonding image, when the data augmentation process includes an augmentation method modified by a change in the geometric structure, it is necessary to recalculate the labeled electrode plate parameters corresponding to the chip bonding image after data augmentation. By data augmentation of the original chip bonding image, the image data used for training the neural network can be effectively augmented, providing a large number of samples to improve the detection accuracy of the neural network and the accuracy of chip anomaly detection. The collection and augmentation methods of the training chip bonding image in the embodiment of the present invention are only examples, and in actual applications, any method capable of augmenting the training chip bonding image can be used, and no limitation is imposed here.

[0018] After training the neural network is complete, the trained neural network can optionally be used to inspect the input chip bonding image to obtain the electrode plate parameters and initial abnormality type of the electrode plate of the chip. Optionally, the initial abnormality type of the electrode plate and the corrected abnormality type of the electrode plate obtained by the final correction in the embodiments of the present invention can include various representations of normal / abnormal conditions that occurred during the chip bonding process. For example, the initial abnormality type and / or the corrected abnormality type can include at least one of normal, probe mark, missing, dry firing, foreign matter, peeling, and misalignment. Of the above types, normal indicates that there are no abnormalities in the bonding balls, bonding wire size and position, etc., of the electrode plate on the chip during the bonding process, while probe mark indicates a contact mark left by the probe contacting the chip under test, and is a type of normal electrode plate. Furthermore, "missing" indicates an abnormality where both bonding balls and bonding wires are present on the electrode plate, but the bonding balls / bonding wires are missing; "dry firing" indicates an abnormality where the bonding balls on the electrode plate have not successfully bonded; "foreign matter" indicates an abnormality where foreign matter is present within the bonding balls on the electrode plate; "peeling" indicates an abnormality where the bonding balls on the electrode plate have peeled off after bonding; and "misalignment" indicates an abnormality where the bonding balls on the electrode plate are not bonded in the correct position. The above enumeration and interpretation of various electrode plate abnormalities are merely examples, and in actual applications, different normal / abnormal types of electrode plates can be distinguished for different specific bonding scenes and bonding needs, and none of these are considered limiting here.

[0019] In embodiments of the present invention, a selectively trained neural network can be used to determine different initial abnormality types of electrode plates based on the electrode parameters of the acquired chip bonding image. Here, the neural network can be used to comprehensively judge various electrode plate parameters in the chip bonding image, thereby deriving the initial abnormality type of the electrode plate. Furthermore, in one example, various initial abnormality types of electrode plates can also be derived by various simple classifications and judgments of the electrode plate parameters. For example, first, it can be determined whether or not there is a bonding wire on the electrode plate. If there is a bonding wire, it can be determined whether or not the bonding wire is broken or if the direction of the bonding wire is incorrect, or further, whether or not the bonding ball is missing relative to the bonding ball. Situations such as a broken bonding wire, an incorrect direction of the bonding wire, or a missing bonding ball are all considered to be an initial abnormality type of missing electrode plate. Also, if there is no bonding wire on the electrode plate, the state of the bonding ball can be determined. An initial abnormality type in which the center of the bonding ball is offset from the predetermined position on the electrode plate can be determined to be a mis-firing; an initial abnormality type in which the indicated shape of the bonding ball approaches a predetermined shape (e.g., concentric circles) or the radius of the bonding ball exceeds a predetermined threshold can be determined to be a dry firing; an initial abnormality type in which the shape of the bonding ball is irregular can be determined to be a foreign object; and an initial abnormality type in which the shape and position of the bonding ball approaches the shape of a normal bonding ball but there is no bonding wire can be determined to be a delamination. Other conditions are considered normal, and if an abnormality is judged, it may be a false alarm. The above specific methods for determining various electrode plate abnormalities are merely examples, and in actual applications, different methods for determining electrode plate abnormalities can be used for different specific bonding scenes and bonding needs, and are not limited to any one of them.

[0020] In step S103, calculations are performed on the electrode plate parameters, the initial abnormal type of the electrode plate is corrected based on the calculation results, and the corrected abnormal type of the electrode plate is obtained.

[0021] In an embodiment of the present invention, optionally, the electrode plate parameters of a normal electrode plate can be statistically calculated based on the electrode plate parameters. Considering that a set of electrode plates on a chip in a chip bonding image often have the same or similar electrode plate size, bonding ball size, bonding ball position, and main arrangement direction of bonding wires, the electrode plate parameters of a normal electrode plate can be inferred based on the results of statistics and averaging of electrode plate parameters. In one example, the electrode plate parameters of a normal electrode plate can include at least one of the statistics of the arrangement direction of bonding wires in a normal electrode plate or the dominant arrangement direction, the average position of the center of bonding balls, and the average radius of bonding balls. For example, by statistically counting the number of bonding wires where the endpoints of the bonding wires away from the bonding balls intersect with each boundary (for example, the upper, lower, left, and right boundaries) of the electrode plate or the chip bonding image, the statistics of the arrangement direction of the bonding wires can be obtained, or the direction with the largest number of bonding wires can be set as the dominant arrangement direction of the bonding wires in a normal electrode plate. Also, for example, the statistical average value of the distance from the center of the bonding ball to each boundary of the corresponding electrode plate can be used as the average position of the center of the bonding balls on a normal electrode plate, or the average value of the ratio of the distance from the center of the bonding ball to each boundary of the corresponding electrode plate to the size of the electrode plate in the corresponding direction can be used as the average position of the center of the bonding balls on a normal electrode plate. Also, for example, the statistical average radius of each bonding ball on each electrode plate in the chip bonding image can be used as the average radius of the bonding balls on a normal electrode plate. The types and calculation methods of the above various electrode plate parameters of normal electrode plates are only examples. In actual applications, different electrode plate parameters of normal electrode plates can be used according to different specific bonding scenes and bonding needs, and none of them are limited here.

[0022] After calculating the electrode plate parameters of a normal electrode plate, the initial abnormality type of the electrode plate can be selectively corrected based on the deviation between the calculated electrode plate parameters and the electrode plate parameters of the normal electrode plate. By utilizing the process of correcting the electrode plate parameters of a normal electrode plate, misjudgments and confusions between various abnormal conditions relatively close to the electrode plate can be effectively avoided. For example, it is also possible to obtain a corrected abnormality type by further correcting various abnormality types of the electrode plate by combining the classification and judgment of the electrode plate parameters described above with a comparison with the electrode plate parameters of a normal electrode plate. For example, the presence or absence of bonding wires, and a comparison between the dominant alignment direction of bonding wires in a normal electrode plate and the alignment direction of bonding wires in the electrode plate on the chip bonding image, can effectively distinguish whether or not there is an abnormality type such as a missing wire. A comparison between the average position of the center of the bonding balls and the position of the center of the bonding balls in the electrode plate on the chip bonding image can effectively distinguish abnormalities such as misalignment or foreign matter. Comparing the average radius of bonding balls with the radius of bonding balls on the electrode plate in the chip bonding image can effectively distinguish between abnormal types such as dry firing, foreign matter, and delamination. The correction methods described above for correcting various types of electrode plate abnormalities are merely examples, and in actual applications, different correction methods can be used to correct different types of abnormalities for different specific bonding scenes and bonding needs, and these methods are not limited to any one example.

[0023] The chip anomaly detection method according to an embodiment of the present invention can obtain electrode plate parameters and initial anomaly types from the acquired chip bonding image, and can correct the initial anomaly type from the calculation results of the electrode plate parameters to obtain more accurate chip anomaly detection results. The chip anomaly detection method, apparatus, and computer-readable storage medium of the present invention can reduce the false alarm rate of chip anomaly detection and effectively improve the positive detection rate.

[0024] The following describes an example of a chip abnormality detection method according to an embodiment of the present invention.

[0025] In this example, first, a chip bonding image generated during the bonding process, derived from the bonding apparatus, is acquired.

[0026] Next, based on the chip bonding image, the electrode plate parameters and the initial abnormality type of the electrode plate are obtained, and the electrode plate parameters include the size parameter of the electrode plate, the bonding ball parameter, and the bonding wire parameter. The size parameter of the electrode plate can be indicated using the coordinates of each corner point of the electrode plate; for example, the coordinates of each corner point of the electrode plate are indicated by P1(x1, y1), P2(x2, y2), P3(x3, y3), and P4(x4, y4), respectively. The bonding ball parameter can also be represented using the coordinates of the center of the bonding ball P5(x5, y5) and the radius R of the bonding ball, and the bonding wire parameter can also be represented using the coordinates of both ends of the bonding wire P6(x6, y6) and P7(x7, y7). The initial abnormality type and / or subsequent corrective abnormality type may include at least one of normal, probe mark, missing, dry firing, foreign matter, peeling, and misalignment.

[0027] In this embodiment, electrode plate parameters and initial anomaly types can be obtained using a neural network. Selectively, the neural network can first be input with a training chip bonding image, labeled electrode plate parameters of the electrode plates in the training chip bonding image, and labeled anomaly types. The labeled electrode plate parameters can be displayed in the same way as the various display methods for electrode plate parameters described above, and the classification of labeled anomaly types is the same as the initial anomaly type / corrected anomaly type described above. Subsequently, the neural network is trained based on this, and the parameters of the neural network are adjusted to converge the loss function of the neural network.

[0028] In embodiments of the present invention, the training chip bonding image used to train a neural network may be the chip initially collected, or it may be a chip bonding image obtained by performing data augmentation such as scaling, translation, inversion, and brightness adjustment on the original chip bonding image. Figure 3 is an illustrative diagram of a chip bonding image initially acquired from a bonding apparatus according to an example of an embodiment of the present application. As shown in Figure 3, the chip bonding image may include a plurality of electrode plates, each electrode plate may have corresponding bonding balls and / or bonding wires. Figure 4 is a diagram showing an example of labeling the initially acquired chip bonding image according to an example of an embodiment of the present application. In Figure 4, electrode plate parameters, including the electrode plate size parameter, bonding ball parameter, and bonding wire parameter, can be labeled from the original chip bonding image, and furthermore, the labeled anomaly type of each electrode plate can be labeled. Figure 5 is a chip bonding image obtained by augmenting the original chip bonding image according to an example of an embodiment of the present application. In Figure 5, a portion of the original chip bonding image shown in Figure 3 is cropped and inverted to obtain a data-enhanced chip bonding image for training a neural network. Furthermore, in Figure 5, the electrode plate parameters and the abnormality type of each electrode plate are indicated on the data-enhanced chip bonding image.

[0029] After the neural network has been trained, the trained neural network can be optionally used to examine the input chip bonding image to obtain the electrode plate parameters and initial anomaly type of the electrode plate of the chip.

[0030] After obtaining electrode plate parameters and initial anomaly types of the electrode plates from a chip bonding image using a neural network, the electrode plate parameters can be further calculated, the initial anomaly type of the electrode plate can be corrected based on the calculation results, and the corrected anomaly type of the electrode plate can be obtained.

[0031] In this example, the electrode plate parameters of a normal electrode plate can be selected and statistically calculated based on the electrode plate parameters. Considering that a set of electrode plates on a chip in a chip bonding image often have the same or similar electrode plate size, bonding ball size, bonding ball position, and main alignment direction of bonding wires, the electrode plate parameters of a normal electrode can be estimated from the results of statistical analysis or averaging of the electrode plate parameters. In one example, the electrode plate parameters of a normal electrode plate may include at least one of the statistical or dominant alignment direction of bonding wires in a normal electrode plate, the average position of the center of the bonding balls, or the average radius of the bonding balls.

[0032] For example, the dominant alignment direction of bonding wires in a normal electrode plate can be determined by statistically counting the number of bonding wires where the endpoints of bonding wires away from the bonding ball intersect with each boundary of the electrode plate or chip bonding image (e.g., top, bottom, left, and right boundaries). For instance, statistics on the alignment direction of bonding wires in a chip bonding image can be obtained based on the ratio of the number of intersections between bonding wires and the top, bottom, left, and right boundaries of the chip bonding image to the total number of bonding wires. Specifically, the ratio of the number of intersections between the endpoints of bonding wires away from the bonding ball and the top, bottom, left, and right boundaries of the chip bonding image to the total number of bonding wires can be expressed as [Pt, Pd, Pl, Pr], respectively. Here, for example, Pt can be expressed as Pt = Number(top wire lines) / Number(total wire lines). In the formula, Number(top wire lines) indicates the number of intersections between the endpoints of bonding wires away from the bonding ball and the upper boundary of the chip bonding image, Number(total wire lines) indicates the total number of intersections with each boundary of the chip bonding image, and the remaining Pd, Pl, and Pr similarly indicate the statistics in the alignment direction of the lower boundary, left boundary, and right boundary, respectively.

[0033] Figure 6 is a schematic diagram illustrating the acquisition of statistics on the arrangement direction of bonding wires according to an example of an embodiment of the present invention. In Figure 6, the total number of wire lines that intersect with each boundary of all chip bonding images is 4 (bonding wires extending toward the lower boundary cannot intersect with the lower boundary of the chip bonding image, and the figure only shows the downward extension direction), and the total number of wire lines that intersect with the upper boundary of the chip bonding image is 4. Since the number of lines is also 4, Pt is calculated to be 1. Similarly, Pd, Pl, and Pr shown in Figure 6 are all 0, and the sequence direction expressed by the above ratio can be statistically represented as [1.0,0,0,0].

[0034] Figure 7 is a schematic diagram illustrating the acquisition of statistics on the alignment direction of bonding wires according to another embodiment of the present invention. In Figure 7, the total number of wire lines intersecting each boundary of all chip bonding images is 3, the number of intersections with the upper and right boundaries of the chip bonding image is 0, the number of intersections with the left boundary is 2, and the number of intersections with the lower boundary is 1. Therefore, the alignment direction expressed by the above ratio can be statistically represented as [0.0, 0.33, 0.67 0.0].

[0035] In another example, the average position of the center of a bonding ball on a normal electrode plate can be defined as the average position of the center of the bonding ball on a normal electrode plate, calculated by taking the distance from the center of the bonding ball to the top, bottom, left, and right boundaries of the corresponding electrode plate and the ratio of the electrode plate sizes in the corresponding direction. For example, the distance from the center of the bonding ball on a given electrode plate to the top boundary of the corresponding electrode plate can be expressed as Dist(Ball Center, PAD Top line), and the height of the corresponding electrode plate can be expressed as Height of PAD. Thus, the position Dt from the center of the bonding ball on the electrode plate to the top boundary of the corresponding electrode plate can be expressed as Dt = Distance(Ball Center, PAD Top line). It can be expressed as line) / Height of PAD, and the average value of the corresponding Dt values ​​for all electrode plates in the chip bonding image is the average position from the center of the bonding ball to the upper boundary of the electrode plate in a normal electrode plate. (outside 1) It can be set to TIFF2026059753000002.tif6159. Similarly, the average position from the center of the bonding ball to the lower boundary, left boundary, and right boundary of the electrode plate is, (outside 2) TIFF2026059753000003.tif7159, (Outside 3) TIFF2026059753000004.tif6159, (outside 4) It can be represented as TIFF2026059753000005.tif6159.

[0036] Figure 8 is a schematic diagram illustrating how to obtain the average position of the center of the bonding ball according to one embodiment of the present invention. In Figure 8, the average value of the position Dt from the center of the corresponding bonding ball to the upper boundary of the corresponding electrode plate for all electrode plates in the chip bonding image is obtained, and the average position from the center of the bonding ball to the upper boundary of the electrode plate in a normal electrode plate is obtained. (outside 5) The file TIFF2026059753000006.tif7159 was used, and the calculated value was 0.51. Similarly, the average position from the center of the bonding ball to the lower boundary, left boundary, and right boundary of the electrode plate was calculated as follows: (outside 6) TIFF2026059753000007.tif6158, (outside 7) TIFF2026059753000008.tif6158, (outside 8) This can be represented as TIFF2026059753000009.tif6158, with values ​​of 0.49, 0.52, and 0.48, respectively. Therefore, the average position of the center of the bonding balls can be expressed as [0.51,0.49,0.52,0.48].

[0037] Figure 9 is a schematic diagram illustrating how to obtain the average position of the center of a bonding ball according to another embodiment of the present invention. In Figure 9, there are two cases: one where the distance between the center of the bonding ball and the upper boundary of the electrode plate is short, and another where it is far, and the average value can be statistically calculated for each case. Here, the two average values ​​of the position Dt from the center of the corresponding bonding ball to the upper boundary of the corresponding electrode plate for all electrode plates in the chip bonding image are used, respectively, to obtain the average position from the center of the bonding ball to the upper boundary of the electrode plate in a normal electrode plate. (outer 9) The file TIFF2026059753000010.tif7158 was obtained, and the calculated values ​​were 0.26 and 0.75. Similarly, the average position from the center of the bonding ball to the lower boundary, left boundary, and right boundary of the electrode plate was calculated, respectively. (Outside 10) TIFF2026059753000011.tif6158, (Outside 11) TIFF2026059753000012.tif6158, (Outside 12) This can be represented as TIFF2026059753000013.tif6158, with values ​​of 0.74 / 0.25, 0.51 / 0.50, and 0.49 / 0.50, respectively. Therefore, the average position of the center of the bonding ball can be expressed as [0.26,0.74,0.51,0.49] and [0.75,0.25,0.50,0.50], respectively, as they are close to the upper boundary of the electrode plate.

[0038] Furthermore, the statistical average radius of each bonding ball on each electrode plate in the chip bonding image is compared to the average radius of solder balls on a normal electrode plate. (Outside 13) This can be expressed as TIFF2026059753000014.tif6160, which can be represented as the ratio of the total radius Sum(R) of each bonding ball to the number of electrode plates, i.e., (Outside 14) TIFF2026059753000015.tif6160 = Sum(R) / Number of PAD. Figure 10 is a schematic diagram illustrating how to obtain the average radius of bonding balls according to an example of the embodiment of the present application. In Figure 10, the radius of each bonding ball on the electrode plate is calculated separately, and the average radius of bonding balls is calculated. (Outside 15) It can be determined that TIFF2026059753000016.tif6160 is 25.

[0039] After calculating the electrode plate parameters of a normal electrode plate, the initial abnormality type of the electrode plate can be selectively corrected based on the deviation between the calculated electrode plate parameters and the electrode plate parameters of the normal electrode plate. In one example, various classifications and judgments of the electrode plate parameters, combined with the deviation from the electrode plate parameters of a normal electrode plate, can be used to derive various different abnormality types of the electrode plate. Figure 11 is a flowchart for determining the abnormality type of an electrode plate according to one example of an embodiment of the present invention. As shown in Figure 11, first, it is determined whether or not there are bonding wires on the electrode plate. If there are bonding wires, it is determined whether or not the bonding wires are broken or if the direction of the bonding wires is incorrect, or further, whether or not the bonding balls are missing from the bonding balls. Situations such as broken bonding wires, incorrect direction of bonding wires, and missing bonding balls are all considered to be abnormal types of the electrode plate (here, by combining the statistical or dominant direction of the bonding wire arrangement in the electrode plate parameters of a normal electrode plate, it is possible to clarify whether or not there are broken bonding wires or incorrect direction of bonding wires, and correct any errors in the initial determination of the abnormal type of the electrode plate). Also, if there are no bonding wires on the electrode plate, the condition of the bonding balls can be determined.An initial abnormality type in which the center of the bonding ball is offset from a predetermined position on the electrode plate can be determined to be a misfire (here, by combining the average position of the center of the bonding ball in the electrode plate parameters of a normal electrode plate, it is possible to clarify whether or not there is a misfire in the center of the bonding ball, and correct any errors in the determination of the initial abnormality type of the electrode plate). An initial abnormality type in which the displayed shape of the bonding ball is close to a predetermined shape (e.g., concentric circles) or the radius of the bonding ball exceeds a predetermined threshold can be determined to be a misfire (here, by combining the average radius of the bonding ball in the electrode plate parameters of a normal electrode plate, it is possible to clarify whether the bonding ball is too large, whether the suspected abnormality type is a misfire, etc., and correct any errors in the determination of the initial abnormality type of the electrode plate). If there is an error in determining the initial abnormality type, it can be corrected. An initial abnormality type in which the shape of the bonding ball is irregular can be determined to be a foreign object (here, by combining the average position of the center of the bonding ball and / or the average radius of the bonding ball in the electrode plate parameters of a normal electrode plate, it can be clarified whether or not it should be corrected to a misaligned bonding ball or a dry firing). An initial abnormality type in which the shape and position of the bonding ball are close to the shape of a normal bonding ball but there is no bonding wire can be determined to be a delamination (here, by combining the average radius of the bonding ball in the electrode plate parameters of a normal electrode plate, it can be clarified whether or not it should be corrected to a dry firing of the bonding ball). Other conditions are considered normal, and if they are judged to be abnormal, there is a possibility of a false alarm.

[0040] Hereinafter, with reference to Figure 12, a chip anomaly detection device 1200 according to an embodiment of the present invention will be described. Figure 12 is a block diagram of a chip anomaly detection device according to an embodiment of the present application. As shown in Figure 12, the chip anomaly detection device 1200 includes an acquisition unit 1210, a detection unit 1220, and a correction unit 1230. In addition to these units, the chip anomaly detection device 1200 may include other components, but these components are not related to the content of the embodiment of the present invention, so their illustration and description are omitted here. Furthermore, the specific details of the following operations performed by the chip anomaly detection device 1200 of the embodiment of the present invention are the same as those described above with reference to Figure 1, so repeated explanations of the same details are omitted here to avoid repetition.

[0041] The acquisition unit 1210 of the chip anomaly detection device 1200 shown in Figure 12 acquires a chip bonding image.

[0042] The acquisition unit 1210 can acquire a chip bonding image generated during the bonding process by a method of deriving it from the bonding apparatus. Figure 2 is a chip bonding image according to an example of an embodiment of the present invention. As shown in Figure 2, the chip bonding image may include at least one electrode plate, each electrode plate may have bonding balls on it and may be connected by bonding wires. In the bonding process, the presence or absence of abnormalities in the electrode plates can be determined by the size and position of the electrode plates and the condition of the bonding balls and / or bonding wires on the electrode plates as they appear in the chip bonding image.

[0043] The detection unit 1220 acquires electrode plate parameters and initial abnormality types of the electrode plate of the chip based on the chip bonding image, and the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate.

[0044] In embodiments of the present invention, the content of each item in the electrode plate parameters can be shown in various ways. Selectively, among the electrode plate parameters, the electrode plate size parameter can be represented by the center coordinates, width, and height of the rectangular bounding box of the electrode plate, or by the coordinates of each corner point of the electrode plate. Also, among the electrode plate parameters, the bonding ball parameter may include parameters such as the center coordinates of the bonding ball and the radius / diameter of the bonding ball. Selectively, among the electrode plate parameters, the bonding wire parameter may include the coordinates of each endpoint of the wire on the electrode plate. For example, if the bonding wire is a straight segment, the bonding wire parameter may include the coordinates of the two endpoints of the segment. Furthermore, if the bonding wire is curved or bent, for example, the bonding wire parameter may further include one or more coordinates at the curved or bent point of the bonding wire. The above methods of displaying the content of each item in the electrode plate parameters are merely examples, and in actual applications, any corresponding electrode plate parameters can be selected and displayed according to the application scene, and are not limited thereto.

[0045] In embodiments of the present invention, the detection unit 1220 can acquire electrode plate parameters and detect initial anomaly types using a neural network. For example, first, by constructing an end-to-end deep learning network model, the electrode plate parameters and initial anomaly types of the electrode plates of the chip can be acquired based on the chip bonding image. In this process, a training chip bonding image and the labeled electrode plate parameters and labeled anomaly types of the electrode plates in the training chip bonding image can be selected as input to the neural network. Here, labeled electrode plate parameters, including the electrode plate size parameter, bonding ball parameter, and bonding wire parameter of the electrode plates, can also be input to the training chip bonding image, and anomaly types can be labeled thereto. After acquiring the training chip bonding image and the labeled electrode plate parameters and labeled anomaly types of its electrode plates, the neural network can be trained based on this, and the parameters of the neural network can be adjusted to converge the loss function of the neural network.

[0046] In embodiments of the present invention, the training chip bonding image used to train the neural network may be the initially collected chip bonding image, or it may be a chip bonding image obtained by performing data augmentation on the original chip bonding image. For example, the training chip bonding image can be obtained by performing at least one transformation such as scaling, translation, inversion, or brightness adjustment on the original chip bonding image. Note that, regarding the labeled electrode plate parameters corresponding to the original chip bonding image, if the data augmentation process includes an augmentation method modified by changes in geometric structure, it is necessary to recalculate the labeled electrode plate parameters corresponding to the data augmented chip bonding image. Data augmentation of the original chip bonding image effectively expands the image data used to train the neural network, providing a large number of samples to improve the detection accuracy of the neural network and enhance the accuracy of chip anomaly detection. The methods for collecting and augmenting the training chip bonding image in embodiments of the present invention are merely examples, and any method for augmenting the training chip bonding image can be used in actual applications, without limitation.

[0047] After training the neural network is complete, the detection unit 1220 can optionally use the trained neural network to inspect the input chip bonding image and obtain the electrode plate parameters and initial abnormality type of the electrode plate of the chip. Optionally, the initial abnormality type of the electrode plate and the corrected abnormality type of the electrode plate obtained by the final correction in the embodiments of the present invention can include various representations of normal / abnormal conditions that occurred during the chip bonding process. For example, the initial abnormality type and / or the corrected abnormality type can include at least one of normal, probe mark, missing, dry firing, foreign matter, peeling, and misalignment. Of the above types, normal indicates that the bonding balls, bonding wire size and position, etc., of the electrode plate on the chip are all normal during the bonding process, while probe mark indicates a contact mark left by the probe contacting the chip under test, and is a type of normal electrode plate. Furthermore, "missing" indicates an abnormality where both bonding balls and bonding wires are present on the electrode plate, but the bonding balls / bonding wires are missing; "dry firing" indicates an abnormality where the bonding balls on the electrode plate have not successfully bonded; "foreign matter" indicates an abnormality where foreign matter is present within the bonding balls on the electrode plate; "peeling" indicates an abnormality where the bonding balls on the electrode plate have peeled off after bonding; and "misaligned firing" indicates an abnormality where the bonding balls on the electrode plate are not bonded in the correct position. The above enumeration and interpretation of various electrode plate abnormalities are merely examples, and in actual applications, different normal / abnormal types of electrode plates can be distinguished for different specific bonding scenes and bonding needs, and none of these are considered limiting here.

[0048] In embodiments of the present invention, a selectively trained neural network can be used to determine different initial abnormality types of electrode plates based on the electrode parameters of the acquired chip bonding image. Here, the neural network can be used to comprehensively judge various electrode plate parameters in the chip bonding image, thereby deriving the initial abnormality type of the electrode plate. Furthermore, in one example, various initial abnormality types of electrode plates can also be derived by various simple classifications and judgments of the electrode plate parameters. For example, first, it can be determined whether or not there is a bonding wire on the electrode plate. If there is a bonding wire, it can be determined whether or not the bonding wire is broken or if the direction of the bonding wire is incorrect, or further, whether or not the bonding ball is missing relative to the bonding ball. Situations such as a broken bonding wire, an incorrect direction of the bonding wire, or a missing bonding ball are all considered to be an initial abnormality type of missing electrode plate. Also, if there is no bonding wire on the electrode plate, the state of the bonding ball can be determined. An initial abnormality type in which the center of the bonding ball is offset from the predetermined position on the electrode plate can be determined to be a mis-firing; an initial abnormality type in which the indicated shape of the bonding ball approaches a predetermined shape (e.g., concentric circles) or the radius of the bonding ball exceeds a predetermined threshold can be determined to be a dry firing; an initial abnormality type in which the shape of the bonding ball is irregular can be determined to be a foreign object; and an initial abnormality type in which the shape and position of the bonding ball approaches the shape of a normal bonding ball but there is no bonding wire can be determined to be a delamination. Other conditions are considered normal, and if an abnormality is judged, it may be a false alarm. The above specific methods for determining various electrode plate abnormalities are merely examples, and in actual applications, different methods for determining electrode plate abnormalities can be used for different specific bonding scenes and bonding needs, and are not limited to any one of them.

[0049] The correction unit 1230 performs calculations on the electrode plate parameters, corrects the initial abnormality type of the electrode plate based on the calculation results, and obtains the corrected abnormality type of the electrode plate.

[0050] In embodiments of the present invention, the modification unit 1230 can optionally statistically calculate the electrode plate parameters of a normal electrode plate based on the electrode plate parameters. Considering that a set of electrode plates on a chip in a chip bonding image often have the same or similar electrode plate size, bonding ball size, bonding ball position, and main alignment direction of bonding wires, the electrode plate parameters of a normal electrode can be estimated by statistical or average results of the electrode plate parameters. In one example, the electrode plate parameters of a normal electrode plate may include at least one of the statistical or dominant alignment direction of bonding wires in a normal electrode plate, the average position of the center of the bonding balls, or the average radius of the bonding balls. For example, the statistical alignment direction of bonding wires can be obtained by statistically counting the number of bonding wires at which the endpoints of bonding wires away from the bonding balls intersect with each boundary (e.g., top, bottom, left, and right boundaries) of the electrode plate or chip bonding image, or the direction with the most bonding wires can be designated as the dominant alignment direction of bonding wires in a normal electrode plate. Furthermore, for example, the statistical average of the distances from the center of the bonding ball to each boundary of the corresponding electrode plate may be used as the average position of the center of the bonding ball on a normal electrode plate, or the average of the ratio of the distance from the center of the bonding ball to each boundary of the corresponding electrode plate to the size of the electrode plate in the corresponding direction may be used as the average position of the center of the bonding ball on a normal electrode plate. Also, for example, the statistical average radius of each bonding ball on each electrode plate in the chip bonding image can be used as the average radius of the bonding balls on a normal electrode plate. The above types of electrode plate parameters and calculation methods for various normal electrode plates are merely examples, and in actual applications, different electrode plate parameters for normal electrode plates can be used depending on different specific bonding scenes and bonding needs, and are not limited to any one of them.

[0051] After calculating the electrode plate parameters of a normal electrode plate, the correction unit 1230 can optionally correct the initial abnormality type of the electrode plate based on the deviation between the calculated electrode plate parameters and the electrode plate parameters of the normal electrode plate. By utilizing the correction process of the electrode plate parameters of a normal electrode plate, it is possible to effectively avoid misjudgments and confusions between various abnormal conditions relatively close to the electrode plate. For example, it is also possible to obtain a corrected abnormality type by further correcting various abnormality types of the electrode plate by combining the classification and judgment of the electrode plate parameters described above with a comparison with the electrode plate parameters of a normal electrode plate. For example, the presence or absence of bonding wires, and a comparison between the dominant arrangement direction of bonding wires in a normal electrode plate and the arrangement direction of bonding wires in the electrode plate on the chip bonding image, can effectively distinguish whether or not there is an abnormality type such as a missing wire. A comparison between the average position of the center of the bonding balls and the position of the center of the bonding balls in the electrode plate on the chip bonding image can effectively distinguish abnormality types such as misalignment or foreign matter. Comparing the average radius of bonding balls with the radius of bonding balls on the electrode plate in the chip bonding image can effectively distinguish between abnormal types such as dry firing, foreign matter, and delamination. The correction methods described above for correcting various types of electrode plate abnormalities are merely examples, and in actual applications, different correction methods can be used to correct different types of abnormalities for different specific bonding scenes and bonding needs, and these methods are not limited to any one example.

[0052] The chip anomaly detection device according to an embodiment of the present invention can acquire electrode plate parameters and initial anomaly types from the acquired chip bonding image, and can correct the initial anomaly type from the calculation results of the electrode plate parameters to obtain more accurate chip anomaly detection results. The chip anomaly detection method, device, and computer-readable storage medium of the present invention can reduce the false alarm rate of chip anomaly detection and effectively improve the positive detection rate.

[0053] The chip anomaly detection device according to an embodiment of the present application will be described below with reference to Figure 13. Figure 13 is a block diagram of the chip anomaly detection device according to an embodiment of the present application. As shown in Figure 13, the device 1300 may be a computer or a server.

[0054] As shown in Figure 13, the device 1300 includes one or more processors 1310 and memory 1320. Naturally, the device 1300 may further include input devices and output devices (not shown) that can be interconnected via a bus system and / or other types of connection mechanisms. It should be noted that the components and structure of the chip anomaly detection device 1300 shown in Figure 13 are examples and not limiting, and the chip anomaly detection device 1300 may have other components and structures as needed.

[0055] The processor 1310 may be a central processing unit (CPU) or another type of processing unit having data processing capability and / or command execution capability, and may perform desired functions using computer program commands stored in memory 1220, and may include: acquiring a chip bonding image; acquiring electrode plate parameters and initial abnormality type of the electrode plate of the chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate; performing calculations on the electrode plate parameters, correcting the initial abnormality type of the electrode plate based on the calculation results, and acquiring the corrected abnormality type of the electrode plate.

[0056] The memory 1320 may include one or more computer program products that include various types of computer-readable storage media, such as volatile memory and / or non-volatile memory. The computer-readable storage media may store one or more computer program commands, and the processor 1310 may execute the program commands to perform the functions of the apparatus of the embodiment of the present application described above and / or other desired functions, and / or to perform the chip abnormality detection method of the embodiment of the present application. The computer-readable storage media may also store various application programs and various data.

[0057] The following describes a computer-readable storage medium in which the computer program commands of the embodiment of the present application are stored. When the computer program commands are executed by the processor, the following steps are realized: acquiring a chip bonding image; acquiring electrode plate parameters and initial abnormality type of the electrode plate of the chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate; and performing calculations on the electrode plate parameters, correcting the initial abnormality type of the electrode plate based on the calculation results, and acquiring the corrected abnormality type of the electrode plate.

[0058] Naturally, the specific embodiments described above are merely examples and not limiting. Furthermore, those skilled in the art will be able to achieve the effects of the present invention by combining or merging multiple steps or apparatus from each of the embodiments described above based on the concept of the present invention, and such combined embodiments are also included in the present invention, and such combinations will not be described individually here.

[0059] The advantages, benefits, and effects mentioned herein are examples only and not limiting, and should not be considered essential for each embodiment of the present invention. Furthermore, the specific details of the invention described above are for illustrative purposes only, to facilitate understanding, and not limiting, and the details do not limit the implementation of the present invention to the use of the specific details described above.

[0060] The block diagrams of the devices, apparatus, equipment, and systems referred to herein are illustrative and do not require or imply that they must be connected, arranged, or configured as shown in the block diagrams. As those skilled in the art will understand, these devices, apparatus, equipment, and systems can be connected, arranged, and configured in any way. Terms such as “includes,” “equipment,” and “have” are non-exclusive terms meaning “includes but not limited to” and can be used interchangeably. As used herein, “or” and “and” mean “and / or” and can be used interchangeably unless the context explicitly indicates otherwise. As used herein, “etc.” means “etc. but not limited to” and can be used interchangeably.

[0061] The flowcharts and descriptions of the methods of the present invention are illustrative and do not require or imply that the steps of each embodiment must be performed in the order presented. As those skilled in the art will understand, the steps in the above embodiments can be performed in any order. Terms such as “then,” “next,” and “then” are not intended to limit the order of the steps, and are used solely to guide the reader as they read through the description of the method. Furthermore, any reference to singular elements using articles such as “one,” “one,” or “the” should not be understood as limiting the element to a singular form.

[0062] Furthermore, the steps and apparatus in each embodiment of this specification are not limited to any particular embodiment. In practice, new embodiments can be conceived by combining some of the relevant steps and apparatus in each embodiment of this specification based on the concept of the present invention, and these new embodiments are also included within the scope of the present invention.

[0063] The various operations of the above-described method can be performed by any suitable means capable of performing the corresponding function. This means may include, but is not limited to, various hardware and / or software components and / or modules, including circuits, application-specific integrated circuits (ASICs), or processors.

[0064] Various exemplary logic blocks, modules, and circuits described herein can be realized or executed by using general-purpose processors, digital signal processors (DSPs), ASICs, field-configurable circuit arrays (FPGAs) or other programmable logic devices (PLDs), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any commercially available processor, controller, microcontroller, or state machine. The processor may be a combination of computing equipment, such as a combination of a DSP and a microprocessor, and may be realized as multiple microprocessors, one or more microprocessors working with a DSP core, or any other such configuration.

[0065] The steps of the methods or algorithms described in connection with the present invention can be directly embedded in hardware, in software modules executed by a processor, or in a combination of the two. Software modules can reside in any form of tangible storage medium. Some examples of storage media that can be used include random access memory (RAM), read-only memory (ROM), flash memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, etc. The storage medium can be coupled to a processor so that the processor can read information from and write information to the storage medium. Alternatively, the storage medium and processor may be integrated. Software modules can be a single command or a number of commands and can be distributed across several different code segments, different programs, and multiple storage media.

[0066] The method of the present invention includes one or more actions to achieve the above method. The method and / or actions are interchangeable without departing from the claims. In other words, unless a specific order of actions is specified, the specific order of actions and / or use can be modified without departing from the claims.

[0067] The above functions can be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions can be stored as one or more commands on a tangible, computer-readable storage medium. Any tangible medium accessible by a computer can be used as the storage medium. Examples, but not limited to, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM, or other optical disk storage, magnetic disk storage or other magnetic storage devices, or other tangible media that can be used to transport or store the desired program code in the form of computer-accessible commands or data structures. The disks used herein may include compact discs (CDs), laserdiscs, optical discs, digital-purpose discs (DVDs), floppy disks, and Blu-ray discs.

[0068] Therefore, a computer program product can perform the operations described in the specification. For example, such a computer program product may be a computer-readable storage medium having tangibly stored (and / or encoded) commands, the commands being executable by one or more processors to perform the operations described herein. A computer program product may include packaging materials.

[0069] Software or commands may be transmitted via a transmission medium. For example, software may be transmitted from a website, server, or other remote source using a transmission medium such as coaxial cable, fiber optic cable, twisted pair, or digital subscriber line (DSL), or using wireless technologies such as infrared, radio, or microwave.

[0070] Furthermore, modules and / or other suitable means for performing the methods and techniques described herein may, as appropriate, be obtained by download and / or other means by a user terminal and / or base station. For example, such a device may be connected to a server to facilitate the transmission of means for performing the methods described herein. Alternatively, the various methods described herein may be provided via storage means (e.g., physical storage media such as RAM, ROM, CD, floppy disk, etc.) so that the various methods can be obtained when a user terminal and / or base station is connected to the device or when storage means are provided to the device. Any other suitable techniques for providing the methods and techniques described herein to a device may also be used.

[0071] Other examples and implementations are within the scope and spirit of the present invention and the appended claims. For example, due to the nature of software, the functions described above can be implemented using software executed by a processor, hardware, firmware, hardwired, or any combination thereof. The features that implement the functions may also be physically located in various locations, including being distributed so that some of the functions are implemented in physically different locations. Furthermore, the "or" used in enumerations of items beginning with "at least one" as used herein, including in the claims, indicates separate enumerations, so for example, the enumeration "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Moreover, the term "exemplary" does not mean that the examples described are preferred or superior to other examples.

[0072] Various modifications, substitutions, and alterations to the techniques described herein can be made without departing from the teaching techniques as defined by the appended claims. Furthermore, the claims of the present invention are not limited to specific embodiments of the components, means, methods, and operations of the processes, machines, manufactures, and events described above. Existing or future-developed components, means, methods, or operations of processes, machines, manufactures, and events may be used to perform substantially the same functions or achieve substantially the same results as those described herein in their corresponding embodiments. Accordingly, the appended claims include such components, means, methods, or operations of processes, machines, manufactures, and events.

[0073] The above description of embodiments of the present invention is provided to enable those skilled in the art to manufacture or use the invention. Various modifications to these embodiments are obvious to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the scope of the invention. Thus, the invention should not be limited to the embodiments described herein, but rather the broadest scope should be given that is consistent with the principles and novel features of the invention described herein.

[0074] The above description is provided for illustrative and explanatory purposes only. Furthermore, this description is not intended to limit the embodiments of the present invention to the embodiments of the present invention. Various exemplary embodiments and examples have been described above, and those skilled in the art will recognize specific variations, modifications, changes, additions, and combinations thereof.

Claims

1. A chip anomaly detection method performed by a chip anomaly detection device, To obtain chip bonding images, The method involves obtaining the electrode plate parameters and the initial abnormality type of the electrode plate of the chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate. A method comprising: performing calculations on the electrode plate parameters; correcting the initial abnormality type of the electrode plate based on the calculation results; and obtaining the corrected abnormality type of the electrode plate.

2. Based on the chip bonding image, obtaining the electrode plate parameters of the electrode plate of the chip and the initial abnormality type of the electrode plate is: The method according to claim 1, comprising using a neural network to obtain electrode plate parameters of the electrode plate of the chip and the initial abnormality type of the electrode plate based on the chip bonding image.

3. The aforementioned neural network is The steps include acquiring a training chip bonding image and acquiring the labeled electrode plate parameters and labeled anomaly type of the electrode plate in the training chip bonding image, The method according to claim 2, wherein the neural network is trained using the steps of: training the neural network based on labeled electrode plate parameters and labeled anomaly types of electrode plates in the training chip bonding image, and adjusting the parameters of the neural network to converge the loss function of the neural network.

4. The method according to claim 3, wherein the training chip bonding image is obtained by performing data augmentation on the original chip bonding image.

5. The size parameter of the electrode plate includes the coordinates of each corner point of the electrode plate, The bonding ball parameters include the center coordinates of the bonding ball on the electrode plate and the radius of the bonding ball, and / or The method according to claim 1, wherein the bonding wire parameter includes the coordinates of each endpoint of the bonding wire on the electrode plate.

6. Calculating the electrode plate parameters is, The method according to claim 1, comprising calculating the electrode plate parameters of a normal electrode plate based on the electrode plate parameters.

7. The electrode plate parameters of the normal electrode plate are: The method according to claim 6, comprising at least one of the following: statistical or dominant alignment direction of bonding wires in a normal electrode plate, average position of the center of a bonding ball, and average radius of a bonding ball.

8. Correcting the initial abnormality type of the electrode plate based on the calculation results is, The method according to claim 6, comprising correcting the initial abnormality type of the electrode plate based on the deviation between the electrode plate parameter and the calculated electrode plate parameter of the normal electrode plate.

9. The initial abnormality type and / or the corrected abnormality type are, The method according to any one of claims 1 to 8, comprising at least one of normal, probe marks, gaps, dry firing, foreign matter, peeling, and misalignment.

10. An acquisition unit for acquiring chip bonding images, A detection unit that acquires electrode plate parameters and initial abnormality type of the electrode plate of a chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate. A chip abnormality detection device, comprising: a correction unit that performs calculations on the electrode plate parameters, corrects the initial abnormality type of the electrode plate based on the calculation results, and obtains the corrected abnormality type of the electrode plate.

11. Processor and A memory containing computer program commands, When the aforementioned computer program command is executed by the processor, the processor: Steps to obtain chip bonding images, A step of obtaining electrode plate parameters and initial abnormality type of the electrode plate of the chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate. A chip abnormality detection device that performs the steps of: performing calculations on the electrode plate parameters, correcting the initial abnormality type of the electrode plate based on the calculation results, and obtaining the corrected abnormality type of the electrode plate.

12. Computer process commands are stored, When the aforementioned computer process command is executed by the processor, Steps to obtain chip bonding images, A step of obtaining electrode plate parameters and initial abnormality type of the electrode plate of a chip based on the chip bonding image, wherein the electrode plate parameters include the size parameter, bonding ball parameter, and bonding wire parameter of the electrode plate. A computer-readable storage medium that performs the steps of: performing calculations on the electrode plate parameters; correcting the initial abnormality type of the electrode plate based on the calculation results; and obtaining the corrected abnormality type of the electrode plate.

Images