substrate structure

Abstract

When semiconductor devices are used at high voltage, the electric field strength increases at the bent portion where the leads are bent at approximately a right angle, which can cause corona discharge from the bent portion. [Solution] The lead 15 of the semiconductor device 10 of the substrate structure 1 comprises a base end portion 15a extending from the package portion 11 along the mounting surface 20a, a first bent portion 15b continuous with the base end portion 15a and bent at an obtuse angle toward the mounting surface 20a, an inclined portion 15c extending from the first bent portion 15b toward the mounting surface 20a and inclined with respect to the mounting surface 20a, a second bent portion 15d continuous with the inclined portion 15c and bent at an obtuse angle toward away from the mounting surface 20a, and a tip portion 15e extending from the second bent portion 15d toward the conductive patterns 22B, 22C and connected to the conductive patterns 22B, 22C.

Description

Technical Field

[0001] The present invention relates to a substrate structure for high voltage including a substrate on which a semiconductor device is mounted on a mounting surface.

Background Art

[0002] As this kind of technology, for example, Patent Document 1 proposes a semiconductor device including a chip-shaped package portion in which a semiconductor element is sealed with resin, and a plurality of leads extending from an end surface of the package portion and soldered to a conductive pattern of a substrate. The semiconductor device has a state in which one surface of both surfaces of the package portion is disposed on the mounting surface of the substrate, and each lead is bent substantially at a right angle from a base end portion, and a tip end portion of the lead is soldered to the conductive pattern of the substrate.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when the semiconductor device is used at a high voltage, the electric field strength at the bent portion where the lead is bent substantially at a right angle increases, and corona discharge may occur from the bent portion.

[0005] The present invention has been made in view of such points, and an object thereof is to provide a substrate structure capable of suppressing corona discharge from the leads of a semiconductor device even when used at a high voltage.

Means for Solving the Problems

[0006] In view of the above problems, the substrate structure according to the present invention is a high-voltage substrate structure including a substrate on which a semiconductor device is mounted on a mounting surface, wherein the semiconductor device comprises a chip-shaped package portion in which a semiconductor element is sealed with resin, and a plurality of leads extending from the end face of the package portion and soldered to a conductive pattern on the substrate, wherein, with one of the two surfaces of the package portion positioned on the mounting surface of the substrate, each lead comprises a base end portion extending from the package portion along the mounting surface, a first bent portion continuous with the base end portion and bent at an obtuse angle toward the mounting surface, an inclined portion extending from the first bent portion toward the mounting surface and inclined with respect to the mounting surface, a second bent portion continuous with the inclined portion and bent at an obtuse angle toward away from the mounting surface, and a tip portion extending from the second bent portion toward the conductive pattern and connected to the conductive pattern.

[0007] According to the present invention, with one of the two surfaces of the package portion positioned on the mounting surface of the substrate, the lead extending from the package portion includes a first bent portion bent at an obtuse angle toward the mounting surface and a second bent portion bent at an obtuse angle toward the mounting surface. In this way, the first and second bent portions bent at obtuse angles suppress the concentration of the electric field in the bent portion and suppress corona discharge from the bent portion, compared to leads with a bent portion bent at approximately a right angle as in the past.

[0008] In a more preferred embodiment, the substrate comprises a substrate body made of a metal material, an insulating layer covering the substrate body, and a conductive layer soldered to the leads and formed on the insulating layer as a conductive pattern, wherein the conductive layer and the substrate body are electrically insulated by the insulating layer.

[0009] In this embodiment, since the conductive layer and the substrate body are electrically insulated by the insulating layer, the electric field from the conductive layer toward the substrate body depends on the insulating layer. That is, with the insulating layer in between, the conductive layer and the substrate body function as a parallel plate electrode structure, which can mitigate the electric field from the conductive layer and the leads connected thereto toward the surroundings. As a result, the electric field from the leads toward the surroundings (e.g., air) is mitigated, thus mitigating the non-uniformity of the electric field strength. Furthermore, heat generated by semiconductor devices, etc., can be transferred to the substrate body for heat dissipation.

[0010] In a more preferred embodiment, the substrate is placed on a metal heat sink via an insulating plate, the heat sink is connected to ground, and the substrate body of the substrate and the heat sink are electrically insulated via the insulating plate.

[0011] In this embodiment, the conductive layer and the substrate body are electrically insulated by an insulating layer between them, so the conductive layer and the substrate body function as a first capacitor with parallel plate electrodes. The substrate body and the heat sink are electrically insulated by an insulating plate between them, so the substrate body and the heat sink function as a second capacitor with parallel plate electrodes. Due to the functions of the first and second capacitors, the potential of the substrate body becomes a floating potential, and the insulating layer and the insulating plate can divide the voltage from the conductive layer to the heat sink. In particular, since the thickness of the insulating layer is sufficiently thinner than the thickness of the heat sink, when the capacitance of the first capacitor is C1 and the capacitance of the second capacitor is C2, C1 >> C2. As a result, the potential difference between the potential of the conductive layer and the leads connected thereto and the potential of the substrate body becomes relatively small, and discharge from the leads to the substrate body can be suppressed.

[0012] In a more preferred embodiment, at least the lead is sealed with an insulating molding material.

[0013] In this embodiment, when the conductive layer (conductive pattern) and the lead are soldered together, a gap (air layer) is formed between them. However, by sealing at least the lead with an insulating molding material, the molding material can be filled into these gaps, thereby suppressing the occurrence of corona discharge in these gaps. [Effects of the Invention]

[0014] According to the present invention, corona discharge from the leads of a semiconductor device can be suppressed even when used at high voltage. [Brief explanation of the drawing]

[0015] [Figure 1] This is a schematic perspective view showing a substrate structure according to an embodiment of the present invention. [Figure 2] Figure 1 is a schematic perspective view of a semiconductor device mounted on a substrate. [Figure 3] (a) is a cross-sectional view of the substrate structure according to this embodiment, and (b) is an enlarged cross-sectional view of the substrate structure including the semiconductor device. [Modes for carrying out the invention]

[0016] The substrate structure according to the present invention will be described below with reference to Figures 1 to 3. The substrate structure 1 according to this embodiment is a high-voltage substrate structure that includes a substrate 20 on which a semiconductor device 10 is mounted on the mounting surface 20a. Note that in Figure 3(b), the insulating plate 61 and heat sink 62 shown in Figure 3(a) are omitted for the sake of explanation.

[0017] In this embodiment, the semiconductor device 10 includes a high-voltage semiconductor switching element (semiconductor element (not shown)) such as an FET (field-effect transistor) or a MOSFET (metal-oxide-semiconductor field-effect transistor). However, the semiconductor device 10 may include a diode (semiconductor element) instead of a semiconductor switching element.

[0018] In this embodiment, the substrate structure 1 is used, for example, in a high-voltage power module or the like, and the semiconductor devices 10 are used by being connected in series. Thereby, in a power module with an operating voltage of several kV to several tens of kV (for example, 10 kV or more), even if the breakdown voltage of one semiconductor device 10 is about one thousand and several hundred volts, the operating voltage can be shared among each of the semiconductor devices 10 connected in series. However, even if the operating voltage is shared among each semiconductor device 10, there are some semiconductor devices 10 with a large potential difference between the semiconductor device 10 and the ground, so it is also assumed that discharge occurs from the leads in the semiconductor device 10. From such a point, the following configuration is adopted in this embodiment.

[0019] In this embodiment, as shown in FIG. 1, a plurality (for example, four) of semiconductor devices 10 are mounted on the mounting surface 20a of the substrate 20. The semiconductor device 10 includes a chip-shaped package portion 11 in which the above-described semiconductor element (not shown) is encapsulated with resin, and a plurality of leads 15 (15A to 15C) that extend from an end surface of the package portion 11 and are soldered to conductive patterns 22B, 22C, etc. (see FIG. 3) of the substrate 20.

[0020] Although not shown, the package portion 11 is formed by connecting a semiconductor element to a lead frame by wire bonding or the like, and in this state, it is encapsulated (packaged) with resin. Here, leads 15 (15A to 15C) extending in a pin shape with a rectangular cross section protrude from the end surface of the package portion 11 from the lead frame. The leads 15 are exposed from the encapsulated resin.

[0021] In this embodiment, for the semiconductor device 10, one surface 11a of the two surfaces of the chip-shaped package portion 11 is disposed on the mounting surface 20a of the substrate 20. In other words, the semiconductor device 10 is disposed on the mounting surface 20a of the substrate 20 in a posture (lying posture) with the package portion 11 upside down on the mounting surface 20a. Specifically, as shown in FIG. 3(a), a drain electrode 17 is formed on one surface 11a of the package portion 11, and the drain electrode 17 is electrically connected to the conductive pattern 22A of the substrate 20 via solder.

[0022] More specifically, as shown in FIG. 3(a), the drain electrodes 17 of two semiconductor devices 10A and 10A are connected to the conductive pattern 22A. In addition, the respective leads 15C of the two semiconductor devices 10A and 10A are connected to the conductive pattern 22B. Although not shown, the conductive pattern 22B is connected to the conductive pattern 22A to which the drain electrodes 17 of the remaining two semiconductor devices 10B and 10B are connected. Thereby, the semiconductor devices 10A and 10A connected in parallel and the semiconductor devices 10B and 10B connected in parallel are connected in series.

[0023] Note that mounting holes 16 each having a circular opening are formed at the centers of the package portions 11 of the semiconductor devices 10A and 10B. Usually, the package portion 11 of the semiconductor device 10 is attached to the substrate 20 by inserting a fastener or the like into the mounting hole 16. However, in order to avoid discharge from the fastener inserted into the mounting hole 16, in this embodiment, without using the mounting hole 16, the drain electrode 17 of the package portion 11 is electrically connected to the conductive patterns 22A and 22B via solder, whereby the package portion 11 is fixed to the substrate 20.

[0024] In this embodiment, as shown in FIGS. 1 and 3(a) and (b), each lead 15 (15A to 15C) of the semiconductor device 10 includes a proximal end portion 15a extending along the mounting surface 20a from the package portion, and a first bent portion 15b that is continuous with the proximal end portion 15a and is bent at an obtuse angle in a direction toward the mounting surface 20a.

[0025] Furthermore, each lead 15 (15A to 15C) extends from the first bent portion 15b toward the mounting surface 20a and includes an inclined portion 15c that is inclined with respect to the mounting surface 20a, and a second bent portion 15d that is continuous with the inclined portion 15c and is bent at an obtuse angle toward the mounting surface 20a.

[0026] Furthermore, each lead 15 (15A to 15C) extends from the second bent portion 15d of the semiconductor device 10 toward the conductive patterns 22B, 22C, etc., and includes a tip portion 15e connected to the conductive patterns 22B, 22C, etc. As shown in Figure 3(b), the tip portion 15e of lead 15B is connected to the conductive pattern 22C, the tip portion 15e of lead 15C is connected to the conductive pattern 22B, and lead 15A is connected to a conductive pattern not shown. In the following specification, the conductive patterns connected to leads 15 (15A to 15C) are collectively referred to as "conductive patterns 22B, 22C".

[0027] More specifically, as shown in Figure 3(b), the base portion 15a extends along the first imaginary line L1, the inclined portion 15c extends along the second imaginary line L2, and the tip portion 15e extends along the third imaginary line L3. A first bent portion 15b exists so as to include the point where the first imaginary line L1 and the second imaginary line L2 intersect. A second bent portion 15d exists so as to include the point where the second imaginary line L2 and the third imaginary line L3 intersect.

[0028] Here, the bending angle of the first bent portion 15b is an obtuse angle formed by the first imaginary line L1 and the second imaginary line L2, and for example, this angle is preferably in the range of 120° to 150°. On the other hand, the bending angle of the second bent portion 15d is an angle formed by the second imaginary line L2 and the third imaginary line L3, and this angle is also an obtuse angle, and this angle is also preferably in the range of 120° to 150°.

[0029] The bending angle of the first bent portion 15b and the bending angle of the second bent portion 15d may be the same, but in this embodiment, the bending angle (size of the obtuse angle) of the first bent portion 15b is smaller than the bending angle (size of the obtuse angle) of the second bent portion 15d. In this embodiment, the bending angle of the first bent portion 15b is, for example, about 135°, and the bending angle of the second bent portion 15d is about 140°.

[0030] By satisfying this angular relationship, the tip portion 15e of the lead 15 can be extended toward the conductive patterns 22B and 22C. As a result, the lead 15 can be stably joined to each of the conductive patterns 22B and 22C of the substrate 20 by soldering.

[0031] In this embodiment, of the leads 15 of the semiconductor device 10, lead 15A is the gate pin, lead 15B is the gate source pin, and lead 15C is the main current source pin. The tip portions 15e of leads 15A and 15B are connected to their respective conductive patterns 22D by soldering. Lead 15C is shorter than the other leads 15A and 15B and is connected to the conductive patterns 22B and 22C by soldering. In this embodiment, the difference in length between leads 15A and 15B and lead 15C depends on the difference in length of the base portion 15a.

[0032] In other words, in this embodiment, leads 15A to 15C have the same shape from the first bent portion 15b to the tip portion 15e, and leads 15A, 15B and lead 15C differ only in the length of the base portion 15a. In this way, even if the distance from the end face 11b of the package portion 11 to the conductive patterns 22B to 22D to which leads 15A to 15C are soldered differs, by adjusting only the length of the base portion 15a, each tip portion 15e of leads 15A to 15C can be soldered to the conductive patterns 22B and 22C in a constant position. This improves the reliability of the solder joint and allows leads 15A to 15C to be stably sealed with the molding material 50 described later.

[0033] Polygonal prism-shaped block terminals 31, which are connected to the drain or source of the semiconductor device 10, are erected on the conductive patterns 22A and 22B, and the boundaries between the sides of these prism-shaped block terminals 31 are also formed with rounded edges. In this embodiment, electrical components 41 and the like are also mounted on the substrate 20, and the electrical components 41 are connected to a double-layered surface-mount terminal 32 via the conductive pattern 22D. Although other electrical components besides the electrical components 41 are also mounted on the substrate 20, they are not shown in the illustration.

[0034] In this embodiment, the substrate 20 is a metal substrate comprising a substrate body 21 made of a metal material, an insulating layer 23 covering one side of the substrate body 21, and conductive layers 22 soldered to the leads 15 and formed on the insulating layer 23 as conductive patterns 22A, 22B, ... The metal material constituting the substrate body 21 is made of copper or aluminum, etc. The insulating layer 23 is made of an insulating material such as epoxy resin or glass epoxy resin formed by solder resist, etc. The conductive layer 22 is a layer made of copper and is composed of conductive patterns 22A, 22B, ... In this embodiment, the conductive layer 22 and the substrate body 21 are electrically insulated by the insulating layer 23.

[0035] Here, the substrate 20 (substrate body 21) may be fixed to another component via the fixing holes 25 in a floating state (specifically, in a state where the potential of the surface of the substrate body 21 is floating). However, in this embodiment, the substrate 20 is fixed in contact with the insulating plate 61 (see Figure 3(a)), which will be described later, via the fixing holes 25.

[0036] In this embodiment, as shown in Figure 3(a), the substrate 20 is placed on a metal heat sink 62 via an insulating plate 61. The substrate body 21 of the substrate 20 and the heat sink 62 are electrically insulated from each other via the insulating plate 61. The insulating plate 61 is not particularly limited as long as it has insulating properties, but in this embodiment, the insulating plate 61 is a ceramic plate, and examples of its material include alumina and aluminum nitride. By using a ceramic plate for the insulating plate 61, the heat generated by the semiconductor device 10, etc., can be transferred from the substrate body 21 of the substrate 20 to the insulating plate 61, which is a ceramic plate, and the heat can be efficiently dissipated from the heat sink 62.

[0037] The heat sink 62 is, for example, a heat sink or a part thereof, and the heat sink is water-cooled or air-cooled, and the heat that enters the heat sink 62 is dissipated. Here, the main body 21 of the substrate 20 may or may not be connected to ground, but in this embodiment, the main body 21 is not connected to ground, and the heat sink 62 is connected to ground.

[0038] Furthermore, as shown in Figure 3(a), the lead 15 is sealed with an insulating molding material 50. In this embodiment, the parts other than the connection portions of the block terminal 31 and the double-stacked terminal 32 are sealed with the molding material 50.

[0039] For example, silicone resin can be used as the material for the molding material 50. When the conductive layer 22 (conductive pattern 22A, etc.) and the lead 15 are soldered together, a gap (air layer) is created between them. In this embodiment, by sealing the lead 15 with the molding material 50, the molding material 50 is also filled into these gaps, thereby suppressing the occurrence of corona discharge in these gaps. The dielectric breakdown field strength of air is 3 kV / mm, while the dielectric breakdown field strength of silicone resin is approximately 20 kV / mm. Therefore, by using silicone resin for the molding material 50, more than six times the corona resistance can be expected compared to when no molding material is used.

[0040] According to this embodiment, with one of the two surfaces 11a of the package portion 11 positioned on the mounting surface 20a of the substrate 20, the lead 15 extending from the package portion 11 includes a first bent portion 15b that is bent at an obtuse angle toward the mounting surface 20a, and a second bent portion 15d that is bent at an obtuse angle toward the mounting surface 20a.

[0041] In this way, the obtuse-angled first bent portion 15b and second bent portion 15d suppress the concentration of the electric field in the first bent portion 15b and second bent portion 15d compared to leads with bent portions bent at approximately right angles as in the past. As a result, corona discharge from the first bent portion 15b and second bent portion 15d is suppressed, and the generation of ozone caused by corona discharge can be prevented.

[0042] Furthermore, in this embodiment, the conductive layer 22 and the substrate body 21 are electrically insulated by the insulating layer 23 located between them, so that the conductive layer 22 and the substrate body 21 function as a first capacitor with parallel plate electrodes.

[0043] Furthermore, in this embodiment, the substrate body 21 and the heat sink 62 of the substrate 20 are electrically insulated by the insulating plate 61 between them, so the substrate body 21 and the heat sink 62 function as a second capacitor with parallel plate electrodes. In this case, the potential of the substrate body 21 becomes a floating potential.

[0044] Here, since the thickness of the insulating layer 23 is sufficiently thinner than the thickness of the heat sink 62, when the capacitance of the first capacitor is C1 and the capacitance of the second capacitor is C2, C1 >> C2. Therefore, the voltage applied to the first capacitor is significantly smaller than the voltage applied to the second capacitor.

[0045] Therefore, the potential difference between the conductive layer 22 and the leads 15 connected thereto and the potential of the substrate body 21 is relatively small. As a result, the structure suppresses discharge from the leads 15 to the substrate body 21. Strictly speaking, the relative permittivity of the insulating layer 23 and insulating plate 61, the area of ​​the conductive layer 22, the substrate body 21 and the heat sink 62, etc., should be considered, but the explanation is omitted here.

[0046] Although embodiments of the present invention have been described in detail above, the present invention is not limited to the embodiments described above, and various design modifications can be made without departing from the spirit of the invention as described in the claims. [Explanation of Symbols]

[0047] 1: Substrate structure, 10: Semiconductor device, 11: Package portion, 15: Lead, 15a: Base portion, 15b: First bend portion, 15c: Inclined portion, 15d: Second bend portion, 15e: Tip portion, 20: Substrate, 20a: Mounting surface, 21: Substrate body, 22: Conductive layer, 22A~22D: Conductive pattern, 23: Insulating layer, 50: Molding material, 61: Insulating plate, 62: Heat sink

Claims

1. A high-voltage substrate structure including a substrate on which semiconductor devices are mounted, The semiconductor device comprises a chip-shaped package portion in which a semiconductor element is sealed with resin, and a plurality of leads extending from the end face of the package portion and soldered to a conductive pattern on the substrate. With one of the two surfaces of the package portion positioned on the mounting surface of the substrate, each of the leads is: A base end portion extending from the package portion along the mounting surface, A first bent portion, which is continuous with the base portion and bent at an obtuse angle in the direction toward the mounting surface, An inclined portion extends from the first bent portion toward the mounting surface and is inclined with respect to the mounting surface, A second bent portion is continuous with the aforementioned inclined portion and is bent at an obtuse angle in the direction away from the mounting surface, A substrate structure characterized by comprising: a tip portion extending from the second bent portion toward the conductive pattern and connected to the conductive pattern.

2. The substrate comprises a substrate body made of a metal material, an insulating layer covering the substrate body, and a conductive layer soldered to the leads and formed in the insulating layer as the conductive pattern. The substrate structure according to claim 1, characterized in that the conductive layer and the substrate body are electrically insulated by the insulating layer.

3. The substrate is placed on a metal heat sink via an insulating plate, and the heat sink is connected to ground. The substrate structure according to claim 2, characterized in that the substrate body of the substrate and the heat sink are electrically insulated from each other via the insulating plate.

4. The substrate structure according to claim 1, characterized in that at least the leads are sealed with an insulating molding material.

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