Semiconductor equipment

Abstract

The processing steps for wiring formed using copper, aluminum, gold, silver, molybdenum, etc. To improve stability. Or, to reduce the impurity concentration of this semiconductor film. Or, to improve the electrical performance of semiconductor equipment. To improve the air characteristics. [Solution] An oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a film in contact with the oxide film It has a pair of conductive films formed using copper, aluminum, gold, silver, molybdenum, etc. In a transistor, the oxide film has a plurality of crystalline portions, and in the plurality of crystalline portions, It has c-axis orientation, and the c-axis is parallel to the normal vector of the oxide semiconductor film or the upper surface of the oxide film. It is facing in the direction of travel.

Description

[Technical Field]

[0001] This invention relates to a semiconductor device having a transistor and a method for manufacturing the same. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors being described are amorphous silicon, single-crystal silicon formed on a glass substrate. It is made of silicon semiconductors such as silicon or polycrystalline silicon. Transistors using semiconductors are also used in integrated circuits (ICs) and other applications.

[0003] In recent years, metal oxides exhibiting semiconductor properties have been used in transistors instead of silicon semiconductors. The technology is attracting attention. In this specification, metal oxides exhibiting semiconductor properties are referred to as oxides. Let's call it a semiconductor.

[0004] For example, as an oxide semiconductor, zinc oxide or an In-Ga-Zn oxide is used. A transistor is fabricated and used as a switching element for pixels in a display device. The technology is disclosed (see Patent Documents 1 and 2).

[0005] Furthermore, as flat panel displays become larger in area and higher in resolution, the driving frequency increases. As a result, the resistance and parasitic capacitance of the wiring increase, causing wiring delay. To suppress this, a technique for forming wiring using copper is being considered (Patent Document 3). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Patent Document 3] Japanese Patent Publication No. 2004-133422 [Overview of the project] [Problems that the invention aims to solve]

[0007] However, the constituent elements of the wiring, such as copper, aluminum, gold, silver, and molybdenum, It is difficult to process, and there is a problem that it diffuses into the oxide semiconductor film during processing. be.

[0008] The constituent elements of the wiring, such as copper, aluminum, gold, silver, and molybdenum, are used in transistors. It is one of the impurities that causes poor electrical properties. Therefore, this impurity is a cause of oxide semiconductors. When mixed into the film, the oxide semiconductor film becomes less resistive, and changes over time and stress occur. Tests reveal that the electrical characteristics of the transistor, particularly the fluctuation in the threshold voltage, increase. There is a problem with that.

[0009] Therefore, one aspect of the present invention is formed using copper, aluminum, gold, silver, molybdenum, etc. The objective is to improve the stability of the wiring processing process. Alternatively, one aspect of the present invention is to improve the stability of the wiring processing process. One of the objectives is to reduce the impurity concentration of the ionized semiconductor film. Alternatively, one aspect of the present invention is One of the objectives is to improve the electrical characteristics of semiconductor devices. Alternatively, one aspect of the present invention is One of the objectives is to improve the reliability of semiconductor devices. Furthermore, one aspect of the present invention is a semi The objective is to achieve high-speed operation of a conductive device. Furthermore, one aspect of the present invention relates to a semiconductor device. The objective is to achieve power saving. Furthermore, one aspect of the present invention relates to a semiconductor with excellent productivity. The objective is to realize a body device. One aspect of the present invention solves all of these problems. It is not necessary to make a decision. [Means for solving the problem]

[0010] One aspect of the present invention is an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and the oxide A pair of conductive materials, such as copper, aluminum, gold, silver, and molybdenum, are formed in contact with the material film. In a transistor having a film, the oxide film has a plurality of crystalline portions, and the plurality of crystalline portions In this case, the c-axis is oriented and the c-axis is the normal vector to the upper surface of the oxide semiconductor film or oxide film. It is characterized by being oriented in a direction parallel to the torch. It has a plurality of crystalline parts, and the plurality of crystalline parts In this case, the c axis is oriented and the c axis is the normal to the upper surface of the oxide semiconductor film or oxide film. An oxide film is placed between the oxide semiconductor film and the pair of conductive films, oriented parallel to the duct. By doing so, the metal elements that make up the pair of conductive films, typically copper, aluminum, gold, silver, and It is possible to prevent ribdenum and other elements from migrating to the oxide semiconductor film. As a result, oxidation In semiconductor films, the amount of copper, aluminum, gold, silver, molybdenum, etc. can be reduced. .

[0011] Furthermore, one aspect of the present invention comprises an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and an acid A pair of conductive films having copper, aluminum, gold, silver, or molybdenum in contact with the oxide film. , an oxide semiconductor film or a gate insulating film in contact with an oxide film, and through the gate insulating film, oxidation It has a gate electrode that overlaps with a semiconductor film and an oxide film, and the oxide film has a plurality of crystalline portions. Furthermore, in the plurality of crystalline portions, the c-axis orientation is present, and the c-axis is an oxide semiconductor film or oxide A semiconductor device having transistors oriented in a direction parallel to the normal vector of the upper surface of a film. be.

[0012] Furthermore, in the multiple crystalline portions contained in the oxide film, the orientation of the a-axis and b-axis is irregular. Furthermore, the pair of conductive films may have a single-layer structure. Alternatively, the pair of conductive films may have a laminated structure. It may also be constructed in a laminated structure. In addition, if the pair of conductive films have a laminated structure, at least the oxide film will be in contact with the other film. The film contains copper, aluminum, gold, silver, or molybdenum.

[0013] Furthermore, the above transistor is a bottom-gate type transistor, and has a gate electrode and a pair Between the conductive films, there are, in order, a gate insulating film, an oxide semiconductor film, and an oxide film, and gate insulation The film is an oxide semiconductor film, and the oxide insulating film is in contact with the oxide film on the opposite side from the side in contact with the oxide film. It has a gate electrode and a nitride insulating film in contact with the oxide insulating film.

[0014] Furthermore, the above transistor is a top-gate type transistor, and an oxide semiconductor film and Between the gate electrodes, there is an oxide film, a pair of conductive films, and a gate insulating film in that order, and the oxide semiconductor The body film is in contact with the underlying insulating film, and the underlying insulating film is the surface that is in contact with the oxide film in the oxide semiconductor film. It has an oxide insulating film in contact with the opposite side, and a nitride insulating film in contact with the oxide insulating film.

[0015] Furthermore, in a pair of conductive films, a protective film may be provided on the surface opposite to the surface in contact with the oxide film. .

[0016] The protective film is a nitride insulating film, typically silicon nitride, silicon nitride oxide, and nitride It may be formed of aluminum or aluminum nitride oxide.

[0017] Alternatively, the protective film is a transparent conductive film, typically indium tin oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium It may be formed from zinc oxide or indium tin oxide containing silicon oxide.

[0018] Alternatively, the protective film is an oxide film containing In, Ga, or Zn, and typically, I n-Ga oxide, In-Zn oxide, In-M-Zn oxide (where M is Ga, Y, Zr, L) It is formed from a, Ce, or Nd. [Effects of the Invention]

[0019] According to one aspect of the present invention, formed using copper, aluminum, gold, silver, molybdenum, etc. The stability of the wiring processing process can be improved. Alternatively, according to one aspect of the present invention, In semiconductor devices using semiconductor films, it is possible to reduce impurities in oxide semiconductor films. To be able to. Or, according to one aspect of the present invention, in a semiconductor device using an oxide semiconductor film, The gas properties can be improved. Alternatively, according to one aspect of the present invention, an oxide semiconductor film can be used. In semiconductor devices, reliability can be improved. Furthermore, according to one aspect of the present invention... This enables high-speed operation of semiconductor devices. Furthermore, according to one aspect of the present invention, semiconductor This enables power saving of the main unit. Furthermore, according to one aspect of the present invention, excellent productivity is achieved. This enables the realization of semiconductor devices. [Brief explanation of the drawing]

[0020] [Figure 1] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 2] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 3] This is a diagram illustrating the band structure of a transistor. [Figure 4] This is a diagram illustrating the computational model for IGZO(111). [Figure 5] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 6] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 7] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 8] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 9] This diagram illustrates the active barrier of Cu. [Figure 10] This is a diagram illustrating the computational model for ZnO. [Figure 11] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 12] This diagram illustrates the diffusion pathway and active barrier of Cu. [Figure 13] This diagram illustrates the active barrier of Cu. [Figure 14] This is a cross-sectional view illustrating one form of transistor. [Figure 15] This is a cross-sectional view illustrating one form of transistor. [Figure 16] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 17] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 18] These are block diagrams and circuit diagrams illustrating one form of a semiconductor device. [Figure 19] This is a top view illustrating one form of a semiconductor device. [Figure 20] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 21] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 22]This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 23] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 24] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 25] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 26] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 27] This figure shows the micro-electron diffraction pattern of an oxide semiconductor. [Figure 28] This figure shows the results of impurity analysis and XRD analysis of oxide semiconductors. [Figure 29] This figure shows the results of impurity analysis and XRD analysis of oxide semiconductors. [Figure 30] This figure shows the results of impurity analysis and XRD analysis of oxide semiconductors. [Figure 31] This figure shows the results of impurity analysis and XRD analysis of oxide semiconductors. [Figure 32] This is a cross-sectional view illustrating one form of transistor. [Figure 33] This is a cross-sectional view illustrating one form of transistor. [Modes for carrying out the invention]

[0021] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention The present invention is not limited to the following description, and its form and scope may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention The following embodiments and examples are not to be interpreted as being limited to their descriptions. In the embodiments and examples described below, parts that are the same or have similar functions In some cases, the same reference numeral or hatch pattern is used in common across different drawings, and the repetition of this pattern is used. I will omit the explanation of the counter-argument.

[0022] In each figure described herein, the size, film thickness, or region of each component is as follows: It may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. stomach.

[0023] Furthermore, the terms "first," "second," "third," etc. used in this specification are used to avoid confusion of constituent elements. This is a selection and not a numerical limit. Therefore, for example, "the first" This can be explained by substituting "the second" or "the third" as appropriate.

[0024] Furthermore, the functions of "source" and "drain" are used in situations where the direction of current changes during circuit operation. In this specification, "sauce" and "dressing" may be used interchangeably. The term "in" may be used interchangeably.

[0025] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic field at a given point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within a given object. Furthermore, generally speaking, the potential difference between the potential at a certain point and a reference potential (for example, the ground potential) This is simply called electric potential or voltage, and the terms electric potential and voltage are often used as synonyms. Therefore, unless otherwise specified in this specification, potential may be read as voltage. You may substitute "voltage" with "potential."

[0026] In this specification, when an etching process is performed after a photolithography process: The mask formed during the photolithography process shall be removed.

[0027] (Embodiment 1) In this embodiment, drawings illustrate a semiconductor device and a method for manufacturing the same, which are aspects of the present invention. I will explain by referring to it.

[0028] In transistors using oxide semiconductor films, this can lead to defects in the transistor's electrical characteristics. One example of a defect is oxygen deficiency. For example, oxide semiconductors containing oxygen deficiencies in the film. Transistors using membranes tend to have a threshold voltage that fluctuates in the negative direction, normally It tends to exhibit ON characteristics. This is because an electric charge is generated due to oxygen vacancies contained in the oxide semiconductor film. This is to reduce resistance. When a transistor has normally-on characteristics, Various problems can arise, such as increased likelihood of malfunctions or higher power consumption when not in use. This occurs. Also, the electrical characteristics of the transistor, typically, can change over time or through stress testing. There is a problem in that the amount of fluctuation in the threshold voltage increases.

[0029] One of the causes of oxygen deficiency is damage that occurs during the transistor manufacturing process. For example, an insulating film is formed on an oxide semiconductor film by plasma CVD or sputtering. When forming an electrical film or similar material, the oxide semiconductor film may be damaged depending on the formation conditions. Sometimes.

[0030] Furthermore, impurities such as silicon and carbon, which are constituent elements of insulating films, are not limited to oxygen vacancies. This can cause defects in the electrical characteristics of the inverter. Also, for example, when using large-area substrates of the 8th generation or higher... When manufacturing transistors, copper, aluminum, gold, and silver are used to suppress wiring delay. Low-resistance materials such as molybdenum are used to form the wiring. However, the constituent elements of the wiring Certain materials such as copper, aluminum, gold, silver, and molybdenum can also cause defects in the electrical characteristics of transistors. It is one of the impurities that results in this. Therefore, when this impurity is mixed into the oxide semiconductor film, As a result, the oxide semiconductor film becomes less resistive, and due to changes over time and stress tests, One of the problems with the electrical characteristics of a zista is that the fluctuation in the threshold voltage increases.

[0031] Therefore, in this embodiment, a semiconductor device comprising a transistor having an oxide semiconductor film is provided. In this case, oxygen vacancies in the oxide semiconductor film, which is the channel region, and impurities in the oxide semiconductor film. One of the challenges is to reduce the concentration of substances.

[0032] On the other hand, display devices sold on the market are getting larger, with screen sizes exceeding 60 inches diagonally. There is a growing trend towards this, and furthermore, development is underway with screen sizes of 120 inches or more in diagonal aspect ratio in mind. It is said that for glass substrates used in display devices, the 8th generation or later is required. Area-based processing is progressing. However, when using large-area substrates, high-temperature processing is required, for example, 450°C. Because the heating process requires temperatures above ℃, the heating equipment becomes large and expensive, increasing production costs. Furthermore, high-temperature processing can cause warping and shrinking of the substrate, reducing the yield. The effect is reduced.

[0033] Therefore, in this embodiment, it is possible to perform the process with a small number of heat treatment steps and even when using a large-area substrate. One of the objectives is to fabricate semiconductor devices using temperature-based heat treatment.

[0034] Figures 1(A) to 1(C) show a top view and a cross-section of the transistor 60 of the semiconductor device. The diagram is shown. Transistor 60 shown in Figure 1 is a channel etch type transistor. Figure 1(A) is a top view of transistor 60, and Figure 1(B) is a top view of Figure 1(A) along the dashed line A- Figure 1(C) is a cross-sectional view between points B and C, and Figure 1(A) is a cross-sectional view between points C and D shown by the dashed line. Oh, in Figure 1(A), for clarity, some of the components of the substrate 11 and transistor 60 are shown (example). For example, gate insulating film 17), oxide insulating film 23, oxide insulating film 24, nitride insulating film 25 The "do" is omitted.

[0035] The transistor 60 shown in Figures 1(B) and 1(C) is a gate provided on the substrate 11. The electrode 15, the gate insulating film 17 formed on the substrate 11 and the gate electrode 15, and the gate insulating film A multilayer film 20 overlaps the gate electrode 15 via the edge film 17, and a part in contact with the multilayer film 20 serves as an electrode. It has a pair of conductive films that function together (hereinafter referred to as a pair of electrodes 21 and 22). Furthermore, oxide insulating film is used on the gate insulating film 17, the multilayer film 20, and the pair of electrodes 21 and 22. A protective film 26 is formed, consisting of film 23, oxide insulating film 24, and nitride insulating film 25. .

[0036] In the transistor 60 shown in this embodiment, the multilayer film 20 comprises an oxide semiconductor film 18 and It has an oxide film 19. In addition, a part of the oxide semiconductor film 18 functions as a channel region. Furthermore, an oxide insulating film 23 is formed so as to be in contact with the oxide film 19, and an oxide insulating film is formed. An oxide insulating film 24 is formed so as to be in contact with the edge film 23. That is, the oxide semiconductor film 18 An oxide film 19 is provided between the oxide film and the oxide insulating film 23.

[0037] In this embodiment, the oxide film 19 is CAAC(C Axis Aligned It is characterized by being formed using a Crystalline oxide film. Details of the film will be described later, but the CAAC oxide film shows no grain boundaries and c-axis alignment. It has directionality, and the c-axis is oriented parallel to the normal vector of the surface being formed or the upper surface. Therefore, the oxide film 19 is made of metal elements that constitute the pair of electrodes 21 and 22, such as copper and aluminum. It functions as a film that prevents the movement of nium, gold, silver, molybdenum, etc. Therefore, a pair of electrodes 2 1,22 makes it difficult for the metal elements that make up the film to move to the oxide semiconductor film 18. As a result, Impurities in the oxide semiconductor film 18 contained in the layer film 20 can be reduced. Also, electrical properties It is possible to create transistors with improved performance.

[0038] The following describes the other configuration details of transistor 60.

[0039] There are no major restrictions on the material of the substrate 11, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, saffron A wire substrate or the like may be used as the substrate 11. Alternatively, a simple silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to apply substrates such as I, and semiconductor elements are provided on these substrates. It may also be used as substrate 11. Note that if a glass substrate is used as substrate 11, the sixth Generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm), 8th generation Generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 1st By using large-area substrates such as the 0th generation (2950mm x 3400mm), large-scale display devices can be created. It is possible to produce this.

[0040] Furthermore, a flexible substrate is used as the substrate 11, and the transistor 60 is directly mounted on the flexible substrate. It may be formed. Alternatively, a release layer may be provided between the substrate 11 and the transistor 60. The abscission layer separates from the substrate 11 after partially or completely completing the semiconductor device on it, and It can be used to transfer the image onto a substrate. In this case, the transistor 60 is a substrate with poor heat resistance. It can also be transferred to boards and flexible substrates.

[0041] The gate electrode 15 is made of chromium, copper, aluminum, gold, silver, molybdenum, tantalum, and titanium. N, a metal element selected from tungsten, or an alloy containing the aforementioned metal elements, It can be formed using alloys or the like that combining the aforementioned metallic elements. Also, manganese A metallic element selected from one or more of the following, including zirconium, may also be used. The gate electrode 15 may have a single-layer structure or a stacked structure of two or more layers. For example, silicon A single-layer structure of an aluminum film containing a titanium film, a double-layer structure in which a titanium film is laminated on an aluminum film, nitrogen A two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film. A two-layer structure, where a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. Layered structure, titanium film, aluminum film laminated on top of the titanium film, and then titanium on top of that. There are three-layer structures that form a film, etc. Also, aluminum is combined with titanium, tantalum, and tungsten. A combination of one or more elements selected from chromium, molybdenum, neodymium, and scandium. A combined alloy film or a nitride film may also be used.

[0042] Furthermore, the gate electrode 15 contains indium tin oxide and indium acid containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide The substance contains titanium dioxide, indium tin oxide, indium zinc oxide, and silicon oxide. Transparent conductive materials such as indium tin oxide can also be applied. A laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element can also be used.

[0043] Furthermore, an In-Ga-Zn oxiditride film is placed between the gate electrode 15 and the gate insulating film 17. In-Sn-based oxidnitride film, In-Ga-based oxidnitride film, In-Zn-based oxidnitride film, By providing a Sn-based oxide nitride film, an In-based oxide nitride film, a metal nitride film (InN, ZnN, etc.), etc. These films also have a work function of 5 eV or more, or 5.5 eV or more, and are oxide semiconductors. Because it is a value greater than the electron affinity of the body, the threshold for transistors using oxide semiconductors The value voltage can be shifted to a positive value, and the switching element has so-called normally-off characteristics. It is possible. For example, when using an In-Ga-Zn oxidoxide nitride film, at least the oxide A higher nitrogen concentration than semiconductor film 18, specifically 7 atomic percent or more, for In-Ga-Zn oxidnitridation. A physical film is used.

[0044] The gate insulating film 17 consists of a nitride insulating film 17a provided on the gate electrode 15 side and an oxide semiconductor It has an oxide insulating film 17c in contact with the conductive film 18. The nitride insulating film 17a has on one side On the other side, it is in contact with the gate electrode 15, and the oxide insulating film 17c and the pair of electrodes 21, It is in contact with 22. The oxide insulating film 17c is in contact with the nitride insulating film 17a on one surface, and on the other surface It is in contact with the oxide semiconductor film 18 on one side. That is, the side surface of the oxide semiconductor film 18 is oxidized. It roughly coincides with the side surface of the insulating film 17c.

[0045] Nitride insulating film 17a consists of silicon nitride, silicon nitride oxide, aluminum nitride, and nitride acid It is formed using aluminum oxide, etc.

[0046] The nitride insulating film 17a can be a single-layer structure or a multilayer structure. An example of a multilayer structure. This involves a first nitride insulating film with few defects and a second nitride with high hydrogen blocking properties. A laminated structure can be formed in which the insulating film and the gate electrode 15 are stacked in order from the gate electrode 15 side. By providing a small amount of the first nitride insulating film, the dielectric breakdown voltage of the gate insulating film 17 can be improved. This can be achieved. In addition, by providing a second nitride insulating film with high hydrogen blocking properties, This prevents hydrogen from the electrode 15 and the first nitride insulating film from moving to the oxide semiconductor film 18. It is possible to do so.

[0047] Alternatively, the nitride insulating film 17a is a first nitride insulating film with high impurity blocking properties. a second nitride insulating film with fewer defects, and a third nitride insulating film with high hydrogen blocking properties. However, a stacked structure can be formed in which the electrodes are stacked sequentially from the gate electrode 15 side. By providing a first nitride insulating film with high king properties, impurities from the gate electrode 15, representative Specifically, hydrogen, nitrogen, alkali metals, or alkaline earth metals, etc., are present in the oxide semiconductor film 18. It can prevent movement.

[0048] The oxide insulating film 17c consists of silicon oxide, silicon oxide nitride, aluminum oxide, and hydroxyaluminum oxide. It is formed using funium, gallium oxide, or Ga-Zn-based metal oxides, etc.

[0049] In this embodiment, the gate insulating film 17 is a nitride that is in contact with the pair of electrodes 21 and 22. It has an insulating film 17a and an oxide insulating film 17c that is in contact with the oxide semiconductor film 18. Since the body film 18 is in contact with the gate insulating film 17, the oxide semiconductor film 18 and the gate insulating film 17 The interface state density can be reduced. Also, the pair of electrodes 21 and 22 are nitride insulating film 17 It is in contact with a. The nitride insulating film 17a has the function of preventing oxidation of the pair of electrodes 21 and 22. Both have the function of preventing the diffusion of the metal elements constituting the pair of electrodes 21 and 22. Therefore, The pair of electrodes 21 and 22 come into contact with the nitride insulating film 17a, thereby reducing the resistance of the pair of electrodes 21 and 22 This prevents an increase in resistance and also improves the electrical characteristics of the transistor due to diffusion between the pair of electrodes 21 and 22. This can prevent a decline.

[0050] The thickness of the gate insulating film 17 is 5 nm or more and 400 nm or less, or 10 nm or more and 300 nm. It is preferable to set the wavelength to m or less, or between 50 nm and 250 nm.

[0051] The oxide semiconductor film 18 is typically made of In-Ga oxide, In-Zn oxide, or In-M -Formed using Zn oxide (where M is Ga, Y, Zr, La, Ce, or Nd). Furthermore, the oxide semiconductor film 18 is InMO3(ZnO) m (M is Ga, Y, Zr, La, C It is formed using a homologous compound represented by e or Nd (where m is a natural number).

[0052] The oxide semiconductor film 18 is In-M-Zn oxide (where M is Ga, Y, Zr, La, Ce, ma In the case of Nd, the sputtering target used to deposit In-M-Zn oxide film The atomic ratio of the metal elements in the net preferably satisfies In ≥ M and Zn ≥ M. The atomic ratio of metal elements in the sputtering target is In:M:Zn = 1:1:1. In:M:Zn = 3:1:2 is preferred. Note that the number of atoms in the oxide semiconductor film 18 to be formed is... Each ratio represents the number of atoms of the metal element contained in the sputtering target mentioned above, with tolerances of error. Includes a variation of plus or minus 40% in the ratio.

[0053] Furthermore, when the oxide semiconductor film 18 is an In-M-Zn oxide, the sum of In and M is 1 When set to 00 atomic%, the atomic ratio of In to M is such that In is 25 atomic. Above, M is less than 75 atomic%, or In is 34 atomic%, and M is 66 at It should be less than omic%.

[0054] The oxide semiconductor film 18 has an energy gap of 2 eV or more, or 2.5 eV or more. or 3 eV or more. Thus, by using oxide semiconductors with a wide energy gap... This reduces the off-current of transistor 60.

[0055] The thickness of the oxide semiconductor film 18 is 3 nm or more and 200 nm or less, or 3 nm or more and 100 nm. The wavelength should be less than or equal to m, or between 3 nm and 50 nm.

[0056] Furthermore, the oxide semiconductor film 18 is an oxide semiconductor with a low impurity concentration and a low defect level density. By using conductive films, it is possible to fabricate transistors with even better electrical characteristics. This is preferable. Here, the impurity concentration is low and the defect level density is small (few oxygen vacancies). This is called high-purity intrinsic or substantially high-purity intrinsic.

[0057] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductors have few carrier sources. Therefore, the carrier density can be lowered in the oxide semiconductor film. A transistor in which a channel region is formed exhibits electrical characteristics where the threshold voltage is negative ( - Also called Marie-on. ) This is not always the case.

[0058] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a defect level density of Because they are small, the trap level density may also be low.

[0059] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic exhibit a significant off-current. It is very small, with a channel width of 1 x 10 6 Even if the element has a channel length L of 10 μm, When the voltage between the drain electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1 × 10⁻⁶. -13 Below A This characteristic can be obtained.

[0060] Therefore, the transistor in which a channel region is formed in the oxide semiconductor film has electrical characteristics In some cases, this results in transistors with small fluctuations and high reliability. Charges trapped in the Lapp level take a long time to disappear, almost like fixed charges. It can behave in this way. Therefore, channeling in oxide semiconductor films with a high trap level density Transistors in which a region is formed may have unstable electrical properties. These include hydrogen, nitrogen, alkali metals, or alkaline earth metals.

[0061] Furthermore, as the oxide semiconductor film 18, an oxide semiconductor film with a structure similar to that of the CAAC oxide film described later is used. Conductive film (hereinafter referred to as CAAC-OS (C Axis Aligned Crystallin) Transistors using (e Oxide Semiconductor) are possible. The electrical characteristics are less likely to vary due to the irradiation of visible light or ultraviolet light.

[0062] Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, and oxygen vacancies are formed in the lattice from which oxygen has desorbed (or the part from which oxygen has desorbed). When hydrogen enters these oxygen vacancies, electrons that are carriers may be generated. Also, a part of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons that are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics.

[0063] For this reason, it is preferable that the hydrogen content in the oxide semiconductor film 18 is reduced as much as possible. Specifically, in the oxide semiconductor film 18, the hydrogen concentration obtained by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) is 5×10 19 atoms / cm or less, or 1×10 19 atoms / cm 3 or less, or 18 5×10 3 atoms / cm or less, or 1×10 18 atoms / cm 3 or less 17 3 5×10 16 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less 17 or less.

[0064] When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor film 18, the amount of oxygen vacancies in the oxide semiconductor film 18 increases and it becomes n-type. For this reason, oxidation The concentration of silicon and carbon in the semiconductor film 18, or the oxide film 19 and the oxide semiconductor film Concentrations of silicon and carbon near the interface with 18 (concentrations obtained by secondary ion mass spectrometry) , 2 × 10 18 atoms / cm 3 The following, or 2 × 10 17 atoms / cm 3 below Let's assume that.

[0065] Furthermore, in the oxide semiconductor film 18, alkali gold obtained by secondary ion mass spectrometry The concentration of the genus or alkaline earth metal is 1 × 10⁻⁶. 18 atoms / cm 3 The following, or 2x 10 16 atoms / cm 3 The following applies: Alkali metals and alkaline earth metals are oxides. When coupled with a semiconductor, it can generate carriers, increasing the transistor's off-current. This can happen. For this reason, alkali metal or alkaline earth metal of the oxide semiconductor film 18 It is preferable to reduce the concentration of the genus.

[0066] Furthermore, if nitrogen is present in the oxide semiconductor film 18, electrons, which are carriers, are generated, The rear density increases, making it easier to convert to n-type. As a result, using an oxide semiconductor containing nitrogen... Transistors tend to exhibit normally-on characteristics. Therefore, in the oxide semiconductor film, Therefore, it is preferable that nitrogen is reduced as much as possible, for example, in secondary ion mass spectrometry. The nitrogen concentration obtained is 5 × 10 18 atoms / cm 3 The following is preferable:

[0067] The oxide semiconductor film 18 may also have a non-single crystal structure, for example. This includes CAAC-OS, polycrystalline structure, microcrystalline structure (described later), or amorphous structure. In crystalline structures, amorphous structures have the highest defect level density, and CAAC-OS has the highest defect level density. The density of particles is small.

[0068] Furthermore, the oxide semiconductor film 18 has regions of amorphous structure, regions of microcrystalline structure, and regions of polycrystalline structure. A mixed film having two or more regions: a region of CAAC-OS and a region of single crystal structure. The mixed film, for example, has regions with an amorphous structure, regions with a microcrystalline structure, regions with a polycrystalline structure, CAA In the case of a single-layer structure having two or more regions, either C-OS regions or single-crystal structure regions: Yes, there are. Also, the mixed film may have regions with an amorphous structure, regions with a microcrystalline structure, and regions with a polycrystalline structure. A stacked structure having two or more of the following regions: the region, the CAAC-OS region, and the single-crystal structure region. It may have a structure.

[0069] The oxide film 19 is typically made of In-Ga oxide, In-Zn oxide, or In-M-Zn oxide. It is an oxide (where M is Ga, Y, Zr, La, Ce, or Nd) and is an oxide semiconductor film. The energy at the lower end of the conduction band is closer to the vacuum level than that of 18, and typically, the conduction of the oxide film 19 The difference between the energy at the lower end of the conduction band and the energy at the lower end of the conduction band of the oxide semiconductor film 18 is, 0.05eV or higher, 0.07eV or higher, 0.1eV or higher, or 0.15eV or higher, and The voltage is 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, oxides. The difference between the electron affinity of film 19 and the electron affinity of oxide semiconductor film 18 is 0.05 eV or more. 0.07 eV or higher, 0.1 eV or higher, or 0.15 eV or higher and 2 eV or less, 1 eV The following are values ​​of 0.5 eV or less, or 0.4 eV or less.

[0070] The oxide film 19 is In-M-Zn oxide (where M is Ga, Y, Zr, La, Ce, or N In case d), the sputtering target used to deposit the In-M-Zn oxide film is The atomic ratio of metal elements should preferably satisfy M > In, Zn > 0.5 × M, and furthermore, Zn ≥ M. It seems so. As for the atomic ratio of metal elements in such a sputtering target, In:Ga :Zn=1:3:2, In:Ga:Zn=1:3:3, In:Ga:Zn=1:3:4, In:Ga:Zn=1:3:5, In:Ga:Zn=1:3:6, In:Ga:Zn=1 :3:7, In:Ga:Zn=1:3:8, In:Ga:Zn=1:3:9, In:Ga :Zn=1:3:10, In:Ga:Zn=1:4:3, In:Ga:Zn=1:4:4 , In:Ga:Zn=1:4:5, In:Ga:Zn=1:4:6, In:Ga:Zn= 1:4:7, In:Ga:Zn=1:4:8, In:Ga:Zn=1:4:9, In:G a:Zn=1:4:10, In:Ga:Zn=1:5:3, In:Ga:Zn=1:5: 4, In:Ga:Zn=1:5:5, In:Ga:Zn=1:5:6, In:Ga:Zn =1:5:7, In:Ga:Zn=1:5:8, In:Ga:Zn=1:5:9, In: Ga:Zn=1:5:10, In:Ga:Zn=1:6:4, In:Ga:Zn=1:6 :5, In:Ga:Zn=1:6:6, In:Ga:Zn=1:6:7, In:Ga:Z n=1:6:8, In:Ga:Zn=1:6:9, and In:Ga:Zn=1:6:10 are preferred. It seems. The metal of the sputtering target used to deposit In-M-Zn oxide films. By setting the atomic ratio of elements to M > In and Zn ≥ M, a CAAC oxide film can be formed. This can be done. Furthermore, the oxide film 19 formed using the above sputtering target contains The atomic ratios of the metal elements produced are included in the above sputtering target as an error. This includes a variation of plus or minus 40% in the atomic ratio of the metal elements.

[0071] Furthermore, the oxide film 19 is characterized by being formed using a CAAC oxide film.

[0072] CAAC oxide films are one type of oxide semiconductor film having multiple crystalline regions. The crystalline portions contained in the AC oxide film have c-axis orientation. (Planar TEM (Transmission Electron Microscope)) (Transmission Electron Microscope) image The area of ​​the crystalline portion contained in the CAAC oxide film is 2500 nm 2 or larger, or 5 μm 2 That's all. , or 1000 μm 2 That concludes the explanation. Furthermore, in the cross-sectional TEM image, the crystalline portion was found to be 50% or less. If it contains above, or 80% or more, or 95% or more, the CAAC oxide film is close to a single crystal. It becomes a thin film with physical properties.

[0073] When the CAAC oxide film is observed by TEM, clear boundaries between crystalline regions, i.e., crystal grains, are observed. The boundary (also called the grain boundary) cannot be identified. Therefore, CAAC Oxide films are less susceptible to the decrease in electron mobility caused by grain boundaries.

[0074] The CAAC oxide film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM view). (Inference) It can be confirmed that in the crystalline part, metal atoms are arranged in layers. Each of these layers has a concave surface (also called the surface to be formed) or upper surface that forms the CAAC oxide film. It has a convex shape and is arranged parallel to the surface or top surface of the CAAC oxide film. In this specification, "parallel" means that two straight lines are aligned at an angle of -10° or more and 10° or less. This refers to the state in which something is placed. Therefore, it also includes cases where the angle is between -5° and 5°. Also, "vertical" "A straight line is a state in which two straight lines are positioned at an angle of 80° to 100°. Therefore, This also includes cases where the angle is between 85° and 95°.

[0075] On the other hand, the CAAC oxide film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T). EM observation reveals that in the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. do not have.

[0076] Furthermore, when electron diffraction is performed on a CAAC oxide film, oriented spots (bright spots) are observed. This is observed.

[0077] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of the CAAC oxide film exhibits orientation. It can be seen that this is the case.

[0078] X-ray diffraction (XRD) of CAAC oxide film Structural analysis using the apparatus reveals that the CAAC oxide film can be analyzed by the out-of-plane method. In the analysis, a peak may appear near a diffraction angle (2θ) of 31°. This peak is I Since it is attributed to the (00x) plane (where x is an integer) of the nGaZn oxide crystal, CAAC acid The crystalline structure of the ionized film has c-axis orientation, with the c-axis pointing in a direction approximately perpendicular to the surface on which it is formed or the upper surface. It can be confirmed that they are there.

[0079] On the other hand, in-p X-rays are incident on the CAAC oxide film from a direction approximately perpendicular to the c-axis. In analysis using the lane method, a peak may appear when 2θ is around 56°. This is attributed to the (110) plane of the InGaZn oxide crystal. For a crystalline oxide semiconductor film, fix 2θ to around 56° and set the normal vector of the sample surface to axis (φ When the analysis (φ scan) is performed while rotating the sample as the axis, the (110) plane is equivalent to the (110) plane. Six peaks attributable to the crystal plane are observed. In contrast, in the case of the CAAC oxide film, 2 Even when θ is fixed near 56° and φ is scanned, no clear peak appears.

[0080] From the above, it can be seen that in CAAC oxide films, the orientation of the a-axis and b-axis between different crystalline regions is Although irregular, it has c-axis orientation, and the c-axis is parallel to the normal vector of the formed surface or the upper surface. It can be seen that it is oriented in a specific direction. Therefore, the layered structure confirmed by the aforementioned cross-sectional TEM observation is Each layer of arranged metal atoms is a plane parallel to the ab-plane of the crystal.

[0081] Furthermore, the crystalline portion is formed when the CAAC oxide film is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when the process is carried out. As mentioned above, the c-axis of the crystalline portion is the surface on which the CAAC oxide film is formed. Alternatively, it is oriented in a direction parallel to the normal vector of the upper surface. Therefore, for example, a CAAC oxide film When the shape is altered by etching or other means, the c-axis of the crystalline portion is covered by the CAAC oxide film. The normal vector may not be parallel to the forming surface or the top surface.

[0082] Furthermore, the degree of crystallinity in the CAAC oxide film does not need to be uniform. For example, CAAC oxide When the crystalline portion of the film is formed by crystal growth from near the upper surface of the CAAC oxide film, The region near the surface may have a higher degree of crystallinity than the region near the surface being formed. Also, CA When impurities are added to an AC oxide film, the degree of crystallinity in the region where the impurities are added changes, and Regions with varying degrees of crystallinity may also be formed.

[0083] Furthermore, in the out-of-plane analysis of the CAAC oxide film, 2θ was 31° In addition to the nearby peak, a peak may also appear when 2θ is near 36°. The adjacent peak indicates that a portion of the CAAC oxide film contains crystals that do not exhibit c-axis orientation. This shows that the CAAC oxide film shows a peak around 31° 2θ and around 36° 2θ. It is preferable that no peaks appear nearby.

[0084] The oxide film 19 is formed such that no grain boundaries are observed, it has c-axis orientation, and the c-axis is on the surface to be formed. This is formed using a CAAC oxide film oriented parallel to the normal vector of the upper surface. The oxide film 19 then forms a pair of electrodes 21 and 22 with metal elements such as copper and aluminum. It functions as a film that prevents the movement of gold, silver, molybdenum, etc. Therefore, a pair of electrodes 21, 2 The metal elements constituting 2 become less likely to migrate to the oxide semiconductor film 18. As a result, the multilayer film 2 The impurities in the oxide semiconductor film 18 contained in 0 can be reduced. Also, the electrical properties can be improved. A transistor can be fabricated using this method.

[0085] The oxide film 19 consists of Ga, Y, Zr, La, Ce, or Nd in a number of atoms greater than that of In. Having a ratio may have the following effects: (1) Energy of the oxide film 19 (2) Increase the gap. (3) Decrease the electron affinity of the oxide film 19. (4) From the outside (4) Reduces the diffusion of impurities. Compared to the oxide semiconductor film 18, it has higher insulating properties. Furthermore, Ga, Y, Zr, La, Ce, or Nd are metallic elements that have a strong bonding force with oxygen. Therefore, by having Ga, Y, Zr, La, Ce, or Nd in a higher atomic ratio than In This reduces the likelihood of oxygen deficiency.

[0086] When oxide film 19 is an In-M-Zn oxide film, the sum of In and M is 100ato When expressed as mic%, the atomic ratio of In to M is less than 50 atomic%, and M is 5 0 or more atomic percent, or In is less than 25 atomic percent and M is 75 atomic percent. That concludes this section.

[0087] Furthermore, the oxide semiconductor film 18 and the oxide film 19 are In-M-Zn oxide films (where M is Ga In the case of oxides (Y, Zr, La, Ce, or Nd), compared to oxide semiconductor film 18, The atomic ratio of M (Ga, Y, Zr, La, Ce, or Nd) contained in film 19 is large. Typically, compared to the atoms mentioned above contained in the oxide semiconductor film 18, the amount is 1.5 times or more, or The atomic ratio is more than twice, or more than three times higher.

[0088] Furthermore, the oxide semiconductor film 18 and the oxide film 19 are In-M-Zn oxide films (where M is Ga In the case of Y, Zr, La, Ce, or Nd, the oxide film 19 is In:M:Zn=x1: y1:z1 [atomic ratio], oxide semiconductor film 18 is In:M:Zn=x2:y2:z2 [atomic ratio] If we consider the ratio of children, then y1 / x1 is greater than y2 / x2, or y1 / x1 is greater than y2 / It is 1.5 times or more than x2. Or, y1 / x1 is 2 times or more larger than y2 / x2. , or y1 / x1 is more than 3 times larger than y2 / x2. In this case, the oxide semiconductor film In this case, if y2 is greater than or equal to x2, the transistor using the oxide semiconductor film is stable. It is preferable because it can impart electrical properties.

[0089] The oxide semiconductor film 18 and the oxide film 19 are oxide semiconductor films with low carrier density and Oxide films are used. For example, oxide semiconductor film 18 and oxide film 19 have carrier density is 1 x 10 17 pieces / cm 3 The following, or 1 × 10 15 pieces / cm 3 The following, or 1 × 10 1 3 pieces / cm 3 The following, or 1 × 10 11 pieces / cm 3 The following oxide semiconductor films and oxide films Use.

[0090] Furthermore, this is not limited to the semiconductor characteristics and electrical characteristics (field effect) of the transistor as needed. A suitable composition should be used depending on the fruit mobility, threshold voltage, etc. To obtain the semiconductor characteristics of the transistor, the carrier density and impurities of the oxide semiconductor film 18 are controlled. The concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc., should be set appropriately. This is preferable.

[0091] The oxide film 19 is formed when the oxide insulating film 24 is formed later, and the oxide semiconductor film 18 It also functions as a damage-mitigating membrane.

[0092] The thickness of the oxide film 19 is 3 nm to 100 nm, or 3 nm to 50 nm. do.

[0093] In this embodiment, the transistor 60 has an oxide film 19 formed of a CAAC oxide film. Therefore, the oxide film 19 can reduce the diffusion of impurities from the outside. It is possible to reduce the amount of impurities that move from the pair of electrodes 21 and 22 to the oxide semiconductor film 18. Therefore, a pair of electrodes made of copper, aluminum, gold, silver, or molybdenum are used. Even if 1 and 22 are formed, furthermore, in the pair of electrodes 21 and 22, the oxide film 19 is in contact. Even if the film is formed using low-resistance materials such as copper, aluminum, gold, silver, and molybdenum, A pair of electrodes 21 and 22 have an oxide film 19 made of copper, aluminum, gold, silver, or molybdenum. It is difficult for the material to move to the oxide semiconductor film 18 via this. As a result, the threshold voltage of the transistor This can reduce fluctuations.

[0094] Furthermore, an oxide film 19 is provided between the oxide semiconductor film 18 and the oxide insulating film 23. Therefore, impurities and defects cause a tangle between the oxide film 19 and the oxide insulating film 23. Even if a wrap level is formed, there is a gap between the trap level and the oxide semiconductor film 18. Yes. As a result, electrons flowing through the oxide semiconductor film 18 are less likely to be trapped at trap levels. It is possible to increase the on-current of the transistor and also to increase the field-effect mobility. This can be done. Also, when an electron is trapped in a trap level, the electron becomes a negative fixed charge and This happens. As a result, the threshold voltage of the transistor fluctuates. However, Because there is a gap between the oxide semiconductor film 18 and the trap level, This makes it possible to reduce electron trapping and thus reduce fluctuations in the threshold voltage.

[0095] Furthermore, the oxide film 19 is less likely to form oxygen vacancies.

[0096] Therefore, it is possible to reduce the impurity concentration and the amount of oxygen deficiency in the oxide semiconductor film 18. This is possible.

[0097] In addition, in the transistor 60 shown in this embodiment, a pair of electrodes 21 and 22 are formed so as to contact the multilayer film 20. A pair of electrodes 21 and 22 are formed.

[0098] The pair of electrodes 21 and 22 are made of a single metal such as copper, aluminum, gold, silver, molybdenum, etc., or a compound or alloy having this as a main component, and are used in a single-layer structure or a laminated structure. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc. For example, there are a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film, a single-layer structure of a gold film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a copper film, a silver film, or a gold film is laminated on a copper-magnesium-aluminum alloy film, etc. When the pair of electrodes 21 and 22 have a laminated structure, the film contacting the oxide film 19 is formed using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc.

[0099] By forming the pair of electrodes 21 and 22 using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc., it is possible to fabricate a semiconductor device with suppressed wiring delay using a large-area substrate. Also, it is possible to fabricate a semiconductor device with reduced power consumption. By forming the pair of electrodes 21 and 22 using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc., it is possible to fabricate a semiconductor device with suppressed wiring delay using a large-area substrate. Also, it is possible to fabricate a semiconductor device with reduced power consumption. By forming the pair of electrodes 21 and 22 using a low-resistance material such as copper, aluminum, gold, silver, molybdenum, etc., it is possible to fabricate a semiconductor device with suppressed wiring delay using a large-area substrate. Also, it is possible to fabricate a semiconductor device with reduced power consumption.

[0100] The oxide insulating film 23 is an oxide insulating film that permeates oxygen. The oxide insulating film 23 also functions as a damage mitigation film for the multilayer film 20 when forming the oxide insulating film 24 formed later. The oxide insulating film 23 is an oxide insulating film that permeates oxygen. The oxide insulating film 23 also functions as a damage mitigation film for the multilayer film 20 when forming the oxide insulating film 24 formed later. The oxide insulating film 23 is an oxide insulating film that permeates oxygen. The oxide insulating film 23 also functions as a damage mitigation film for the multilayer film 20 when forming the oxide insulating film 24 formed later.

[0101] As the oxide insulating film 23, the thickness is 5 nm or more and 150 nm or less, or 5 nm or more and 50 Silicon oxide films, silicon oxynitride films, etc. with a thickness of nm or less can be used. In this specification, the silicon oxynitride film refers to a film with a higher oxygen content than nitrogen in its composition, and the silicon nitride oxide film refers to a film with a higher nitrogen content than oxygen in its composition.

[0102] In addition, the oxide insulating film 23 preferably has a small amount of defects. Typically, by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from the dangling bonds of silicon is preferably 3×10 17 spins / cm 3 or less. This is because if the defect density in the oxide insulating film 23 is high, oxygen will bind to these defects, resulting in a decrease in the oxygen permeation amount in the oxide insulating film 23.

[0103] Also, the amount of defects at the interface between the oxide insulating film 23 and the multilayer film 20 is preferably small. Typically, by ESR measurement, the spin density of the signal appearing at g = 1.93 derived from the defects of the multilayer film 20 is preferably1×10 17 spins / cm 3 or less, and more preferably below the detection limit.

[0104] In the oxide insulating film 23, all the oxygen that enters the oxide insulating film 23 from the outside does not move outside the oxide insulating film 23, and there is also oxygen remaining in the oxide insulating film 23. Also, when oxygen enters the oxide insulating film 23, and the oxygen contained in the oxide insulating film 23 moves outside the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23.

[0105] ​​​​When an oxide insulating film that permeates oxygen is formed as the oxide insulating film 23, the oxide insulating film 23 The oxygen that desorbs from the oxide insulating film 24 provided above is oxidized via the oxide insulating film 23. It can be moved to the semiconductor film 18.

[0106] The oxide insulating film 24 is formed so as to be in contact with the oxide insulating film 23. 4 is formed using an oxide insulating film containing more oxygen than satisfactorily satisfying the stoichiometric composition. Oxide insulating films containing more oxygen than that satisfying the stoichiometric composition will become acidic when heated. Some of the elements are eliminated. Oxide insulating film contains more oxygen than satisfactorily required to satisfy the stoichiometric composition. In TDS analysis, the amount of oxygen removed, converted to oxygen atoms, was 1.0 × 10⁻⁶. 18 atoms / cm 3 Above, or 3.0 × 10 20 atoms / cm 3 The above is an oxide insulating film. ru.

[0107] The oxide insulating film 24 has a thickness of 30 nm to 500 nm, or 50 nm or more. Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 400 nm or less can be used.

[0108] Furthermore, the oxide insulating film 24 preferably has a low defect count, and typically, ESR measurement... This results in the spin of the signal appearing at g=2.001, which originates from the silicon dangling bond. Density is 1.5 × 10 18 spins / cm 3 Less than, and even 1 x 10 18 spins / cm 3 The following is preferable. Note that the oxide insulating film 24 is compared with the oxide insulating film 23. Because it is far from the multilayer film 20, it can have a higher defect density than the oxide insulating film 23.

[0109] Furthermore, by providing a nitride insulating film 25 having a blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. on the oxide insulating film 24, oxygen diffusion from the multilayer film 20 to the outside and the intrusion of hydrogen, water, etc. from the outside into the multilayer film 20 can be prevented. Examples of the nitride insulating film include silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. Note that, instead of the nitride insulating film having a blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc., an oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be provided. Examples of the oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc. のブロッキング効果を有する窒化物絶縁膜25を設けることで、多層膜20からの酸素の 外部への拡散と、外部から多層膜20への水素、水等の侵入を防ぐことができる。窒化物 絶縁膜としては、窒化シリコン、窒化酸化シリコン、窒化アルミニウム、窒化酸化アルミ ニウム等がある。なお、酸素、水素、水、アルカリ金属、アルカリ土類金属等のブロッキ ング効果を有する窒化物絶縁膜の代わりに、酸素、水素、水等のブロッキング効果を有す る酸化物絶縁膜を設けてもよい。酸素、水素、水等のブロッキング効果を有する酸化物絶 縁膜としては、酸化アルミニウム、酸化窒化アルミニウム、酸化ガリウム、酸化窒化ガリ ウム、酸化イットリウム、酸化窒化イットリウム、酸化ハフニウム、酸化窒化ハフニウム 等がある。

[0110] Next, the manufacturing method of the transistor 60 shown in FIG. 1 will be described with reference to FIG.

[0111] As shown in FIG. 2(A), a gate electrode 15 is formed on a substrate 11, and a nitride insulating film 17a and an oxide insulating film 17b are formed on the gate electrode 15. 窒化物絶縁膜17a及び酸化物絶縁膜17bを形成する。

[0112] Here, a glass substrate is used as the substrate 11.

[0113] The formation method of the gate electrode 15 is shown below. First, a conductive film is formed by a sputtering method, a CVD method, an evaporation method, etc., and a mask is formed on the conductive film by a photolithography process. Next, a part of the conductive film is etched using the mask to form the gate electrode 15. After this, the mask is removed. 着法等により導電膜を形成し、導電膜上にフォトリソグラフィ工程によりマスクを形成す る。次に、該マスクを用いて導電膜の一部をエッチングして、ゲート電極15を形成する 。この後、マスクを除去する。

[0114] The gate electrode 15 may be formed by electroplating, printing, or inkjet instead of the above formation method. It may also be formed by the jet method or other methods.

[0115] Here, a tungsten film with a thickness of 100 nm is formed by sputtering. Next A mask is formed by a photolithography process, and a tungsten film is then made using this mask. Dry etching is performed to form the gate electrode 15.

[0116] Nitride insulating film 17a and oxide insulating film 17b are produced by sputtering, CVD, and vapor deposition. Formed by, etc.

[0117] When forming a silicon nitride film or a silicon nitride oxide film as the nitride insulating film 17a, The raw material gases used are a silicon-containing sedimentary gas and nitrogen and / or ammonia. This is preferable. Typical examples of silicon-containing sedimentary gases include silane, disilane, and tri Examples include silanes and silane fluoride.

[0118] When forming a silicon oxide film or a silicon oxidiznitride film as the oxide insulating film 17b It is preferable to use silicon-containing sedimentary gases and oxidizing gases as raw material gases. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

[0119] Furthermore, when forming a gallium oxide film as the oxide insulating film 17b, MOCVD (Met Using the (al Organic Chemical Vapor Deposition) method It can be formed by doing so.

[0120] Next, as shown in Figure 2(B), an oxide semiconductor film 18 and an oxide film are placed on the oxide insulating film 17b. A physical film 19 is formed.

[0121] The method for forming the oxide semiconductor film 18 and the oxide film 19 will be described below. Gate On the insulating film 17, an oxide semiconductor film which will become an oxide semiconductor film 18, and an acid which will become an oxide film 19 are formed. A continuous oxide film is formed. Next, a mask is applied to the oxide film by a photolithography process. After formation, the oxide semiconductor film and a portion of the oxide film are etched using the mask. By doing so, an element-separated oxide semiconductor film 18 and an oxide semiconductor film are formed as shown in Figure 2(B). A multilayer film 20 having a physical film 19 is formed. After this, the mask is removed.

[0122] The oxide semiconductor film that becomes the oxide semiconductor film 18 and the oxide film that becomes the oxide film 19 are spa Shapes are formed using methods such as tarring, coating, pulsed laser deposition, and laser ablation. It is possible.

[0123] When forming the oxide semiconductor film and oxide film by sputtering, plasma is generated. The power supply for this purpose should be an RF power supply, AC power supply, DC power supply, etc., used as appropriate. It is possible.

[0124] Sputtering gases include noble gases (typically argon), oxygen gas, and a mixture of noble gases and oxygen. A mixed gas is used as appropriate. In the case of a mixed gas of a noble gas and oxygen, the oxygen is used relative to the noble gas. It is preferable to increase the gas ratio.

[0125] Furthermore, the target is appropriately selected according to the composition of the oxide semiconductor film and oxide film to be formed. You just need to choose.

[0126] Furthermore, the oxide semiconductor film that becomes the oxide semiconductor film 18 and the oxide film that becomes the oxide film 19 are When formed using CAAC-OS film and CAAC oxide film respectively, c-axis oriented poly It is preferable to use a target having a crystalline metal oxide. C-axis oriented polycrystalline metal acid A target containing the monstrous material is cleaved by sputtering particles in a plane parallel to the sputtering surface. It has a cleavage plane. When sputtering particles collide with the target, the cleavage plane and atoms At the weaker points of the interbonding structure, the bonds are broken, and part of the target becomes a flat particle. Peeling occurs. The flat particles accumulate on the surface to be formed, causing the CAAC-OS film and C to peel off. AAC oxide film can be formed. Note that the flat particles have a cleavage plane that is parallel to the ab plane. It may be a hexagonal prism with a plane, or a triangular prism whose cleavage plane is a plane parallel to the ab plane. stomach.

[0127] Furthermore, the oxide semiconductor film that becomes the oxide semiconductor film 18 and the oxide film that becomes the oxide film 19 are In the case of In-M-Zn oxide, the atomic ratio of the metal elements in the sputtering target should be Zn ≥ It is preferable to use M. By heating at 200°C to 500°C, hexagonal ZnO In this configuration, Zn atoms and O atoms are bonded in a hexagonal shape in the ab plane and are oriented along the c axis. Therefore, by using ZnO as a seed crystal and depositing the above-mentioned flat particles aligned with the orientation of ZnO, In the planar TEM image, the area is 2500 nm 2 or larger, or 5 μm 2 or more, or 10 00 μm 2 Forming a CAAC-OS film and a CAAC oxide film having the above-described crystalline portion. It is possible.

[0128] Oxide semiconductor films and oxide films are not simply stacked but are continuously bonded (here, in particular This is designed so that a structure is formed in which the energy at the lower end of the conduction band changes continuously between each film. This process involves creating defect levels, such as trap centers and recombination centers, at the interface of each film. The stacked structure is designed so that no such impurities exist. For example, the stacked oxide semiconductor film and When impurities are present between oxide films, the continuity of the energy bands is lost, and crystals form at the interface. The carrier gets trapped, or recombines, and disappears.

[0129] To form continuous bonding, a multi-chamber type film deposition system equipped with a load lock chamber is required. By using a sputtering device, each film is continuously layered without being exposed to the atmosphere. This is necessary. Each chamber in the sputtering apparatus is for the oxide semiconductor film To remove impurities such as water as much as possible, an adsorption-type vacuum pump such as a cryopump is used. Using a pump to perform high vacuum evacuation (5×10 -7 Pa~1×10 -4 It is preferable to do so (up to about Pa). It seems so. Alternatively, you can combine a turbomolecular pump and a cold trap to remove air from the exhaust system. It is preferable to prevent gases, especially those containing carbon or hydrogen, from flowing back into the bar. stomach.

[0130] To obtain an oxide semiconductor film that is of high purity intrinsic or substantially high purity intrinsic, a chamber - In addition to evacuating the inside to a high vacuum, it is also necessary to purify the sputtering gas. The oxygen gas or argon gas used must have a dew point of -40°C or below, or -80°C or below. By using gas purified to below -100°C or below -120°C, oxides are produced. This makes it possible to prevent moisture and other substances from being absorbed into the semiconductor film as much as possible.

[0131] Here, an In-Ga-Zn oxide target (In:Ga:Zn=1:1:1) is used. Using the sputtering method, a 35 nm thick In-Ga-Zn oxide semiconductor film was produced. After forming the oxide film, an In-Ga-Zn oxide target (In:Ga:Zn=1:3: 4) A 20 nm thick In-Ga-Zn oxide film was produced using the sputtering method. An oxide film is formed. Next, a mask is formed on the oxide film, and the oxide semiconductor film and oxide film By selectively etching a portion of each, the oxide semiconductor film 18 and the oxide film 19 A multilayer film 20 having the above characteristics is formed.

[0132] Next, a first heat treatment is performed. The first heat treatment causes the oxide semiconductor film 18 to contain The hydrogen, water, etc. that are present are removed, reducing the amount of hydrogen and water contained in the oxide semiconductor film 18. This can be done. The temperature of the heat treatment is typically 300°C to 400°C, or 3 The temperature should be between 20°C and 370°C.

[0133] The first heat treatment can be carried out using an electric furnace, an RTA device, etc. This allows for heat treatment at a temperature above the strain point of the substrate, albeit for a short period of time. The heating time can be shortened.

[0134] The first heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, or 1 (Air with concentrations of less than 10 ppm or less than 10 ppb), or noble gases (argon, helium, etc.) It should be done under the appropriate atmosphere. The above-mentioned nitrogen, oxygen, ultra-dry air, or noble gases, along with hydrogen, water, etc. It is preferable that it does not contain [unclear]. Also, after heat treatment in a nitrogen or noble gas atmosphere, oxygen [unclear] Alternatively, heating may be performed in an ultra-dry air atmosphere. As a result, hydrogen contained in the oxide semiconductor film This allows for the removal of water and other substances while simultaneously supplying oxygen to the oxide semiconductor film. As a result, This can reduce the amount of oxygen vacancies contained in oxide semiconductor films.

[0135] Next, as shown in Figure 2(C), a portion of the oxide insulating film 17b is etched, and the oxide Insulating film 17c is formed. Through the above steps, nitride insulating film 17a and oxide insulating film 17 A gate insulating film 17 having c can be formed. Note that the multilayer film 20 is used as a mask. By etching the oxide insulating film 17b, the separated oxide insulating film 17c is formed. Alternatively, a multilayer can be created using a mask obtained by a photolithography process. After forming the film 20, the oxide insulating film 17b is etched using the mask without heat treatment. By ching, a separated oxide insulating film 17c is formed, and even after further heat treatment... Good. As a result, the separated oxide insulating film 17 can be obtained without increasing the number of photomasks. c can be formed. Also, a portion of the nitride insulating film 17a can be exposed. .

[0136] Next, as shown in Figure 2(D), a pair of electrodes 21 and 22 are formed.

[0137] The methods for forming the pair of electrodes 21 and 22 are shown below. First, sputtering and CVD. A conductive film is formed using methods such as vapor deposition. Next, a photolithography process is performed on the conductive film. A mask is formed. Next, the conductive film is etched using the mask to form a pair of electrodes 21, 2 Form 2. After this, remove the mask.

[0138] Here, a copper film with a thickness of 400 nm is formed by sputtering. Next, on the copper film... A mask is formed using a photolithography process, and the copper film is dry-etched using this mask. This process forms a pair of electrodes 21 and 22.

[0139] In this embodiment, the pair of electrodes 21 and 22 are mainly nitride insulating in the gate insulating film 17. It is in contact with the edge film 17a, and the contact area with the oxide insulating film 17c is extremely small. Nitride insulation The film 17a has the function of preventing oxidation and diffusion of the metal elements constituting the pair of electrodes 21 and 22. Therefore, the pair of electrodes 21 and 22 are in contact with the nitride insulating film 17a of the gate insulating film 17. This prevents oxidation and diffusion of the metal elements constituting the pair of electrodes 21 and 22. .

[0140] Next, as shown in Figure 2(E), oxide insulating film is applied to the multilayer film 20 and the pair of electrodes 21 and 22. A border film 23 is formed. Next, an oxide insulating film 24 is formed on the oxide insulating film 23.

[0141] Furthermore, after forming the oxide insulating film 23, the oxide insulating film 2 is continuously processed without exposure to the atmosphere. It is preferable to form 4. After forming the oxide insulating film 23, do not open it to the atmosphere and the raw material gas By adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature, the oxide insulating film 24 is continuously... By forming it in this way, the atmospheric components at the interface between oxide insulating film 23 and oxide insulating film 24 This can reduce the concentration of impurities, and also remove the oxygen contained in the oxide insulating film 24. It is possible to transfer oxygen to the semiconductor film 18, thereby reducing the amount of oxygen vacancies in the oxide semiconductor film 18. It is possible.

[0142] The oxide insulating film 23 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 400°C, or 200°C to 370°C, in the processing chamber. The raw material gas is introduced and the pressure inside the processing chamber is set to 20 Pa or more and 250 Pa or less, or 10 The conditions under which high-frequency power is supplied to electrodes installed in the processing chamber are set to be between 0 Pa and 250 Pa. This allows for the formation of a silicon oxide film or a silicon oxide nitride film as the oxide insulating film 23. It is possible.

[0143] As the raw material gas for the oxide insulating film 23, a depositing gas containing silicon and an oxidizing gas are used. It is preferable that it be present. Typical examples of silicon-containing sedimentary gases include silane, disilane, Examples include trisilane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide, etc.

[0144] By using the above conditions, an oxide insulating film that permeates oxygen is formed as the oxide insulating film 23. It is possible to provide the oxide film 19 and the oxide insulating film 23, which can be formed later. In the process of forming the oxide insulating film 24, damage to the oxide semiconductor film 18 can be reduced. That is the case.

[0145] The oxide insulating film 23 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 300°C to 400°C, or 320°C to 370°C, in the processing chamber. The raw material gas is introduced and the pressure inside the processing chamber is set to between 100 Pa and 250 Pa, and the processing is carried out. Depending on the conditions under which high-frequency power is supplied to electrodes installed in the room, the oxide insulating film 23 is acid A silicon oxide film or a silicon oxidizide film can be formed.

[0146] Under these film deposition conditions, the substrate temperature is set to 300°C or higher and 400°C or 320°C or higher and 3 By keeping the temperature below 70°C, the bonding force between silicon and oxygen becomes stronger. As a result, oxide insulation is achieved. The film 23 is an oxide insulating film that is oxygen permeable, dense, and hard, typically rated at 25°C. In this case, the etching rate with respect to 0.5 wt% hydrofluoric acid is 10 nm / min or less, or 8 nm. It is possible to form a silicon oxide film or silicon oxide-nitride film with a flow rate of m / min or less.

[0147] Furthermore, in this process, the oxide insulating film 23 is formed while heating, In this process, hydrogen, water, etc. contained in the oxide semiconductor film 18 can be removed. The hydrogen contained in the conductive film 18 combines with oxygen radicals generated in the plasma to form water. Because the substrate is heated during the deposition process of the oxide insulating film 23, the bonding of oxygen and hydrogen The water generated is then detached from the oxide semiconductor film. In other words, oxidation by plasma CVD. By forming a material insulating film 23, the water and hydrogen content contained in the oxide semiconductor film is reduced. It is possible.

[0148] Furthermore, by setting the pressure in the processing chamber to between 100 Pa and 250 Pa, the oxide insulating film can be formed. Because the water content in 23 decreases, the variation in the electrical characteristics of transistor 60 This reduces the threshold voltage and suppresses fluctuations in the threshold voltage. Furthermore, the pressure in the processing chamber can be reduced by 1 By setting the pressure between 00 Pa and 250 Pa, when forming the oxide insulating film 23, the oxide semi- It is possible to reduce damage to the multilayer film 20 including the conductive film 18, and oxide semiconductor film The amount of oxygen vacancy contained in 18 can be reduced. In particular, the oxide insulating film 23 or later The deposition temperature of the oxide insulating film 24 is increased, typically to a temperature higher than 220°C. As a result, some of the oxygen contained in the oxide semiconductor film 18 is removed, and an oxygen vacancy is formed. Furthermore, to improve the reliability of the transistor, defects in the oxide insulating film 24 that will be formed later will be reduced. Using film formation conditions that reduce the amount of oxygen, the amount of oxygen desorption is easily reduced. As a result, acid It can be difficult to reduce the amount of oxygen vacancies in the ionized semiconductor film 18. However, processing The chamber pressure is set to 100 Pa or more and 250 Pa or less, and oxidation occurs during the formation of the oxide insulating film 23. By reducing damage to the semiconductor film 18, less oxygen is desorbed from the oxide insulating film 24. It is also possible to reduce the amount of oxygen vacancies in the oxide semiconductor film 18 by quantity.

[0149] Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times, It is possible to reduce the hydrogen content contained in the oxide insulating film 23. As a result, the oxide Since the amount of hydrogen mixed into the semiconductor film 18 can be reduced, the threshold voltage of the transistor becomes negative. This can suppress shift.

[0150] Here, the oxide insulating film 23 is silane with a flow rate of 30 sccm and silane with a flow rate of 4000 sccm. Using nitrous oxide at a concentration of 1 cm as the raw material gas, the pressure in the processing chamber was set to 200 Pa and the substrate temperature to 220°C. Then, a 27.12MHz high-frequency power supply is used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxidizide film with a thickness of 50 nm is formed by the plasma CVD method. This allows for the formation of an oxygen-permeable silicon oxidnitride film. In this configuration, a method for forming an oxide insulating film 23 using a 27.12 MHz high-frequency power supply is described. While I have given an example, this is not the only way to go; for example, using a 13.56MHz high-frequency power supply An oxide insulating film 23 may be formed.

[0151] The oxide insulating film 24 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 280°C, or 200°C to 240°C, in the processing chamber. The raw material gas is introduced and the pressure inside the processing chamber is set to 100 Pa or more and 250 Pa or less, or 1 The pressure should be between 00 Pa and 200 Pa, and the electrode installed in the processing chamber should be supplied with 0.17 W / cm². 2 That's all. 0.5 W / cm 2 The following, or 0.25 W / cm² 2 More than 0.35W / cm 2 The following high frequencies Depending on the power supply conditions, a silicon oxide film or a silicon oxide-nitride film is formed.

[0152] As the raw material gas for the oxide insulating film 24, a silicon-containing depositing gas and an oxidizing gas are used. It is preferable that it be present. Typical examples of silicon-containing sedimentary gases include silane, disilane, Examples include trisilane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide, etc.

[0153] As for the film deposition conditions for the oxide insulating film 24, the high frequency of the power density in the processing chamber at the above pressure By supplying wave power, the decomposition efficiency of the source gas in the plasma is increased, and oxygen radicals are increased. In addition, as the oxidation of the raw material gas progresses, the oxygen content in the oxide insulating film 24 becomes stoichiometric The composition becomes greater than expected. On the other hand, the substrate temperature, in the film formed at the above temperature, silicon and oxygen Because the bonding force is weak, some of the oxygen in the film is removed during the subsequent heat treatment. It contains more oxygen than satisfactorily satisfactorily, and some of the oxygen is removed upon heating. An oxide insulating film can be formed. Furthermore, an oxide insulating film 23 is provided on the multilayer film 20. Therefore, in the process of forming the oxide insulating film 24, the oxide insulating film 23 is multilayered. It acts as a protective film for film 20. Furthermore, the oxide film 19 acts as a protective film for the oxide semiconductor film 18. As a result, damage to the oxide semiconductor film 18 is reduced while achieving high-frequency power density. An oxide insulating film 24 can be formed using this method.

[0154] Furthermore, in the deposition conditions for the oxide insulating film 24, silicon-containing deposition in an oxidizing gas... By increasing the flow rate of the volatile gas, it is possible to reduce the amount of defects in the oxide insulating film 24. Typically, ESR measurements show that g = 2.0 originates from dangling bonds in silicon. The spin density of the signal appearing at 01 is 6 × 10 17 spins / cm 3 Less than, or 3 × 10 17 spins / cm 3 The following, or 1.5 × 10 17 spins / cm 3 The following is missing This allows for the formation of oxide insulating films with fewer depressions. As a result, the reliability of transistors is improved. It is possible to do so.

[0155] Here, the oxide insulating film 24 is silane at a flow rate of 200 sccm and at a flow rate of 4000 s. The raw material gas used is nitrous oxide from ccm, the pressure in the processing chamber is 200 Pa, and the substrate temperature is 220°C. Using a 27.12MHz high-frequency power supply, 1500W of high-frequency power is applied to parallel plate electrodes. A 400 nm thick silicon oxide-nitride film is formed using the supplied plasma CVD method. Oh, the plasma CVD device has an electrode area of ​​6000 cm². 2 This is a parallel-plate type plasma CVD. This device, when converted to power per unit area (power density), produces 0.25W. / cm 2In this embodiment, a 27.12 MHz high-frequency power supply is used. Although an example has been given of a method for forming the oxide insulating film 24, the method is not limited to this, for example, 13 The oxide insulating film 24 may be formed using a high-frequency power supply of 0.56 MHz.

[0156] Next, a second heat treatment is performed. The temperature of this heat treatment is typically 150°C to 300°C. The temperature should be below ℃, or between 200℃ and 250℃.

[0157] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Processing time can be reduced.

[0158] Heat treatment involves nitrogen, oxygen, and ultra-dry air (water content of 20 ppm or less, or 1 ppm). The following (or air with a ppb of 10 ppb or less), or an atmosphere of a noble gas (argon, helium, etc.) This can be done below. Note that the above nitrogen, oxygen, ultra-dry air, or noble gases may contain hydrogen, water, etc. It is preferable that this does not happen.

[0159] This heat treatment converts some of the oxygen contained in the oxide insulating film 24 into the oxide semiconductor film 18. By moving the oxygen, the amount of oxygen vacancies contained in the oxide semiconductor film 18 can be reduced.

[0160] Furthermore, if the oxide insulating film 23 and the oxide insulating film 24 contain water, hydrogen, etc., A nitride insulating film 25 having the function of blocking such substances is subsequently formed and then subjected to heat treatment. Water, hydrogen, etc. contained in the oxide insulating film 23 and oxide insulating film 24 are absorbed into the oxide semiconductor film 18. The acid moves, causing defects in the oxide semiconductor film 18. However, this heating process causes the acid It is possible to remove water, hydrogen, etc. contained in the oxide insulating film 23 and the oxide insulating film 24. This reduces variations in the electrical characteristics of transistor 60 and suppresses fluctuations in the threshold voltage. It can be controlled.

[0161] Furthermore, by forming the oxide insulating film 24 on the oxide insulating film 23 while heating, oxidation Oxygen is transferred to the material semiconductor film 18, reducing the amount of oxygen vacancies contained in the oxide semiconductor film 18. Since this is possible, the heat treatment does not need to be performed.

[0162] Furthermore, the heat treatment temperature is set to 150°C or higher and 300°C or 200°C or higher and 250°C or lower. This allows for the diffusion of copper, aluminum, gold, silver, molybdenum, etc., into oxide semiconductor films. This can suppress contamination.

[0163] Here, the material is heated in a nitrogen and oxygen atmosphere at 220°C for 1 hour.

[0164] Furthermore, when forming the pair of electrodes 21 and 22, the conductive film is etched, and the multilayer film 20 The back channel of the multilayer film 20 (in the multilayer film 20, the gate electrode 15 Oxygen vacancies occur on the side opposite to the opposite side. However, stoichiometric amounts of the oxide insulating film 24 By applying an oxide insulating film containing more oxygen than that satisfying the theoretical composition, the heat treatment This allows for the repair of oxygen deficiency on the back channel side. Since defects in the multilayer film 20 can be reduced, the reliability of the transistor 60 can be improved. It can be raised.

[0165] Next, a nitride insulating film 25 is formed by sputtering, CVD, or the like.

[0166] Furthermore, when forming the nitride insulating film 25 by plasma CVD, the true The substrate placed in the ventilated processing chamber is subjected to temperatures between 300°C and 400°C, or between 320°C and 320°C. It is preferable to keep the temperature below 370°C because this allows for the formation of a dense nitride insulating film.

[0167] When forming a silicon nitride film as the nitride insulating film 25 by plasma CVD, It is preferable to use depositing gases containing condensate, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia as a gas compared to nitrogen, ammonia can be produced in the plasma. A dissociates, generating an active species. This active species is contained in the silicon-containing sedimentary gas. The bonds between silicon and hydrogen, and the triple bond of nitrogen are broken. As a result, silicon and nitrogen The bonding is promoted, resulting in fewer silicon and hydrogen bonds, fewer defects, and a dense silicon nitride. A membrane can be formed. On the other hand, in the raw material gas, if the amount of ammonia relative to nitrogen is large Furthermore, the decomposition of silicon-containing sedimentary gases and nitrogen does not proceed, and silicon and hydrogen bonds do not develop. The residue remains, increasing the number of defects and resulting in the formation of a rough silicon nitride film. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw material gas is set to be between 5 and 50. Alternatively, it is preferable to set it to 10 or more and 50 or less.

[0168] Here, in the processing chamber of the plasma CVD apparatus, silane is flowed at a rate of 50 sccm, and at a rate of 5000... The raw material gases are nitrogen at sccm and ammonia at a flow rate of 100 sccm, and the pressure in the processing chamber is Using a 27.12MHz high-frequency power supply with a pressure of 100Pa and a substrate temperature of 350°C, 1000 A plasma CVD method using W high-frequency power supplied to parallel plate electrodes was used to create a nitrided nitride with a thickness of 50 nm. A silicon film is formed. Note that the plasma CVD apparatus has an electrode area of ​​6000 cm². 2 The flat This is a flat-plate type plasma CVD apparatus, and the supplied power is converted to power per unit area (power density). Converted to 1.7 × 10 -1 W / cm 2 That is the case.

[0169] Through the above process, the oxide insulating film 23, oxide insulating film 24, and nitride insulating film 25 are formed A protective film 26 can be formed.

[0170] Next, heat treatment may be performed. The temperature for this heat treatment is typically 150°C or higher for 30°C. The temperature should be 0°C or below, or between 200°C and 250°C.

[0171] By following the above steps, transistor 60 can be manufactured.

[0172] In this embodiment, a CAAC oxide film is formed between the oxide semiconductor film and the pair of electrodes. It has an oxide film. The oxide film reduces the diffusion of impurities from the outside into the oxide semiconductor film. This makes it possible to reduce the amount of impurities that diffuse from the pair of electrodes into the oxide semiconductor film. This is possible. For this reason, a pair can be made using copper, aluminum, gold, silver, or molybdenum. Even when forming electrodes, fluctuations in the transistor's threshold voltage can be reduced.

[0173] Furthermore, in this embodiment, in the transistor manufacturing process, a first heat treatment and a second Although heat treatment is performed, by forming a multilayer film having an oxide semiconductor film, It is possible to reduce the concentration of impurities contained in the conductive film, and the carrier at the defect level It is possible to prevent trapping A. As a result, the temperature of each heat treatment can be set to 400 Even at temperatures below ℃, the threshold voltage fluctuation is equivalent to that of a transistor that has been heat-treated at a high temperature. This allows for the fabrication of transistors. As a result, it is possible to reduce the cost of semiconductor devices. ru.

[0174] Furthermore, it is superimposed on an oxide semiconductor film that functions as a channel region, satisfying the stoichiometric composition. By forming an oxide insulating film containing more oxygen than oxygen, the oxygen in the oxide insulating film is formed. This allows the oxygen contained in the oxide semiconductor film to be transferred to the oxide semiconductor film. The amount of defects can be reduced.

[0175] In particular, an oxide semiconductor film that functions as a channel region and oxygen that satisfies the stoichiometric composition The goal is to form an oxygen-permeable oxide insulating film between an oxide insulating film containing more oxygen and an oxide insulating film containing more oxygen. Therefore, when forming an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, This can suppress damage to the oxide semiconductor film. As a result, the oxide semiconductor film contains It can reduce the amount of oxygen deficiency that occurs.

[0176] Then, by forming an oxide film on the oxide semiconductor film, oxygen that satisfies the stoichiometric composition is formed. When forming an oxide insulating film containing more oxygen than is necessary, damage occurs to the oxide semiconductor film. It can further suppress entry. In addition, by forming an oxide film, the oxide semiconductor film The constituent elements of the insulating film formed on top, for example, an oxide insulating film, are mixed into the oxide semiconductor film. This can suppress the occurrence of [the behavior].

[0177] Based on the above, in semiconductor devices using oxide semiconductor films, the number of defects is reduced. It is possible to obtain a suitable location. Furthermore, in semiconductor devices using oxide semiconductor films, the electrical properties can be improved. A semiconductor device with the above specifications can be obtained.

[0178] <Diffusion mechanism of metal elements in oxide semiconductor films> Here, we present the results of calculations regarding the diffusion mechanism of metal elements in oxide semiconductor films. See below.

[0179] Here, as an oxide semiconductor film, the metal atom ratio is In:Ga:Zn=1:1:1 In-Ga-Zn oxide film (hereinafter referred to as IGZO) deposited using a puttering target (111) is shown. Cu is placed as a metallic element between the lattices in the crystal, and the diffusion of Cu We performed calculations regarding ease of execution.

[0180] The computational model is shown in Figure 4. The four paths indicated by the arrows in Figure 4 represent the diffusion routes of Cu. Regarding this, the Nudged Elastic Band (NEB) method was used to determine the activity barrier of each pathway. The calculations were performed using the following method. In Figure 4, each state is represented by a number. Furthermore, the NEB method is an initial method. The state that requires the lowest energy among the states connecting the two states, given the current state and the final state. This is a method for searching for states. Furthermore, periodic boundary conditions are imposed on the computational model. Also, oxide semiconductors... In a body membrane, the direction parallel to the normal vector of the surface being formed or the upper surface is the c-axis, and this direction This is indicated as the vertical direction. Furthermore, the direction perpendicular to the c-axis, i.e., the ab-plane direction, is indicated as the horizontal direction.

[0181] Pathway 1 is transverse diffusion of Cu between (Ga,Zn)O layers. Figure 4 shows the transition from the initial state to state 1.

[0182] Pathway 2 is longitudinal diffusion of Cu through the (Ga,Zn)O layer. In Figure 4, state 1 This is a transition from state 1 to state 2.

[0183] Pathway 3 is transverse diffusion of Cu between the (Ga,Zn)O layer and the InO2 layer. See Figure 4. Next, we have a transition from state 2 to state 3.

[0184] Pathway 4 is longitudinal diffusion of Cu through the InO2 layer. In Figure 4, from state 3 to state This is a transition to state 4.

[0185] Next, the calculation conditions are shown in Table 1.

[0186] [Table 1]

[0187] In path 1, that is, in transverse diffusion between (Ga,Zn)O layers, The pathway with a low barrier is shown in Figure 5(A), and the active barrier is shown in Figure 5(B). From Figure 5(B), C It can be seen that u is more energetically stable during diffusion than between lattices. From the stable state The active barrier required for interstitial movement is approximately 0.30 eV, and even at room temperature, (Ga,Zn It is thought that transverse diffusion occurs between the )O layer and the (Ga,Zn)O layer.

[0188] In path 2, i.e., longitudinal diffusion through the (Ga,Zn)O layer, the path with the lowest barrier is shown in Figure 6. (A) is shown, and the active barrier is shown in Figure 6(B). From Figure 6(B), Cu is (Ga,Zn)O It is unstable when present within the layer, and its activation barrier is approximately 0.71 eV. Therefore, the chamber At warm temperatures, it is thought that almost no longitudinal diffusion occurs through the (Ga,Zn)O layer.

[0189] In pathway 3, i.e., transverse diffusion between the (Ga,Zn)O layer and the InO2 layer, the barrier is low. The pathway is shown in Figure 7(A), and the active barrier is shown in Figure 7(B). From Figure 7(B), Cu is in the lattice. It can be seen that the energy level during diffusion is more stable than the intermediate state. From the stable state to the interstitial space The active barrier for migration is approximately 0.25 eV, and even at room temperature, the (Ga,Zn)O layer-In Transverse diffusion between O2 layers is thought to occur.

[0190] In pathway 4, i.e., longitudinal diffusion through the InO2 layer, the pathway with the lowest barrier is shown in Figure 8(A). The active barrier is shown in Figure 8(B). When Cu is present in the InO2 layer, it is unstable. The activation barrier was approximately 1.90 eV. Therefore, even at high temperatures, vertical expansion through the InO2 layer was not observed. It is thought that very little scattering will occur.

[0191] Based on the above, the arrows shown in Figure 4, namely the initial state, path 1, path 2, path 3, and the process The active barrier in path 4 is shown in Figure 9. In Figure 9, the horizontal axis represents the distance Cu traveled, and the vertical axis represents the distance traveled. This represents the activation barrier.

[0192] As shown in Figure 9, Cu is energetically stable when it is present between the (Ga,Zn)O layer and the InO2 layer. It is constant, and the activity barrier of pathway 4 across the InO2 layer is the highest. From the above, Cu is I It can be seen that diffusion is difficult in the diffusion pathway that crosses the nO2 layer.

[0193] Here, as a comparative example, the results of the same calculation performed on hexagonal ZnO are shown below. This will be shown.

[0194] The calculation model is shown in Figure 10. Here, the basic lattice of the ZnO crystal is considered in all axial directions. Using a 72-atom crystal model with double the atoms, the diffusion route of Cu is shown by the arrow in Figure 10. For the two pathways, the active barrier of each pathway is defined as NEB (Nudged Elastic). The calculation was performed using the Band method.

[0195] Pathway 1 is the longitudinal diffusion of Cu in the c-axis direction. In Figure 10, from the initial state... This is a transition to state 1.

[0196] Pathway 2 is the transverse diffusion of Cu in the b-axis direction. In Figure 10, from state 1 to state This is a move to 2.

[0197] Next, the calculation conditions are shown in Table 2.

[0198] [Table 2]

[0199] In path 1, i.e., longitudinal diffusion of Cu in the c-axis direction, the diffusion path of Cu is defined relative to the c-axis. Figure 11(A) shows the view from the vertical direction, and Figure 11(B) shows the view from the c-axis direction. The active barrier is shown in Figure 11(C). Cu is unstable when it exists in a plane surrounded by Zn. The activity barrier was approximately 0.73 eV. Therefore, at room temperature, in the c-axis direction, Longitudinal diffusion of Cu is considered to be minimal.

[0200] In path 2, i.e., in the transverse diffusion of Cu in the b-axis direction, the diffusion path of Cu is relative to the c-axis. Figure 12(A) shows the view from the vertical direction, and Figure 12(B) shows the view from the c-axis direction. The active barrier is shown in Figure 12(C). Cu is more active during diffusion than interstitial diffusion, where there are two Cu molecules. It can be seen that the position where it bonds with O is energetically more stable. From the stable state to the interstitial state The active barrier required for movement to the b axis is approximately 0.32 eV, and even at room temperature, Cu moves laterally in the b axis direction. Diffusion is likely to occur.

[0201] Based on the above, the arrows in Figure 10, i.e., the initial state, path 1, and path 2, indicate the activity Sexual barriers are shown in Figure 13.

[0202] Figure 13 shows that Cu is in the process of lateral diffusion and is at the position where it will bond with two oxygen atoms. It is energetically stable and has the highest active barrier in longitudinal diffusion along the c-axis.

[0203] Note that the active barrier (approximately 1.9 eV) when passing through the InO2 layer is shown in Figure 9, which is pathway 4. In comparison, the active barrier (approximately 0.7 eV) for longitudinal diffusion in ZnO, as shown in Pathway 1 in Figure 13, is It is lower. From this, it can be seen that IGZO(111) is better than ZnO in the longitudinal direction of Cu diffusion. The inhibitory effect is considered to be high.

[0204] In other words, no grain boundaries are observed, it has c-axis orientation, and the c-axis is perpendicular to the surface being formed or the upper surface. The CAAC oxide film, oriented in a direction parallel to the line vector, is used as an oxide semiconductor film and a pair of electrodes. By placing it between them and forming a pair of electrodes using Cu, a channel etch type transistor is formed. This shows that it is possible to reduce the diffusion of Cu into the oxide semiconductor film.

[0205] <Transistor Band Structure> Next, the band structure of the multilayer film 20 will be explained using Figure 3.

[0206] Here, as an example, the oxide semiconductor film 18 has an energy gap of 3.15 eV. Using a certain In-Ga-Zn oxide, the oxide film 19 has an energy gap of 3.5e. In-Ga-Zn oxide of type V is used. The energy gap is measured using a spectroscopic ellipsometer. Measurements can be taken using the HORIBA JOBIN YVON UT-300. ru.

[0207] The energy difference between the vacuum level and the upper edge of the valence band of the oxide semiconductor film 18 and the oxide film 19 (Io Also called the ionization potential, these are 8 eV and 8.2 eV, respectively. The energy difference between the position and the upper end of the valence band is determined by ultraviolet photoelectron spectroscopy (UPS). Let Photoelectron Spectroscopy (PHI Corporation V) equipment It can be measured using ersaProbe.

[0208] Therefore, the energy between the vacuum level and the lower edge of the conduction band of the oxide semiconductor film 18 and the oxide film 19 The difference (also called electron affinity) is 4.85 eV and 4.7 eV, respectively.

[0209] Figure 3(A) schematically shows a part of the band structure of the multilayer film 20. Here, multilayer The case in which a silicon oxide film is provided in contact with film 20 will be explained. Note that this is shown in Figure 3(A). EcI1 represents the energy at the lower end of the conduction band of a silicon oxide film, and EcS1 represents the energy of an oxide semiconductor film. 18 shows the energy at the lower end of the conduction band, and EcS2 is the energy at the lower end of the conduction band of the oxide film 19. EcI2 shows the energy at the lower end of the conduction band of the silicon oxide film. Also, EcI1 In Figure 1(B), this corresponds to the gate insulating film 17, and EcI2 corresponds to in Figure 1(B). This corresponds to the oxide insulating film 23.

[0210] As shown in Figure 3(A), in oxide semiconductor film 18 and oxide film 19, the lower end of the conduction band The energy changes smoothly without any barriers. In other words, it changes continuously. This is possible. This is because the multilayer film 20 contains elements common to the oxide semiconductor film 18, and oxide A mixed layer is formed between the semiconductor film 18 and the oxide film 19 by the mutual movement of oxygen. It can be said that this is for that reason.

[0211] From Figure 3(A), the oxide semiconductor film 18 of the multilayer film 20 becomes a well, and the multilayer film 2 In a transistor using 0, the channel region is formed in the oxide semiconductor film 18. This can be understood. Furthermore, since the energy at the lower end of the conduction band of the multilayer film 20 changes continuously, It can also be said that the oxide semiconductor film 18 and the oxide film 19 are continuously bonded together.

[0212] Furthermore, as shown in Figure 3(A), near the interface between the oxide film 19 and the oxide insulating film 23 , silicon or carbon which are constituent elements of the oxide insulating film 23, and the composition of the pair of electrodes 21, 22 Traps caused by impurities and defects in elements such as copper, aluminum, gold, silver, and molybdenum. Although levels may be formed, the oxide film 19 is provided, thus the oxide semiconductor film 18 This can move the trap level away from the energy between EcS1 and EcS2. - If the difference is small, electrons in the oxide semiconductor film 18 exceed the energy difference and reach the trap level. This can occur. Electrons are trapped in the trap level, creating a negative charge at the insulating film interface. A load is created, and the transistor's threshold voltage shifts in the positive direction. Therefore, The energy difference between EcS1 and EcS2 is set to be 0.1 eV or greater, or 0.15 eV or greater. This reduces fluctuations in the transistor's threshold voltage, resulting in stable electrical characteristics, making it preferable. That is the case.

[0213] Furthermore, Figure 3(B) schematically shows a part of the band structure of the multilayer film 20, as shown in Figure 3(A). This is a modified example of a band structure. Here, a silicon oxide film is provided in contact with the multilayer film 20. Let's explain the relationship. Note that EcI1 shown in Figure 3(B) is the lower end of the conduction band of the silicon oxide film. EcS1 indicates the energy at the lower end of the conduction band of the oxide semiconductor film 18. cI2 represents the energy at the lower end of the conduction band of the silicon oxide film. EcI1 is shown in Figure 1(B). In Figure 1(B), EcI2 corresponds to the gate insulating film 17, and in Figure 1(B), it is an oxide insulating film. This corresponds to membrane 23.

[0214] In the transistor shown in Figure 1(B), when the pair of electrodes 21 and 22 are formed, the multilayer film 20 In some cases, the oxide film 19 may be etched above it. On the other hand, the oxide semiconductor film 1 On the upper surface of 8, a mixed layer of oxide semiconductor film 18 and oxide film 19 is formed during the deposition of the oxide film 19. This may happen.

[0215] For example, the oxide semiconductor film 18 has an In:Ga:Zn=1:1:1 [atomic ratio] In- Ga-Zn oxide, or In-Ga-Zn with an atomic ratio of In:Ga:Zn=3:1:2 This oxide semiconductor film is formed using an oxide as a sputtering target, and the oxide is an oxide. Film 19 is an In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:3:2, In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:6:4 is sputtered. In the case of an oxide film formed using a target, the oxide is more oxide than the oxide semiconductor film 18. Because the film 19 has a high Ga content, the upper surface of the oxide semiconductor film 18 has a GaOx layer or acid A mixed layer containing more Ga than the ionized semiconductor film 18 can be formed.

[0216] Therefore, even when the oxide film 19 is etched, the EcI2 side of EcS1 When the energy at the lower end of the conduction band becomes high, the band structure becomes as shown in Figure 3(B). be.

[0217] When the band structure is as shown in Figure 3(B), when observing the cross-section of the channel region, The multilayer film 20 may appear to be only the oxide semiconductor film 18. However, In essence, the oxide semiconductor film 18 contains a mixture that has more Ga than the oxide semiconductor film 18. Since a composite layer is formed, the mixed layer can be considered as layer 1.5. When the elements contained in the multilayer film 20 are measured, for example by EDX analysis, the mixed layer is... This can be confirmed by analyzing the composition of the upper part of the oxide semiconductor film 18. For example, The composition of the upper part of the material semiconductor film 18 has a higher Ga content than the composition within the oxide semiconductor film 18. This can be confirmed by looking at the configuration.

[0218] <Example 1> In the transistor 60 shown in this embodiment, a modified example of the multilayer film 20 is shown in Figure 14. explain.

[0219] The transistor shown in Figure 14(A) has a multilayer film 20 that, from the gate insulating film 17 side, is first The oxide semiconductor film 18a, the second oxide semiconductor film 18b, and the oxide film 19 are stacked in that order. Yes, they are.

[0220] The first oxide semiconductor film 18a and the second oxide semiconductor film 18b are the aforementioned oxide semiconductors The first oxide semiconductor film 18a and the second oxide semiconductor film are formed using the same material as film 18. Body membrane 18b is In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd) When formed in this way, the atomic ratio of In to M is greater than that of the first oxide semiconductor film 18b. It is preferable that the oxide semiconductor film 18a is larger. In In-M-Zn oxide, M When the atomic ratio of In is large, that is, when the proportion of In is large, the carrier mobility (electron mobility) increases. The temperature (degree) increases. For this reason, the first oxide semiconductor film 18a in contact with the gate insulating film 17 is By creating a film with a high proportion of In, it is possible to increase the on-current of the transistor. In addition, it can increase the field effect mobility.

[0221] Furthermore, by forming the first oxide semiconductor film 18a using a CAAC-OS film, the external Because it is possible to reduce the diffusion of impurities from the first oxide semiconductor film 1 It is possible to reduce the amount of impurities that migrate to 8a and the second oxide semiconductor film 18b.

[0222] The transistor shown in Figure 14(B) has a multilayer film 20 that, from the gate insulating film 17 side, is first The oxide film 19a, the oxide semiconductor film 18, and the second oxide film 19b are stacked in that order.

[0223] The first oxide film 19a and the second oxide film 19b are the oxide film 19 shown in Embodiment 1 and It is formed using the same material. Note that the first oxide film 19a and the second oxide film 19b are constructed The atomic ratios of the metal elements that make up the mixture may be the same or different.

[0224] The first oxide film 19a is preferably thinner than the oxide semiconductor film 18. By setting the thickness of the oxide film 19a to 1 nm or more and 5 nm or 1 nm or more and 3 nm This makes it possible to reduce the fluctuation in the threshold voltage of the transistor.

[0225] The transistor shown in Figure 14(B) has a gate insulating film 17 and an oxide semiconductor film 18 between them. A first oxide film 19a is provided. Therefore, the first oxide film 19a and the oxide film Even if trap levels are formed between the conductive films 18 due to impurities and defects, There is a gap between the UP level and the oxide semiconductor film 18. As a result, the oxide semiconductor film 18 Electrons flowing through this circuit are less likely to be trapped at the trap level, thus increasing the on-current of the transistor. This makes it possible to increase the field effect mobility. When a child electron is captured, that electron becomes a negative fixed charge. As a result, the transient The threshold voltage of the trap level fluctuates. However, the oxide semiconductor film 18 and the trap level Because there is a gap between them, it is possible to reduce electron trapping at the trap level. This reduces fluctuations in the threshold voltage.

[0226] Furthermore, by forming the first oxide film 19a using a CAAC oxide film, external protection Because it is possible to reduce the diffusion of impurities, they can move from the outside to the oxide semiconductor film 18. It is possible to reduce the amount of impurities. Therefore, the impurity concentration in the oxide semiconductor film 18 It is possible to reduce the degree.

[0227] <Modification 2> As a pair of electrodes 21 and 22 provided in the transistor 60 shown in this embodiment, copper, Using conductive materials that readily bond with oxygen, such as aluminum or molybdenum in its pure or alloy form. It is preferable that this is the case. As a result, the oxygen contained in the multilayer film 20 and the pair of electrodes 21 and 22 are contained The conductive material is bonded to the multilayer film 20, forming an oxygen-deficient region. Even if some of the constituent elements of the conductive material that forms the pair of electrodes 21 and 22 are mixed into the layer film 20. Yes. As a result, in the multilayer film 20, near the region in contact with the pair of electrodes 21 and 22, A low-resistance region is formed. The low-resistance region is in contact with the pair of electrodes 21 and 22 and is gate-insulated. It is formed between the film 17 and the pair of electrodes 21 and 22. The low-resistance region has high conductivity, It is possible to reduce the contact resistance between the multilayer film 20 and the pair of electrodes 21 and 22, and transient It is possible to increase the on-current of the sta.

[0228] Furthermore, the pair of electrodes 21 and 22 are made of a conductive material that readily bonds with oxygen, titanium nitride, and nitrogen. A laminated structure with conductive materials that do not readily bond with oxygen, such as tantalum or ruthenium, may also be used. For example, a conductive film is formed using a conductive material that does not readily bond with oxygen, so as to be in contact with the multilayer film 20. Furthermore, a conductive film made of a conductive material that readily bonds with oxygen may be formed on the conductive film. By using such a layered structure, at the interface between the pair of electrodes 21 and 22 and the oxide insulating film 23 This makes it possible to prevent oxidation of the pair of electrodes 21 and 22, and the high temperature of the pair of electrodes 21 and 22 It is possible to suppress the development of resistance.

[0229] <Variation 3> In the transistor 60 shown in this embodiment, as shown in Figure 15, transistor 6 A protective film 26a is provided on top of 0, in which an oxide insulating film 24 and a nitride insulating film 25 are laminated. This is possible. The transistor shown in Figure 15 has an oxide film 19 on an oxide semiconductor film 18. Therefore, the oxide film 19 functions as a protective film when forming the oxide insulating film 24. As a result, when forming the oxide insulating film 24, the oxide semiconductor film 18 is not exposed to the plasma, and Plasma generated when forming oxide insulating film 24 using a relatively high power plasma CVD method It can reduce damage.

[0230] Furthermore, it is possible to directly transfer oxygen contained in the oxide insulating film 24 to the multilayer film 20. Therefore, it is possible to increase the amount of oxygen supplied to the oxide semiconductor film 18. This makes it possible to further reduce the amount of oxygen vacancies in the oxide semiconductor film 18.

[0231] In this embodiment, the multilayer film is a laminated film of an oxide semiconductor film 18 and an oxide film 19. However, by further providing an oxide film between the gate insulating film 17 and the oxide semiconductor film 18, It is possible. By providing an oxide film between the gate insulating film 17 and the oxide semiconductor film 18, the gate The concentrations of silicon and carbon near the interface between the insulating film 17 and the multilayer film, and the oxide semiconductor film 18. This allows for a reduction in the concentration of silicon and carbon in the solution.

[0232] <Modification 4> In this embodiment, the gate electrode 15 is provided between the substrate 11 and the multilayer film 20. Although the explanation used a transistor with a Tom gate structure, as shown in Figure 32(A), It can be made into a gate structure transistor. That is, a pair of electrodes 21 on the multilayer film 20 It has a pair of electrodes 21, 22 and a gate insulating film 27 on the gate insulating film 27 It can be a transistor 62 having a gate electrode 15a. Between the layer films 20, there is an oxide insulating film 17c in contact with the multilayer film 20, and the oxide insulating film 17c and A nitride insulating film 17a is provided in contact with a pair of electrodes 21 and 22. Furthermore, Figure 32( As shown in B), the gate electrode 15, the gate insulating film 17 on the gate electrode 15, and the gate A multilayer film 20 on an insulating film 17, a pair of electrodes 21 and 22 on the multilayer film 20, and the multilayer film 20 and A pair of electrodes 21 and 22 have a protective film 26 on them, and a gate electrode 15a on the protective film 26. This can be a dual-gate transistor 64.

[0233] (Embodiment 2) In this embodiment, it is possible to prevent the diffusion of the metal elements constituting the pair of electrodes 21 and 22. A semiconductor device having a transistor and a method for fabricating the same are shown in Figures 2, 16, and 1. I will explain using number 7.

[0234] Figures 16(A) to 16(C) show a top view of the transistor 70 of the semiconductor device and A cross-sectional view is shown. The transistor 70 shown in Figure 16 is a channel etch type transistor. Figure 16(A) is a top view of transistor 70, and Figure 16(B) is a top view of Figure 16(A). Figure 16(C) is a cross-sectional view between the dashed lines A and B, and Figure 16(A) is a cross-sectional view between the dashed lines C and D. This is a cross-sectional view. Note that in Figure 16(A), for clarity, the substrate 11 and transistor 70 are shown. Some of the components (for example, gate insulating film 17), oxide insulating film 23, oxide insulating film 24, Nitride insulating film 25 and other components have been omitted.

[0235] The transistor 70 shown in Figures 16(B) and 16(C) is provided on the substrate 11. A gate electrode 15, a gate insulating film 17 formed on the substrate 11 and the gate electrode 15, and A multilayer film 20 overlapping with the gate electrode 15 via an insulating film 17, and a pair in contact with the multilayer film 20 It has electrodes 21 and 22. Furthermore, it has protective films 43 and 44 on the pair of electrodes 21 and 22. Furthermore, the gate insulating film 17, the multilayer film 20, the pair of electrodes 21, 22, and the protective films 43, 4 4 is a retaining film composed of oxide insulating film 23, oxide insulating film 24, and nitride insulating film 25. A protective film 26 is formed.

[0236] The protective films 43 and 44 are formed in the processing steps for creating the pair of electrodes 21 and 22. It functions as a protective film. Also, protective films 43 and 44 have a pair of electrodes 21 and 22 plastic Zuma, in particular, has the function of preventing exposure to oxygen plasma. Also, protective films 43, 4 4 has the function of preventing the diffusion of the metal elements that make up the pair of electrodes 21 and 22. Therefore, protective films 43 and 44 are formed from plasma-resistant materials. 44 is formed using a material that prevents the diffusion of the metal elements constituting the pair of electrodes 21 and 22. .

[0237] Protective films 43 and 44 are silicon nitride, silicon nitride oxide, aluminum nitride, and silicon nitride oxide This can be formed using a nitride insulating film made of aluminum or the like as appropriate. In the specification, silicon nitride film and aluminum nitride film are defined as having more nitrogen than oxygen. This refers to a film with a high content (atomic ratio) of certain elements, such as silicon oxide nitride films and aluminum oxide nitride films. This refers to a membrane in which the oxygen content (atomic ratio) is higher than the nitrogen content.

[0238] Alternatively, protective films 43 and 44 may be made of indium tin oxide (hereinafter also referred to as ITO), or oxide. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, Titanium oxide containing indium oxide, titanium oxide containing indium tin oxide, indium Translucent conductive materials formed from zinc oxide, silicon oxide, indium tin oxide, etc. It can be formed using a membrane.

[0239] Alternatively, the protective films 43 and 44 may be the oxide semiconductor film 18 or oxide film shown in Embodiment 1. Using an oxide semiconductor containing In, Ga, or Zn that can be used in 19, the shape is formed as appropriate. It is possible.

[0240] Furthermore, if the protective films 43 and 44 are formed using a transparent conductive film, protective film 43 44 functions as an electrode together with electrodes 21 and 22, respectively.

[0241] A mask made of organic resin (typical) used to form a pair of electrodes 21 and 22. The mask (formed with resist) is subjected to an ashing process, which involves using oxygen plasma to mask the mask. It is removed by decomposing it in the gas phase. Alternatively, the stripping solution can be removed by ashing treatment. Since the mask used can be easily removed, after ashing treatment, the stripping solution is used to remove organic resin It can remove the mask formed by oil.

[0242] Furthermore, an oxide insulating film is applied as a protective film to the pair of electrodes 21 and 22 by sputtering, CV When formed using method D or similar, electrodes 21 and 22 are exposed to oxygen plasma.

[0243] However, when the pair of electrodes 21 and 22 are exposed to oxygen plasma, the pair of electrodes 21 The metal elements that make up 22 react with oxygen, and a metal oxide is formed. Because oxides are highly reactive, there is a problem that they diffuse into the multilayer film 20. Therefore, When protective films 43 and 44 are provided on the pair of electrodes 21 and 22, the protective films 43 and 44 act as a mask. As a result, the pair of electrodes 21 and 22 are less likely to be exposed to the oxygen plasma. As the metal elements constituting electrodes 21 and 22 react with oxygen, the formation of metal oxides becomes less likely. This reduces the migration of the metal elements constituting the pair of electrodes 21 and 22 to the multilayer film 20. Cut.

[0244] In other words, it is possible to reduce the impurity concentration of the multilayer film 20. This makes it possible to reduce fluctuations in the electrical characteristics of transistor 70.

[0245] Next, the method for fabricating the transistor 70 shown in Figure 16 will be explained using Figures 2 and 17. I will reveal it.

[0246] Similar to Embodiment 1, the process proceeds as shown in Figures 2(A) to 2(C), and is shown in Figure 17(A). As shown above, a gate electrode 15, a gate insulating film 17, a multilayer film 20, a conductive film 41, and A protective film 42 is formed.

[0247] The conductive film 41 is a film that will later become a pair of electrodes 21 and 22. Therefore, the conductive film 41 is The materials shown for the pair of electrodes 21 and 22 can be used as appropriate.

[0248] The conductive film 41 is formed using methods such as sputtering, vapor deposition, CVD, and printing, as appropriate. .

[0249] Here, a copper film with a thickness of 200 nm is formed as the conductive film 41 by sputtering. Furthermore, a 200 nm thick silicon nitride film is used as the protective film 42 by plasma CVD. It forms.

[0250] Next, after forming a mask on the protective film 42, a portion of the protective film 42 is etched using the mask. The protective film 42 is then formed as shown in Figure 17(B). For etching, dry etching, wet etching, etc., can be used as appropriate. The protective films 43 and 44 function as hard masks in later processes, and the distance between the protective films 43 and 44 Since the distance becomes the channel length of the transistor, anisotropic etching is possible with dry etching. It is preferable to etch the protective film 42 using [a specific method / tool].

[0251] Here, after forming a mask using a photolithography process, a dry etching method is used. Further etching of a portion of the protective film 42 forms protective films 43 and 44.

[0252] After this, it is preferable to remove the mask. As a result, in the process of removing the mask, Therefore, since the multilayer film 20 is covered by the conductive film 41 and is not exposed, the conductive film 41 is formed The metal elements do not migrate to the multilayer film 20. Here, the mask is removed by ashing. After making it softer, remove the mask using a stripping solution.

[0253] Next, as shown in Figure 17(C), the conductive film 41 is applied using the protective films 43 and 44 as masks. A portion of the material is etched to form a pair of electrodes 21 and 22. Protective films 43 and 44 are etched. As a condition for selectively etching the conductive film 41 without etching, the etchant contains nitric acid and peroxide. A mixture of chloric acid, phosphoric acid, acetic acid, and nitric acid (aluminum mixed acid solution), etc., can be used as appropriate.

[0254] Here, hydrogen peroxide, ammonium acetate, malonic acid, and ethylenedioxide are used as etchants. Wet The conductive film 41 is selectively etched using an etching method.

[0255] Furthermore, after forming the pair of electrodes 21 and 22, any remaining metal elements on the multilayer film 20 are removed. It is preferable to add an etching step for this purpose. For example, a pair of electrodes 21, 22, Without etching protective films 43 and 44, the surface of the multilayer film 20 is etched by several nanometers, for example, 1 nm to 5 nm. The following etching conditions are preferable. Such etching conditions include: Hydrofluoric acid, a mixture of hydrofluoric acid and ammonium fluoride (also called buffered hydrofluoric acid), A A mixture of ammonium peroxide and hydrogen peroxide (also called ammonium peroxide) can be used. Cut.

[0256] Here, an etchant made by diluting 0.5% hydrofluoric acid to 1 / 1000 is used to create a multilayer film. The metal elements constituting the pair of electrodes 21 and 22 are removed from the surface of 20.

[0257] Furthermore, the process of forming a pair of electrodes 21 and 22, and the process of removing the pair of electrodes 2 from the surface of the multilayer film 20 In the process of removing the metal elements that make up 1 and 22, the film in contact with the pair of electrodes 21 and 22 Here, since the oxide film 19 is formed using a CAAC oxide film, a pair of electrodes 2 1, The metal elements constituting 22 do not diffuse into the oxide semiconductor film 18. Therefore, the oxide semiconductor The impurity concentration of the conductive film 18 can be reduced.

[0258] Next, similar to Embodiment 1, as shown in Figure 17(D), a multilayer film 20 and a pair of electrodes 21 A protective film 26 is formed on 22 and a pair of protective films 43 and 44.

[0259] By following the above steps, transistor 70 can be manufactured.

[0260] In this embodiment, the transistor has protective films 43 and 44 on a pair of electrodes. In a pair of electrodes, the area exposed to plasma, for example, oxygen plasma, is reduced. As a result, the formation of compounds of metal elements constituting the conductive film due to plasma irradiation is reduced. Therefore, the metal elements that make up the conductive film are less likely to migrate to the multilayer film.

[0261] Furthermore, an oxide film formed of CAAC oxide film is placed between the oxide semiconductor film and the pair of electrodes. The oxide film has the ability to reduce the diffusion of impurities from the outside, and a pair It is possible to reduce the amount of impurities that move from the electrode to the oxide semiconductor film. Therefore, copper Even if a pair of electrodes is formed using aluminum, gold, silver, or molybdenum, the transient This can reduce fluctuations in the threshold voltage of the station.

[0262] As a result, the constituent elements of the wiring and electrodes are copper, aluminum, gold, silver, molybdenum. This can suppress the diffusion of impurities such as ions into the oxide semiconductor film contained in the multilayer film. Furthermore, the concentration of impurities in the oxide semiconductor film can be reduced.

[0263] From the above, a semiconductor device with improved electrical characteristics can be obtained. A conductive device can be obtained.

[0264] <Example 1> In this embodiment, the gate electrode 15 is provided between the substrate 11 and the multilayer film 20. Although the explanation used a top-gate transistor, as shown in Figure 33(A), It can be made into a transistor structure. That is, a pair of electrodes 21, 22 on the multilayer film 20 It has protective films 43 and 44 on a pair of electrodes 21 and 22, and The protective films 43 and 44 have a gate insulating film 27, and the gate electrode 15a is on the gate insulating film 27. A transistor 72 having the following can be used. Note that between the substrate 11 and the multilayer film 20, The oxide insulating film 17c in contact with the multilayer film 20, and the oxide insulating film 17c and a pair of electrodes 21, 2 A nitride insulating film 17a is provided in contact with 2. Furthermore, as shown in Figure 33(B), A gate electrode 15, a gate insulating film 17 on the gate electrode 15, and a multilayer on the gate insulating film 17. A film 20, a pair of electrodes 21 and 22 on the multilayer film 20, and a protective film 4 on the pair of electrodes 21 and 22. 3, 44, the multilayer film 20, the pair of electrodes 21, 22, and the protective film 26 on the protective films 43, 44 A dual-gate transistor 74 having a gate electrode 15a on a protective film 26. It can be done this way.

[0265] (Embodiment 3) In this embodiment, a semiconductor device, which is one aspect of the present invention, will be described with reference to the drawings. In this embodiment, a semiconductor device, which is one aspect of the present invention, will be described using a display device as an example. do.

[0266] Figure 18(A) shows an example of a semiconductor device. The semiconductor device shown in Figure 18(A) has a pixel section. 101, scan line drive circuit 104, signal line drive circuit 106, and each is parallel or nearly parallel. m scan lines 107 are arranged and whose potential is controlled by the scan line drive circuit 104. Each is arranged in parallel or nearly parallel, and its potential is controlled by the signal line drive circuit 106. It has n signal lines 109 and, furthermore, the pixel section 101 is arranged in a matrix. It has multiple pixels 301. Also, along the signal line 109, each is parallel or approximately parallel. It has capacity lines 115 arranged along the scan lines 107. They may be arranged in parallel or approximately parallel. Also, the scan line drive circuit 104 and the signal line drive The entire drive circuit 106 is sometimes referred to as the drive circuit section.

[0267] Each scan line 107 is one of the pixels 301 arranged in m rows and n columns in the pixel section 101. It is electrically connected to n pixels 301 arranged in any row. Also, each signal line 109 This refers to m pixels 30 arranged in m rows and n columns, where m pixels 30 are located in any of the columns. It is electrically connected to 1. m and n are both integers greater than or equal to 1. Also, each capacitance line 115 This refers to m pixels 30 arranged in m rows and n columns, where m pixels 30 are located in any of the columns. It is electrically connected to 1. Note that the capacitance lines 115 are parallel to each other along the scan lines 107. Or, if they are arranged in roughly parallel directions, then any of the pixels 301 arranged in m rows and n columns It is electrically connected to n pixels 301 arranged in the row.

[0268] Figures 18(B) and 18(C) are used for pixel 301 of the display device shown in Figure 18(A). This shows a circuit configuration that can be implemented.

[0269] The pixel 301 shown in Figure 18(B) consists of a liquid crystal element 132, a transistor 131_1, and It has a quantitative element 133_1 and

[0270] The potential of one of the pair of electrodes of the liquid crystal element 132 is set appropriately according to the specifications of the pixel 301. The orientation state of the liquid crystal element 132 is set according to the data written to it. A common potential (common) is applied to one of the pair of electrodes of the liquid crystal element 132 that each pixel 301 possesses. A potential may be applied. Also, one of the pair of electrodes of the liquid crystal element 132 for each pixel 301 in each row You may apply different potentials to them.

[0271] For example, the driving method for a display device equipped with a liquid crystal element 132 may be TN mode, STN mode Code, VA mode, ASM (Axially Symmetric Aligned Motor) icro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liqu id Crystal) mode, AFLC (AntiFerroelectric Li) quid Crystal) mode, MVA mode, PVA (Patterned Ve (Critical Alignment) mode, IPS mode, FFS mode, or TB You may also use modes such as A (Transverse Bend Alignment). Furthermore, in addition to the above-mentioned driving methods, ECB (Electronic Control Band) is also used as a driving method for the display device. (Controlled Birefringence) mode, PDLC ( Polymer Dispersed Liquid Crystal (PNL) mode, PNL C (Polymer Network Liquid Crystal) mode, guest There are modes such as host mode. However, this is not limited to these, and also applies to liquid crystal elements and their driving methods. Various materials can be used.

[0272] Furthermore, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be constructed in this manner. The liquid crystal exhibiting the blue phase has a response speed of 1 msec or less. Because it is short and optically isotropic, orientation processing is unnecessary and it has low dependence on the viewing angle.

[0273] In pixel 301 at row m, column n, the source electrode and drain of transistor 131_1. One electrode is electrically connected to the signal line DL_n, and the other is connected to a pair of electrodes on the liquid crystal element 132. It is electrically connected to the other side. Also, the gate electrode of transistor 131_1 is connected to scan line G It is electrically connected to L_m. Transistor 131_1 is either on or off. This provides a function to control the writing of data to the data signal.

[0274] One of the pair of electrodes of the capacitive element 133_1 is connected to a wiring to which a potential is supplied (hereinafter referred to as the capacitance wire CL). ) is electrically connected to the other end, and the other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 132. The potential value of the capacitance line CL is set appropriately according to the specifications of pixel 301. Child 133_1 functions as a storage capacity for holding the written data.

[0275] For example, in the display device having pixels 301 as shown in Figure 18(B), the scan line driving circuit 104 Each row's pixel 301 is selected sequentially, and transistor 131_1 is turned on to generate the data signal. Write the data to it.

[0276] When data is written to pixel 301, transistor 131_1 turns off. The image is then held. By performing this process row by row, the image can be displayed.

[0277] Furthermore, the pixel 301 shown in Figure 18(C) consists of a transistor 131_2 and a capacitive element 133 It has _2, a transistor 134, and a light-emitting element 135.

[0278] One of the source and drain electrodes of transistor 131_2 is connected when a data signal is applied. It is electrically connected to the wiring (hereinafter referred to as signal line DL_n). Furthermore, a transistor The gate electrode of 131_2 is the wiring to which the gate signal is supplied (hereinafter referred to as the scan line GL_m). It is electrically connected to ).

[0279] Transistor 131_2 is either on or off, which controls the data signal. It has a function to control data writing.

[0280] One of the pair of electrodes of the capacitive element 133_2 is connected to a wire to which a potential is supplied (hereinafter referred to as the potential supply wire). It is electrically connected to VL_a, and the other side is the source electrode of transistor 131_2 and It is electrically connected to the other side of the drain electrode.

[0281] The capacitive element 133_2 functions as a holding capacitor that retains the written data. .

[0282] One of the source and drain electrodes of transistor 134 is connected to the potential supply line VL_a. They are electrically connected. Furthermore, the gate electrode of transistor 134 is connected to transistor 131_ It is electrically connected to the other of the source electrode and drain electrode of 2.

[0283] One of the anodes and cathodes of the light-emitting element 135 is electrically connected to the potential supply line VL_b. The other end is electrically connected to the source electrode and drain electrode of transistor 134. It will be done.

[0284] The light-emitting element 135 can be, for example, an organic electroluminescent element (also known as an organic EL element). (These can be used.) However, the light-emitting element 135 is not limited to these. Inorganic EL elements made of inorganic materials may also be used.

[0285] Furthermore, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b. On the other hand, a low power supply potential VSS is applied.

[0286] In the display device having pixels 301 as shown in Figure 18(C), each row is driven by the scan line driving circuit 104. Pixel 301 is selected sequentially, and transistor 131_2 is turned on to generate the data signal. Write it down.

[0287] When data is written to pixel 301, transistor 131_2 turns off. It enters a holding state. Furthermore, in accordance with the potential of the written data signal, transistor 134 The amount of current flowing between the source electrode and the drain electrode is controlled, and the light-emitting element 135 is controlled by the flow of current. It emits light with brightness corresponding to the flow rate. By performing this sequentially for each row, an image can be displayed.

[0288] Next, a specific example of a liquid crystal display device using a liquid crystal element in pixel 301 will be described. Here, Figure 19 shows a top view of pixel 301, which is shown in Figure 18(B). Therefore, the counter electrode and liquid crystal element are omitted.

[0289] In Figure 19, the conductive film 304c, which functions as a scan line, is oriented in a direction approximately perpendicular to the signal line. It is provided extending in the left-right direction in the diagram. The conductive film 310d, which functions as a signal line, It is provided extending in a direction approximately perpendicular to the inspection line (up and down in the diagram). It functions as a capacity line. The conductive film 310f is provided extending in a direction parallel to the signal line. The functional conductive film 304c is electrically connected to the scan line drive circuit 104 (see Figure 18(A)). A conductive film 310d is connected and functions as a signal line and a conductive film functions as a capacitance line. 310f is electrically connected to the signal line drive circuit 106 (see Figure 18(A)). .

[0290] Transistor 103 is located in the region where the scan line and signal line intersect. STA 103 consists of a conductive film 304c that functions as a gate electrode, and a gate insulating film (shown in Figure 19). (Not done.) A multilayer film 308b in which a channel region is formed on the gate insulating film, It is composed of conductive films 310d and 310e that function as a drain electrode and a suction electrode. Oh, the conductive film 304c also functions as a scanning line, and the region that overlaps with the multilayer film 308b is transitive. It functions as the gate electrode of ZISTA 103. Furthermore, the conductive film 310d also functions as a signal line. This allows the region superimposed on the multilayer film 308b to be the source electrode or drain of transistor 103. It functions as an electrode. Also, in Figure 19, the scanning line shows that the ends of the top surface shape are multilayer films. It is located outside the edge of 308b. Therefore, the scan lines are not affected by the light source such as the backlight. It functions as a light-blocking film that blocks light. As a result, light is blocked from the multilayer film 308b contained in the transistor. This prevents irradiation and suppresses fluctuations in the transistor's electrical characteristics.

[0291] Furthermore, the conductive film 310e has light-transmitting properties that function as a pixel electrode in the aperture 362c. It is electrically connected to the conductive film 316b.

[0292] The capacitive element 105 is connected to the conductive film 310f, which functions as a capacitance line in the aperture 362. Furthermore, the capacitive element 105 has a conductive film 3 formed on the gate insulating film. 08c, a dielectric film formed of a nitride insulating film provided on transistor 103, and It is composed of a transparent conductive film 316b that functions as a primary electrode. Since the film 308c is light-transmitting, the capacitive element 105 is also light-transmitting.

[0293] Since the capacitive element 105 is light-transmitting, the large number of capacitive elements 105 within the pixel 301 It can be formed over a large area. Therefore, while increasing the opening ratio, typically 50% It is possible to set the charge capacity to above, or 55% or above, or 60% or above, and the charge capacity An enlarged semiconductor device can be obtained. For example, a semiconductor device with high resolution, such as a liquid crystal semiconductor device. In crystal display devices, the pixel area becomes smaller, and the area of ​​the capacitive element also becomes smaller. Therefore, in semiconductor devices with high resolution, the charge capacitance accumulated in capacitive elements becomes smaller. However, since the capacitive element 105 shown in this embodiment is light-transmitting, the capacitive element By providing it in the pixels, it is possible to increase the aperture ratio while obtaining sufficient charge capacitance in each pixel. Yes, it is possible. Typically, high resolution refers to a pixel density of 200 ppi or more, and even 300 ppi or more. It can be suitably used in semiconductor devices that measure image quality.

[0294] Furthermore, the pixel 301 shown in Figure 19 has an edge parallel to the conductive film 310d which functions as a signal line. In comparison, the conductive film 304c, which functions as a scanning line, has a longer side parallel to it, and The conductive film 310f, which functions as a quantity line, is parallel to the conductive film 310d, which functions as a signal line. It is provided with an extended shape. As a result, the area of ​​the conductive film 310f in the pixel 301 is reduced. Because it can be reduced, the aperture ratio can be increased. Also, it functions as a capacitance line. The conductive film 310f comes into direct contact with the conductive film 308c without using a connecting electrode. Since the film 308c having this property is light-transmitting, the aperture ratio can be further increased.

[0295] Furthermore, one aspect of the present invention allows for an increase in the aperture ratio even in high-resolution display devices. Therefore, it is possible to efficiently utilize the light from light sources such as backlights, and the power consumption of the display device is reduced. The force can be reduced.

[0296] Next, Figure 20 shows a cross-sectional view between the dashed lines C and D in Figure 19. The drive circuit section includes the scan line drive circuit 104 and the signal line drive circuit 106 (top view omitted). A cross-sectional view of the device is shown at AB. In this embodiment, a vertical electric field type liquid crystal display device is used. I will explain this.

[0297] The liquid crystal display device shown in this embodiment has liquid crystals between a pair of substrates (substrate 302 and substrate 342). Element 322 is being held in place.

[0298] The liquid crystal element 322 has a translucent conductive film 316b above the substrate 302 and controls the orientation. The control film (hereinafter referred to as alignment films 318 and 352), the liquid crystal layer 320, and the conductive film 350, It has the following characteristics. The light-transmitting conductive film 316b is used as one electrode of the liquid crystal element 322. The conductive film 350 functions as the other electrode of the liquid crystal element 322.

[0299] Thus, a liquid crystal display device refers to a device that has liquid crystal elements. The device includes a drive circuit for driving multiple pixels, etc. Furthermore, the liquid crystal display device is mounted on a separate substrate. This includes a control circuit, power supply circuit, signal generation circuit, and backlight module, etc., located in the same area. It is sometimes called a liquid crystal module.

[0300] In the drive circuit section, a conductive film 304a functions as a gate electrode, and as a gate insulating film Functional insulating film 305 and insulating film 306a, multilayer film 308a in which a channel region is formed, The conductive films 310a and 310b, which function as source and drain electrodes, enable the transient The multilayer film 308a is provided on the gate insulating film. Conductive film 310a Protective films 332a and 332b are provided on 310b. Insulating films 312 and 314 are provided as protective films. If a and 332b are formed of a transparent conductive film, the protective films 332a and 332b are It functions as both a drain electrode and a drain electrode, and also constitutes transistor 102.

[0301] In the pixel area, the conductive film 304c functions as a gate electrode, and the gate insulating film functions as a gate insulating film. Insulating film 305 and insulating film 306b, and a channel region formed on the gate insulating film are formed. The multilayer film 308b, conductive film 310d, and 3 that function as source and drain electrodes are formed. 10e constitutes the transistor 103. In addition, the conductive films 310d and 310e are retained Protective films 332d and 332e are provided. An insulating film 312 is placed on the protective films 332d and 332e. An insulating film 314 is provided as a protective film. Furthermore, the protective films 332d and 332e are light-transmitting. When formed with a conductive film having properties, the protective films 332d and 332e are the source electrode and the drain It functions as an electrode and also constitutes transistor 103.

[0302] Furthermore, the light-transmitting conductive film 316b, which functions as a pixel electrode, is an insulating film 332e, an insulating film In the openings provided in the edge film 312 and the insulating film 314, the conductive film 310e is connected. .

[0303] Furthermore, one of the electrodes is a conductive film 308c, and the other is a dielectric film. A capacitive element is formed by an insulating film 314 and a light-transmitting conductive film 316b that functions as the other electrode. 105 is formed. The conductive film 308c is provided on the insulating film 306c.

[0304] Furthermore, in the drive circuit section, the conductive film 30 formed simultaneously with the conductive films 304a and 304c 4b and conductive film 31 formed simultaneously with conductive films 310a, 310b, 310d, and 310e 0c refers to the transparent conductive film 31 that was formed simultaneously with the transparent conductive film 316b. It will be connected via 6a.

[0305] The conductive film 304b and the light-transmitting conductive film 316a are insulating film 305, insulating film 312 and The connection is made at an opening provided in the insulating film 314. Furthermore, the conductive film 310c and light transmission The conductive film 316a is provided on the protective film 332c, insulating film 312, and insulating film 314. Connect at the opening.

[0306] The components of the display device shown in Figure 20 will be described below.

[0307] Conductive films 304a, 304b, and 304c are formed on the substrate 302. 04a functions as the gate electrode of the transistor in the drive circuit section. Also, the conductive film... 304c is formed in the pixel portion 101 and functions as the gate electrode of the transistor in the pixel portion. Furthermore, the conductive film 304b is formed on the scan line drive circuit 104 and is connected to the conductive film 310c. do.

[0308] The substrate 302 can be made from the same material as the substrate 11 shown in Embodiment 1.

[0309] The conductive films 304a, 304b, and 304c are the same as those of the gate electrode 15 shown in Embodiment 1. Materials and manufacturing methods can be used as appropriate.

[0310] An insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304c, and 304b. Furthermore, insulating films 306a, 306b, and 306c are formed on the insulating film 305. Film 305, insulating films 306a and 306b are gate insulating films of the transistors in the drive circuit section, and It functions as the gate insulating film of the transistor in the pixel portion 101.

[0311] The insulating film 305 is a nitride insulating film as described in the gate insulating film 17 shown in Embodiment 1. Formed using 17a. The insulating films 306a, 306b, and 306c are as follows: Embodiment 1 It is formed using the oxide insulating film 17c described in the gate insulating film 17 shown.

[0312] On insulating films 306a, 306b, and 306c are multilayer films 308a and 308b, which have conductivity. A film 308c is formed. The multilayer film 308a is positioned to overlap with the conductive film 304a. It is formed and functions as the channel region of the transistor in the drive circuit section. Also, the multilayer film 30 8b is formed in a position superimposed on the conductive film 304c, and is part of the channel region of the transistor in the pixel area. It functions as a region. The conductive film 308c acts as one electrode of the capacitive element 105. To be able to.

[0313] The multilayer films 308a, 308b, and the conductive film 308c are as shown in Embodiment 1. The materials and methods for preparing the layer film 20 can be used as appropriate.

[0314] The conductive film 308c is a multilayer film similar to the multilayer films 308a and 308b, and It is characterized by the presence of impurities. One of these impurities is hydrogen. Furthermore, the hydrogen substitute... As impurities, boron, phosphorus, tin, antimony, noble gas elements, alkali metals, and It may contain earth metals such as rutile.

[0315] The multilayer films 308a, 308b, and the conductive film 308c are each insulated from an insulating film 306 It is formed on a, 306b, and 306c, but the impurity concentrations are different. Specifically, the multilayer film 3 Compared with 308a and 308b, the impurity concentration of the conductive film 308c is high. For example, The hydrogen concentration contained in the multilayer films 308a and 308b is 5×10 19 atoms / cm 3 or less or 5×10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5×10 17 atoms / cm 3 or less, or 1×10 16 atoms / c m 3 or less, and the hydrogen concentration contained in the conductive film 308c is 8×10 19 ato ms / cm 3 or more, or 1×10 20 atoms / cm 3 or more, or 5×10 20 a toms / cm<了 3 or more. Also, compared with the multilayer films 308a and 308b, the conductive film 308c contains a hydrogen concentration that is 2 times or 10 times or more.

[0316] In addition, the conductive film 308c has a lower resistivity than the multilayer films 308a and 308b. The resistivity of the conductive film 308c is preferably 1×10 -8 times or more and 1×10 -1 times or less, and typically 1×10 -3 Ωcm or more and 1 ×10 4 Ωcm or less, or the resistivity is 1×10 -3 Ωcm or more and 1×10 -1 Ωcm or less would be good.

[0317] Multilayer films 308a and 308b are multilayer films such as insulating films 306a and 306b and insulating film 312. Because it is in contact with a film formed of a material that can improve the interfacial properties with the film, multilayer film 308a and 308b function as semiconductors and have a multilayer film 308a and 308b. Zistar has excellent electrical properties.

[0318] On the other hand, the conductive film 308c is an insulating film at the opening 362 (see Figure 23(C)). It is in contact with the edge film 314. The insulating film 314 is protected from external impurities, such as water, alkali metals, A film formed of a material that prevents alkaline earth metals, etc., from diffusing into the multilayer film, and furthermore, water It contains elements. Therefore, hydrogen in the insulating film 314 is formed simultaneously with the multilayer films 308a and 308b. When hydrogen diffuses into a multilayer film, it combines with oxygen in the oxide semiconductor film contained within the multilayer film. Electrons, which are carriers, are generated. In addition, the insulating film 314 is treated by plasma CVD or spa When a film is deposited using the tarting method, the multilayer films 308a and 308b are exposed to plasma, and oxygen vacancies are formed. It is generated. When hydrogen contained in the insulating film 314 enters the oxygen vacancy, the carrier Electrons are generated. As a result, the oxide semiconductor film contained in the multilayer film becomes highly conductive. It functions as a conductor. In other words, it can be described as a highly conductive oxide semiconductor film. Here, we refer to it as a multilayer film. The main component is the same material as 308a and 308b, and the hydrogen concentration is the same as that of the multilayer film 308a and 308. Because it is higher than b, the metal oxide has increased conductivity, and the conductive film 308c Call.

[0319] However, one embodiment of the present invention is not limited thereto, and includes a conductive film 308c In some cases, it is possible that it is not in contact with the insulating film 314.

[0320] Furthermore, one embodiment of the present invention is not limited thereto, and the conductive film 308c is In some cases, the multilayer film 308a or 308b may be formed in separate processes. In that case, the conductive film 308c is made of a different material from the multilayer films 308a and 308b. It may also have properties. For example, the conductive film 308c is made of indium tin oxide ( It may also be formed using ITO (shown below), or indium zinc oxide, etc.

[0321] The semiconductor device shown in this embodiment has a multilayer film of transistors and one of the capacitive elements simultaneously. An electrode is formed. In addition, a light-transmitting conductive film that functions as a pixel electrode is formed on the capacitive element. It is used as the other electrode. For these purposes, a new conductive film is formed in order to create a capacitive element. This eliminates the need for a manufacturing process, thus reducing the manufacturing process for semiconductor devices. Furthermore, the capacitive elements are paired. Since the electrodes are formed of a light-transmitting conductive film, they are light-transmitting. As a result, the capacity This allows for an increase in the area occupied by the element while simultaneously improving the aperture ratio of the pixels.

[0322] The protective films 332a, 332b, 332c, 332d, and 332e are as shown in Embodiment 2. The materials and manufacturing methods for protective films 43 and 44 can be used as appropriate.

[0323] The conductive films 310a, 310b, 310c, 310d, and 310e are as shown in Embodiment 1. The materials and manufacturing methods for the pair of electrodes 21 and 22 can be used as appropriate.

[0324] Insulating films 306a, 306b, 306c, multilayer films 308a, 308b, conductive films 308c, protective films 332a, 332b, 332c, 332d, 332e, and conductive film 31 Insulating film 312 and insulating film 314 are located on 0a, 310b, 310c, 310d, and 310e. It is formed. The insulating film 312, like the insulating film 306, improves the interfacial properties with the multilayer film. It is preferable to use a material that can be used, and the oxide insulating film 24 shown in Embodiment 1 Similar materials and manufacturing methods can be used as appropriate. Also, as shown in Embodiment 1, The oxide insulating film 23 and the oxide insulating film 24 may be formed by stacking them.

[0325] The insulating film 314 is protected from external impurities, such as water, alkali metals, alkaline earth metals, etc. However, it is preferable to use a material that prevents diffusion into the multilayer film, such as the nitride shown in Embodiment 1. The materials and manufacturing methods for the insulating film 25 can be used as appropriate.

[0326] Furthermore, transparent conductive films 316a and 316b are formed on the insulating film 314. The light-transmitting conductive film 316a is guided through the opening 364a (see Figure 24(B)). It is electrically connected to the film 304b and conducts through the opening 364b (see Figure 24(B)). It is electrically connected to film 310c. That is, it connects conductive film 304b and conductive film 310c. It functions as a connecting electrode. The light-transmitting conductive film 316b has an opening 364c (Figure 24) See B). In this case, it is electrically connected to the conductive film 310e and functions as a pixel electrode of the pixel. It has the following properties. Furthermore, the light-transmitting conductive film 316b is the other electrode of the pair of electrodes of the capacitive element. It can function.

[0327] In order to create a connection structure in which conductive film 304b and conductive film 310c are in direct contact, conductive film 3 Before forming 10c, patterning is performed to form an opening in the insulating film 305, A screen needs to be formed. However, as shown in Figure 20, a transparent conductive film 31 By connecting conductive film 304b and conductive film 310c using 6a, conductive film 304b and This eliminates the need to fabricate a connection point where the conductive film 310c directly contacts the surface, thus reducing the number of photomasks by one. This makes it possible to reduce the number of steps involved in manufacturing semiconductor devices.

[0328] The light-transmitting conductive films 316a and 316b include indiu containing tungsten oxide. Indium oxide, indium zinc oxide containing tungsten oxide, indium zinc oxide containing titanium oxide Oxides, indium tin oxide containing titanium oxide, ITO, indium zinc oxide, keroxide A transparent conductive material such as indium tin oxide with added inium can be used. ru.

[0329] Furthermore, a colored film (hereinafter referred to as the colored film 346) is formed on the substrate 342. The colored film 346 functions as a color filter. A light-shielding film 344 adjacent to it is formed on the substrate 342. The light-shielding film 344 is a black matrix It functions as a display. Also, the colored film 346 is not necessarily required; for example, it can be used as a display. In cases where the device is monochrome, for example, the colored film 346 may be omitted.

[0330] The colored film 346 can be any colored film that transmits light in a specific wavelength range, for example, A red (R) color filter that transmits light in the red wavelength range, and a filter that transmits light in the green wavelength range. A green (G) color filter that transmits light in the blue wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range. Filters and the like can be used.

[0331] The light-shielding film 344 only needs to have the function of blocking light in a specific wavelength band, and is made of metal. An organic insulating film containing a film or black pigment can be used.

[0332] Furthermore, an insulating film 348 is formed on the colored film 346. The insulating film 348 is planarized It functions as a layer, or it suppresses the diffusion of impurities that the colored film 346 may contain to the liquid crystal element. It has the function of controlling.

[0333] Furthermore, a conductive film 350 is formed on the insulating film 348. The conductive film 350 is formed on the pixel portion It functions as the other electrode of the pair of electrodes that the liquid crystal element has. An insulating film having the function of an alignment film is provided on films 316a, 316b, and the conductive film 350. They may be formed separately.

[0334] Furthermore, between the light-transmitting conductive films 316a and 316b and the conductive film 350, there is a liquid crystal layer 3 20 is formed. The liquid crystal layer 320 is also formed on the substrate 3 using a sealing material (not shown). It is sealed between 02 and substrate 342. The sealing material prevents moisture and other substances from entering from the outside. To suppress contamination, a configuration in which the material comes into contact with an inorganic material is preferred.

[0335] Furthermore, a liquid crystal layer 320 is placed between the light-transmitting conductive films 316a and 316b and the conductive film 350. A spacer may be provided to maintain the thickness (also called the cell gap).

[0336] Regarding the method for manufacturing an element portion provided on a substrate 302 as shown in the semiconductor device in Figure 20, This will be explained using Figures 21 to 25.

[0337] First, prepare the substrate 302. Here, a glass substrate is used as the substrate 302.

[0338] Next, a conductive film is formed on the substrate 302, and the conductive film is processed to a desired region, thereby enabling conductivity Films 304a, 304b, and 304c are formed. Note that conductive films 304a, 304b, and 304 c is formed by first patterning on the desired region, and covered by the mask It can be formed by etching areas that are not present (see Figure 21(A)).

[0339] Furthermore, conductive films 304a, 304b, and 304c are typically produced by vapor deposition and CVD methods. They can be formed using methods such as sputtering and spin coating.

[0340] Next, an insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304b, and 304c. Then, an insulating film 306 is formed on the insulating film 305 (see Figure 21(A)).

[0341] The insulating film 305 and insulating film 306 are formed by sputtering, CVD, or the like. This can be achieved. Note that if insulating film 305 and insulating film 306 are formed continuously in a vacuum, impurities will be produced. The inclusion of [unspecified substance] is suppressed, which is preferable.

[0342] Next, a multilayer film 307 is formed on the insulating film 306 (see Figure 21(B)).

[0343] Multilayer film 307 was produced using sputtering, coating, pulsed laser deposition, and laser ablations. It can be formed using methods such as the ionization method.

[0344] Next, by processing the multilayer film 307 into desired regions, island-shaped multilayer films 308a, 308b are formed. , 308d is formed. Note that the multilayer films 308a, 308b, and 308d are formed in the desired region. A mask is formed by patterning in step 2, and the areas not covered by the mask are etched. It can be formed by etching. Etching methods include dry etching and wet etching. Etching, or a combination of both, can be used (Figure 21(C)). reference).

[0345] Next, by processing the insulating film 306 into desired regions, island-shaped insulating films 306a, 306b are formed. , 306c is formed. Note that insulating films 306a, 306b, and 306c form the multilayer film 308a Formed by etching the region of insulating film 306 that is not covered by 308b and 308d. It is possible to do this. Etching methods include dry etching, wet etching, and Etching can be performed using a combination of both methods (see Figure 22(A)).

[0346] Next, a first heat treatment is performed. The first heat treatment is the first heat treatment shown in Embodiment 1. The same conditions are used. The first heat treatment is performed on the multilayer films 308a, 308b, and 308d. The crystallinity of the oxide semiconductor used is improved, and further insulating films 305, 306a, and 306b are also improved. Removes impurities such as hydrogen and water from 306c and multilayer films 308a, 308b, and 308d. This can be done. Furthermore, even if the first heating step is performed before etching the oxide semiconductor... good.

[0347] Next, insulating films 306a, 306b, 306c, and multilayer films 308a, 308b, 308 A conductive film 309 and a protective film 330 are formed on d (see Figure 22(B)).

[0348] For example, the conductive film 309 can be produced using methods such as sputtering, vapor deposition, CVD, or printing. It can be formed by doing so.

[0349] The protective film 330 may be formed using, for example, a sputtering method or a CVD method. It is possible.

[0350] Next, the protective film 330 is processed into the desired area, so that protective films 332a, 332b, 33 Forms 2c, 332d, and 332e. Note that protective films 332a, 332b, 332c, 3 32d and 332e form a mask by third patterning in the desired region, and the mask It can be formed by etching the areas not covered by the mask. After this, Remove the scum (see Figure 22(C)).

[0351] Next, the conductive film 309 is processed into the desired region, thereby creating conductive films 310a, 310b, 31 0c, 310d, and 310e are formed. Note that conductive films 310a, 310b, 310c, and 3 10d and 310e are masks of protective films 332a, 332b, 332c, 332d, and 332e. By using it as a mask and etching the areas not covered by the mask, it is formed. This is possible (see Figure 23(A)).

[0352] Next, insulating films 306a, 306b, 306c, multilayer films 308a, 308b, 308d, Conductive films 310a, 310b, 310c, 310d, 310e, and protective films 332a, 33 An insulating film 311 is formed to cover 2b, 332c, 332d, and 332e (Figure 2). 3(B)).

[0353] The insulating film 311 is the oxide insulating film 23 and oxide insulating film 24 shown in Embodiment 1. It can be formed by lamination using similar conditions.

[0354] Next, the insulating film 311 is processed into a desired area to form the insulating film 312 and the opening 362 The insulating film 312 and the opening 362 form a fourth pattern in the desired region. A mask is formed using a etchant, and the areas not covered by the mask are etched. It can be formed (see Figure 23(C)).

[0355] Furthermore, the opening 362 is formed so that the surface of the multilayer film 308d is exposed. As a method for forming 2, for example, a dry etching method can be used. However, The method for forming the opening 362 is not limited to this, and may include wet etching or dry etching. A formation method combining the wet etching method and the dry etching method may also be used.

[0356] After this, a second heat treatment is performed to remove some of the oxygen contained in the insulating film 312 from the multilayer film 30. Oxygen is transferred to the oxide semiconductor film contained in 8a and 308b, and the multilayer film 308a, 308b This can reduce the amount of oxygen vacancies in the oxide semiconductor film contained within.

[0357] Next, an insulating film 313 is formed on the insulating film 312 and the multilayer film 308d (see Figure 24(A)). (see).

[0358] The insulating film 313 is a barrier against external impurities, such as oxygen, hydrogen, water, alkali metals, It is preferable to use a material that prevents alkaline earth metals, etc., from diffusing into the multilayer film, and furthermore, It is preferable that it contains hydrogen, and typically an inorganic insulating material containing nitrogen, such as a nitride insulating film. It can be used. The insulating film 313 can be formed, for example, by the CVD method. can.

[0359] The insulating film 313 is protected from external impurities, such as water, alkali metals, alkaline earth metals, etc. However, it is a film formed of a material that prevents diffusion into the multilayer film, and furthermore, it contains hydrogen. When hydrogen from the insulating film 313 diffuses into the multilayer film 308d, the oxidative content in the multilayer film 308d In a semiconductor film, hydrogen combines with oxygen, generating electrons, which act as carriers. As a result, The oxide semiconductor film contained in the multilayer film 308d has high conductivity, and the conductive film 30 It becomes 8c.

[0360] Furthermore, the insulating film 313 is preferably formed at a high temperature in order to enhance its blocking properties. For example, a substrate temperature of 100°C or higher but below the substrate's strain point, or a temperature of 300°C or higher but below 400°C. It is preferable to heat at a certain temperature to form the film. Furthermore, when forming the film at a high temperature, multilayer films 308a, 3 Oxygen is detached from the oxide semiconductor used as O8b, causing an increase in carrier concentration. Since this can sometimes occur, the temperature should be set so that this phenomenon does not occur.

[0361] Next, the insulating films 305, 312, and 313, and the protective films 332c and 332e are processed into the desired regions. This process forms the insulating film 314 and the openings 364a, 364b, and 364c. The insulating film 314 and the openings 364a, 364b, and 364c are used to create a fifth pattern in the desired region. A mask is formed by etching, and the areas not covered by the mask are etched. It can be formed by (see Figure 24(B)). Also, protective films 332c and 332e are permeable When formed with a photosensitive conductive film, protective films 332c and 332e are used in the process. No need to adjust.

[0362] Furthermore, the opening 364a is formed so that the surface of the conductive film 304b is exposed. The opening 364b is formed so that the conductive film 310c is exposed. Also, the opening 364c is The conductive film 310e is formed so that it is exposed.

[0363] Furthermore, as a method for forming the openings 364a, 364b, and 364c, for example, dry ec The ching method can be used. However, the method of forming openings 364a, 364b, and 364c Legally, this is not limited to, but also includes wet etching methods or dry etching methods. A formation method combining this with the wet etching method may also be used.

[0364] Next, a conductive film 31 is applied to the insulating film 314 so as to cover the openings 364a, 364b, and 364c. Form 5 (see Figure 25(A)).

[0365] The conductive film 315 can be formed, for example, by a sputtering method.

[0366] Next, by processing the conductive film 315 into a desired region, a light-transmitting conductive film 316a is obtained. 316b is formed. Note that the light-transmitting conductive films 316a and 316b are formed in the desired region. A mask is formed by a sixth patterning process, and the areas not covered by the mask are etched. It can be formed by rubbing (see Figure 25(B)).

[0367] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to sixth patterns This means that transistors and capacitive elements can be formed simultaneously using six masks. ru.

[0368] In this embodiment, hydrogen contained in the insulating film 313 is diffused into the multilayer film 308d. The conductivity of the oxide semiconductor film contained in the multilayer film 308d was improved, but multilayer films 308a and 30 8b is covered with a mask, and impurities, typically hydrogen, boron, phosphorus, and tin, are added to the multilayer film 308d. Antimony, noble gas elements, alkali metals, alkaline earth metals, etc. are added to form a multilayer film 30 The conductivity of the oxide semiconductor film contained in 8d may be increased. Hydrogen and boron in the multilayer film 308d Methods for adding phosphorus, tin, antimony, noble gas elements, etc. include ion doping. , ion implantation is one method. On the other hand, alkali metals, alkaline earth metals, etc. are implanted into the multilayer film 308d. One method of adding the impurity is to expose the multilayer film 308d to a solution containing the impurity.

[0369] Next, regarding the structure formed on the substrate 342 which is provided opposite the substrate 302, the following applies: Give an explanation.

[0370] First, prepare substrate 342. The materials used for substrate 342 are the same as those shown for substrate 302. This can be done. Next, a light-shielding film 344 and a colored film 346 are formed on the substrate 342 (Figure 26( See A).

[0371] The light-shielding film 344 and the colored film 346 are produced using various materials by printing, inkjet, and These are formed at the desired locations using etching methods such as photolithography.

[0372] Next, an insulating film 348 is formed on the light-shielding film 344 and the colored film 346 (see Figure 26(B)). (see).

[0373] The insulating film 348 can be, for example, an organic insulating film such as acrylic resin, epoxy resin, or polyimide. A film can be used. For example, a colored film 346 can be formed by forming an insulating film 348. This can suppress the diffusion of impurities and other substances contained within to the liquid crystal layer 320. The insulating film 348 is not necessarily required, and a structure without the insulating film 348 can also be constructed. good.

[0374] Next, a conductive film 350 is formed on the insulating film 348 (see Figure 26(C)). Conductive film 350 For this purpose, the material shown in conductive film 315 can be used.

[0375] The structure to be formed on the substrate 342 can be created through the above process.

[0376] Next, the insulating film 31 formed on substrate 302 and substrate 342, more specifically on substrate 302 4. Transparent conductive films 316a, 316b and conductive film 35 formed on the substrate 342 Alignment film 318 and alignment film 352 are formed on the 0, respectively. Alignment film 318, Alignment film 352 These can be formed using methods such as rubbing and photo-alignment. Subsequently, the substrate 302 and the base A liquid crystal layer 320 is formed between the plate 342 and the liquid crystal layer 320. The method for forming the liquid crystal layer 320 is to disperse The drip method (dropping method) or the method of bonding substrate 302 and substrate 342 together and then using capillary action An injection method for injecting liquid crystal can be used.

[0377] By following the above steps, the display device shown in Figure 20 can be manufactured.

[0378] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0379] (Embodiment 4) In this embodiment, the transistors included in the semiconductor device described in the above embodiment are used. In this context, one embodiment applicable to oxide semiconductor films will be described.

[0380] Oxide semiconductor films are oxide semiconductors with a single-crystal structure (hereinafter referred to as single-crystal oxide semiconductors). Polycrystalline oxide semiconductors (hereinafter referred to as polycrystalline oxide semiconductors), microcrystalline oxides Material semiconductors (hereinafter referred to as microcrystalline oxide semiconductors), and amorphous oxide semiconductors (hereinafter referred to as It may be composed of one or more of the following: , which is called an amorphous oxide semiconductor. Also, the oxide semiconductor film is It may also be composed of a CAAC-OS film. In addition, the oxide semiconductor film may be an amorphous oxide semiconductor film. It may be composed of an oxide semiconductor having conductors and crystal grains. Below, single-crystal oxide semiconductors Conductors, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors will be described.

[0381] <Single-crystal oxide semiconductor> Single-crystal oxide semiconductor films have a low impurity concentration and a low defect level density (low oxygen vacancy rate). It is an oxide semiconductor film. Therefore, the carrier density can be lowered. Transistors using single-crystal oxide semiconductor films exhibit normally-on electrical characteristics. There are few of them. Also, single-crystal oxide semiconductor films have a low impurity concentration and a low defect level density. Therefore, carrier traps may be reduced. Transistors exhibit small variations in electrical characteristics, resulting in highly reliable transistors.

[0382] Furthermore, oxide semiconductor films have higher density when they have fewer defects. Also, oxide semiconductor films Higher crystallinity results in higher density. Also, oxide semiconductor films have a low concentration of impurities such as hydrogen. The density increases. Single-crystal oxide semiconductor films have a higher density than CAAC-OS films. Furthermore, CAAC-OS films have a higher density than microcrystalline oxide semiconductor films. Conductive films have a higher density than microcrystalline oxide semiconductor films. Also, microcrystalline oxide semiconductor films are non It has a higher density than crystalline oxide semiconductor films.

[0383] <Polycrystalline oxide semiconductors> Polycrystalline oxide semiconductor films allow for the identification of crystal grains using TEM observation. The crystal grains contained in the crystalline oxide semiconductor film are, for example, 2 nm or larger in TEM observation images. The particle size is less than 00 nm, between 3 nm and 100 nm, or between 5 nm and 50 nm. There are many such cases. Also, in polycrystalline oxide semiconductor films, grain boundaries can be confirmed by TEM observation images. There is a match.

[0384] A polycrystalline oxide semiconductor film has multiple crystal grains, and between these multiple crystal grains, the crystals The positions may differ. Also, polycrystalline oxide semiconductor films can be analyzed using, for example, an XRD device. When an analysis is performed using the out-of-plane method, one or more peaks will appear. There are cases where this occurs. For example, in polycrystalline IGZO films, the orientation-indicating 2θ peaks near 31°, Alternatively, multiple peaks indicating different orientations may appear.

[0385] Polycrystalline oxide semiconductor films have high crystallinity, and therefore may have high electron mobility. Therefore, transistors using polycrystalline oxide semiconductor films have high field-effect mobility. However, polycrystalline oxide semiconductor films may have impurities segregated at grain boundaries. In crystalline oxide semiconductor films, grain boundaries become defect levels. In polycrystalline oxide semiconductor films, grain boundaries become carrier emission levels. Because it can become a source or trap level, transistors using polycrystalline oxide semiconductor films Compared to transistors using CAAC-OS film, it exhibits greater variation in electrical characteristics and reliability. This can result in a transistor with low performance.

[0386] <Microcrystalline oxide semiconductor> Microcrystalline oxide semiconductor films can be clearly observed using TEM. In some cases, this may not be possible. The crystalline portion contained in the microcrystalline oxide semiconductor film is between 1 nm and 100 nm. They are often smaller than 1 nm, or between 1 nm and 10 nm in size. In particular, between 1 nm and 10 nm Nanocrystals (nc: nanocrystals) are microcrystals of a size of 1 nm or less, or between 1 nm and 3 nm. An oxide semiconductor film having tal is made nc-OS (nanocrystalline O It is called an xide Semiconductor film. Also, an nc-OS film is, for example, T In some cases, grain boundaries may not be clearly visible in images obtained using EM (Electromagnetic Wave) imaging.

[0387] nc-OS films are used in minute regions (for example, regions between 1 nm and 10 nm, especially regions between 1 nm and 10 nm). The atomic arrangement has periodicity in the region of 3 nm or less. In addition, the nc-OS film is different There is no regularity in the crystal orientation between the crystalline regions. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS films may be indistinguishable from amorphous oxide semiconductor films. There are cases where this occurs. For example, XRD using X-rays with a diameter larger than that of the crystalline region on an nc-OS film. When structural analysis is performed using the apparatus, the out-of-plane method analyzes the crystal planes. The peaks shown are not detected. Also, for the nc-OS film, a diameter larger than that of the crystalline region (for example) When electron diffraction (also called limited-field electron diffraction) is performed using an electron beam of 50 nm or more, A diffraction pattern resembling a halo pattern is observed. On the other hand, for nc-OS films, crystal An electron beam with a diameter close to or smaller than the size of the crystal portion (for example, between 1 nm and 30 nm) is used. When electron diffraction (also called nanobeam electron diffraction) is performed, spots can be observed. Furthermore, when nanobeam electron diffraction is performed on an nc-OS film, it forms a circular (ring-shaped) pattern. )A region with high brightness may be observed. Also, when a nanobeam electron beam is used on the nc-OS film... When diffraction is performed, multiple spots may be observed within a ring-shaped region.

[0388] Figure 27 shows nanobeam electron diffraction with different measurement locations for a sample containing an nc-OS film. This is an example of the procedure performed. Here, the sample is cut in a direction perpendicular to the surface on which the nc-OS film is formed. The material is thinned to a thickness of 10 nm or less. Furthermore, an electron beam with a diameter of 1 nm is used. The sample is incident from a direction perpendicular to the cross-section. As shown in Figure 27, for a sample with an nc-OS film... When nanobeam electron diffraction is performed, a diffraction pattern showing crystal planes is obtained, but in a specific direction... It was found that no orientation toward the crystal plane was observed.

[0389] nc-OS films are oxide semiconductor films with higher orderliness than amorphous oxide semiconductor films. Therefore, nc-OS films have a lower defect level density than amorphous oxide semiconductor films. Furthermore, the nc-OS film shows no regularity in crystal orientation between different crystalline regions. Therefore, nc -OS films have a higher defect level density compared to CAAC-OS films.

[0390] Therefore, nc-OS films may have a higher carrier density compared to CAAC-OS films. Yes. Oxide semiconductor films with high carrier density may have high electron mobility. Therefore Transistors using nc-OS films may have high field-effect mobility. Because nc-OS films have a higher defect level density compared to CAAC-OS films, carriers There may be more wrap. Therefore, transistors using nc-OS films have CAAC - Compared to transistors using OS films, transistors with larger variations in electrical characteristics and lower reliability. It becomes a zista. However, nc-OS films can be formed even if they contain a relatively large amount of impurities. Because this is possible, it is easier to form than CAAC-OS films and can be suitably used depending on the application. In some cases, this is possible. Therefore, semiconductors having transistors using nc-OS films Body devices can sometimes be manufactured with high productivity.

[0391] (Embodiment 5) The oxide semiconductor film disclosed in the above embodiment can be formed by sputtering. However, it may also be formed by other methods, such as thermal CVD. An example of thermal CVD is M OCVD(Metal Organic Chemical Vapor Deposit) Using methods such as the tion method or ALD (Atomic Layer Deposition) That's good too.

[0392] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage of never being accomplished.

[0393] In the thermal CVD method, the raw material gas and oxidizer are simultaneously introduced into the chamber, and the chamber is subjected to atmospheric pressure. Alternatively, by applying reduced pressure and reacting the film near or on the substrate, the film can be deposited on the substrate. You may go.

[0394] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber, and the raw material gas for the reaction is The gases are introduced into the chamber sequentially, and film deposition can be performed by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), two types or less The above raw material gases are supplied to the chamber in order, and the first is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. A second raw material gas is introduced. If an inert gas is introduced at the same time, the inert gas is... It acts as a carrier gas, and also when introducing a second raw material gas, an inert gas is introduced at the same time. Good. Also, instead of introducing an inert gas, the first source gas was removed by vacuum evacuation. Later, a second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate and forms the first layer. A film is formed, and it reacts with a second raw material gas introduced later, so that the second layer is laminated on top of the first layer. A thin film is formed. This process is repeated multiple times while controlling the gas introduction sequence until the desired thickness is reached. By doing this, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the gas introduction. Because it can be adjusted by the number of times the sequence is repeated, precise film thickness adjustment is possible. It is suitable for fabricating miniature FETs.

[0395] Thermal CVD methods such as MOCVD and ALD are disclosed in the embodiments described above. Various films can be formed, such as metal films, oxide semiconductor films, and inorganic insulating films. For example, I When forming an nGaZnO film, trimethylindium, trimethylgallium, and Dimethylzinc is used. Note that the chemical formula for trimethylindium is In(CH3)3. The chemical formula for trimethylgallium is Ga(CH3)3. The chemical formula for lead is Zn(CH3)2. Furthermore, it is not limited to these combinations, but also includes tri Use triethylgallium (chemical formula Ga(C2H5)3) instead of methylgallium. It is also possible to use diethylzinc (chemical formula Zn(C2H5)2) instead of dimethylzinc. It's also possible.

[0396] For example, oxide semiconductor films, such as In-Ga-Zn-, can be deposited using an ALD-based film deposition system. When forming an O film, In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. - An O layer is formed, and then Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. After forming the layer, a ZnO layer is formed by simultaneously introducing Zn(CH3)2 and O3 gas. Note that the order of these layers is not limited to this example. Also, by mixing these gases, In-Ga- Mixed compound layers such as an O layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. Even if you use H2O gas obtained by bubbling with an inert gas such as Ar instead of O3 gas, It is good, but it is preferable to use O3 gas that does not contain H. Also, In(CH3)3 gas Alternatively, In(C2H5)3 gas may be used. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas may be used. Alternatively, In(CH3)3 gas can be used instead. C2H5)3 gas may be used. Alternatively, Zn(CH3)2 gas may be used. [Examples]

[0397] This embodiment shows the impurity analysis and XRD analysis of oxide semiconductor films, as shown in Figures 28 to 31. We will explain using this method.

[0398] In this embodiment, four types of samples (hereinafter referred to as "samples") were used as samples for impurity analysis. Samples A1 through A4 were prepared.

[0399] First, the method for preparing sample A1 is shown below.

[0400] Sample A1 is a 100 nm thick In-Ga-Zn oxide film (hereinafter referred to as IG) on a glass substrate. A film called an IGZO film is formed, and a copper film with a thickness of 60 nm is formed on the IGZO film, and then a copper film with a thickness of A 50 nm silicon nitride film was deposited. Then, it was heated at 350°C for 1 hour under a nitrogen atmosphere. The process was completed.

[0401] The IGZO film deposition conditions involve sputtering, using a metal oxide target. Using (In:Ga:Zn=1:1:1), the flow rate ratio of the sputtering gas is Ar / O2 = The following conditions were used: 1 / 1 scale, pressure of 0.6 Pa, AC power of 5000 W, and substrate temperature of 170°C. .

[0402] Next, the method for preparing sample A2 is shown below.

[0403] In sample A1, instead of the IGZO film deposition conditions, a metal oxide target (In: Using Ga:Zn=1:3:4, the sputtering gas flow rate ratio is Ar / O2=2 / 1. Using the conditions of a pressure of 0.4 Pa, a DC power of 200 W, and a substrate temperature of 200 °C, a thickness of 10 A 0 nm IGZO film was deposited. This sample will be designated as Sample A2.

[0404] Next, the method for preparing sample A3 is shown below.

[0405] In sample A1, instead of the IGZO film deposition conditions, a metal oxide target (In: Using Ga:Zn=1:3:6, the sputtering gas flow rate ratio is Ar / O2=2 / 1. Using the conditions of a pressure of 0.4 Pa, a DC power of 200 W, and a substrate temperature of 200 °C, a thickness of 10 A 0 nm IGZO film was deposited. This sample will be designated as sample A3.

[0406] Next, the method for preparing sample A4 is shown below.

[0407] In sample A1, instead of the IGZO film deposition conditions, a metal oxide target (In: Using Ga:Zn=1:6:8, the sputtering gas flow rate ratio is Ar / O2=2 / 1. Using the conditions of a pressure of 0.4 Pa, a DC power of 200 W, and a substrate temperature of 200 °C, a thickness of 10 A 0 nm IGZO film was deposited. This sample will be designated as sample A4.

[0408] The impurity analysis results and XRD analysis results for samples A1 to A4 are shown in Figures 28 to 28, respectively. As shown in 31.

[0409] In each figure, (A) shows the results of impurity analysis, and (B) shows the results of XRD analysis. For impurity analysis, secondary ion mass spectrometry (SIMS) is used. Using mass spectrometry, the white arrows shown in Figures 28 to 31 The analysis was performed along the direction of the measurement; that is, measurements were taken from the glass substrate side.

[0410] Furthermore, in Figure 28(A), IGZO(1:1:1) is composed of In, Ga, and Zn. This figure shows an IGZO film deposited using a sputtering target with a particle ratio of 1:1:1. In 29(A), IGZO(1:3:4) has an atomic ratio of In, Ga, and Zn of 1 This shows an IGZO film deposited using a 3:4 sputtering target. Figure 30(A) In IGZO (1:3:6), the atomic ratio of In, Ga, and Zn is 1:3:6. This shows an IGZO film deposited using a sputtering target. In Figure 31(A), IGZO (1:6:8) is a sputtered material with an atomic ratio of In, Ga, and Zn of 1:6:8. This shows an IGZO film deposited using a targeting target. Also, Figures 28(A) to 31(A) ) In this case, the dashed line indicates the interface between the copper film and the IGZO film.

[0411] In the channel region of the transistor, the concentration of copper (Cu) that affects the electrical characteristics is 1 ×10 18 atoms / cm 3 or more.

[0412] As shown in FIG. 28(A), in sample A1, the region where the concentration of copper (Cu) is 1×10 18 at oms / cm 3 is the region 30 nm on the substrate side from the interface between the copper film and the IGZO film.

[0413] On the other hand, as shown in FIG. 29(A), in sample A2, the region where the concentration of copper (Cu) is 1×10 1 8 atoms / cm 3 is the region 10 nm on the substrate side from the interface between the copper film and the IGZO film is.

[0414] Also, as shown in FIG. 30(A), in sample A3, the region where the concentration of copper (Cu) is 1×10 1 8 atoms / cm 3 is the region 10 nm on the substrate side from the interface between the copper film and the IGZO film is.

[0415] Also, as shown in FIG. 31(A), in sample A4, the region where the concentration of copper (Cu) is 1×10 <00001{02> 8 atoms / cm 3 is the region 10 nm on the substrate side from the interface between the copper film and the IGZO film is. <;

[0416] 1]]From the above, on the IGZO film (1:1:1), the IGZO film (1:3:4), IGZ A film of oxygen (O) (1:3:6) or an IGZO film (1:6:8) is formed, and then a copper film is formed on top of it. This prevents the diffusion of copper (Cu) from the copper film into the IGZO film (1:1:1). It is possible.

[0417] Furthermore, as shown in Figures 28(B) to 31(B), the IGZO film contained in each sample A peak is observed near 31° for 2θ. This peak represents the (009) plane. Therefore, it can be determined that the IGZO film contained in each sample is a c-axis oriented film. In other words, the IGZO films contained in samples A1 to A4 are CAAC-OS films and CA It can be identified as an AC oxide.

Claims

[Claim 1] Oxide semiconductor film and An oxide film having a region in contact with the aforementioned oxide semiconductor film, A pair of conductive films having a region in contact with the oxide film and containing copper, aluminum, gold, silver, or molybdenum, A gate insulating film having the oxide semiconductor film or a region in contact with the oxide film, The gate insulating film is connected to the oxide semiconductor film and the gate electrode that overlaps the oxide film, The oxide film is a semiconductor device having c-axis orientation.

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