Secondary battery protection integrated circuit and battery device

Abstract

Properly protect the rechargeable battery from over-discharge. [Solution] A secondary battery protection integrated circuit used to protect a secondary battery, comprising: a power terminal to which the positive electrode of the secondary battery can be connected; a ground terminal to which the negative electrode of the secondary battery can be connected; and a control circuit capable of controlling a discharge interruption circuit that interrupts the discharge of the secondary battery, wherein the control circuit performs a first operation when the power supply voltage between the power supply terminal and the ground terminal is equal to or greater than a first determination voltage which is higher than a second determination voltage; operates the discharge interruption circuit when a first condition is met in which the power supply voltage is lower than the first determination voltage for a first time; and operates the discharge interruption circuit when a second condition is met in which the power supply voltage is lower than the second determination voltage for a second time which is shorter than the first time.

Description

Technical Field

[0001] The present disclosure relates to a secondary battery protection integrated circuit and a battery device.

Background Art

[0002] Conventionally, an over-discharge prevention circuit including an over-discharge detection circuit that detects over-discharge of a secondary battery and a circuit that interrupts a discharge current according to the output level of the over-discharge detection circuit is known. When the voltage of the battery drops below a determination voltage for over-discharge detection, the output level of the comparator is inverted, turning off a transistor that interrupts the discharge current.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the case of a method for detecting over-discharge using a single determination voltage, depending on the set value of the determination voltage, the secondary battery may not be appropriately protected from over-discharge. For example, when the voltage of the secondary battery drops significantly due to the temporary generation of a large discharge current, depending on the set value of the determination voltage, there is a concern that the discharge of the secondary battery may be unintentionally interrupted due to the determination of over-discharge. Conversely, if the voltage drop of the secondary battery due to discharge is small, depending on the set value of the determination voltage, there is a concern that the discharge of the secondary battery may be unintentionally continued without being determined as over-discharge.

[0005] The present disclosure provides a secondary battery protection integrated circuit and a battery device capable of appropriately protecting a secondary battery from over-discharge.

Means for Solving the Problems

[0006] The present disclosure is A secondary battery protection integrated circuit used for protecting secondary batteries, A power terminal to which the positive electrode of the aforementioned secondary battery can be connected, A grounding terminal to which the negative electrode of the secondary battery can be connected, The system comprises a control circuit capable of controlling a discharge interruption circuit that interrupts the discharge of the secondary battery, The aforementioned control circuit is If the power supply voltage between the power supply terminal and the ground terminal is greater than or equal to the first determination voltage which is higher than the second determination voltage, the first operation is performed. If the first condition is met, where the power supply voltage is lower than the first determination voltage for a first time, the discharge cutoff circuit is activated. The present invention provides a secondary battery protection integrated circuit that activates the discharge cutoff circuit if the power supply voltage is lower than the second determination voltage for a second time shorter than the first time, fulfilling a second condition.

[0007] This disclosure is, The system comprises a secondary battery, a discharge interruption circuit for interrupting the discharge of the secondary battery, and a secondary battery protection integrated circuit for protecting the secondary battery. The aforementioned secondary battery protection integrated circuit is The power terminal to which the positive electrode of the aforementioned secondary battery is connected, The grounding terminal to which the negative electrode of the secondary battery is connected, The system comprises a control circuit for controlling the discharge interruption circuit, The aforementioned control circuit is If the power supply voltage between the power supply terminal and the ground terminal is greater than or equal to the first determination voltage which is higher than the second determination voltage, the first operation is performed. If the first condition is met, where the power supply voltage is lower than the first determination voltage for a first time, the discharge cutoff circuit is activated. The present invention provides a battery device that activates the discharge cutoff circuit when the power supply voltage is lower than the second determination voltage for a second time period shorter than the first time, which is a second condition. [Effects of the Invention]

[0008] According to this disclosure, secondary batteries can be adequately protected from over-discharge.

Brief Description of the Drawings

[0009] [Figure 1] It is an example of a configuration diagram of a system including a secondary battery protection integrated circuit according to the first embodiment. [Figure 2] It is an example of a configuration diagram of a discharge control circuit section of a secondary battery protection integrated circuit according to the first embodiment. [Figure 3] It is an example of an operation explanatory diagram of discharge control of a secondary battery protection integrated circuit according to the first embodiment. [Figure 4] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the first embodiment. [Figure 5] It is an example of a configuration diagram of a system including a secondary battery protection integrated circuit according to the second embodiment. [Figure 6] It is an example of a configuration diagram of a discharge control circuit section of a secondary battery protection integrated circuit according to the second embodiment. [Figure 7] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the second embodiment. [Figure 8] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the second embodiment. [Figure 9] It is an example of a configuration diagram of a system including a secondary battery protection integrated circuit according to the third embodiment. [Figure 10] It is an example of a configuration diagram of a discharge control circuit section of a secondary battery protection integrated circuit according to the third embodiment. [Figure 11] It is a diagram showing an example of a delay circuit. [Figure 12] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the third embodiment. [Figure 13] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the third embodiment. [Figure 14] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the third embodiment. [Figure 15] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the third embodiment. [Figure 16]It is an example of a configuration diagram of a system including a secondary battery protection integrated circuit according to the fourth embodiment. [Figure 17] It is an example of a configuration diagram of a discharge control circuit section of a secondary battery protection integrated circuit according to the fourth embodiment. [Figure 18] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the fourth embodiment. [Figure 19] It is an example of an operation waveform diagram of discharge control of a secondary battery protection integrated circuit according to the fourth embodiment. [Figure 20] It is an example of a configuration diagram of a system including a secondary battery protection integrated circuit according to the fifth embodiment. [Figure 21] It is an example of a diagram showing a modified example of a discharge control circuit section. [Figure 22] It is a diagram showing an example of the relationship between the remaining battery level and the delay time tVdet with respect to the overdischarge detection voltage Vdet. [Figure 23] It is an example of a diagram showing the relationship between the overdischarge detection voltage and the temperature according to the fourth embodiment.

Mode for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0011] FIG. 1 is a circuit configuration diagram showing an example of a system including a secondary battery protection integrated circuit according to the first embodiment. The system 501 shown in FIG. 1 includes a battery device 401 and an electronic device 300.

[0012] The electronic device 300 is a device connected to the battery device 401. The electronic device 300 may be a charger that charges the battery device 401 or a load that operates with the power supplied from the battery device 401. Specific examples of such a load include a mobile phone, a smartphone, a tablet device, and earphones. The electronic device 300 is not limited to these devices.

[0013] The battery device 401 may be externally attached to the electronic device 300 or built into the electronic device 300. The battery device 401 is, for example, a battery pack that can be detachably attached to the electronic device 300 and can supply power to the electronic device 300 when connected to it. The battery device 401 and the electronic device 300 are interconnected via a plurality of terminals (positive power terminal (terminal P+) and negative power terminal (terminal P-)) as shown in Figure 1. For example, terminals P+ and P- are electrically connected to the charger (electronic device 300) when charging the secondary battery 210.

[0014] The battery device 401 includes a secondary battery 210 and a battery protection device 601.

[0015] The secondary battery 210 is an example of a rechargeable battery. The secondary battery 210 supplies power to the electronic device 300 connected to terminals P+ and P-. The secondary battery 210 can be charged by a charger connected to terminals P+ and P-. Specific examples of the secondary battery 210 include lithium-ion batteries and lithium polymer batteries. The secondary battery 210 has a positive electrode 211 and a negative electrode 212.

[0016] The battery protection device 601 is an example of a secondary battery protection device that operates using the secondary battery 210 as a power source. The battery protection device 601 protects the secondary battery 210 from overcharging, etc., by controlling the charging of the secondary battery 210, and protects the secondary battery 210 from over-discharging, etc., by controlling the discharging of the secondary battery 210. The battery protection device 601 includes, for example, terminals P+, P-, B+, B-, resistors R21 and R23, capacitor C21, power line 201, ground line 202, switch circuit 203, and protection IC (Integrated Circuit) 101.

[0017] The battery protection device 601 is, for example, a component that includes a circuit board on which at least the protection IC 101 is mounted.

[0018] Terminal P+ is an example of a load positive terminal, to which the power line of the electronic device 300 is connected. Terminal P- is an example of a load negative terminal, to which the ground line of the electronic device 300 is connected. Terminal B+ is an example of a battery positive terminal, to which the positive terminal 211 of the secondary battery 210 is connected. Terminal B- is an example of a battery negative terminal, to which the negative terminal 212 of the secondary battery 210 is connected.

[0019] Terminals B+ and P+ are connected by power line 201, which is the positive current path. Power line 201 is the power path connecting terminals B+ and P+. Power line 201 functions as both a charging path through which the charging current of the secondary battery 210 flows and a discharge path through which the discharge current of the secondary battery 210 flows.

[0020] Terminals B- and P- are connected by a ground wire 202, which is the negative current path. The ground wire 202 is a power path connecting terminals B- and P-. The ground wire 202 functions as both a charging path through which the charging current of the secondary battery 210 flows and a discharge path through which the discharge current of the secondary battery 210 flows.

[0021] The switch circuit 203 is provided on the ground wire 202 between terminal B- and terminal P-. The switch circuit 203 is a series circuit comprising, for example, a charge control transistor TR1 and a discharge control transistor TR2, with the charge control transistor TR1 and the discharge control transistor TR2 connected in series. The charge control transistor TR1 is a semiconductor switching element that blocks the charge path of the secondary battery 210. The discharge control transistor TR2 is a semiconductor switching element that blocks the discharge path of the secondary battery 210.

[0022] In Figure 1, the charge control transistor TR1 blocks the ground wire 202 through which the charging current of the secondary battery 210 flows, and the discharge control transistor TR2 blocks the ground wire 202 through which the discharge current of the secondary battery 210 flows. The charge control transistor TR1 and the discharge control transistor TR2 are switching elements that switch between conducting and blocking the ground wire 202, and are inserted in series with the ground wire 202. The charge control transistor TR1 and the discharge control transistor TR2 are, for example, N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0023] The charge control transistor TR1 has a parasitic diode D1 between its drain and source, with its forward direction opposite to the direction of the charging current of the secondary battery 210. The charge control transistor TR1 is a switching element inserted in series with the ground wire 202 such that the forward direction of the parasitic diode D1 matches the direction of the discharge current flowing through the secondary battery 210.

[0024] The discharge control transistor TR2 has a parasitic diode D2 between its drain and source, with its forward direction opposite to the direction of the discharge current of the secondary battery 210. The discharge control transistor TR2 is a switching element inserted in series with the ground wire 202 such that the forward direction of the parasitic diode D2 matches the direction in which the charging current of the secondary battery 210 flows.

[0025] Protection IC 101 is an example of a secondary battery protection integrated circuit used to protect a secondary battery. Protection IC 101 operates using the secondary battery 210 as its power source.

[0026] The protection IC 101 has the function of protecting the secondary battery 210 from over-discharge and the like by controlling the switch circuit 203. For example, if abnormal charging (e.g., overcharging, overcurrent in the charging direction (charging overcurrent), etc.) is detected by the detection circuit 222, the protection IC 101 protects the secondary battery 210 from abnormal charging by turning off the charge control transistor TR1. On the other hand, if abnormal discharge (e.g., over-discharge, overcurrent in the discharge direction (discharge overcurrent), etc.) is detected by the detection circuit 222, the protection IC 101 protects the secondary battery 210 from abnormal discharge by turning off the discharge control transistor TR2.

[0027] The protection IC 101 includes, for example, a charge control terminal (terminal COUT), a discharge control terminal (terminal DOUT), a detection terminal (terminal VM), a power supply terminal (terminal VDD), and a ground terminal (terminal VSS). These terminals are, for example, external connection terminals for connecting the internal circuitry of the protection IC 101 to the outside of the protection IC 101.

[0028] Terminal COUT is connected to the gate (control electrode) of the charge control transistor TR1 and outputs a signal to turn the charge control transistor TR1 on or off. Terminal DOUT is connected to the gate (control electrode) of the discharge control transistor TR2 and outputs a signal to turn the discharge control transistor TR2 on or off.

[0029] Terminal VM is an example of a monitoring terminal used to monitor the potential of terminal P-, and is connected to terminal P-. Terminal VM is used, for example, by the control circuit 221 in the protection IC 101 to monitor whether or not the electronic device 300 or charger is connected. Terminal VM is connected to the ground wire 202 via a resistor R23 between the switch circuit 203 and terminal P-. Terminal VM is electrically connected to the ground wire 202 on the opposite side of the switch circuit 203 from the secondary battery 210.

[0030] Terminal VM may be used to detect charging overcurrent or discharging overcurrent flowing through the secondary battery 210.

[0031] Terminal VDD is the power terminal of the protection IC 101 and is connected to the positive terminal 211 and power line 201 of the secondary battery 210 via a resistor R21. Terminal VSS is the ground terminal of the protection IC 101 and is connected to the negative terminal 212 of the secondary battery 210. Capacitor C21 is connected between terminal VDD and terminal VSS. Terminal VSS is connected to the ground line 202 between the switch circuit 203 and the negative terminal 212. In this example, terminal VSS is connected to the ground line 202 between the discharge control transistor TR2 and the negative terminal 212.

[0032] The protection IC 101 includes a detection circuit 222 and a control circuit 221.

[0033] The control circuit 221 includes a charge control circuit 221a that controls the charging of the secondary battery 210. When overcharging of the secondary battery 210 is detected by the detection circuit 222 for a predetermined detection delay time tVdet1, the charge control circuit 221a outputs a signal (e.g., a low-level gate control signal) from terminal COUT that switches the charge control transistor TR1 from on to off. When overcurrent charging of the secondary battery 210 is detected by the detection circuit 222 for a predetermined detection delay time tVdet4, the charge control circuit 221a outputs a signal (e.g., a low-level gate control signal) from terminal COUT that switches the charge control transistor TR1 from on to off.

[0034] The control circuit 221 prevents current in the direction of charging the secondary battery 210 from flowing through the ground wire 202 by turning off the charge control transistor TR1. As a result, charging of the secondary battery 210 is stopped, and the protection IC 101 can protect the secondary battery 210 from overcharging or overcurrent during charging.

[0035] The control circuit 221 includes a discharge control circuit 221b that controls the discharge of the secondary battery 210. When over-discharge of the secondary battery 210 is detected by the detection circuit 222 for a predetermined detection delay time tVdet2, the discharge control circuit 221b outputs a signal (e.g., a low-level gate control signal) from terminal DOUT that switches the discharge control transistor TR2 from on to off. When overcurrent discharge of the secondary battery 210 is detected by the detection circuit 222 for a predetermined detection delay time tVdet3, the discharge control circuit 221b outputs a signal (e.g., a low-level gate control signal) from terminal DOUT that switches the discharge control transistor TR2 from on to off.

[0036] The control circuit 221 prevents current flowing through the ground wire 202 in the direction of discharging the secondary battery 210 by turning off the discharge control transistor TR2. As a result, the discharge of the secondary battery 210 is stopped, and the protection IC 101 can protect the secondary battery 210 from over-discharge or discharge overcurrent.

[0037] The detection circuit 222 includes an over-discharge detection circuit that detects over-discharge of the secondary battery 210 by monitoring the power supply voltage Vdd between terminal VDD and terminal VSS. The over-discharge detection circuit compares the power supply voltage Vdd with the over-discharge detection voltage Vdet2 and generates an over-discharge detection signal indicating that over-discharge of the secondary battery 210 has been detected when the power supply voltage Vdd is lower than the over-discharge detection voltage Vdet2.

[0038] In the example shown in Figure 1, the over-discharge detection circuit includes a first over-discharge detection circuit 11 and a second over-discharge detection circuit 12. The first over-discharge detection circuit 11 compares the power supply voltage Vdd with a predetermined first over-discharge detection voltage Vdet2-1, and generates a first over-discharge detection signal S1 indicating that over-discharge of the secondary battery 210 has been detected when the power supply voltage Vdd is lower than Vdet2-1. The second over-discharge detection circuit 12 compares the power supply voltage Vdd with a predetermined second over-discharge detection voltage Vdet2-2, and generates a second over-discharge detection signal S2 indicating that over-discharge of the secondary battery 210 has been detected when the power supply voltage Vdd is lower than Vdet2-2.

[0039] Vdet2-1 is set higher than Vdet2-2. Vdet2-1 is an example of a first decision voltage. Vdet2-2 is an example of a second decision voltage lower than the first decision voltage. Vdet2-1 and Vdet2-2 are each preset to voltage values ​​determined by the trimming state of multiple trimming elements (not shown). The trimming elements are fuse elements that can be cut by a laser irradiated from outside the protection IC101.

[0040] The control circuit 221 has a discharge control circuit 221b that can control a discharge control transistor TR2 that cuts off the discharge of the secondary battery 210. The discharge control transistor TR2 is a discharge cutoff circuit that cuts off the discharge of the secondary battery 210.

[0041] The discharge control circuit 221b performs a first operation when the power supply voltage Vdd is greater than or equal to Vdet2-1. The first operation is, for example, an operation to allow the discharge of the secondary battery 210, and specifically, an operation to output a signal from terminal DOUT to turn on the discharge control transistor TR2. If the first over-discharge detection signal S1 is not detected, the discharge control circuit 221b determines that the power supply voltage Vdd is greater than or equal to Vdet2-1.

[0042] The discharge control circuit 221b operates the discharge control transistor TR2 to cut off the discharge of the secondary battery 210 when the first condition A1 is met, which is that the power supply voltage Vdd is lower than Vdet2-1 for a first time. For example, the discharge control circuit 221b determines that the first condition A1 is met when the first over-discharge detection signal S1 is detected by the delay circuit 21 for a predetermined detection delay time tVdet2-1. The detection delay time tVdet2-1 is an example of the first time. When the first condition A1 is met, the discharge control circuit 221b outputs a signal from terminal DOUT to turn off the discharge control transistor TR2 in order to stop the discharge of the secondary battery 210.

[0043] When the power supply voltage Vdd is lower than Vdet2-2 for a second time period that is shorter than the first time period, and the second condition A2 is satisfied, the discharge control circuit 221b operates the discharge control transistor TR2 so as to cut off the discharge of the secondary battery 210. For example, when the second over-discharge detection signal S2 is continuously detected by the delay circuit 22 for a predetermined detection delay time tVdet2-2, the discharge control circuit 221b determines that the second condition A2 is satisfied. The detection delay time tVdet2-2 is an example of the second time period. When the second condition A2 is satisfied, the discharge control circuit 221b outputs a signal from the terminal DOUT to turn off the discharge control transistor TR2 in order to stop the discharge of the secondary battery 210.

[0044] As described above, according to the protection IC 101 according to the first embodiment, when the state where the power supply voltage Vdd is lower than Vdet2-1 continues for the detection delay time tVdet2-1, the discharge of the secondary battery 210 is cut off in order to protect the secondary battery 210 from over-discharge. On the other hand, when the state where the power supply voltage Vdd is lower than Vdet2-2 (<Vdet2-1) continues for the detection delay time tVdet2-2 (<tVdet2-1), the discharge of the secondary battery 210 is cut off in order to protect the secondary battery 210 from over-discharge. Therefore, even if the voltage drop of the secondary battery 210 due to discharge is small, if the state where the power supply voltage Vdd is lower than Vdet2-1 continues for the detection delay time tVdet2-1, the discharge of the secondary battery 210 is cut off, so that the secondary battery 210 can be appropriately protected from over-discharge. On the other hand, if the voltage drop of the secondary battery 210 due to discharge is large, if the state where the power supply voltage Vdd is lower than Vdet2-2 (<Vdet2-1) continues for tVdet2-2 which is shorter than tVdet2-1, the discharge of the secondary battery 210 is quickly cut off, so that the secondary battery 210 can be appropriately protected from over-discharge.

[0045] Thus, the protection IC 101 according to the first embodiment detects over-discharge using a plurality of determination voltages (Vdet2-1, Vdet2-2) and has a plurality of delay times (tVdet2-1, tVdet2-2) corresponding to these determination voltages. Vdet2-1 is set higher than Vdet2-2, and tVdet2-1 corresponding to Vdet2-1 is set longer than tVdet2-2 corresponding to Vdet2-2.

[0046] When the discharge current (load current) is small or the battery charge is sufficient, the voltage drop of the secondary battery 210 is small. Therefore, the detection voltage can be set higher and the delay time longer, as long as there is no abnormality (damage, smoke, overheating, etc.) in the secondary battery 210 or the electronic device 300. Consequently, when the discharge current (load current) is small or the battery charge is sufficient, even if the detection voltage is set high and the delay time is long, the effect of discharge shutdown due to over-discharge detection is relatively small. On the other hand, when the discharge current (load current) is large or the battery charge is low, the voltage drop of the secondary battery 210 is large. Therefore, it is preferable to set the detection voltage low and the delay time short. Consequently, when the voltage drop of the secondary battery 210 is large, the discharge of the secondary battery 210 can be quickly shut off to protect the secondary battery 210 from over-discharge.

[0047] Thus, the protection IC 101 and battery device 401 according to the first embodiment have multiple different determination voltages and multiple different delay times to perform discharge interruption operation in the event of over-discharge, and can therefore properly protect the secondary battery 210 from over-discharge.

[0048] In particular, when the secondary battery 210 is a lithium-ion battery using a silicon-based negative electrode, the protection IC 101 and battery device 401 according to the first embodiment can appropriately protect the lithium-ion battery from over-discharge by having multiple different determination voltages and multiple different delay times. Lithium-ion batteries using silicon-based negative electrodes have the advantage of higher energy density compared to lithium-ion batteries using graphite-based negative electrodes, but have the disadvantage of being prone to degradation in the over-discharge state. If the over-discharge detection voltage Vdet2 is set high to counteract this degradation, the sensitivity of the protection IC 101 to detect over-discharge increases, which may cause the power supply to the electronic device 300 to become unstable due to excessive discharge interruption. The protection IC 101 and battery device 401 according to the first embodiment perform over-discharge detection and discharge current interruption with multiple different sensitivities, thereby ensuring the convenience of power supply to the electronic device 300 and suppressing the degradation of the lithium-ion battery.

[0049] Figure 2 is a circuit diagram showing an example of the discharge control circuit section of a secondary battery protection integrated circuit according to the first embodiment. The detection circuit 222 includes a first over-discharge detection circuit 11 and a second over-discharge detection circuit 12.

[0050] The first over-discharge detection circuit 11 has a comparator that compares the power supply voltage Vdd with a predetermined first over-discharge detection voltage Vdet2-1 and outputs a first over-discharge detection signal S1 from node N1. The first over-discharge detection circuit 11 sets the level of the first over-discharge detection signal S1 to a low level when the power supply voltage Vdd is equal to or greater than the first over-discharge detection voltage Vdet2-1, and sets the level of the first over-discharge detection signal S1 to a high level when the power supply voltage Vdd is less than the first over-discharge detection voltage Vdet2-1. The second over-discharge detection circuit 12 has a comparator that compares the power supply voltage Vdd with a predetermined second over-discharge detection voltage Vdet2-2 and outputs a second over-discharge detection signal S2 from node N2. The second over-discharge detection circuit 12 sets the level of the second over-discharge detection signal S2 to a low level when the power supply voltage Vdd is equal to or greater than the second over-discharge detection voltage Vdet2-2, and sets the level of the second over-discharge detection signal S2 to a high level when the power supply voltage Vdd is less than the second over-discharge detection voltage Vdet2-2.

[0051] The discharge control circuit 221b includes delay circuits 21, 22, 23, inverting gates 31, 32, an OR gate 33, an OR gate 34, a latch circuit 35, and an inverting gate 36. The inverting gate 31 generates a reset signal R1 by inverting the level of the first over-discharge detection signal S1. The inverting gate 32 generates a reset signal R2 by inverting the level of the second over-discharge detection signal S2.

[0052] The delay circuit 21 sets the level of node N3 to a low level when the level of the first over-discharge detection signal S1 is low and the level of the reset signal R1 is high (see t8 in Figure 3 and state 1 in Figure 4). In Figure 2, the delay circuit 21 starts counting when the level of the first over-discharge detection signal S1 switches from a low level to a high level and the level of the reset signal R1 switches from a high level to a low level. After counting for a predetermined detection delay time tVdet2-1, the delay circuit 21 switches the level of node N3 from a low level to a high level (see t9 in Figure 3 and state 2 in Figure 4).

[0053] In Figure 2, when the level of node N3 switches from low to high, the level of the output node of the OR gate 34 (set terminal S of the latch circuit 35) becomes high. As a result, the over-discharge flag FDO output from the output terminal Q of the latch circuit 35 switches from low to high, and the inverting gate 36 switches the level of terminal DOUT from high to low. Therefore, the discharge of the secondary battery 210 is interrupted by the discharge control transistor TR2 (see Operation 1 in Figure 3).

[0054] In Figure 2, the delay circuit 22 sets the level of node N4 to a low level when the level of the second over-discharge detection signal S2 is low and the level of the reset signal R2 is high (see t4 in Figure 3 and state 3 in Figure 4). In Figure 2, the delay circuit 22 starts counting when the level of the second over-discharge detection signal S2 switches from a low level to a high level and the level of the reset signal R2 switches from a high level to a low level. After counting for a predetermined detection delay time tVdet2-2, the delay circuit 22 switches the level of node N4 from a low level to a high level (see t5 in Figure 3 and state 4 in Figure 4).

[0055] In Figure 2, when the level of node N4 switches from low to high, the level of the output node of the OR gate 34 (set terminal S of the latch circuit 35) becomes high. As a result, the over-discharge flag FDO output from the output terminal Q of the latch circuit 35 switches from low to high, and the inverting gate 36 switches the level of terminal DOUT from high to low. Therefore, the discharge of the secondary battery 210 is interrupted by the discharge control transistor TR2 (see Operation 2 in Figure 3).

[0056] In Figure 2, the negation OR gate 33 outputs signal S3, which is the negation OR of the first over-discharge detection signal S1 and the second over-discharge detection signal S2. The reset signal R3 is the signal obtained by inverting the level of signal S3.

[0057] The delay circuit 23 sets the level of node N6 to a low level when the level of signal S3 is low and the level of reset signal R3 is high (t6, t10 in Figure 3). Note that the level of signal S3 becomes low and the level of reset signal R3 becomes high when node N1 or node N2 is low and the power supply voltage Vdd is lower than Vdet2-1 (e.g., 2.8V). The delay circuit 23 starts counting when the level of signal S3 switches from low to high and the level of reset signal R3 switches from high to low. Counting starts when node N1 and node N2 are low and the power supply voltage Vdd is Vdet2-1 (e.g., 2.8V) or higher. After counting for a predetermined detection delay time tVrel2, the delay circuit 23 switches the level of node N6 (reset terminal R of latch circuit 35) from low to high. As a result, the over-discharge flag FDO output from the output terminal Q of the latch circuit 35 switches from a high level to a low level, so the inverting gate 36 switches the level of terminal DOUT from a low level to a high level (t6-1, t10-1 in Figure 3). Therefore, the secondary battery 210 recovers from the over-discharge state, and the discharge of the secondary battery 210 is permitted by turning on the discharge control transistor TR2 (see over-discharge recovery in Figure 3).

[0058] Furthermore, if the power supply voltage Vdd becomes lower than the over-discharge detection voltage Vdet2-1, but the time during which the power supply voltage Vdd remains lower than the over-discharge detection voltage Vdet2-1 is shorter than the detection delay time tVdet2-1, the discharge control circuit 221b does not turn off the discharge control transistor TR2 (from t1 to t2 in Figure 3). Similarly, if the power supply voltage Vdd becomes lower than the over-discharge detection voltage Vdet2-2, but the time during which the power supply voltage Vdd remains lower than the over-discharge detection voltage Vdet2-2 is shorter than the detection delay time tVdet2-2, the discharge control circuit 221b does not turn off the discharge control transistor TR2. As a result, it is possible to prevent the discharge control transistor TR2 from being turned off due to noise or other factors.

[0059] Figure 5 is a circuit diagram showing an example of a system including a secondary battery protection integrated circuit according to the second embodiment. In the second embodiment, a description of the configuration, operation, and effects similar to those of the first embodiment will be omitted by referring to the above description. The second embodiment differs from the first embodiment in that it further includes input terminals SL and SEL.

[0060] The system 502 shown in Figure 5 includes a battery device 402 and electronic equipment 300. The battery device 402 includes a secondary battery 210 and a battery protection device 602. The battery protection device 602 is a component that includes, for example, a circuit board on which at least a protection IC 102 is mounted. The battery device 402 has an input terminal SL. The protection IC 102 has an input terminal SEL connected to the input terminal SL.

[0061] Input terminals SL and SEL are input terminals that receive information from external devices such as electronic equipment 300. The discharge control circuit 221b controls the discharge control transistor TR2 under first condition A1 while it receives predetermined first information SI1 from the external device at input terminal SEL. The discharge control circuit 221b controls the discharge control transistor TR2 under second condition A2 while it receives second information SI2, which is different from the first information SI1, from the external device at input terminal SEL. As a result, the discharge control circuit 221b can switch and set the over-discharge detection voltage Vdet2 and the detection delay time tVdet2 to values ​​corresponding to the information input to input terminal SEL from the external device.

[0062] Figure 6 is a circuit diagram showing an example of the discharge control circuit section of a secondary battery protection integrated circuit according to the second embodiment. The detection circuit 222 includes a first over-discharge detection circuit 11 and a second over-discharge detection circuit 12. The discharge control circuit 221b includes delay circuits 21, 22, 23, logic gates 41, 42, 43, 44, a negation OR gate 33, an OR gate 34, a latch circuit 35, and an inverting gate 36.

[0063] Logic gate 41 outputs a first over-discharge detection signal S1, which is a logical product of the level obtained by inverting the level of the information input from input terminal SEL and the level of node N1. Logic gate 42 outputs a reset signal R1, which is a negative logical product of the level obtained by inverting the level of the information input from input terminal SEL and the level of node N1. Logic gate 43 outputs a second over-discharge detection signal S2, which is a logical product of the level of the information input from input terminal SEL and the level of node N2. Logic gate 44 outputs a reset signal R2, which is a negative logical product of the level of the information input from input terminal SEL and the level of node N2. The operations of delay circuits 21, 22, and 23 are the same as described above.

[0064] To input terminal SEL, first information SI1 or second information SI2 is input as information received from an external device. For example, first information SI1 indicates that electronic device 300 is in a sleep state, and second information SI2 indicates that electronic device 300 is in an operating state. The sleep state represents a state where the power consumption of electronic device 300 is lower than that in the operating state.

[0065] In the operating state, since the discharge current (load current) is relatively large, the voltage drop of secondary battery 210 is large. Therefore, it is preferable to set the determination voltage low and the delay time short. Thus, while high-level second information SI2 indicating the operating state is input to input terminal SEL, discharge control circuit 221b controls discharge control transistor TR2 under second condition A2. In this case, similar to the first embodiment, when delay circuit 22 detects that the state where power supply voltage Vdd is lower than Vdet2-2 (<Vdet2-1) continues for detection delay time tVdet2-2 (<tVdet2-1), it cuts off the discharge of secondary battery 210 (see FIG. 7). Thereby, since the discharge of secondary battery 210 is promptly cut off, secondary battery 210 can be appropriately protected from over-discharge.

[0066] On the other hand, in the sleep state, the discharge current (load current) is relatively small, so the voltage drop of the secondary battery 210 is small. For this reason, the detection voltage can be set high and the delay time long, as long as there is no abnormality (destruction, smoke, overheating, etc.) in the secondary battery 210 or the electronic device 300. Accordingly, the discharge control circuit 221b controls the discharge control transistor TR2 with the first condition A1 while the low-level first information SI1 representing the sleep state is input to the input terminal SEL. In this case, similar to the first embodiment, the delay circuit 21 cuts off the discharge of the secondary battery 210 if the power supply voltage Vdd remains lower than Vdet2-1 for a detection delay time tVdet2-1 (see Figure 8). This appropriately protects the secondary battery 210 from over-discharge.

[0067] Furthermore, the first information SI1 and the second information SI2 are not limited to operational information of the electronic device 300, such as sleep state and operating state, but may also be, for example, remaining charge information such as the SOC (State of Charge) of the secondary battery 210. The remaining charge information such as SOC is calculated by a charge meter IC or the electronic device 300. For example, the first information SI1 represents the first SOC state of the secondary battery 210, and the second information SI2 represents the second SOC state of the secondary battery 210, where the SOC is lower than the first SOC state. For example, if the threshold VSOC is 10%, the first information SI1 represents the state where the SOC is 0% or more and less than 10% (first SOC state), and the second information SI2 represents the state where the SOC is 10% or more and 100% or less (second SOC state).

[0068] Figure 9 is a circuit diagram showing an example of a system including a secondary battery protection integrated circuit according to the third embodiment. In the third embodiment, a description of the configuration, operation, and effects similar to those of the embodiments described above will be omitted by referring to the above description. The third embodiment differs from the first embodiment in that it further includes a low voltage detection circuit 50.

[0069] The system 503 shown in Figure 9 includes a battery device 403 and electronic equipment 300. The battery device 403 comprises a secondary battery 210 and a battery protection device 603. The battery protection device 603 is a component that includes, for example, a circuit board on which at least a protection IC 103 is mounted.

[0070] The protection IC 103 is triggered when the power supply voltage Vdd falls below the judgment voltage Vsoc (> over-discharge detection voltage Vdet2), and based on information detected internally by the protection IC 103, it selects the over-discharge detection specification (over-discharge detection voltage Vdet2 and detection delay time tVdet2). The discharge control circuit 221b switches and sets the over-discharge detection specification (over-discharge detection voltage Vdet2 and detection delay time tVdet2) based on the state of the power supply voltage Vdd before detecting the over-discharge detection voltage Vdet2. By using the information of the power supply voltage Vdd before over-discharge detection in selecting the over-discharge detection specification, the discharge control circuit 221b can select the over-discharge detection specification more appropriately.

[0071] The low voltage detection circuit 50 compares the power supply voltage Vdd with a predetermined determination voltage Vsoc, and when the power supply voltage Vdd is lower than the determination voltage Vsoc, it generates a low voltage detection signal Vo indicating that a power supply voltage Vdd lower than or equal to a predetermined voltage value has been detected. The determination voltage Vsoc is set higher than Vdet2-1. The determination voltage Vsoc is an example of a third determination voltage. The determination voltage Vsoc is preset to a predetermined voltage value based on the trimming state of each of the multiple trimming elements (not shown) from a previously acquired relationship between SOC and the battery voltage.

[0072] Figure 22 shows an example of the relationship between battery level and detection delay time tVdet2 with respect to over-discharge detection voltage Vdet2. The discharge control circuit 221b determines whether the power supply voltage Vdd has fallen below Vdet2-2 after a delay time tVsoc has elapsed since the power supply voltage Vdd fell below the determination voltage Vsoc. Delay time tVsoc is an example of a third time. If the power supply voltage Vdd falls below Vdet2-2, the discharge control circuit 221b operates the discharge control transistor TR2 after a time tVdet2-2b has elapsed, which is shorter than the detection delay time tVdet2-2. tVdet2-2b is an example of a fourth time, which is shorter than the second time described above.

[0073] The discharge control circuit 221b determines whether the power supply voltage Vdd is less than Vdet2-1 and greater than or equal to Vdet2-1 after a delay time tVsoc has elapsed since the power supply voltage Vdd fell below the determination voltage Vsoc. If the power supply voltage Vdd is less than Vdet2-1 and greater than or equal to Vdet2-1, the discharge control circuit 221b operates the discharge control transistor TR2 after a delay time tVdet2-1b, which is shorter than the detection delay time tVdet2-1. tVdet2-2b is an example of a fifth time, which is shorter than the first time described above.

[0074] The discharge control circuit 221b determines whether the power supply voltage Vdd has fallen below Vdet2-2 within the time delay time tVsoc elapsed after the power supply voltage Vdd has fallen below the determination voltage Vsoc. The delay time tVsoc is an example of the third time. If the power supply voltage Vdd falls below Vdet2-2, the discharge control circuit 221b operates the discharge control transistor TR2 after the detection delay time tVdet2-2 (second time) has elapsed.

[0075] The discharge control circuit 221b determines whether the power supply voltage Vdd is less than Vdet2-1 and greater than or equal to Vdet2-1 within the time delay tVsoc that has elapsed since the power supply voltage Vdd fell below the determination voltage Vsoc. If the power supply voltage Vdd is less than Vdet2-2 and greater than or equal to Vdet2-1, the discharge control circuit 221b operates the discharge control transistor TR2 after the detection delay time tVdet2-1 (first hour) has elapsed.

[0076] Figure 10 is a circuit diagram showing an example of the discharge control circuit section of a secondary battery protection integrated circuit according to the third embodiment. The low voltage detection circuit 50 has a comparator that compares the power supply voltage Vdd with a predetermined determination voltage Vsoc and outputs a low voltage detection signal Vo. The low voltage detection circuit 50 sets the level of the low voltage detection signal Vo to a high level when the power supply voltage Vdd is equal to or greater than the determination voltage Vsoc, and sets the level of the low voltage detection signal Vo to a low level when the power supply voltage Vdd is less than the determination voltage Vsoc.

[0077] The OR gate 15 outputs a signal which is the OR of the first over-discharge detection signal S1 and the second over-discharge detection signal S2. The pulse generation circuit 16 generates a one-shot pulse Φ with a predetermined pulse width when a high level is detected in the first over-discharge detection signal S1 or when a high level is detected in the second over-discharge detection signal S2.

[0078] The delay circuit 13 switches the delay signal De from a high level to a low level after a predetermined delay time tVsoc has elapsed since the power supply voltage Vdd was detected to be less than the judgment voltage Vsoc. The delay circuit 13 is a circuit that generates the delay time tVsoc. The delay circuit 13 may also be a shift register 13A in which flip-flops are connected in series, as shown in Figure 11.

[0079] In Figure 10, the delay signal De is input to the data input terminal of the flip-flop 14. The flip-flop 14 has a set terminal S to which the low voltage detection signal Vo is input, and a clock input terminal to which the one-shot pulse Φ is input. The flip-flop 14 sets the level of the delay signal De at the timing when the one-shot pulse Φ is input to the level of the low voltage flag Nsoc. When the power supply voltage Vdd is greater than or equal to the judgment voltage Vsoc, the low voltage flag Nsoc is at a high level, and when the power supply voltage Vdd is less than the judgment voltage Vsoc, the low voltage flag Nsoc is at a low level. The operation of the delay circuits 21, 22, and 23 is the same as described above.

[0080] The delay circuit 21 sets the levels of nodes N3a and N3b to a low level when the level of the first over-discharge detection signal S1 is low and the level of the reset signal R1 is high. The delay circuit 21 starts counting when the level of the first over-discharge detection signal S1 switches from a low level to a high level and the level of the reset signal R1 switches from a high level to a low level. After counting for a predetermined detection delay time tVdet2-1, the delay circuit 21 switches the level of node N3a from a low level to a high level. After counting for a predetermined detection delay time tVdet2-1b, the delay circuit 21 switches the level of node N3b from a low level to a high level. tVdet2-1b is a shorter time than tVdet2-1.

[0081] The delay circuit 22 sets the levels of nodes N4a and N4b to a low level when the level of the second over-discharge detection signal S2 is low and the level of the reset signal R2 is high. The delay circuit 22 starts counting when the level of the second over-discharge detection signal S2 switches from a low level to a high level and the level of the reset signal R2 switches from a high level to a low level. After counting for a predetermined detection delay time tVdet2-2, the delay circuit 22 switches the level of node N4a from a low level to a high level. After counting for a predetermined detection delay time tVdet2-2b, the delay circuit 22 switches the level of node N4b from a low level to a high level. tVdet2-2b is a shorter time than tVdet2-2.

[0082] Logic gate 51 selects tVdet2-1, generated by delay circuit 21, as the detection delay time tVdet2 when the low voltage flag Nsoc is high. Logic gate 51 outputs the logical AND of the N3a signal and the Nsoc signal. Logic gate 52 selects tVdet2-1b, generated by delay circuit 21, as the detection delay time tVdet2 when the low voltage flag Nsoc is low. Logic gate 52 outputs the logical AND of the N3a signal and the inverted Nsoc signal.

[0083] Logic gate 54 selects tVdet2-2, generated by delay circuit 22, as the detection delay time tVdet2 when the low voltage flag Nsoc is high. Logic gate 54 outputs the logical AND of the N4a signal and the Nsoc signal. Logic gate 55 selects tVdet2-2b, generated by delay circuit 22, as the detection delay time tVdet2 when the low voltage flag Nsoc is low. Logic gate 55 outputs the logical AND of the N4b signal and the Nsoc signal.

[0084] OR gate 53 outputs the OR of the output signals of logic gate 51 and logic gate 52. OR gate 56 outputs the OR of the output signals of logic gate 54 and logic gate 55. OR gate 34 outputs the OR of the output signals of OR gate 53 and OR gate 56. The other circuit parts are the same as above.

[0085] Figure 12 is an example of an operating waveform diagram of the discharge control of the secondary battery protection integrated circuit according to the third embodiment. Figure 12 illustrates the case where the remaining charge of the secondary battery 210 is large (the power supply voltage Vdd immediately before over-discharge detection is Vsoc or higher) and the load current is small. When the load 300 is connected to the system 503, the power supply voltage Vdd begins to decrease. Because the remaining charge of the secondary battery 210 is large and the load current is small, the power supply voltage Vdd decreases to Vdet2-1 or lower, but does not decrease to Vdet2-2. As the power supply voltage Vdd decreases to the determination voltage Vsoc or lower, the low voltage detection signal Vo decreases from a high level to a low level, and after a predetermined delay time tVsoc has elapsed, the delay signal De switches from a high level to a low level.

[0086] If the power supply voltage Vdd falls below Vdet2-1 before the delay time tVsoc has elapsed after the power supply voltage Vdd has fallen below the judgment voltage Vsoc, a one-shot pulse Φ is generated, setting the level of the low voltage flag Nsoc to a high level. As a result, the discharge control circuit 221b operates the discharge control transistor TR2 when the detection delay time tVdet2-1 generated by the delay circuit 21 has elapsed. Consequently, the discharge of the secondary battery 210 is interrupted (see Figure 12), thereby properly protecting the secondary battery 210 from over-discharge.

[0087] FIG. 13 is an example of an operation waveform diagram of the discharge control of the secondary battery protection integrated circuit according to the third embodiment. FIG. 13 illustrates a case where the remaining battery level of the secondary battery 210 is low (the power supply voltage Vdd before over-discharge detection is less than Vsoc), and the load current is small. When the load 300 is connected to the system 503, the power supply voltage Vdd starts to decrease. Since the remaining battery level of the secondary battery 210 is low and the load current is small, the power supply voltage Vdd decreases to below Vdet2-1 but does not decrease to Vdet2-2. When the power supply voltage Vdd decreases below the determination voltage Vsoc, the low voltage detection signal Vo decreases from the high level to the low level, and after a predetermined delay time tVsoc elapses, the delay signal De switches from the high level to the low level.

[0088] After a delay time tVsoc elapses since the power supply voltage Vdd decreases below the determination voltage Vsoc, when the power supply voltage Vdd decreases below Vdet2-1, the level of the low voltage flag Nsoc is set to the high level by the generation of the one-shot pulse Φ. As a result, the discharge control circuit 221b operates the discharge control transistor TR2 when the detection delay time tVdet2-1b (<tVdet2-1) generated by the delay circuit 21 elapses. As a result, the discharge of the secondary battery 210 is quickly interrupted (see FIG. 13), so that the secondary battery 210 can be appropriately protected from over-discharge.

[0089] FIG. 14 is an example of an operation waveform diagram of the discharge control of the secondary battery protection integrated circuit according to the third embodiment. FIG. 14 illustrates a case where the remaining battery level of the secondary battery 210 is high (the power supply voltage Vdd before over-discharge detection is greater than or equal to Vsoc), and the load current is large. When the load 300 is connected to the system 503, the power supply voltage Vdd starts to decrease. Since the remaining battery level of the secondary battery 210 is high and the load current is large, the power supply voltage Vdd decreases below Vdet2-2, which is lower than Vdet2-1. When the power supply voltage Vdd decreases below the determination voltage Vsoc, the low voltage detection signal Vo decreases from the high level to the low level, and after a predetermined delay time tVsoc elapses, the delay signal De switches from the high level to the low level.

[0090] After the power supply voltage Vdd drops below the determination voltage Vsoc and before the delay time tVsoc elapses, if the power supply voltage Vdd drops below Vdet2-2, the level of the low-voltage flag Nsoc is set to the high level by the generation of the one-shot pulse Φ. As a result, the discharge control circuit 221b operates the discharge control transistor TR2 when the detection delay time tVdet2-2 generated by the delay circuit 22 elapses. As a result, the discharge of the secondary battery 210 is cut off (see FIG. 14), so that the secondary battery 210 can be appropriately protected from over-discharge. tVdet2-2 is shorter than tVdet2-1.

[0091] FIG. 15 is an example of an operation waveform diagram of the discharge control of the secondary battery protection integrated circuit according to the third embodiment. FIG. 15 illustrates a case where the remaining battery level of the secondary battery 210 is small (the power supply voltage Vdd immediately before over-discharge detection is less than Vsoc) and the load current is large. When the load 300 is connected to the system 503, the power supply voltage Vdd starts to drop. Since the remaining battery level of the secondary battery 210 is small and the load current is large, the power supply voltage Vdd drops below Vdet2-2, which is lower than Vdet2-1. When the power supply voltage Vdd drops below the determination voltage Vsoc, the low-voltage detection signal Vo drops from the high level to the low level, and after the elapse of a predetermined delay time tVsoc, the delay signal De switches from the high level to the low level.

[0092] After the power supply voltage Vdd drops below the determination voltage Vsoc and after the delay time tVsoc elapses, if the power supply voltage Vdd drops below Vdet2-2, the level of the low-voltage flag Nsoc is set to the high level by the generation of the one-shot pulse Φ. As a result, the discharge control circuit 221b operates the discharge control transistor TR2 when the detection delay time tVdet2-2b (<tVdet2-2) generated by the delay circuit 22 elapses. As a result, the discharge of the secondary battery 210 is quickly cut off (see FIG. 15), so that the secondary battery 210 can be appropriately protected from over-discharge. tVdet2-2b is shorter than tVdet2-1b.

[0093] Figure 16 is a circuit diagram showing an example of a system including a secondary battery protection integrated circuit according to the fourth embodiment. In the fourth embodiment, a description of the configuration, operation, and effects similar to those of the embodiments described above will be omitted by referring to the above description. The fourth embodiment differs from the second embodiment in that it further includes a temperature sensor 301.

[0094] The system 504 shown in Figure 16 includes a battery device 404 and electronic equipment 300. The battery device 404 includes a secondary battery 210 and a battery protection device 604. The battery protection device 604 is a component that includes, for example, a circuit board on which at least a protection IC 104 is mounted. The battery device 404 has an input terminal SL. The protection IC 104 has an input terminal SEL connected to the input terminal SL.

[0095] The temperature sensor 301 detects the temperature of the secondary battery 210 (which may also be the ambient temperature). The temperature sensor 301 is provided in the battery device 404. The temperature sensor 301 may be installed inside or outside the protection IC 104. The temperature sensor 301 is, for example, a thermistor. The protection IC 104 has a terminal TS connected to the temperature sensor 301. The protection IC 104 or the electronic device 300 obtains the temperature detected by the temperature sensor 301 from terminal TS.

[0096] The protection IC 103 selects the over-discharge detection specifications (over-discharge detection voltage Vdet2 and detection delay time tVdet2) based on the temperature information detected by the temperature sensor 301. The discharge control circuit 221b can select the over-discharge detection specifications more appropriately by utilizing the temperature information in the selection of the over-discharge detection specifications.

[0097] FIG. 23 is an example of a diagram showing the relationship between the over-discharge detection voltage and the temperature. For example, as shown in FIG. 23, when the temperature detected by the temperature sensor 301 is equal to or higher than the first temperature T1 and equal to or lower than the second temperature T2 (for example, normal temperature state), the discharge control circuit 221b operates the discharge control transistor TR2 under the second condition A2. When the temperature detected by the temperature sensor 301 is lower than the first temperature T1 or higher than the second temperature T2 (for example, high temperature state or low temperature state), the discharge control circuit 221b operates the discharge control transistor TR2 under the first condition A1. Thereby, the discharge control circuit 221b can switch and set the over-discharge detection voltage Vdet2 and the detection delay time tVdet2 to values corresponding to the temperature according to the difference in the temperature detected by the temperature sensor 301.

[0098] FIG. 17 is a circuit configuration diagram showing an example of a discharge control circuit section of a secondary battery protection integrated circuit according to the fourth embodiment. The discharge control circuit 221b includes delay circuits 21, 22, 23, logic gates 41, 42, 43, 44, a NOR gate 33, an OR gate 34, a latch circuit 35, and an inverter gate 36. The operations of these circuits are the same as those in the second embodiment.

[0099] Temperature information detected by the temperature sensor 301 is input to the input terminal SEL as information received from an external device. The temperature information detected by the temperature sensor 301 may be input to the temperature flag 24 included in the discharge control circuit 221b.

[0100] For example, while low-level temperature information indicating a normal temperature state is input to the input terminal SEL or the temperature flag 24, the discharge control circuit 221b controls the discharge control transistor TR2 under the second condition A2. In this case, similar to the first embodiment, when the delay circuit 22 detects that the state where the power supply voltage Vdd is lower than Vdet2-2 (<Vdet2-1) continues for the detection delay time tVdet2-2 (<tVdet2-1), the discharge of the secondary battery 210 is interrupted (see FIG. 18). Thereby, since the discharge of the secondary battery 210 is promptly interrupted, the secondary battery 210 can be appropriately protected from over-discharge.

[0101] On the other hand, in Figure 17, the discharge control circuit 221b controls the discharge control transistor TR2 under the first condition A1 while high-level temperature information representing a high-temperature or low-temperature state is input to the input terminal SEL or temperature flag 24. In this case, similar to the first embodiment, the delay circuit 21 cuts off the discharge of the secondary battery 210 if the power supply voltage Vdd remains lower than Vdet2-1 for a detection delay time tVdet2-1 (see Figure 19). This provides adequate protection for the secondary battery 210 from over-discharge.

[0102] Figure 20 is a circuit diagram showing an example of a system including a secondary battery protection integrated circuit according to the fifth embodiment. In the fifth embodiment, a description of the configuration, operation, and effects similar to those of the embodiments described above will be omitted by referring to the above description. The fifth embodiment differs from the first embodiment in that the switch circuit 203 is provided on the high-side power line 201. As a modification of the fifth embodiment, a configuration combining the configurations of the second, third, or fourth embodiment can also be considered.

[0103] The system 505 shown in Figure 20 includes a battery device 405 and electronic equipment 300. The battery device 405 includes a secondary battery 210 and a battery protection device 605. The battery protection device 605 is a component that includes, for example, a circuit board on which at least a protection IC 105 is mounted. Terminal VP has the same function as terminal VM in the first embodiment.

[0104] Figure 21 is an example of a modified diagram of the discharge control circuit. The discharge control circuit 221b of the protection IC has a node NA to which the information of the input terminal SEL or temperature flag 24 is input. Depending on the state of node NA, the discharge control circuit 221b may change the voltage division ratio of the power supply voltage Vdd by resistors R1 and R2 of the detection circuit 222, or the length of the detection delay time tVdet2 generated by the delay circuit 20. Depending on the state of node NA, the discharge control circuit 221b switches the over-discharge detection voltage Vdet2 to a different voltage value by changing the voltage division ratio of the power supply voltage Vdd by resistors R1 and R2 of the detection circuit 222. This makes it possible to miniaturize the circuit that changes the over-discharge detection voltage Vdet2 (=(R1+R2)×(R1 / Vref)).

[0105] As described above, embodiments have been explained, but these embodiments are presented as examples only, and the present invention is not limited by these embodiments. The above embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, and modifications are possible without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.

[0106] For example, the positions of the charge control transistor TR1 and the discharge control transistor TR2 may be interchangeable with each other relative to the positions shown in the figure. The switch circuit 203 may be integrated into the protection IC. [Explanation of Symbols]

[0107] 101,102,103,104,105 Protection IC 201 Power line 202 Ground wire 203 Switch Circuit 210 Secondary battery 211 Positive electrode 212 Negative electrode 221 Control Circuit 222 Detection Circuit 300 Electronic equipment 401, 402, 403, 404, 405 Battery device 501, 502, 503, 504, 505 Systems 601,602,603,604,605 ​​Battery protection device TR1 Charge control transistor TR2 Discharge Control Transistor

Claims

1. A secondary battery protection integrated circuit used for protecting secondary batteries, A power terminal to which the positive electrode of the aforementioned secondary battery can be connected, A grounding terminal to which the negative electrode of the secondary battery can be connected, The system includes a control circuit capable of controlling a discharge interruption circuit that interrupts the discharge of the secondary battery, The aforementioned control circuit is If the power supply voltage between the power supply terminal and the ground terminal is greater than or equal to the first determination voltage which is higher than the second determination voltage, the first operation is performed. If the first condition is met, where the power supply voltage is lower than the first determination voltage for a first time, the discharge cutoff circuit is activated. A secondary battery protection integrated circuit that activates the discharge cutoff circuit when the second condition is met, in which the power supply voltage is lower than the second determination voltage for a second time that is shorter than the first time.

2. It also features an input terminal for receiving information from external devices, The secondary battery protection integrated circuit according to claim 1, wherein the control circuit controls the discharge cutoff circuit under a first condition while it is receiving first information from the external device at the input terminal, and controls the discharge cutoff circuit under a second condition while it is receiving second information different from the first information from the external device at the input terminal.

3. The secondary battery protection integrated circuit according to claim 1, wherein the control circuit operates the discharge cutoff circuit at a time shorter than the second time, a fourth time, after a third time has elapsed since the power supply voltage has fallen to a third determination voltage or lower, which is higher than the first determination voltage.

4. The secondary battery protection integrated circuit according to claim 3, wherein the control circuit operates the discharge cutoff circuit at a fifth time, which is shorter than the first time, if the power supply voltage becomes less than the first determination voltage and greater than or equal to the second determination voltage after the third time has elapsed since the power supply voltage has fallen to or below the third determination voltage.

5. The secondary battery protection integrated circuit according to claim 1, wherein the control circuit operates the discharge cutoff circuit under the second condition when the temperature detected by the temperature sensor is between a first temperature and a second temperature, and operates the discharge cutoff circuit under the first condition when the temperature detected by the temperature sensor is lower than the first temperature or higher than the second temperature.

6. The secondary battery protection integrated circuit according to claim 2, wherein the first information represents that the electronic device receiving power from the secondary battery is in a sleep state, and the second information represents that the electronic device is in an operating state.

7. The secondary battery protection integrated circuit according to claim 2, wherein the first information represents a first SOC state of the secondary battery, and the second information represents a second SOC state in which the SOC of the secondary battery is lower than the first SOC state.

8. The system comprises a secondary battery, a discharge interruption circuit for interrupting the discharge of the secondary battery, and a secondary battery protection integrated circuit for protecting the secondary battery. The aforementioned secondary battery protection integrated circuit is The power terminal to which the positive electrode of the aforementioned secondary battery is connected, The grounding terminal to which the negative electrode of the secondary battery is connected, The system comprises a control circuit for controlling the discharge interruption circuit, The aforementioned control circuit is If the power supply voltage between the power supply terminal and the ground terminal is greater than or equal to the first determination voltage which is higher than the second determination voltage, the first operation is performed. If the first condition is met, where the power supply voltage is lower than the first determination voltage for a first time, the discharge cutoff circuit is activated. A battery device that activates the discharge cutoff circuit if the power supply voltage is lower than the second determination voltage for a second time that is shorter than the first time, thus fulfilling a second condition.

9. The battery device according to claim 8, wherein the secondary battery is a lithium-ion battery using a silicon-based negative electrode.

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