Multilayer electronic components

Abstract

We provide highly reliable stacked electronic components. [Solution] The laminated electronic component includes a capacitance forming section including a dielectric layer 111 and internal electrodes 121 and 122 arranged alternately with the dielectric layer in a first direction D1; a main body 110 including a first surface 1 and a second surface 2 facing each other in the first direction, a third surface 3 and a fourth surface 4 facing each other in a second direction D2, a fifth surface 5 and a sixth surface 6 facing each other in a third direction D3; external electrodes arranged on the third and fourth surfaces, respectively; and side margin sections arranged on the fifth and sixth surfaces, respectively. When the average molar ratio of Cs to Ti (Cs / Ti) measured in the side margin section is C1, and the average molar ratio of Cs to Ti measured in the central part of the capacitance forming section in the first and third directions is C2, C1 > C2 is satisfied.

Description

[Technical Field]

[0001] This invention relates to a stacked electronic component. [Background technology]

[0002] Multi-Layered Ceramic Capacitors (MLCCs), a type of multilayer electronic component, are chip-type capacitors mounted on printed circuit boards of various electronic products such as LCDs (Liquid Crystal Displays) and PDPs (Plasma Display Panels), computers, smartphones, and mobile phones, playing the role of charging or discharging electricity. Due to their advantages of being small yet guaranteeing high capacitance and being easy to mount, MLCCs are used as components in a wide range of electronic devices.

[0003] To miniaturize and increase the capacitance of MLCCs, it is necessary to maximize the effective area of ​​the internal electrodes. Therefore, in order to maximize the widthwise area of ​​the internal electrodes, a method is applied in which a sheet for forming side margins is separately attached to the widthwise cross-section of the laminated chip before firing.

[0004] The adhesive strength between the side margin and the ceramic body, the sintering behavior of the side margin, and the microstructure of the side margin are all factors that significantly affect the reliability of MLCCs. Therefore, research is needed to optimize the design of the components that make up the side margin forming sheet. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Korean Published Patent Gazette No. 10-2015-0135092 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] One of the several objectives of the present invention is to provide a highly reliable stacked electronic component.

[0007] However, the objectives of the present invention are not limited to those described above and can be more easily understood in the process of describing specific embodiments of the present invention. [Means for solving the problem]

[0008] A stacked electronic component according to one embodiment of the present invention includes a capacitance forming portion including a dielectric layer and internal electrodes alternately arranged with the dielectric layer in a first direction; a main body including first and second surfaces facing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and facing each other in a second direction, fifth and sixth surfaces connected to the first, second, third, and fourth surfaces and facing each other in a third direction; external electrodes arranged on the third and fourth surfaces, respectively; and side margins arranged on the fifth and sixth surfaces, respectively. When the average molar ratio of Cs to Ti (Cs / Ti) measured at the side margin is C1, and the average molar ratio of Cs to Ti measured at the central part of the capacitance forming portion in the first and third directions is C2, the condition C1 > C2 can be satisfied. [Effects of the Invention]

[0009] One of the various effects of the present invention is that it can provide a highly reliable stacked electronic component. [Brief explanation of the drawing]

[0010] [Figure 1] This is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. [Figure 2] Figure 1 is a schematic perspective view showing the main body and side margins. [Figure 3] Figure 1 is a schematic perspective view showing the main body. [Figure 4] This is a schematic cross-sectional view showing a section along the line I-I' in Figure 1. [Figure 5] It is a cross-sectional view schematically showing a cross-section along the line II-II' of FIG. 1. [Figure 6] It schematically shows a cross-sectional view excluding internal electrodes in FIG. 5. [Figure 7] It is a graph showing the BDV Weibull distribution of the examples and comparative examples. [Figure 8a] It is a graph showing the evaluation result of the moisture resistance reliability of the example. [Figure 8b] It is a graph showing the evaluation result of the moisture resistance reliability of the comparative example.

Mode for Carrying Out the Invention

[0011] Hereinafter, the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to ordinary technicians. Therefore, the shape and size of elements in the drawings can be exaggerated for a clearer explanation, and elements indicated by the same reference signs in the drawings are the same elements.

[0012] And, in order to clearly explain the present invention in the drawings, parts not related to the explanation are omitted, and the size and thickness of each configuration shown in the drawings are arbitrarily shown for convenience of explanation, so the present invention is not necessarily limited to what is shown in the drawings. For components having the same function within the scope of the same concept, the same reference signs are used for explanation. Furthermore, throughout the specification, when a certain part says that a certain component "includes", this means that other components can be further included, rather than excluding other components, unless otherwise stated.

[0013] In the drawings, the first direction D1 can be defined as the thickness direction or T direction, the second direction D2 can be defined as the length direction or L direction, and the third direction D3 can be defined as the width direction or W direction.

[0014] Multilayer electronic component Figure 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention; Figure 2 is a schematic perspective view of the main body and side margin portion of Figure 1; Figure 3 is a schematic perspective view of the main body of Figure 1; Figure 4 is a schematic cross-sectional view of a section along line I-I' of Figure 1; Figure 5 is a schematic cross-sectional view of a section along line II-II' of Figure 1; and Figure 6 is a schematic cross-sectional view of Figure 5 excluding the internal electrodes.

[0015] Hereinafter, with reference to Figures 1 to 6, a multilayer electronic component 100 according to one embodiment of the present invention will be described in detail. Furthermore, a multilayer ceramic capacitor will be described as an example of a multilayer electronic component, but the present invention is not limited thereto and can be applied to various multilayer electronic components, such as inductors, piezoelectric elements, varistors, or thermistors.

[0016] A stacked electronic component 100 according to one embodiment of the present invention may include a main body 110, external electrodes 131 and 132, and side margin portions 114 and 115.

[0017] There are no particular restrictions on the specific shape of the main body 110, but as shown in the illustration, the main body 110 can be a hexahedron or a similar shape. Due to the shrinkage of the ceramic powder contained in the main body 110 during the firing process and the polishing process on the corners of the main body 110 after firing, the main body 110 may not be a perfectly straight hexahedron, but it can be substantially hexahedron-shaped.

[0018] The main body 110 may have a first surface 1 and a second surface 2 facing each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and facing each other in a second direction, a fifth surface 5 and a sixth surface 6 connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and facing each other in a third direction.

[0019] The main body 110 can include a capacitance forming portion Ac that is disposed inside the main body 110 and includes a dielectric layer 111 and internal electrodes 121 and 122 that are alternately arranged with the dielectric layer 111 in the first direction to form a capacitance. The plurality of dielectric layers 111 forming the main body 110 are in a fired state, and the boundary between adjacent dielectric layers 111 can be integrated so as to be difficult to confirm without using a scanning electron microscope (SEM).

[0020] The dielectric layer 111 can include, for example, a perovskite compound represented by ABO3 as a main component. The perovskite compound represented by ABO3 is, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), or Ba(Ti 1-y Zr y )O3 (0 < y < 1).

[0021] The average thickness td of the dielectric layer 111 is not particularly limited. The average thickness td of the dielectric layer 111 may be, for example, 0.1 μm to 1.0 μm. For example, when the multilayer electronic component 100 has a 0603 size (length: about 0.6 mm, width: about 0.3 mm, thickness: about 0.3 mm), the average thickness td of the dielectric layer 111 may be 0.3 μm to 0.7 μm.

[0022] The internal electrodes 121 and 122 can include a first internal electrode 121 and a second internal electrode 122 that are alternately arranged in the first direction with the dielectric layer 111 interposed therebetween. The first internal electrode 121 and the second internal electrode 122 can be electrically separated from each other by the dielectric layer 111 disposed therebetween.

[0023] The first internal electrode 121 may be exposed on the third surface 3, the fifth surface 5, and the sixth surface 6, and positioned away from the fourth surface 4. The first internal electrode 121 may be connected to the first external electrode 131 on the third surface 3. The second internal electrode 122 may be exposed on the fourth surface 4, the fifth surface 5, and the sixth surface 6, and positioned away from the third surface 3. The second internal electrode 122 may be connected to the second external electrode 132 on the fourth surface 4.

[0024] The metals contained in the internal electrodes 121 and 122 may be one or more of Ni, Cu, Al, Pd, Ag, In, Sn, Ti, and alloys thereof, and more preferably the internal electrodes 121 and 122 may contain Ni, but the present invention is not limited thereto.

[0025] The average thickness te of the internal electrodes 121 and 122 is not particularly limited. The average thickness te of the internal electrodes 121 and 122 may be, for example, 0.1 μm to 1.0 μm. For example, if the multilayer electronic component 100 has a 0603 size (length: approximately 0.6 mm, width: approximately 0.3 mm, thickness: approximately 0.3 mm), the average thickness te of the internal electrodes 121 and 122 may be 0.4 μm to 0.6 μm.

[0026] The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 refer to the average dimensions of the dielectric layer 111 and the internal electrodes 121 and 122 in the first direction, respectively. The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be measured by scanning the cross-sections of the main body 110 in the first and second directions, or the cross-sections of the main body 110 in the first and third directions, with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of the dielectric layer 111 can be measured by taking the average value after measuring the thickness at a number of points on one dielectric layer 111, for example, 30 points that are equally spaced in the second or third direction. Similarly, the average thickness te of one internal electrode 121 or 122 can be measured by taking the average value after measuring the thickness at a number of points on one internal electrode 121 or 122, for example, 30 points that are equally spaced in the second or third direction. The 30 equally spaced points can be specified in the capacitance forming section Ac. On the other hand, if such average values ​​are measured for 10 dielectric layers 111 and 10 internal electrodes 121 and 122, and then the average value is measured, the average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be further generalized.

[0027] The main body 110 may include cover portions 112 and 113, respectively, arranged on both sides of the capacitance forming portion Ac facing the first direction. The cover portions 112 and 113 can essentially serve to prevent damage to the internal electrodes due to physical or chemical stress. The cover portions 112 and 113 may have a configuration similar to the dielectric layer 111, except that they do not include the internal electrodes.

[0028] The average thickness tc of the cover portions 112 and 113 is not particularly limited. The average thickness tc of the cover portions 112 and 113 may be, for example, 5 μm or more and 100 μm or less. For example, when the multilayer electronic component 100 has a 0603 size (length: about 0.6 mm, width: about 0.3 mm, thickness: about 0.3 mm), the average thickness tc of the cover portions 112 and 113 may be 10 μm or more and 30 μm or less. The average thickness tc of the cover portions 112 and 113 means the average thickness of each of the first cover portion 112 and the second cover portion 113.

[0029] The average thickness tc of the cover portions 112 and 113 can mean the average dimension in the first direction of the cover portions 112 and 113, and can be a value obtained by averaging the dimensions in the first direction measured at five equally spaced points in the cross section of the main body 110 in the first and second directions or in the cross section of the main body 110 in the first and third directions.

[0030] The side margin portions 114 and 115 may be respectively disposed on the fifth surface 5 and the sixth surface 6 of the main body 110. The multilayer electronic component 100 can include a first side margin portion 114 disposed on the fifth surface 5 and a second side margin portion 115 disposed on the sixth surface 6. The side margin portions 114 and 115 can mean the regions between the boundaries of the main body 110 and both ends of the internal electrodes 121 and 122 in the cross section of the multilayer electronic component 100 in the first and third directions.

[0031] The side margin portions 114 and 115 can contain, as a main component, a perovskite-type compound represented by ABO3. The perovskite-type compound represented by ABO3 is, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), or Ba(Ti 1-y Zr y )O3 (0 < y < 1).

[0032] The average thickness wm of the side margin portions 114 and 115 is not particularly limited. The average thickness wm of the side margin portions 114 and 115 may be, for example, 3 μm or more and 100 μm or less. For example, if the multilayer electronic component 100 has a 0603 size (length: approximately 0.6 mm, width: approximately 0.3 mm, thickness: approximately 0.3 mm), the average thickness (wm) of the side margin portions 114 and 115 may be 10 μm or more and 20 μm or less. The average thickness wm of the side margin portions 114 and 115 refers to the average thickness of the first side margin portion 114 and the second side margin portion 115, respectively.

[0033] The average thickness wm of the side margins 114 and 115 can represent the average dimension of the side margins 114 and 115 in the third direction, and can be the average value of the dimension in the third direction measured at five equally spaced points in the cross-section of the main body 110 in the first and third directions.

[0034] External electrodes 131 and 132 may be arranged on the third surface 3 and the fourth surface 4 of the main body 110, respectively. The stacked electronic component 100 may include a first external electrode 131 arranged on the third surface 3 and a second external electrode 132 arranged on the fourth surface 4. The first external electrode 131 may be arranged on the third surface 3 and extend over the first surface 1, the second surface 2, the fifth surface 5 and a portion of the sixth surface 6, and the second external electrode 132 may be arranged on the fourth surface 4 and extend over the first surface 1, the second surface 2, the fifth surface 5 and a portion of the sixth surface 6.

[0035] The type and form of the external electrodes 131 and 132 are not particularly limited and may have a multilayer structure. For example, the external electrodes 131 and 132 may include base electrode layers 131a and 132a that come into contact with the internal electrodes 121 and 122, and plating layers 131b and 132b placed on the base electrode layers 131a and 132a.

[0036] The base electrode layers 131a and 132a may be fired electrode layers containing metal and glass. The metal contained in the base electrode layers 131a and 132a may include, for example, Cu, Ni, Sn, Al, Pd, Ag, and / or alloys containing these. The glass contained in the base electrode layers 131a and 132a may include, for example, one or more oxides of Ba, Ca, Zn, Al, B, and Si.

[0037] On the other hand, the base electrode layers 131a and 132a may consist only of a fired electrode layer containing metal and glass, but the present invention is not limited thereto. The base electrode layers 131a and 132a may, for example, include a fired electrode layer containing metal and glass, and a resin electrode layer disposed on the fired electrode layer and containing metal particles and resin.

[0038] The metal contained in the resin electrode layer may include, for example, Cu, Ni, Pd, Ag, Pb, Sn, and / or alloys containing these. The resin contained in the resin electrode layer may include, for example, one or more of epoxy resin, acrylic resin, and ethylcellulose.

[0039] The plating layers 131b and 132b may contain, for example, Ni, Sn, Pd, and / or alloys containing these, and may be formed in multiple layers. The plating layers 131b and 132b may be, for example, a Ni plating layer or a Sn plating layer, and may be in a form in which the Ni plating layer and the Sn plating layer are formed sequentially. Furthermore, the plating layers 131b and 132b may contain multiple Ni plating layers and / or multiple Sn plating layers.

[0040] The drawings illustrate a structure in which the stacked electronic component 100 has two external electrodes 131 and 132, but it is not limited to this, and the number and shape of the external electrodes 131 and 132 can be changed according to the form of the internal electrodes 121 and 122 or other purposes.

[0041] If the composition of the dielectric layer 111 contained in the capacitance-forming portion Ac is the same as the composition of the side margin portions 114 and 115, sintering of the capacitance-forming portion Ac may occur before that of the side margin portions 114 and 115. This is because the capacitance-forming portion Ac contains internal electrodes 121 and 122 that include a conductive metal with a lower sintering start temperature compared to the dielectric material. If a sintering mismatch occurs between the main body 110 and the side margin portions 114 and 115, it may cause a shape defect in the stacked electronic component 100, which may lead to a decrease in connectivity between the internal electrodes 121 and 122 and the external electrodes 131 and 132.

[0042] Therefore, in the stacked electronic component 100 according to one embodiment of the present invention, when C1 is the average molar ratio of Cs to Ti (Cs / Ti) measured at the side margin portions 141 and 142, and C2 is the average molar ratio of Cs to Ti measured at the central portions of the first and third directions of the capacitance forming portion Ac, the condition C1 > C2 can be satisfied.

[0043] Because cesium (Cs) has a low melting point, it can act as a low-temperature sintering aid by forming a liquid phase at low temperatures, thereby lowering the sintering temperature of the dielectric material. In other words, by satisfying C1 > C2, the sintering start temperature of the side margin portions 114 and 115 can be lowered. This reduces the sintering mismatch between the main body 110 and the side margin portions 114 and 115, and prevents the problem of reduced connectivity between the internal and external electrodes due to shape defects in the stacked electronic component 100.

[0044] Furthermore, by satisfying C1 > C2, the multilayer electronic component 100 can suppress grain growth of dielectric crystal grains contained in the side margin portions 114 and 115, thereby improving the sintering density of the side margin portions 114 and 115. This improves the hardness of the side margin portions 114 and 115, and thus improves the mechanical strength of the multilayer electronic component 100.

[0045] The Cs content in the side margin portions 114 and 115 may be, for example, 0.5 moles or more and 2.0 moles or less per 100 moles of Ti.

[0046] In one embodiment, C1 and C2 can satisfy 5 ≤ C1 / C2 ≤ 40. More preferably, C1 and C2 can satisfy 10 ≤ C1 / C2 ≤ 40, or 20 ≤ C1 / C2 ≤ 40, or 20 ≤ C1 / C2 ≤ 30. This can further enhance the improvement effect of the sintering density of the side margin portions 114 and 115 of the present invention. If C1 / C2 exceeds 40, problems may occur such as sintering not progressing or a decrease in the dielectric properties of the multilayer electronic component 100.

[0047] On the other hand, Cs is added to the sheet for forming the side margins, but it is not necessary to add Cs to the sheet for forming the dielectric layer. Adding Cs to the sheet for forming the dielectric layer further lowers the sintering start temperature of the main body 110, which may further increase the sintering mismatch between the main body 110 and the side margins 114 and 115. In other words, the Cs contained in the capacitance forming part Ac may have diffused from the side margin parts 114 and 115, and in particular, Cs can be distributed more abundantly at the boundary of the capacitance forming part Ac adjacent to the side margin parts 114 and 115 than in the side margin parts 114 and 115. For example, if the average molar ratio of Cs to Ti measured at the boundary of the capacitance forming part Ac adjacent to the side margin parts 114 and 115 is C3, then C3 > C1 > C2 can be satisfied. The boundary portion R3 adjacent to the side margin portions 114 and 115 within the volume-forming portion Ac is a region included inside the volume-forming portion Ac, and can be said to mean the region within the volume-forming portion Ac that is adjacent to the boundary with the side margin portions 114 and 115.

[0048] Furthermore, while Cs is added to the sheet for forming the side margins, it is not necessary to add Cs to the sheet for forming the cover. Adding Cs to the sheet for forming the cover may further increase the sintering mismatch between the main body 110 and the side margins 114 and 115. That is, the Cs contained in the cover portions 112 and 113 may have diffused from the side margin portions 114 and 115, and for example, if the average molar ratio of Cs to Ti measured at the center of the cover portions 112 and 113 in the third direction is C4, then C1 > C4 can be satisfied. The above C4 is not particularly limited and may be 0 or greater and less than C1.

[0049] The method for measuring C1 to C4 is not particularly limited. For example, C1 to C4 can be measured from image data observed using SEM-EDS (Scanning Electron Microscope-Energy Dispersive X-ray Spectrometer), TEM-EDS (Transmission Electron Microscope-Energy Dispersive X-ray Spectrometer), STEM-EDS (Scanning Transmission Electron Microscope-Energy Dispersive X-ray Spectrometer), or FE-SEM-EDS (Field Emission-scanning Electron Microscope-Energy Dispersive X-ray Spectrometer).

[0050] More specifically, as shown in Figure 6, the multilayer electronic component 100 is polished to the halfway point in the second direction to expose the cross-sections in the first and third directions. Then, by measuring the content (mol%) of Cs and Ti in the central part R1 of the first direction of the side margin using Point-EDS, the molar ratio of Cs to Ti can be calculated. On the other hand, the molar ratio of Cs to Ti at multiple points, for example, five or more points, in the central part R1 of the first and third directions of the side margin can be measured via FE-SEM-EDS (acceleration voltage: 15kV, magnification: 50,000x), and the above C1 can be measured by averaging these values. The central part R1 of the first direction of the side margin can mean, for example, a region of size 5μm × 4μm (third direction × first direction) based on the middle of the first and third directions of the side margins 114 and 115.

[0051] Similarly, C2 can be measured by measuring the molar ratio of Cs to Ti at multiple points, for example, five or more points, in the central part R2 of the first and third directions of the capacitance forming section via FE-SEM-EDS (acceleration voltage: 15kV, magnification: 50,000x) and averaging these values. The five or more points can be specified by the dielectric layer 111. The central part R2 of the first and third directions of the capacitance forming section can mean, for example, a region of size 5μm × 4μm (third direction × first direction) in the middle of the first and third directions of the capacitance forming section Ac.

[0052] The above C3 can be measured by measuring the molar ratio of Cs to Ti at multiple points, for example, five or more points, at the boundary R3 adjacent to the side margin portion of the capacitance-forming portion via FE-SEM-EDS (acceleration voltage: 15kV, magnification: 50,000x) and averaging these values. The above five or more points can be specified by the dielectric layer 111. The boundary R3 adjacent to the side margin portion of the capacitance-forming portion can mean a region of size 5μm × 4μm (third direction × first direction) that is in contact with the interface with the side margin portion in the middle of the first direction of the capacitance-forming portion Ac.

[0053] Furthermore, C4 can be measured by measuring the molar ratio of Cs to Ti at multiple points, for example, five or more points, in the central part R4 of the cover in the first and third directions, via Point-EDS, and averaging those values.

[0054] On the other hand, similar to Cs, a method of adding Na and / or Li, which have low melting points, to the side margins 114 and 115 as low-temperature sintering aids is also conceivable. However, the Na and Li contained in the side margins 114 and 115 are prone to volatilization during the firing process of the side margins 114 and 115, potentially contaminating the firing furnace, and there is a problem that they are not uniformly distributed in the side margins 114 and 115. In contrast, Cs can be added to the sheet for forming the side margins in a liquid phase, and in this case, the problem of firing furnace contamination can be prevented.

[0055] Therefore, the side margin portions 114 and 115 do not need to contain substantially no Na and Li. In the present invention, "substantially no Na and Li" can mean that Na and Li components are not intentionally added to the side margin portions 114 and 115. However, it is possible that very small amounts of Na and Li components may be present unexpectedly during the manufacturing process of the multilayer electronic component 100. Taking this into consideration, the Na content in the side margin portions 114 and 115 may be 0.001 moles or less per 100 moles of Ti contained in the side margin portions 114 and 115, and the Li content in the side margin portions 114 and 115 may be 0.001 moles or less per 100 moles of Ti contained in the side margin portions 114 and 115.

[0056] On the other hand, the average size of the dielectric crystal grains contained in the capacitance-forming portion Ac and the side margin portions 114 and 115 is not particularly limited. However, the grain growth of the dielectric crystal grains contained in the side margin portions 114 and 115 can be suppressed by Cs. Furthermore, the grain growth of dielectric crystal grains contained in the boundary portion adjacent to the side margin portions 114 and 115 of the capacitance-forming portion Ac, which contains Cs diffused from the side margin portions 114 and 115, can also be suppressed.

[0057] As a result, in one embodiment, when G1 is the average size of dielectric crystal grains contained in the side margin portions 114 and 115, G2 is the average size of dielectric crystal grains contained in the central portions of the capacitance forming portion Ac in the first and third directions, and G3 is the average size of dielectric crystal grains contained in the boundary portion of the capacitance forming portion Ac adjacent to the side margin portions 114 and 115, the condition G2 > G3 > G1 can be satisfied.

[0058] The above G1 can be measured from an image obtained by observing the central part R1 in the first direction of the side margin portion as described above using a scanning electron microscope (SEM), the above G2 can be measured from an image obtained by observing the central part R2 in the first and third directions of the volume-forming portion as described above using a scanning electron microscope (SEM), and the above G3 can be measured from an image obtained by observing the boundary portion R3 adjacent to the side margin portion of the volume-forming portion using a scanning electron microscope (SEM).

[0059] The above G1 to G3 are not particularly limited, but for example, G1 may be 150nm to 250nm, G2 may be 220nm to 320nm, and G3 may be 185nm to 285nm.

[0060] The dielectric layer 111 and the side margin portions 114 and 115 may further contain other different subcomponents.

[0061] For example, the dielectric layer 111 and the side margin portions 114 and 115 may further contain Mg. Similar to Cs, Mg can suppress grain growth of dielectric crystal grains contained in the side margin portions 114 and 115.

[0062] In one embodiment, the average molar ratio of Mg to Ti (Mg / Ti) measured in the side margin portions 114 and 115 may be greater than the average molar ratio of Mg to Ti (Mg / Ti) measured in the central portions of the volume forming portion Ac in the first and third directions. This reduces the sintering mismatch between the main body 110 and the side margin portions 114 and 115, and improves the sintering density of the side margin portions 114 and 115.

[0063] However, Mg is highly reactive with Ni, which is mainly contained in the internal electrodes 121 and 122. Therefore, if Mg is added excessively to the side margin portions 114 and 115, the Mg in the side margin portions 114 and 115 will react with the Ni in the internal electrodes 121 and 122, potentially leading to the excessive formation of a secondary Ni phase at both ends of the internal electrodes 121 and 122 in the third direction. Such a secondary Ni phase may degrade the electrical properties of the multilayer electronic component 100. On the other hand, Cs is less reactive with Ni. Therefore, in one embodiment, the average molar ratio of Cs to Ti (Cs / Ti) measured in the side margin portions 114 and 115 may be greater than the average molar ratio of Mg to Ti (Mg / Ti) measured in the side margin portions 114 and 115. This prevents excessive formation of the Ni secondary phase while reducing the sintering mismatch between the main body 110 and the side margin portions 114 and 115, thereby improving the sintering density of the side margin portions 114 and 115.

[0064] The method for measuring the average molar ratio of Mg to Ti (Mg / Ti) described above may be the same as the method for measuring C1 and C2 described above, except that the Mg content (mol%) is measured instead of Cs. Further explanation of the measurement method will be omitted below.

[0065] For example, the dielectric layer 111 and the side margin portions 114 and 115 may further contain Sn. Similar to Cs, Sn can suppress grain growth of dielectric crystal grains contained in the side margin portions 114 and 115.

[0066] In one embodiment, the average molar ratio of Sn to Ti (Sn / Ti) measured in the side margin portions 114 and 115 may be greater than the average molar ratio of Sn to Ti (Sn / Ti) measured in the central portions of the volume forming portion Ac in the first and third directions. This reduces the sintering mismatch between the main body 110 and the side margin portions 114 and 115, and improves the sintering density of the side margin portions 114 and 115.

[0067] Furthermore, due to the diffusion of Sn, the average molar ratio of Sn to Ti (Sn / Ti) measured at the boundary adjacent to the side margin portions 114 and 115 in the volume-forming portion Ac may be greater than the average molar ratio of Sn to Ti (Sn / Ti) measured in the side margin portions 114 and 115, but the present invention is not limited thereto.

[0068] The Sn content in the side margin portions 114 and 115 may be, for example, 2.0 moles or more and 3.2 moles or less per 100 moles of Ti.

[0069] For example, the dielectric layer 111 and the side margin portions 114 and 115 may further contain one or more of Si and Al. Similar to Cs, Si can suppress grain growth of dielectric crystal grains contained in the side margin portions 114 and 115.

[0070] In one embodiment, the average molar ratio of Si to Ti (Si / Ti) measured in the side margin portions 114 and 115 may be greater than the average molar ratio of Si to Ti (Si / Ti) measured in the central portions of the volume forming portion Ac in the first and third directions. This reduces the sintering mismatch between the main body 110 and the side margin portions 114 and 115, and improves the sintering density of the side margin portions 114 and 115.

[0071] Furthermore, due to Si diffusion, the average molar ratio of Si to Ti (Si / Ti) measured at the boundary adjacent to the side margin portions 114 and 115 within the volume-forming portion Ac may be greater than the average molar ratio of Sn to Ti (Si / Ti) measured in the side margin portions 114 and 115, but the present invention is not limited thereto.

[0072] The Si content in the side margin portions 114 and 115 may be, for example, 1.5 moles or more and 2.5 moles or less per 100 moles of Ti.

[0073] Like silicon, Al is an element that can contribute to low-temperature densification through liquid phase formation during sintering. Furthermore, Al can improve the high-temperature withstand voltage characteristics of the multilayer electronic component 100, act as an acceptor to reduce electron concentration, and thus improve the reliability of the multilayer electronic component 100.

[0074] In one embodiment, the average molar ratio of Al to Ti (Al / Ti) measured in the side margin portions 114 and 115 may be smaller than the average molar ratio of Al to Ti (Al / Ti) measured in the central portions of the volume-forming portion Ac in the first and third directions.

[0075] The Al content in the side margin portions 114 and 115 may be, for example, 35 moles or more and 45 moles or less per 100 moles of Ti.

[0076] The dielectric layer 111 and the side margin portions 114 and 115 may further contain one or more of the rare earth elements Dy, Tb, Y, Sc, La, Nd, Eu, Gd, Ho, Er, Yb, and Lu. These rare earth elements can improve the reliability of the multilayer electronic component 100. The total content of the rare earth elements in the side margin portions 114 and 115 may be, for example, 0.6 moles or more and 3.0 moles or less per 100 moles of Ti.

[0077] The dielectric layer 111 and the side margin portions 114 and 115 can further contain one or more of Mn, V, Cr, Fe, Ni, Co, and Zn. The variable-valence acceptor element can play a role in reducing the firing temperature of the multilayer electronic component 100 and improving the high-temperature withstand voltage characteristics. The total content of the variable-valence acceptor element contained in the side margin portions 114 and 115 may be, for example, 0.2 mol or more and 1.4 mol or less with respect to 100 mol of Ti.

[0078] In order to appropriately control the microstructure of the side margin portions 114 and 115, the side margin portions 114 and 115 may further contain, for example, Mg, Dy, Mn, V, Si, and Al among the aforementioned sub-components.

[0079] Hereinafter, an example of a method for forming the multilayer electronic component 100 will be described.

[0080] First, ceramic powder for forming the dielectric layer 111 is prepared. The ceramic powder can include, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), or Ba(Ti 1-y Zr y )O3 (0 < y < 1). The BaTiO3 powder can be synthesized, for example, by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Examples of the synthesis method of the ceramic powder include a solid-phase method, a sol-gel method, a hydrothermal synthesis method, etc., but the present invention is not limited thereto. Next, after drying and pulverizing the prepared ceramic powder, an organic solvent such as ethanol, a binder such as polyvinyl butyral, and other sub-components are mixed to produce a ceramic slurry, and then the ceramic slurry is applied and dried on a carrier film to provide a sheet for forming a dielectric layer.

[0081] Next, an internal electrode pattern is formed by printing a conductive paste for internal electrodes, containing metal powder, a binder, an organic solvent, etc., to a predetermined thickness on a dielectric layer forming sheet using a screen printing method or gravure printing method.

[0082] Subsequently, the dielectric layer forming sheet with the printed internal electrode pattern is peeled from the carrier film, and then laminated and pressed in a predetermined number of layers to form a ceramic laminate. A predetermined number of cover portion forming sheets, which do not have the internal electrode pattern formed on them, can be laminated on the upper and lower parts of the ceramic laminate in order to form cover portions 112 and 113 after firing. Then, the ceramic laminate is cut to have a predetermined chip size. At this time, the ends of the internal electrode pattern are exposed on both sides of the cut chip facing the third direction.

[0083] Next, the margin-forming sheet can be attached to both sides of the cut chip in the third direction, and then fired to form the main body 110 and the side margin portions 114 and 115. The firing temperature may be, for example, 1000°C or more and 1400°C or less, but the present invention is not limited thereto.

[0084] On the other hand, the margin-forming sheet can be formed in a similar manner to the dielectric layer-forming sheet, but the types and content of the auxiliary components included in the margin-forming sheet may differ from those included in the dielectric layer-forming sheet.

[0085] For example, Cs may be added to the side margin forming sheet along with the BaTiO3 main component, while Cs may not be added to the dielectric layer forming sheet. This makes it possible to satisfy C1 > C2. However, the present invention is not limited thereto, and the dielectric layer forming sheet may contain a smaller amount of Cs than the side margin forming sheet.

[0086] Furthermore, the sheet for forming the side margin may contain, in addition to Cs, rare earth elements such as Mg, Sn, Si, Al, Dy, Tb, Y, Sc, La, Nd, Eu, Gd, Ho, Er, Yb, Lu, and / or valence-variable acceptor elements such as Mn, V, Cr, Fe, Ni, Co, and Zn as minor components.

[0087] The above-mentioned auxiliary components can be added to the side margin forming sheet in the form of oxides and / or carbonates, but the present invention is not limited thereto.

[0088] Next, external electrodes 131 and 132 are formed. The base electrode layers 131a and 132a can be formed by dipping the main body 110, to which the side margins 114 and 115 are attached, into a conductive paste containing metal powder, glass frit, a binder, and an organic solvent, and then firing the conductive paste at a temperature of 500°C to 900°C. If the base electrode layers 131a and 132a have a configuration in which a fired electrode layer and a resin electrode layer are sequentially laminated, the resin electrode layer can be formed by applying a conductive resin composition containing metal powder, resin, a binder, and an organic solvent onto the fired electrode layer and then performing a curing heat treatment at a temperature of 250°C to 550°C.

[0089] The plating layers 131b and 132b can be formed, for example, by electroplating and / or electroless plating.

[0090] (Examples) In the examples, a sheet for forming the side margin was prepared using a dielectric composition that contained 1.0 mole of Cs (calculated as Cs2O) per 100 moles of BaTiO3, 1.0 mole of Mg (calculated as MgO) per 100 moles of BaTiO3, and also contained Dy, Mn, Si, Al, and V. In addition, a sheet for forming the dielectric layer was prepared using a dielectric composition that contained 0.467 moles of Mg (calculated as MgO) per 100 moles of BaTiO3, and also contained other minor components such as Dy, but did not contain Cs.

[0091] An internal electrode pattern was formed by applying a conductive paste containing Ni powder, an organic solvent, and a binder to a predetermined thickness onto a dielectric layer forming sheet, and then laminating and pressing the dielectric layer forming sheet formed on the internal electrode pattern to form a ceramic laminate.

[0092] The ceramic laminate was cut to a predetermined chip size, and side margin forming sheets were attached to both sides of the cut chip facing each other in the third direction. The main body and side margins were then formed by firing under conditions of a hydrogen concentration of 0.56% and a firing temperature of 1180°C.

[0093] Finally, by forming external electrodes on both sides of the main body facing the second direction, a sample chip of 0603 size (length: approximately 0.6 mm, width: approximately 0.3 mm, thickness: approximately 0.3 mm) was created.

[0094] In the comparative example, sample chips were prepared using the same method as in the example, but Cs was not added to the sheet used for forming the side margin.

[0095] The dielectric breakdown voltage (BDV) was evaluated for 60 sample chips each in the examples and comparative examples. The BDV was measured using a Keithley 2400 instrument, applying a DC voltage at a boost rate of 20 V / s, and the voltage value was measured when the leakage current exceeded 20 mA.

[0096] Figure 7 is a graph showing the BDV Weibull distribution for the example and comparative example. Referring to Figure 7, it can be seen that the example has a superior dielectric breakdown voltage (BDV) compared to the comparative example. This is presumably because, in the example, satisfying C1 > C2 suppresses grain growth of dielectric crystal grains contained in the side margin, and the voltage applied to each dielectric crystal grain decreases.

[0097] Next, the humidity resistance reliability of 400 sample chips each for the examples and comparative examples was evaluated. The humidity resistance reliability evaluation was performed for 2 hours in an environment of 85°C, 85% humidity, and 1Vr.

[0098] Figure 8a is a graph showing the evaluation results of the humidity resistance reliability of the example. Figure 8b is a graph showing the evaluation results of the humidity resistance reliability of the comparative example. Referring to Figures 8a and 8b, in the example there were no sample chips with degraded IR, but in the comparative example there were sample chips with degraded IR. This confirms that satisfying C1 > C2 improves the humidity resistance reliability of the multilayer electronic component.

[0099] The present invention is not limited by the embodiments described above or the accompanying drawings, but is limited by the claims provided herein. Therefore, within the scope of the technical idea of ​​the present invention as described in the claims, various forms of substitution, modification, and alteration are possible by persons with ordinary skill in the art, and these also fall within the scope of the present invention.

[0100] Furthermore, the expression "one embodiment" does not mean that each embodiment is the same as another, but is provided to highlight and explain the unique and distinct characteristics of each embodiment. However, the above-presented embodiments do not preclude their realization in combination with the features of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, unless there is a description in the other embodiment that contradicts or is contrary to that matter.

[0101] Furthermore, expressions such as "first," "second," etc., are used to distinguish one component from another, and do not limit the order and / or importance of such components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component. [Explanation of Symbols]

[0102] 100: Stacked Electronic Components 110: Main unit 111: Dielectric layer 112, 113: Cover section 114, 115: Side margin section 121, 122: Internal electrode 131, 132: External electrode 131a, 132a: Base electrode layer 131b, 132b: Plating layer

Claims

1. A capacitance forming portion including a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction; a body including a first and second surface facing each other in the first direction, a third and fourth surface connected to the first and second surfaces and facing each other in a second direction, and a fifth and sixth surface connected to the first, second, third and fourth surfaces and facing each other in a third direction; External electrodes arranged on the third and fourth surfaces, respectively, The fifth and sixth surfaces respectively include side margin portions, A multilayer electronic component that satisfies C1 > C2, where C1 is the average molar ratio of Cs to Ti (Cs / Ti) measured in the side margin portion, and C2 is the average molar ratio of Cs to Ti measured in the central portion of the first and third directions of the capacitance forming portion.

2. The stacked electronic component according to claim 1, wherein C1 and C2 satisfy 5 ≤ C1 / C2 ≤ 40.

3. The stacked electronic component according to claim 1, wherein when the average molar ratio of Cs to Ti measured at the boundary portion of the capacitance forming portion adjacent to the side margin portion is C3, the condition C3 > C1 > C2 is satisfied.

4. The main body includes cover portions arranged on both sides of the volume forming portion facing the first direction, The laminated electronic component according to claim 1, wherein C1 > C4 is satisfied when C4 is the average molar ratio of Cs to Ti measured at the central part of the cover in the third direction.

5. The stacked electronic component according to claim 1, wherein G2 > G3 > G1, where G1 is the average size of dielectric crystal grains included in the side margin portion, G2 is the average size of dielectric crystal grains included in the central portion of the capacitance forming portion in the first and third directions, and G3 is the average size of dielectric crystal grains included in the boundary portion of the capacitance forming portion adjacent to the side margin portion.

6. The stacked electronic component according to claim 1, wherein the side margin portion further comprises Mg.

7. The stacked electronic component according to claim 6, wherein the average molar ratio of Mg to Ti (Mg / Ti) measured in the side margin portion is greater than the average molar ratio of Mg to Ti (Mg / Ti) measured in the central portion of the first and third directions of the capacitance forming portion.

8. The stacked electronic component according to claim 1, wherein the side margin portion further comprises Sn.

9. The stacked electronic component according to claim 8, wherein the average molar ratio of Sn to Ti (Sn / Ti) measured in the side margin portion is greater than the average molar ratio of Sn to Ti (Sn / Ti) measured in the central portion of the first and third directions of the capacitance forming portion.

10. The stacked electronic component according to claim 1, wherein the side margin portion further comprises one or more of Si and Al.

11. The average molar ratio of Si to Ti (Si / Ti) measured in the side margin portion is greater than the average molar ratio of Si to Ti (Si / Ti) measured in the central portions of the first and third directions of the volume forming portion. The stacked electronic component according to claim 10, wherein the average molar ratio of Al to Ti (Al / Ti) measured in the side margin portion is smaller than the average molar ratio of Al to Ti (Al / Ti) measured in the central portion of the first and third directions of the capacitance forming portion.

12. The stacked electronic component according to any one of claims 1 to 11, wherein the side margin portion further comprises one or more of Dy, Tb, Y, Sc, La, Nd, Eu, Gd, Ho, Er, Yb, and Lu.

13. The stacked electronic component according to any one of claims 1 to 11, wherein the side margin portion further comprises one or more of Mn, V, Cr, Fe, Ni, Co, and Zn.

14. The stacked electronic component according to any one of claims 1 to 11, wherein the side margin portion further comprises Mg, Dy, Mn, V, Si, and Al.

15. The stacked electronic component according to any one of claims 1 to 11, wherein the side margin portion substantially does not contain Na and Li.

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