Semiconductor equipment

Abstract

The present invention provides a heat sink that can suppress warping of the insulating substrate and the heat sink while suppressing a decrease in the strength of the heat sink. [Solution] The semiconductor device according to the present disclosure comprises an insulating substrate, a semiconductor element bonded to one side of the insulating substrate, and a heat sink bonded to the other side of the insulating substrate, wherein a groove is provided on the other side of the heat sink opposite to the one side which is the insulating substrate side, and the groove is not formed on the portion of the other side of the heat sink located on either side or one side in the longitudinal direction of the groove.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device.

Background Art

[0002] As an example of a semiconductor device, there is a power module. The power module is formed by a semiconductor chip, an insulating substrate, a base plate, wires, terminals, solder for connecting them, and the like. For example, in Japanese Patent Application Laid-Open No. 2016-096188 (Patent Document 1), a groove is linearly formed along the short side direction at the central portion in the longitudinal direction of the heat sink of the insulating substrate, so that the warpage of the insulating substrate can be adjusted and it can be made flat or within a slight warpage amount within a predetermined range.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Since the prior art has a linear groove formed along the short side direction at the central portion in the longitudinal direction of the heat sink, it acts to suppress the warpage of the insulating substrate, but there is a concern about a decrease in the strength of the heat sink.

[0005] This disclosure has been made to solve the above problems, and an object thereof is to provide a heat sink that can suppress the warpage of the insulating substrate and the heat sink while suppressing a decrease in the strength of the heat sink.

Means for Solving the Problems

[0006] The semiconductor device according to this disclosure is an insulating substrate, a semiconductor element joined to one surface of the insulating substrate, The insulating substrate comprises a heat sink bonded to the other side surface of the insulating substrate, A semiconductor device wherein a groove is provided on the other side of the heat sink opposite to the one side of the heat sink that is the side facing the insulating substrate, and the groove is not formed on the portion of the other side of the heat sink located on either side or one side of the groove in the longitudinal direction of the groove. [Effects of the Invention]

[0007] By leaving the edges unprocessed while machining the grooves on the heat sink, it becomes possible to optimize warping while simultaneously ensuring the strength of the heat sink. Furthermore, because the strength of the heat sink can be maintained, it becomes possible to make the heat sink itself thinner, thus achieving cost reduction. [Brief explanation of the drawing]

[0008] [Figure 1] This is a cross-sectional view of the semiconductor device according to Embodiment 1. [Figure 2] This is a perspective view of a heat sink in a semiconductor device according to Embodiment 1. [Figure 3] This is a bottom view of the heat sink in the semiconductor device according to Embodiment 1. [Figure 4] This is a cross-sectional view of a heat sink in a semiconductor device according to Embodiment 1. [Figure 5] This is a cross-sectional view of a semiconductor device according to a modified example of Embodiment 1. [Figure 6] This is a cross-sectional view of a semiconductor device according to a modified example of Embodiment 1. [Figure 7] This is a bottom view of a heat sink in a semiconductor device according to a modified example of Embodiment 1. [Modes for carrying out the invention]

[0009] 1. Embodiment 1 A semiconductor device 1 according to Embodiment 1 will be described with reference to the drawings. Figure 1 is a cross-sectional view of the semiconductor device 1 according to Embodiment 1. Figure 2 is a perspective view of the heat sink 3 in the semiconductor device 1 according to Embodiment 1. Figure 3 is a cross-sectional view of the heat sink 3 in the semiconductor device 1 according to Embodiment 1.

[0010] 1-1. Configuration of Semiconductor Device 1 The semiconductor device 1 comprises an insulating substrate 2, a semiconductor element 9 bonded to one side of the insulating substrate 2, and a heat sink 3 bonded to the other side of the insulating substrate 2. In this embodiment, two sets of bonded insulating substrates 2 and semiconductor elements 9 are provided. Note that one set of bonded insulating substrates 2 and semiconductor elements 9 may be provided, or three or more sets may be provided.

[0011] <Insulating substrate> As described above, the insulating substrate 2 of this embodiment is composed of a circuit board 5 and an insulating substrate 2. The insulating substrate 2 is stacked in the order of circuit board 5, insulating substrate 6, and circuit board 7, with insulating substrate 6 sandwiched between the two circuit boards. The circuit boards are mainly made of copper and have circuit patterns formed on them. The insulating substrate 6 is made of an insulating ceramic material such as alumina. By sandwiching an insulator between the two types of circuit boards, the electrical circuits formed by the two types of circuit boards do not interfere with each other, preventing short circuits and electrical problems. With this configuration, it is possible for the two types of circuit boards to form different circuit patterns.

[0012] Bonding material is provided on both sides of the insulating substrate 2 (in this example, one side of one circuit board 5 and the other side of the other circuit board 5). Solder is mainly used as the bonding material, but a sintered material using a metal paste such as silver paste may also be used. A semiconductor element 9 or a capacitor chip is attached to one side of the insulating substrate 2 where the bonding material 8 is provided, and a heat sink 3 is attached to the other side where the bonding material 4 is provided.

[0013] In this embodiment, multiple insulating substrates 2 are connected to each other via bonding wires 13. For example, as shown in Figure 1, the ends of the bonding wires 13 are attached to one side of each insulating substrate 2 so as to be connected to the circuit board 5.

[0014] <Semiconductor elements> The semiconductor element 9 is joined to one side surface of the insulating substrate 2. The other side surface of the semiconductor element 9 in the present embodiment is attached via a bonding material 8 to one side surface of the above-described insulating substrate 2.

[0015] One end of a bonding wire 13 is joined to one side surface of the semiconductor element 9. The other end of the bonding wire 13 is joined to an external terminal 12. The semiconductor element 9 is electrically connected to the outside by the bonding wire 13.

[0016] In the semiconductor element 9 of the present embodiment, an IGBT is used. The IGBT is used for high-voltage and high-current switching and is utilized in motor control and inverter circuits and the like. The type of the semiconductor element 9 may be not only an IGBT but also types such as a MOSFET.

[0017] <Other configurations of the semiconductor device> The semiconductor device 1 of the present embodiment is surrounded by a resin case 11. The resin case 11 has a rectangular parallelepiped box shape. It has a structure capable of housing the insulating substrate 2 and the semiconductor element 9 inside, and even if a liquid encapsulant 14 or the like is poured into the resin case 11, it does not flow out to the outside. The material of the resin case 11 is formed of a resin such as PPS (polyphenylene sulfide). Other resins may be used instead of PPS (polyphenylene sulfide).

[0018] As described above, one end of a bonding wire 13 is attached to a part of one side surface of the semiconductor element 9. The other end of the bonding wire 13 is connected to one end of an external terminal 12. The external terminal 12 extends along the inner surface of the resin case 11, and the other end of the external terminal 12 is exposed to the outside from the resin case 11 and the encapsulant 14. The external terminal 12 exposed to the outside can be connected to other components by contacting the other components.

[0019] The semiconductor element 9, insulating substrate 2, and bonding wire 13 are enclosed by a resin case 11 and a heat sink 3. The inside of the resin case 11 and heat sink 3 is filled with a sealing material 14, which protects the semiconductor element 9, insulating substrate 2, etc.

[0020] <Heat sink> One side of the heat sink 3, which faces the insulating substrate 2, is joined to the other side of the insulating substrate 2. In this embodiment, one side of the heat sink 3 is joined to the other side of the insulating substrate 2 via a bonding material 4. The heat sink 3 is formed in the shape of a rectangular plate (in this example, a rectangular plate). The heat sink 3 closes the other side opening of the resin case 11. The outer periphery of one side of the heat sink 3 is joined to the resin case 11 by adhesive 10. The material of the heat sink 3 is a metal with good thermal conductivity, such as copper or aluminum. Heat is dissipated from the other side of the heat sink 3. The other side of the heat sink 3 may be cooled by a cooling mechanism using a coolant such as air or a coolant liquid.

[0021] <Grooves on the heat sink> When the semiconductor device 1 is assembled, it is preferable that the insulating substrate 2 is flat or has a slight warp that is convex toward the semiconductor element 9 side. As described above, the insulating substrate 2 and the heat sink 3, which are composed of the circuit board 5 and the insulating plate 6, are sequentially stacked and joined by solder. Due to the difference between the coefficient of thermal expansion of the manufactured insulating substrate 2 and the coefficient of thermal expansion of the heat sink 3, the insulating substrate may not have the desired shape of warp. For example, when the semiconductor device 1 is assembled, a "reverse warp" may occur, which is a warp that is concave toward the semiconductor element 9 side, or as a result of the above-mentioned warp, cracks may occur in the heat sink 3 or the insulating substrate 2.

[0022] In this embodiment, a groove 3a is provided on the other side of the heat sink 3 opposite to the side facing the insulating substrate 2, and the groove 3a is not formed on the portion of the other side of the heat sink 3 located on either side or one side (both sides in this example) of the groove 3a in the longitudinal direction Z of the groove 3a. This configuration makes it possible to suppress warping while ensuring the strength of the heat sink 3. Furthermore, because the strength of the heat sink 3 can be maintained, it becomes possible to make the heat sink 3 itself thinner, thus enabling cost reduction.

[0023] In this embodiment, groove 3a is not formed on the other side of the heat sink 3 located on both sides of the groove 3a in the longitudinal direction Z. This configuration makes it possible to prevent differences in distortion in the longitudinal direction when distortion occurs in the heat sink 3. It also reduces differences in strength on both sides in the longitudinal direction.

[0024] In this embodiment, the groove 3a is positioned towards the center of the heat sink 3 in the longitudinal direction Z of the groove. Because the groove 3a is located in the center in the longitudinal direction Y, the widths 3b on both sides of the groove 3a are equal. This reduces the influence of linear expansion of other components and prevents differences in distortion in the longitudinal direction when distortion occurs in the heat sink 3.

[0025] In this embodiment, the groove 3a is positioned on the opposite side of the heat sink 3 from the non-jointed area 20 on one side of the heat sink 3 where the insulating substrate 2 is not joined. With this configuration, by providing the groove 3a in the non-jointed area 20, it is possible to suppress the groove 3a from directly affecting the jointed area where the insulating substrate 2 is joined, and to optimize the warping of the jointed area between the insulating substrate 2 and the heat sink 3.

[0026] As shown in Figure 3, multiple sets of insulating substrates 2 and semiconductor elements 9 are provided at intervals, and a groove 3a is placed on the surface opposite to the sandwiched non-joint region 21, which is a non-joint region sandwiched between two adjacent sets of insulating substrates 2 and semiconductor elements 9. A groove 3a is not formed on the surface opposite to the non-sandwiched non-joint region 22, which is a non-joint region located on either side or one side of the groove 3a in the longitudinal direction Z relative to the sandwiched non-joint region 21. With this configuration, by providing a groove 3a in the sandwiched non-joint region 21 between two adjacent sets, the distortion of the joint region of the heat sink 3 corresponding to one set of insulating substrates 2 and semiconductor elements 9 can be suppressed from affecting the joint region of the heat sink 3 corresponding to the other set of insulating substrates 2 and semiconductor elements 9, and the warping of the joint region of each set of insulating substrates 2 and heat sink 3 can be optimized. Furthermore, by not providing grooves 3a in the non-clamping, non-jointed region 22 that is not sandwiched between two adjacent sets, it is possible to reduce the influence on the warping of the joint region of each set of insulating substrate 2 and heat sink 3 while suppressing a decrease in the strength of the heat sink 3.

[0027] Furthermore, if three or more sets of insulating substrates 2 and semiconductor elements 9 are provided, it is sufficient that grooves 3a are placed in the sandwiched non-bonding regions 21 of two adjacent sets of insulating substrates 2 and semiconductor elements 9, and that grooves 3a are not formed in the non-sandwiched non-bonding regions 22 that are not sandwiched between either of the two adjacent sets of insulating substrates 2 and semiconductor elements 9.

[0028] In this embodiment, the groove 3a has a depth D of 0.1 mm or more and a width W of 0.1 mm or more and a width W of 1 / 2 or less of the thickness of the heat sink 3. This configuration makes it possible to reduce warping due to thermal expansion and to suppress extreme strength reduction and heat transfer efficiency reduction of the heat sink 3.

[0029] In this embodiment, the heat sink 3 is formed in a rectangular plate shape, the length direction Z of the groove 3a is parallel to the short side direction X of the heat sink 3, and the groove 3a is provided in the center of the longitudinal direction Y of the heat sink 3. With this configuration, it is possible to prevent differences in distortion in the longitudinal direction Y when distortion occurs in the heat sink 3.

[0030] Furthermore, the heat sink 3 may be formed in a shape other than a rectangular plate, for example, a square plate, a shape made up of combined rectangles, or a shape with rounded corners. Also, the length direction Z of the groove 3a may be oriented in an appropriate direction according to the shape of the heat sink 3 and the arrangement of the insulating substrate 2.

[0031] In a modified version of this embodiment 1, the cross-sectional shape of the groove 3a of the heat sink 3 is V-shaped, as shown in Figure 5, or U-shaped, as shown in Figure 6. This configuration minimizes the impact on the strength and heat transfer efficiency of the heat sink 3.

[0032] In a modified version of this embodiment 1, two or more grooves 3a are provided in the heat sink 3, as shown in Figure 7. This configuration reduces the risk of cracks occurring due to warping that occurs during the manufacturing process of the semiconductor device 1. [Explanation of symbols]

[0033] 1 Semiconductor device, 2 Insulating substrate, 3 Heat sink, 3a Groove, 3b Width, 4 Bonding material, 5 Circuit board, 6 Insulating board, 7 Circuit board, 8 Bonding material, 9 Semiconductor element, 10 Adhesive, 11 Resin case, 12 External terminals, 13 Bonding wire, 14 Encapsulating material, 20 Non-bonded area, 21 Clamped non-bonded area, 22 Non-clamped non-bonded area

Claims

1. Insulating substrate and A semiconductor element bonded to one side of the insulating substrate, The insulating substrate comprises a heat sink bonded to the other side surface of the insulating substrate, A semiconductor device wherein a groove is provided on the other side of the heat sink opposite to the side of the heat sink that is joined to the insulating substrate, and the groove is not formed on the portion of the other side of the heat sink located on either side or one side in the longitudinal direction of the groove.

2. The semiconductor device according to claim 1, wherein the groove is arranged in the region of the other side of the heat sink that is opposite to the non-bonded region on one side of the heat sink where the insulating substrate is not bonded.

3. The semiconductor device according to claim 2, wherein multiple sets of the insulating substrate and semiconductor element are provided at intervals, the groove is located on the other side of the surface opposite to the sandwiched non-bonded region, which is the non-bonded region sandwiched between two adjacent sets of the insulating substrate and semiconductor element, and the groove is not formed on the other side of the surface opposite to the non-bonded region, which is the non-sandwiched non-bonded region, located on either side or one side of the groove in the longitudinal direction relative to the sandwiched non-bonded region.

4. The semiconductor device according to any one of claims 1 to 3, wherein the groove has a depth of 0.1 mm or more and a width of 0.1 mm or more and a width of 1 / 4 or less of the thickness of the heat sink.

5. The semiconductor device according to any one of claims 1 to 3, wherein the groove is not formed on the other side surface of the heat sink located on both sides of the groove in the longitudinal direction with respect to the groove.

6. The semiconductor device according to any one of claims 1 to 3, wherein the heat sink is formed in the shape of a rectangular plate, the length direction of the groove is parallel to the short side direction of the heat sink, and the groove is provided in the center of the longitudinal direction of the heat sink.

7. The semiconductor device according to any one of claims 1 to 3, wherein the groove is provided closer to the center of the heat sink in the longitudinal direction of the groove.

8. The semiconductor device according to any one of claims 1 to 3, wherein the cross-sectional shape of the groove is U-shaped or V-shaped.

9. The semiconductor device according to any one of claims 1 to 3, wherein two or more grooves are provided.

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