Component mounting board and method for manufacturing the same
The substrate design addresses void formation in small-diameter vias by using a metal film-covered via structure and solder filling to reduce resistance and improve heat dissipation, ensuring reliable electronic component mounting.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- TDK CORP
- Filing Date
- 2024-10-25
- Publication Date
- 2026-05-13
AI Technical Summary
Existing methods face challenges in completely embedding small-diameter vias with conductive paste, leading to voids and high resistance, which decreases the reliability of the product due to gas entrapment during heat treatment.
A component mounting substrate design with a circuit board structure that includes a metal film-covered via inner wall, allowing solder to be supplied and melted to fill the via without blocking the cavity, ensuring integral connection of terminal electrodes and conductor patterns, thereby reducing resistance and void formation.
The solution provides a highly reliable substrate with low-resistance via conductors and improved heat dissipation, eliminating voids and enhancing the integration and reliability of electronic components.
Smart Images

Figure 2026077237000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a component mounting substrate and a method for manufacturing the same, and more particularly, to a component mounting substrate having a configuration in which electronic components are surface-mounted on a mounting surface of a circuit board and a method for manufacturing the same.
Background Art
[0002] Patent Document 1 discloses a method for manufacturing a component mounting substrate by embedding a conductive paste inside a via so as to be exposed from the surface of the substrate and then mounting an electronic component on the substrate so as to contact the conductive paste.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] However, in the method of Patent Document 1, when the via has a small diameter, it is difficult to completely embed the via with the conductive paste, and there is a problem that voids are likely to occur inside the via. Further, even when the via can be completely embedded with the conductive paste, the gas generated by the subsequent heat treatment remains inside the via, and as a result, voids occur. When such voids occur, there are problems that the via conductor has a high resistance and the reliability of the product decreases.
[0005] In the present disclosure, a highly reliable component mounting substrate having a low-resistance via conductor and a method for manufacturing the same are described.
Means for Solving the Problems
[0006] A component mounting substrate according to one aspect of the present disclosure comprises a circuit board having a mounting surface, electronic components mounted on the mounting surface of the circuit board, and solder connecting the circuit board and the electronic components, wherein the circuit board includes an insulating layer having a mounting surface and a surface located opposite the mounting surface, a pad electrode pattern provided on the mounting surface, a conductor pattern provided on the surface so as to overlap with the pad electrode pattern, vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer, and a metal film covering the inner wall of the vias, the electronic components having terminal electrodes, and the solder includes a first portion located outside the via and connected to the terminal electrodes, and a second portion located inside the via in a region surrounded by the metal film, the first portion and the second portion being integral.
[0007] A method for manufacturing a component mounting substrate according to one aspect of the present disclosure comprises: a first step of preparing a circuit board that includes an insulating layer having a mounting surface and a surface located opposite the mounting surface, a pad electrode pattern provided on the mounting surface, a conductor pattern provided on the surface so as to overlap with the pad electrode pattern, vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer, and a metal film covering the inner wall of the vias, wherein the inside of the vias surrounded by the metal film is hollow; a second step of supplying solder to the pad electrode pattern so as not to block the hollow; a third step of mounting electronic components having terminal electrodes on the circuit board so as to contact the solder; and a fourth step of filling the hollow with solder by melting the solder. [Effects of the Invention]
[0008] Thus, this disclosure provides a highly reliable component mounting substrate having low-resistance via conductors and a method for manufacturing the same. [Brief explanation of the drawing]
[0009] [Figure 1] Figure 1 is a schematic cross-sectional view illustrating the configuration of a component mounting substrate 100 according to one embodiment of the technology described herein. [Figure 2] Figure 2 is a schematic top view of the component mounting board 100. [Figure 3]Figure 3 is a schematic cross-sectional view illustrating the configuration of a component mounting board 100A in a modified form. [Figure 4] Figure 4 is a schematic top view illustrating the manufacturing method of the component mounting substrate 100. [Figure 5] Figure 5 is a schematic cross-sectional view illustrating the manufacturing method of the component mounting substrate 100. [Figure 6] Figures 6(a) to 6(d) are schematic diagrams illustrating some examples of the positional relationship between the paste-like solder 30A and vias 160 supplied onto the pad electrode pattern 141. [Figure 7] Figures 7(a) to 7(f) are schematic diagrams illustrating some examples of the relationship between the electronic component 20, the pad electrode patterns 141, 142 and via 160, and the supply location of the paste-like solder 30A. [Modes for carrying out the invention]
[0010] The embodiments of the technology described herein will be described in detail below with reference to the attached drawings.
[0011] Figure 1 is a schematic cross-sectional view illustrating the configuration of a component mounting substrate 100 according to one embodiment of the technology described herein. Figure 2 is a schematic top view of the component mounting substrate 100.
[0012] As shown in Figures 1 and 2, the component mounting board 100 according to this embodiment comprises a circuit board 10, electronic components 20 mounted on the circuit board 10, and solder 30 and 40 connecting the circuit board 10 and the electronic components 20. The electronic components 20 may be active components such as semiconductor devices, passive components such as inductors and capacitors, or LC composite components such as filters. In the example shown in Figures 1 and 2, the electronic component 20 is a two-terminal electronic component having a body part 21 and terminal electrodes 22 and 23, but the number of terminal electrodes provided on the electronic component 20 is not particularly limited.
[0013] The circuit board 10 may be a multilayer board having a structure in which multiple insulating layers are stacked. In the example shown in Figure 1, the circuit board 10 has a three-layer structure consisting of insulating layers 11 to 13. Insulating layer 11 may be made of a resin material that does not contain a core material such as glass cloth. Insulating layers 12 and 13 may be made of a resin material that contains a core material such as glass cloth. In the example shown in Figure 1, an IC chip 14 is embedded in insulating layer 11. In other words, the circuit board 10 is an IC chip-embedded board. It is not essential that the circuit board 10 is an IC chip-embedded board.
[0014] The circuit board 10 has four wiring layers. The lowest wiring layer L1 is located on the outer surface 13a of the insulating layer 13. The wiring layer L2 is located between the insulating layer 11 and the insulating layer 13. That is, the wiring layer L2 is located between the inner surface 11a of the insulating layer 11 and the inner surface 13b of the insulating layer 13. The wiring layer L3 is located between the insulating layer 11 and the insulating layer 12. That is, the wiring layer L3 is located between the inner surface 11b of the insulating layer 11 and the inner surface 12b of the insulating layer 12. The uppermost wiring layer L4 is located on the outer surface 12a of the insulating layer 12. The outer surface 12a of the insulating layer 12 constitutes the mounting surface 10A of the circuit board 10.
[0015] Wiring layer L1 includes conductor patterns 111 and 112. Wiring layer L2 includes conductor patterns 121 and 122. Wiring layer L3 includes conductor pattern 131. Wiring layer L4 includes pad electrode patterns 141 and 142 and conductor patterns 143 and 144. Conductor patterns 111 and 121 are connected via a plurality of via conductors 151 that penetrate the insulating layer 13. Conductor patterns 112 and 122 are connected via a large-diameter via conductor 152 that penetrates the insulating layer 13. Conductor pattern 122 is connected to the terminal electrode 14a of the IC chip 14 via a large-diameter via conductor 153 provided in the insulating layer 11. Conductor patterns 131 and 143 are connected via a via conductor 154 that penetrates the insulating layer 12.
[0016] The pad electrode pattern 141 overlaps with the conductor pattern 121 in a plan view. A via 160 is provided between the pad electrode pattern 141 and the conductor pattern 121, penetrating the insulating layers 11 and 12. In the example shown in Figure 1, the via 160 penetrates two insulating layers 11 and 12, but it may also penetrate a single insulating layer, or three or more insulating layers. In the example shown in Figure 1, the cross-section of the via 160 is tapered, but the cross-section of the via 160 may be nearly vertical. The inner wall of the via 160 is covered with a metal film 170. The metal film 170 may be integrated with the pad electrode pattern 141 and the conductor pattern 121.
[0017] The solder 30 includes a first portion 31 located outside the via 160 and connected to the terminal electrode 22 of the electronic component 20 mounted on the mounting surface 10A, and a second portion 32 located inside the via 160 in a region surrounded by the metal film 170. The first portion 31 of the solder 30 includes a portion sandwiched between the terminal electrode 22 and the pad electrode pattern 141, and a fillet portion covering the side of the terminal electrode 22. The first portion 31 and the second portion 32 of the solder 30 are integral. As a result, the terminal electrode 22 of the electronic component 20 is connected to the pad electrode pattern 141 via the solder 30, and also to the conductor pattern 121 via the solder 30 and the metal film 170.
[0018] In the example shown in FIG. 2, a part of the terminal electrode 22 overlaps with the via 160. That is, the via 160 includes a first region 161 that overlaps with the terminal electrode 22 in a plan view and a second region 162 that does not overlap with the terminal electrode 22 in a plan view. In the example shown in FIG. 2, the area of the second region 162 is larger than that of the first region 161 in a plan view. Thus, by using the layout in which the first region 161 of the terminal electrode 22 and the via 160 overlap, not only the electrical resistance between the terminal electrode 22 and the conductor pattern 121 is reduced, but also the heat generated by the electronic component 20 is efficiently radiated to the outside through the solder 30 and the metal film 170. Moreover, since the first region 161 of the via 160 is used as the mounting region of the electronic component 20, it is also possible to increase the degree of integration on the mounting surface 10A.
[0019] However, the point that a part of the terminal electrode 22 and a part of the via 160 overlap in a plan view is not essential, and they may not overlap in a plan view, like the component mounting substrate 100A according to the modified example shown in FIG. 3.
[0020] Next, a method for manufacturing the component mounting substrate 100 according to the present embodiment will be described.
[0021] First, the circuit board 10 shown in FIG. 1 is prepared. At this time, the region surrounded by the metal film 170 covering the inner wall of the via 160 is still a cavity. In this state, as shown in FIG. 4 which is a schematic cross-sectional view and FIG. 5 which is a schematic plan view, the paste-like solders 30A and 40A are supplied to the pad electrode patterns 141 and 142, respectively. In the examples shown in FIGS. 4 and 5, the solder 30A supplied to the pad electrode pattern 141 is supplied in two portions. Each of the two portions of the solder 30A supplied is partially supplied onto the pad electrode pattern 141, and the remaining portions are supplied so as to enter the cavity inside the via 160. However, at this time, the cavity inside the via 160 is not completely blocked, and the solder 30A is supplied so that a space open to the outside remains.
[0022] Next, the electronic component 20 is mounted on the mounting surface 10A of the circuit board 10 such that terminal electrode 22 is in contact with solder 30A and terminal electrode 23 is in contact with solder 40A. Then, by heating, the paste-like solders 30A and 40A are melted. As a result, solder 30A flows into the via 160 along the metal film 170, which has high wettability to solder, and the inside of the via 160 is filled with the flowing solder 30, as shown in Figure 1. Consequently, the solder 30 becomes a single unit with a first portion 31 located outside the via 160 and connected to terminal electrode 22, and a second portion 32 located inside the via 160.
[0023] Thus, in this embodiment, since paste-like solder 30A is supplied and then heated to flow the solder 30A so as not to block the cavity inside the via 160, voids are less likely to remain inside the via 160. Moreover, since the flowed solder 30 comes into contact with the terminal electrode 22 and is embedded inside the via 160, the process of embedding the via 160 with conductive paste or the like beforehand becomes unnecessary.
[0024] In the method described using Figures 4 and 5, solder 30A is supplied to two locations for one pad electrode pattern 141, but this is not essential, and it may be supplied to one location. However, in order to supply a sufficient amount of solder so as not to block the cavity inside the via 160, it is advantageous to supply the solder 30A in multiple locations. Also, in the method described using Figures 4 and 5, some of the solder 30A is supplied so as to enter the cavity of the via 160, but this is not essential, and it may be supplied so as not to enter the cavity of the via 160. Even in this case, due to the wettability of the pad electrode pattern 141 and the metal film 170, the flowing solder 30 flows into the cavity of the via 160, and the structure shown in Figure 1 can be obtained.
[0025] The following describes some examples of the positional relationship between the paste-like solder 30A supplied on the pad electrode pattern 141 and the vias 160.
[0026] In the example shown in Figure 6(a), two vias 160 are assigned to one pad electrode pattern 141, and paste-like solder 30A is supplied between the two vias 160 so as to overlap with a portion of each via 160. This makes it easier for the solder 30, which has flowed due to heating, to enter the two vias 160. In addition, although a portion of the paste-like solder 30A is located outside the pad electrode pattern 141, the outside of the pad electrode pattern 141 is covered with solder resist, which has low wettability to solder. Therefore, when the solder 30 flows due to heating, the solder 30 aggregates on the pad electrode pattern 141 due to surface tension.
[0027] In the example shown in Figure 6(b), two vias 160 are assigned to one pad electrode pattern 141, and paste-like solder 30A is supplied to two locations so as not to overlap with the vias 160. By supplying paste-like solder 30A to two locations so as to sandwich the vias 160 in a plan view, it becomes possible to supply more solder.
[0028] In the example shown in Figure 6(c), two vias 160 are assigned to one pad electrode pattern 141, and paste-like solder 30A is supplied offset in a direction perpendicular to the arrangement direction of the two vias 160 so that a portion of it overlaps with the vias 160. In the example shown in Figure 6(c), the planar shape of the vias 160 is approximately rectangular. By making the planar shape of the vias 160 approximately rectangular, the volume of the vias 160 is increased, which further reduces the electrical resistance between the terminal electrode 22 and the conductor pattern 121, and also makes it possible to more efficiently dissipate the heat generated by the electronic component 20 to the outside.
[0029] The example shown in Figure 6(d) differs from the example shown in Figure 6(b) in that paste-like solder 30A is also supplied inside via 160. However, the paste-like solder 30A supplied inside via 160 does not completely block the inside of via 160 in its paste state, and its volume is smaller than the internal cavity of via 160. Thus, it is acceptable to additionally supply paste-like solder 30A inside via 160.
[0030] Next, we will describe some examples of the relationship between the electronic component 20, the pad electrode patterns 141, 142 and via 160, and the supply location of the paste-like solder 30A.
[0031] In the example shown in Figure 7(a), five circular vias 160 are assigned to each of the pad electrode patterns 141 and 142. The five vias 160 are arranged in one direction and are offset outward from the electronic component 20 so as not to overlap with the electronic component 20. Paste-like solder 30A and 40A are supplied to the pad electrode patterns 141 and 142 having this structure at the positions indicated by the dashed lines in Figure 7(a). In the example shown in Figure 7(a), the solder 30A and 40A are supplied so as not to overlap with the vias 160. Also, the application width of the solder 30A and 40A is slightly wider than the width of the electronic component 20, so that a portion of the solder 30A and 40A is applied at a position that does not overlap with the electronic component 20. Then, after the electronic component 20 is mounted at the position indicated by the dashed line in Figure 7(a) and heated, the flowing solder 30 and 40 flow into the vias 160. In the example shown in Figure 7(a), the electronic component 20 and the via 160 do not overlap.
[0032] In the example shown in Figure 7(b), seven circular vias 160 are assigned to each of the pad electrode patterns 141 and 142. Of these, five vias 160 are positioned in the same locations as shown in Figure 7(a), and the remaining two are positioned inside the vias at both ends of the five vias 160 so as to overlap with the edges of the electronic component 20. Paste-like solder 30A and 40A are supplied to the pad electrode patterns 141 and 142 having this structure at the positions indicated by the dashed lines in Figure 7(b). In the example shown in Figure 7(b), the solder 30A and 40A are supplied so as not to overlap with the vias 160. Parts of the solder 30A and 40A are located outside the pad electrode patterns 141 and 142, respectively. Then, after mounting the electronic component 20 at the positions indicated by the dashed lines in Figure 7(b), heating causes the flowing solder 30 and 40 to flow into the vias 160. In the example shown in Figure 7(b), some of the vias 160 overlap with the electronic component 20.
[0033] In the example shown in Figure 7(c), the position of via 160 is the same as in the example shown in Figure 7(b), but paste-like solder 30A and 40A are supplied so that a portion of it enters the interior of via 160. Then, after mounting the electronic component 20 at the position indicated by the dashed line in Figure 7(c), heating causes the flowing solder 30 and 40 to flow into via 160. In the example shown in Figure 7(c), some of the vias 160 overlap with the electronic component 20.
[0034] In the example shown in Figure 7(d), three roughly rectangular vias 160 are assigned to each of the pad electrode patterns 141 and 142. The three vias 160 are arranged in one direction. Paste-like solder 30A and 40A are supplied to the pad electrode patterns 141 and 142 having this structure at the positions indicated by the dashed lines in Figure 7(d). In the example shown in Figure 7(d), the paste-like solder 30A and 40A are supplied so as to overlap with a portion of the vias 160. Then, after mounting the electronic component 20 at the position indicated by the dashed line in Figure 7(d), heating causes the flowing solder 30 and 40 to flow into the vias 160. In the example shown in Figure 7(d), a portion of each via 160 overlaps with the electronic component 20.
[0035] In the example shown in Figure 7(e), the position of via 160 is the same as in the example shown in Figure 7(d), but to prevent the paste-like solder 30A and 40A from entering the interior of via 160, solder 30A and 40A are supplied around via 160 in multiple locations. The main solder 30A and 40A are supplied along the inner edges of the pad electrode patterns 141 and 142, and additionally, solder 30A and 40A are supplied at two locations each on the outer edges of the pad electrode patterns 141 and 142. Then, after mounting the electronic component 20 at the position indicated by the dashed line in Figure 7(e), heating causes the flowing solder 30 and 40 to flow into via 160.
[0036] In the example shown in Figure 7(f), the supply locations of the main solder 30A and 40A and the supply locations of the additional solder 30A and 40A are reversed compared to the example shown in Figure 7(e). In the example shown in Figure 7(f), the additional solder 30A and 40A that overlap with the electronic component 20 may be omitted. In this case, when the electronic component 20 is mounted, the terminal electrode 22 of the electronic component 20 does not come into contact with the solder 30A, and the terminal electrode 23 of the electronic component 20 does not come into contact with the solder 40A. However, when the solder 30 and 40 are heated and made to flow, the terminal electrode 22 of the electronic component 20 connects to the solder 30, and the terminal electrode 23 of the electronic component 20 connects to the solder 40.
[0037] While embodiments of the technology described herein have been explained above, it goes without saying that the technology described herein is not limited to the embodiments described above, and various modifications are possible without departing from its spirit, and these modifications are also included within the scope of the technology described herein.
[0038] The technology relating to this disclosure includes, but is not limited to, the following configuration examples.
[0039] A component mounting substrate according to one aspect of this disclosure comprises a circuit board having a mounting surface, electronic components mounted on the mounting surface of the circuit board, and solder connecting the circuit board and the electronic components. The circuit board includes an insulating layer having a mounting surface and a surface located opposite the mounting surface, a pad electrode pattern provided on the mounting surface, a conductor pattern provided on the surface so as to overlap the pad electrode pattern, vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer, and a metal film covering the inner wall of the vias. The electronic components have terminal electrodes, and the solder includes a first portion located outside the via and connected to the terminal electrodes, and a second portion located inside the via in a region surrounded by the metal film, wherein the first and second portions are integral. This makes it possible to provide a component mounting substrate with low resistance between the terminal electrodes and the conductor pattern, and excellent heat dissipation.
[0040] In the above-described component mounting board, vias do not necessarily have to overlap with terminal electrodes in a plan view, at least in part. This allows gases generated by solder melting to be released without remaining inside the via, thus reducing the likelihood of voids and other defects. In this case, the via may include a first region that overlaps with the terminal electrodes in a plan view and a second region that does not overlap with the terminal electrodes in a plan view. This allows for a further reduction in the resistance between the terminal electrodes and the conductor pattern, as well as improved heat dissipation.
[0041] In the above-mentioned component mounting board, multiple vias may be provided in the pad electrode pattern. This allows for a further reduction in the resistance between the terminal electrode and the conductor pattern, as well as improved heat dissipation.
[0042] A method for manufacturing a component mounting substrate according to one aspect of this disclosure comprises: a first step of preparing a circuit board that includes an insulating layer having a mounting surface and a surface located opposite the mounting surface, a pad electrode pattern provided on the mounting surface, a conductor pattern provided on the surface so as to overlap with the pad electrode pattern, vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer, and a metal film covering the inner wall of the vias, wherein the inside of the vias surrounded by the metal film is hollow; a second step of supplying solder to the pad electrode pattern so as not to block the cavity; a third step of mounting an electronic component having terminal electrodes onto the circuit board; and a fourth step of melting the solder to connect the terminal electrodes and the solder, and to fill the cavity with solder. This makes it possible to fill the inside of a via with solder used for mounting electronic components without pre-blocking the inside of the via with conductive paste or the like.
[0043] In the above-described method for manufacturing a component mounting board, the third step may also involve mounting electronic components onto the circuit board so that the terminal electrodes and solder make contact. This makes it possible to reliably connect the terminal electrodes and solder.
[0044] In the above-described method for manufacturing a component-mounted circuit board, the second step may involve supplying solder in a way that prevents it from entering cavities. This makes it less likely for voids to form inside vias.
[0045] In the above-described method for manufacturing a component-mounted circuit board, the second step may involve supplying solder in such a way that some of it enters the cavity while the remaining portion does not. This makes it easier for the molten solder to flow into the interior of the vias.
[0046] In the above-described method for manufacturing a component mounting substrate, the second step may involve supplying multiple solders to the pad electrode pattern. This makes it possible to ensure a sufficient supply of solder. [Explanation of Symbols]
[0047] 10 Circuit boards 10A Mounting surface 11-13 Insulating layer 11a,11b,12b,13b inner surface 12a,13a outer surface 14 IC chips 14a terminal electrode 20 Electronic Components 21. Body part 22,23 terminal electrode 30, 40 solder 30A, 40A paste-type solder 31 Part 1 32 Part 2 100, 100A component mounting board 111,112,121,122,131,143,144 Conductor Pattern 141,142 Pad electrode pattern 151-154 Via conductor 160 Beer 161 First Domain 162 Second Domain 170 Metal film L1~L4 wiring layer
Claims
1. A circuit board having a mounting surface, The electronic components mounted on the mounting surface of the circuit board, Solder for connecting the circuit board and the electronic components, Equipped with, The circuit board includes an insulating layer having the mounting surface and a surface located opposite the mounting surface, a pad electrode pattern provided on the mounting surface, a conductor pattern provided on the surface so as to overlap the pad electrode pattern, vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer, and a metal film covering the inner wall of the vias. The aforementioned electronic component has terminal electrodes, The solder includes a first portion located outside the via and connected to the terminal electrode, and a second portion located inside the via in a region surrounded by the metal film. The first part and the second part are integrated. Component mounting board.
2. The via is such that, in a plan view, at least a portion of it does not overlap with the terminal electrode. A component mounting board according to claim 1.
3. The via includes a first region that overlaps with the terminal electrode in a plan view, and a second region that does not overlap with the terminal electrode in a plan view. The component mounting board according to claim 2.
4. A plurality of vias are provided in the pad electrode pattern. A component mounting board according to any one of claims 1 to 3.
5. A first step of preparing a circuit board comprising: an insulating layer having a mounting surface and a surface located opposite the mounting surface; a pad electrode pattern provided on the mounting surface; a conductor pattern provided on the surface so as to overlap with the pad electrode pattern; vias located between the pad electrode pattern and the conductor pattern and penetrating the insulating layer; and a metal film covering the inner wall of the vias, wherein the interior of the vias surrounded by the metal film is hollow; A second step involves supplying solder to the pad electrode pattern so as not to block the cavity, A third step involves mounting an electronic component having terminal electrodes onto the circuit board, The fourth step involves melting the solder to connect the terminal electrode and the solder, and filling the cavity with the solder. A method for manufacturing a component mounting circuit board.
6. The third step is to mount the electronic component on the circuit board such that the terminal electrode and the solder are in contact. The method for manufacturing a component mounting substrate according to claim 5.
7. The second step is to supply the solder so that it does not enter the cavity. The method for manufacturing a component mounting substrate according to claim 5.
8. The second step is to supply the solder such that a portion of it enters the cavity, while the remaining portion does not enter the cavity. The method for manufacturing a component mounting substrate according to claim 5.
9. The second step involves supplying a plurality of solders to the pad electrode pattern. A method for manufacturing a component mounting substrate according to any one of claims 5 to 8.