LED driver

Abstract

To provide an LED driver that enables miniaturization of displays. [Solution] The LED driver according to the embodiment comprises a plurality of drive circuits. The plurality of drive circuits supply drive current to a backlight having input terminals connected to a plurality of parallel-connected LED rows and a plurality of output terminals connected to each of the plurality of LED rows. At least one of the plurality of drive circuits is connected to an input terminal and supplies drive current to the plurality of LED rows.

Description

Technical Field

[0001] The present invention relates to an LED driver.

Background Art

[0002] Conventionally, an LED (Light Emitting Diode) driver including a drive circuit for driving an LED configured as a backlight for a liquid crystal display or the like is known (see, for example, Patent Document 1). In recent years, due to the increasing size of displays, the number of LED columns has tended to increase. In Patent Document 1, a plurality of LED columns are driven by a plurality of drive circuits.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the prior art, it is necessary to provide a plurality of input terminals on the display and connect each of the plurality of drive circuits to each input terminal. For this reason, conventionally, the same number of input terminals as the drive circuits had to be provided on the display, so there was a risk of increasing the size of the display. <^

[0005] The present invention has been made in view of the above, and an object thereof is to provide an LED driver capable of reducing the size of a display.

Means for Solving the Problems

[0006] To solve the above-mentioned problems and achieve the objective, the LED driver according to the present invention comprises a plurality of drive circuits. The plurality of drive circuits supply drive current to a backlight having input terminals connected to a plurality of parallel-connected LED rows and a plurality of output terminals connected to each of the plurality of LED rows. At least one of the plurality of drive circuits is connected to the input terminal and supplies the drive current to the plurality of LED rows. [Effects of the Invention]

[0007] According to the present invention, at least one of the multiple drive circuits is connected to the input terminal, and the drive current that drives all the LED rows is supplied from this at least one drive circuit. As a result, it is not necessary to provide the same number of input terminals as the multiple drive circuits, and by reducing the number of input terminals, the display can be made smaller. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 shows an example configuration of an LED control system according to the first embodiment. [Figure 2] Figure 2 shows an example configuration of the LED control system according to the second embodiment. [Modes for carrying out the invention]

[0009] The power supply circuit according to the embodiment will be described in detail below with reference to the attached drawings. However, the present invention is not limited to the embodiments shown below. In the following description, Figure 1 shows the first embodiment, and Figure 2 shows the second embodiment.

[0010] First, the configuration and operation of the LED driver 1 according to the first embodiment will be described using Figure 1. Figure 1 is a diagram showing an example configuration of the LED control system S according to the first embodiment. As shown in Figure 1, the LED control system S includes the LED driver 1 and a TFT 100 equipped with a backlight. The LED control system S shown in Figure 1 is mounted on a vehicle.

[0011] The LED driver 1 comprises a boost circuit 10, a first drive circuit 21, and a second drive circuit 22. The TFT 100 is a liquid crystal display and includes multiple LED rows L1 to L6 that serve as backlights. The TFT 100 also has an input terminal IN and multiple output terminals OTL1 to OTL6. The number of output terminals OTL1 to OTL6 is the same as the number of LED rows L1 to L6, which will be described later.

[0012] Each LED row L1 to L6 consists of multiple LEDs connected in series. Specifically, the anode of the first LED in each LED row L1 to L6 is connected in parallel to the input terminal IN. In addition, the cathode of the last LED in each LED row L1 to L6 is connected to the output terminals OTL1 to OTL6. Specifically, in LED row L1, the cathode of the last LED is connected to output terminal OTL1. In LED row L2, the cathode of the last LED is connected to output terminal OTL2. In LED row L3, the cathode of the last LED is connected to output terminal OTL3. In LED row L4, the cathode of the last LED is connected to output terminal OTL4. In LED row L5, the cathode of the last LED is connected to output terminal OTL5. In LED row L6, the cathode of the last LED is connected to output terminal OTL6.

[0013] The boost circuit 10 applies the drive voltage generated by boosting the power supply voltage BATT to the input terminal IN of the TFT 100. Specifically, the boost circuit 10 comprises a coil 11, a diode 12, and a capacitor 13. One end of the coil 11 is connected to the power supply voltage BATT, and the other end is connected to the anode of the diode 12. The cathode of the diode 12 is connected to the input terminal IN and the capacitor 13. One end of the capacitor 13 is connected between the cathode of the diode 12 and the input terminal IN, and the other end is connected to ground. The boost circuit 10 generates the drive voltage by boosting the power supply voltage BATT through switching control of the first drive circuit 21.

[0014] The first drive circuit 21 includes a first controller 210, a switch 211, and a plurality of constant current sources 212L1 to 212L4.

[0015] The first controller 210 includes a microcomputer with a CPU (Central Processing Unit), ROM (Read Only Memory), RAM, and various circuits. The first controller 210 controls the operation of the entire LED driver 1 by having the CPU execute a program stored in ROM, using RAM as a workspace. The first controller 210 may be partially or entirely composed of hardware such as an ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array).

[0016] The first controller 210 controls the entire first drive circuit 21. For example, the first controller 210 controls the boost operation of the boost circuit 10 by switching control of the switch 211.

[0017] Switch 211 is a semiconductor switch, such as a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). In Figure 1, switch 211 is shown as an N-type MOSFET. Specifically, the gate of switch 211 is connected to the first controller 210, the source is connected to ground, and the drain is connected between the coil 11 and the diode 12 via the switch terminal 21SW.

[0018] Multiple constant current sources 212L1 to 212L4 have one end connected between each LED terminal 21L1 to 21L4 and the first controller 210, and the other end connected to ground. Constant current source 212L1 is connected to LED terminal 21L1. Constant current source 212L2 is connected to LED terminal 21L2. Constant current source 212L3 is connected to LED terminal 21L3. Constant current source 212L4 is connected to LED terminal 21L4.

[0019] The first drive circuit 21 has an enable terminal 21EN, a PWM terminal 21PWM, a clock terminal 21SYNC, a fail terminal 21FAIL, a comp terminal 21COMP, a power supply voltage terminal 21VIN, a switch terminal 21SW, and LED terminals 21L1 to 21L4.

[0020] The enable terminal 21EN is a terminal to which an enable signal (EN) is input. When an enable signal is input, the first controller 210 performs various operations such as control of the boost circuit 10.

[0021] The PWM terminal 21PWM is a terminal to which a PWM signal (PWM: Pulse Width Modulation) is input. The first controller 210 controls the switch 211 according to the PWM signal.

[0022] The clock terminal 21SYNC is a terminal to which a clock signal (SYC) is input. The first controller 210 operates in accordance with the clock signal.

[0023] The fail terminal 21FAIL is a terminal that outputs a fail signal (FAIL) output from the first controller 210 to the outside. When the first controller 210 detects an abnormality in the first drive circuit 21, it outputs the FAIL signal via the fail terminal 21FAIL.

[0024] The comp terminal 21COMP is a terminal that outputs a signal based on the comparison result between each LED voltage input from each of the LED terminals 21L1 to 21L4 to the first controller 210 and a reference voltage. Details of the signal output from the comp terminal 21COMP will be described later.

[0025] The LED terminal 21L1 is connected to the output terminal OTL1. The LED terminal 21L2 is connected to the output terminal OTL2. The LED terminals 21L3 and 21L4 are connected to the ground. That is, in the first drive circuit 21, two LED terminals 21L1 and 21L2 are connected to the TFT100, and two LED terminals 21L3 and 21L4 are not connected to the TFT100.

[0026] The power supply voltage terminal 21VIN is connected to the power supply voltage and is the terminal to which the power supply voltage is input. When the power supply voltage is input to the first controller 210, it uses the power supply voltage to perform various controls on the first drive circuit 21 (for example, generating a gate voltage to drive the switch 211).

[0027] Switch terminal 21SW is the terminal to which voltage is input from the boost circuit 10 during the period when switch 211 is ON.

[0028] The second drive circuit 22 includes a second controller 220, a switch 221, and a plurality of constant current sources 222L1 to 222L4.

[0029] The second controller 220 includes a microcomputer with a CPU, ROM, RAM, and various circuits. The second controller 220 controls the operation of the entire LED driver 1 by having the CPU execute a program stored in ROM, using RAM as a workspace. The second controller 220 may be partially or entirely composed of hardware such as an ASIC or FPGA.

[0030] The second controller 220 controls the entire second drive circuit 22. Since the second controller 220 is not connected to the boost circuit 10, it does not perform the boost operation of the boost circuit 10.

[0031] Switch 221 is a semiconductor switch, such as a MOSFET. In Figure 1, switch 221 is an N-type MOSFET. Specifically, the gate of switch 221 is connected to the second controller 220, the source is connected to ground, and the drain is connected to ground via switch terminal 22SW.

[0032] Multiple constant current sources 222L1 to 222L4 are connected at one end to the LED terminals 22L1 to 21L4 and the second controller 220, and at the other end to ground. Constant current source 222L1 is connected to LED terminal 22L1. Constant current source 222L2 is connected to LED terminal 22L2. Constant current source 222L3 is connected to LED terminal 22L3. Constant current source 222L4 is connected to LED terminal 22L4.

[0033] The second drive circuit 22 has an enable terminal 22EN, a PWM terminal 22PWM, a clock terminal 22SYNC, a fail terminal 22FAIL, a comp terminal 22COMP, a power supply voltage terminal 22VIN, a switch terminal 22SW, and LED terminals 22L1 to 22L4.

[0034] The enable terminal 22EN is the terminal to which the enable signal (EN) is input. When the enable signal is input, the second controller 220 performs various operations such as controlling the boost circuit 10.

[0035] The PWM terminal 22PWM is a terminal to which a PWM signal (PWM) is input. In Figure 1, since switch 221 is not connected to the boost circuit 10, the second controller 220 does not control switch 211 even if a PWM signal is input.

[0036] The clock terminal 22SYNC is the terminal to which the clock signal (SYC) is input. The second controller 220 operates in accordance with the clock signal.

[0037] The fail terminal 22FAIL is a terminal that outputs the fail signal (FAIL) output from the second controller 220 to the outside. The second controller 220 outputs the FAIL signal via the fail terminal 22FAIL when it detects an abnormality in the second drive circuit 22.

[0038] The Comp terminal 22COMP outputs a signal based on the comparison result between the LED voltages input to the second controller 220 from each LED terminal 22L1 to 22L4 and a reference voltage. Details of the signal output from Comp terminal 22COMP will be described later.

[0039] LED terminal 22L1 is connected to output terminal OTL3. LED terminal 22L2 is connected to output terminal OTL4. LED terminal 22L3 is connected to output terminal OTL5. LED terminal 22L4 is connected to output terminal OTL6. In other words, the second drive circuit 22 connects all four LED terminals 22L1 to 21L4 to the TFT100.

[0040] The power supply voltage terminal 22VIN is connected to the power supply voltage and is the terminal to which the power supply voltage is input. When the power supply voltage is input to the second controller 220, it uses the power supply voltage to perform various controls on the second drive circuit 22.

[0041] The switch terminal 22SW is connected to ground. In other words, in Figure 1, the second drive circuit 22 does not supply drive current to the input terminal IN of the TFT 100 because the switch terminal 22SW is not connected to the boost circuit 10. To put it another way, the first drive circuit 21 alone drives the boost circuit 10 and supplies the drive current to drive all the LED rows L1 to L6 of the TFT 100.

[0042] Next, an example of the operation of the LED control system S will be explained using Figure 1.

[0043] First, when a user operation is performed to start the vehicle or the TFT100, an EN signal is input to the respective enable terminals 21EN and 22EN. As a result, the first drive circuit 21 and the second drive circuit 22 activate various controls.

[0044] Subsequently, PWM signals, which serve as control signals for the boost circuit 10, are input to the respective PWM terminals 21PWM and 22PWM. The first controller 210 uses the PWM signals and the power supply voltage BATT input to the power supply voltage terminal 21VIN to generate a gate voltage to drive the switch 211, and applies this gate voltage to the gate of the switch 211. As a result, the switch 211 turns on and off according to the duty cycle of the PWM signal. Consequently, the switch node of the boost circuit 10 (between the coil 11 and the diode 12) is connected to and disconnected from the ground connected to the switch 211 via the switch terminal 21SW, causing the boost circuit 10 to boost the power supply voltage BATT and generate a drive voltage. The first controller 210 also controls the constant current sources 212L1 to 212L4 so that the current necessary to reach the target light intensity of the LED rows L1 to L6 flows.

[0045] Furthermore, when the second controller 220 receives a PWM signal, it controls the constant current sources 222L1 to 222L4 based on the PWM signal so that the current necessary to bring the LED rows L1 to L6 to the target light level flows.

[0046] As a result, a drive current corresponding to the drive voltage flows to the input terminal IN of the TFT100, driving the LED array L1 to L6 to emit light at the target brightness.

[0047] Furthermore, the first controller 210 and the second controller 220 compare the voltages input to their respective LED terminals 21L1-21L4 and 22L1-22L4 (hereinafter referred to as LED voltages) with a reference voltage. Based on the comparison results, the first controller 210 controls the boost circuit 10 so that all LED voltages input to LED terminals 21L1-21L4 and 22L1-22L4 are equal to or greater than the reference voltage.

[0048] Specifically, the first controller 210 compares the LED voltage input to LED terminal 21L1 with a reference voltage, and the LED voltage input to LED terminal 21L2 with a reference voltage. The second controller 220 also compares the LED voltage input to LED terminal 22L1 with a reference voltage, the LED voltage input to LED terminal 22L2 with a reference voltage, the LED voltage input to LED terminal 22L3 with a reference voltage, and the LED voltage input to LED terminal 22L4 with a reference voltage. Each voltage comparison is performed using an error amplifier.

[0049] The first controller 210 and the second controller 220 output comparison result voltages from their respective compressor terminals 21COMP and 22COMP, indicating the voltage comparison result. Specifically, the first controller 210 outputs a comparison result voltage from its compressor terminal 21COMP for the lowest LED voltage among LED terminals 21L1 and 21L2 that is below the reference voltage, corresponding to the output of the error amplifier. In other words, the first controller 210 outputs a comparison result voltage from its compressor terminal 21COMP that indicates the difference between the lowest LED voltage below the reference voltage and the reference voltage.

[0050] Furthermore, the second controller 220 outputs a comparison result voltage from the comp terminal 22COMP for the lowest LED voltage among the four LED terminals 22L1 to 22L4 that is below the reference voltage, corresponding to the output of the error amplifier. In other words, the first controller 210 outputs a comparison result voltage from the comp terminal 22COMP that shows the difference between the lowest LED voltage that is below the reference voltage and the reference voltage.

[0051] As a result, the compressor terminal 21COMP is supplied with a comparison result voltage from either the first drive circuit 21 or the second drive circuit 22 that is greater than the difference between it and the reference voltage. The first controller 210 then controls the boost circuit 10 based on the comparison result voltage supplied to the compressor terminal 21COMP to generate a drive voltage such that the difference between the comparison result voltage and the reference voltage is zero or greater.

[0052] For example, among the LED terminals 21L1-21L4 and 22L1-22L4, if the LED voltage input to LED terminal 21L1 is the lowest, the comparison result voltage output from the first controller 210 will be higher than the comparison result voltage output from the second controller 220. In this case, the first controller 210 generates a drive voltage such that the difference between the comparison result voltage it outputs and the reference voltage is zero or greater. As a result, the LED voltage input to LED terminal 21L1 becomes equal to or greater than the reference voltage. In other words, all LED voltages input to LED terminals 21L1-21L4 and 22L1-22L4 become equal to or greater than the reference voltage.

[0053] Furthermore, among the LED terminals 21L1~21L4 and 22L1~22L4, if the LED voltage input to LED terminal 22L1 is the lowest, the comparison result voltage output from the second controller 220 will be higher than the comparison result voltage output from the first controller 210. In this case, the first controller 210 generates a drive voltage such that the difference between the comparison result voltage output by the second controller 220 and the reference voltage is zero or greater. As a result, the LED voltage input to LED terminal 22L1 becomes equal to or greater than the reference voltage. In other words, all LED voltages input to LED terminals 21L1~21L4 and 22L1~22L4 become equal to or greater than the reference voltage.

[0054] In this way, the LED driver 1 connects the comp terminals 21COMP and 22COMP of the first drive circuit 21 and the second drive circuit 22, and outputs a comparison result voltage, which is the output of the error amplifier. This makes it possible to set the lowest LED voltage among all LED terminals 21L1 to 21L4 and 22L1 to 22L4 to be equal to or greater than the reference voltage.

[0055] Furthermore, as shown in Figure 1, the boost circuit 10 is connected only to the first drive circuit 21. In other words, the boost circuit 10 is connected to the first drive circuit 21, which has fewer connections to the output terminals OTL1 to OTL6. This is because the number of constant current sources 212L1 to 212L4 that the first drive circuit 21 has to control is small, and more specifically, the heat generated by controlling the constant current sources 212L1 to 212L4 is small. That is, in Figure 1, the first drive circuit 21 controls only two constant current sources 212L1 and 212L2, while the second drive circuit 22 controls four constant current sources 222L1 to 222L4, so the heat generated is greater than that of the first drive circuit 21. As a result, even if the switch 211 generates heat when the first drive circuit 21 controls the boost circuit 10 to supply drive current to drive the LED array L1 to L6, the heat generated by the constant current sources 212L1 and 212L2 is small, thus suppressing overall heat generation in the first drive circuit 21.

[0056] Furthermore, as shown in Figure 1, the first drive circuit 21 and the second drive circuit 22 are connected to each other via their fail terminals 21FAIL and 22FAIL. Therefore, when the first drive circuit 21 and the second drive circuit 22 detect an abnormality in themselves, they can notify other drive circuits of the abnormality by outputting a FAIL signal (FAIL voltage) to the outside. For example, when the first drive circuit 21 receives a FAIL signal from the second drive circuit 22, the FAIL signal is input to the fail terminal 21FAIL, allowing the first drive circuit 21 to detect the occurrence of an abnormality in the second drive circuit 22. When the first drive circuit 21 detects an abnormality in itself or the second drive circuit 22, it stops the boost operation of the boost circuit 10, thereby stopping the driving of the TFT 100.

[0057] Next, a second embodiment will be described using Figure 2. Figure 2 is a diagram showing an example configuration of the LED control system S according to the second embodiment. The second embodiment described below will be explained focusing on the differences from the first embodiment.

[0058] As shown in Figure 2, in the second embodiment, the TFT 100 is composed of eight rows of LEDs L1 to L8. That is, in the second embodiment, the first drive circuit 21 and the second drive circuit 22 are branched and connected to all of the LED terminals 21L1 to 21L4 and 22L1 to 22L4 of the TFT 100, with output terminals OTL1 to OTL8 connected to them. Specifically, the four output terminals OTL1 to OTL4 are connected to the LED terminals 21L1 to 21L4 of the first drive circuit 21, respectively. The remaining four output terminals OTL5 to OTL8 are connected to the LED terminals 22L1 to 22L4 of the second drive circuit 22. In other words, the eight output terminals OTL1 to OTL8 are branched and connected so that the same number of output terminals are connected to multiple LED terminals 21L1 to 21L4 and 22L1 to 22L4 of the first drive circuit 21 and the second drive circuit 22, respectively.

[0059] In the second embodiment, the boost circuit 30 is also connected to the second drive circuit 22. The boost circuit 30 has the same configuration as the boost circuit 10, differing only in its symbol, so its explanation is omitted. The output side of the boost circuit 30 is connected to the output side of the boost circuit 10. In other words, the two boost circuits 10 and 30 are connected in parallel to the input terminal IN of the TFT 100. The two boost circuits 10 and 30 are controlled by the first controller 210 and the second controller 220, respectively, to generate a drive voltage from the power supply voltage BATT. In other words, the first drive circuit 21 and the second drive circuit 22 each control the boost circuits 10 and 30 to generate a drive current. As a result, the first drive circuit 21 and the second drive circuit 22 can supply drive current to the input terminal IN to drive the eight rows of LEDs L1 to L8 by supplying drive current from their respective boost circuits 10 and 30. As a result, the heat generated when the drive current is supplied can be distributed to the first drive circuit 21 and the second drive circuit 22, respectively.

[0060] Furthermore, the first drive circuit 21 is equipped with a clock output terminal 21SYNCo compared to the first embodiment. The clock output terminal 21SYNCo is connected to the clock terminal 22SYNC of the second drive circuit 22. The first controller 210 inputs the clock signal, which has been input to its own clock terminal 21SYNC, to the clock terminal 22SYNC of the second drive circuit 22 via the clock output terminal 21SYNCo. The second controller 220 controls the switching of the switch 221 in synchronization with the clock signal input to the clock terminal 22SYNC. In other words, the first drive circuit 21 notifies the second drive circuit 22 of the switching frequency information of the boost circuits 10 and 30. As a result, the second drive circuit 22 can operate the boost circuit 30 in synchronization with the first drive circuit 21.

[0061] As described above, the LED driver 1 according to the first and second embodiments comprises a plurality of drive circuits 21 and 22. The plurality of drive circuits 21 and 22 supply drive current to a backlight (TFT 100) which has an input terminal IN connected to a plurality of parallel LED rows L1 to L8, and a plurality of output terminals OTL1 to OTL8 connected to each of the plurality of LED rows. At least one of the plurality of drive circuits 21 and 22 is connected to the input terminal IN and supplies drive current to the plurality of LED rows L1 to L8.

[0062] According to this disclosure, at least one of the multiple drive circuits 21, 22 is connected to the input terminal IN, and the drive current to drive all LED rows L1 to L8 is supplied from this at least one drive circuit. As a result, it is not necessary to provide the same number of input terminals IN as the multiple drive circuits 21, 22, and by reducing the number of input terminals IN, the display can be made smaller.

[0063] Further effects and modifications can be readily derived by those skilled in the art. Therefore, broader aspects of the present invention are not limited to the specific details and representative embodiments expressed and described above. Accordingly, various modifications are possible without departing from the spirit or scope of the overall concept of the invention as defined by the appended claims and their equivalents. [Explanation of Symbols]

[0064] 1 LED driver 10, 30 Boost Circuit 11 coils 12 diodes 13 Capacitors 21 First drive circuit 21COMP, 22COMP Comp terminals 21EN, 22EN Enable terminals 21FAIL, 22FAIL Fail terminals 21L1~21L4, 22L1~22L4 LED terminal 21SW, 22SW switch terminals 21SYNC, 22SYNC clock terminals 21SYNCo Clock Output Terminal 21VIN, 22VIN Power supply voltage terminals 22 Second drive circuit 210 First Controller 211,221 switches 212L1~212L4, 222L1~222L4 constant current source 220 Second Controller IN input terminal L1~L8 LED row OTL1~OTL8 Output terminals S LED control system

Claims

1. The system comprises multiple drive circuits that supply drive current to a backlight having input terminals connected to multiple parallel LED rows and multiple output terminals connected to each of the multiple LED rows, At least one of the plurality of drive circuits is The input terminal is connected to the aforementioned input terminal and supplies the drive current to the plurality of LED rows. LED driver.

2. The aforementioned multiple drive circuits have multiple LED terminals, The plurality of output terminals are branched and connected to the plurality of LED terminals of each of the plurality of drive circuits. Of the multiple drive circuits, the drive circuit with the fewest number of output terminals connected to the LED terminal is connected to the input terminal via a boost circuit. The LED driver according to claim 1.

3. Each of the aforementioned multiple drive circuits is It has a compressor terminal, and is connected to each other via the compressor terminal, The LED voltage applied to each LED terminal is compared with a reference voltage, and the comparison result voltage, which indicates the comparison result, is applied to the compressor terminal of the drive circuit to which the boost circuit is connected. The aforementioned drive circuit is, Based on the comparison result voltage applied to the compressor terminal, the boost circuit is operated so that the LED voltage becomes equal to or greater than the reference voltage. The LED driver according to claim 2.

4. The aforementioned multiple drive circuits have multiple LED terminals, The plurality of output terminals are branched and connected such that the same number of output terminals are connected to the plurality of LED terminals of each of the plurality of drive circuits. Each of the aforementioned multiple drive circuits is connected to each of the multiple boost circuits, The aforementioned multiple boost circuits are The input terminal is connected in parallel with the input terminal. The LED driver according to claim 1.

5. Of the aforementioned multiple drive circuits, any one drive circuit is: The switching frequency information of the boost circuit is notified to other drive circuits. The LED driver according to claim 4.

6. Each of the aforementioned multiple drive circuits is It has a fail terminal that outputs a FAIL voltage to the outside when it detects an abnormality of itself, and is connected to each other via the fail terminal, One of the aforementioned multiple drive circuits is: The FAIL voltage output from the other drive circuit is used to detect the occurrence of an abnormality in the other drive circuit. The LED driver according to claim 1.

Images