Gate driver circuits, motor drive devices using them, and electronic devices.

The gate driver circuit addresses voltage instability and ringing issues by using a controlled current source and sink mechanism to manage transistor transitions, improving efficiency and reducing power consumption.

JP2026084004APending Publication Date: 2026-05-20ROHM CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
ROHM CO LTD
Filing Date
2024-11-08
Publication Date
2026-05-20

AI Technical Summary

Technical Problem

The instability of output voltage in switching circuits due to through currents and ringing caused by reverse recovery currents in flywheel diodes, leading to unnecessary radiation and inefficiencies.

Method used

A gate driver circuit with a turn-on and turn-off circuit that includes multiple parallel transistors with individually controllable states, adjusting current amounts to suppress through currents and ringing, and a control circuit to manage these currents during transistor transitions.

Benefits of technology

The solution effectively suppresses shoot-through currents and ringing, reduces power consumption, and enhances the efficiency of the bridge circuit by controlling current flow during transistor switching.

✦ Generated by Eureka AI based on patent content.

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Abstract

This provides a gate driver circuit capable of suppressing shoot-through current and ringing caused by the reverse recovery current of the flywheel diode on the opposite side. [Solution] The turn-on circuit 230 includes a first current source 232 and a second current source 234. The first current source 232 supplies a constant amount of first current I during the turn-on period. C The current is sourced to the gate of the high-side transistor MH. The second current source 234 includes multiple transistors M1 to Mn connected in parallel, which can be individually controlled to be on or off. During the turn-on period, the combination of transistors that are on changes over time, and the amount of current changes according to the transistors that are on. V This is sourced to the gate of the high-side transistor MH. First current I C and the second current I V The sum of the turn-on currents I HG_ON That is the case.
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Description

[Technical Field]

[0001] This disclosure relates to a gate driver circuit. [Background technology]

[0002] Half-bridge circuits, H-bridge circuits, and three-phase bridge circuits (hereinafter collectively referred to as switching circuits) using power transistors are used in motor driver circuits, DC / DC converters, power conversion devices, and the like.

[0003] Figure 1 is a circuit diagram of the switching circuit 10. The switching circuit 10 includes an upper arm 12 and a lower arm 14 arranged in series between the power supply terminal and the ground terminal. The upper arm 12 includes a high-side transistor MH and a flywheel diode Di connected in parallel. The lower arm 14 includes a low-side transistor ML and a flywheel diode Di connected in parallel. An inductor (coil) L1, which is a load, is connected to the output terminal of the switching circuit 10.

[0004] The switching circuit 10 can take on three states: φ1, where both the high-side transistor MH and the low-side transistor ML are off (high impedance state); φ2, where the high-side transistor MH is on and the low-side transistor ML is off (high output state); and φ3, where the high-side transistor MH is off and the low-side transistor ML is on (low output state). For each of the states φ1 to φ3, a current I is drawn from the switching circuit 10. OUT The current source state is such that current is discharged (flowing to the right in the diagram), and the switching circuit 10 is supplying current I OUT A current sink state exists where current is drawn in (flowing to the left in the diagram). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2018-82575 [Patent Document 2] International Publication No. WO2022 / 259780

[0006] [Summary] As a result of examining the bridge circuit in FIG. 1, the present inventor has come to recognize the following problems.

[0007] In the current source state, consider the transition from the high impedance state φ1 to the high output state φ2. In state φ1, the output current I OUT is supplied to the load via the flywheel diode Di of the lower arm 14 (current source). The output voltage V OUT in state φ1 is -Vf. Vf is the forward voltage of the flywheel diode Di.

[0008] In state φ2, the output current I OUT of the switching circuit 10 flows through the high-side transistor MH. Also, in the flywheel diode Di of the opposite lower arm 14, a reverse recovery current I rc flows from the cathode to the anode. Therefore, both the output current I OUT and the reverse recovery current I rc flow through the high-side transistor MH. This state is equivalent to the presence of a through current. When a through current flows, the output voltage V OUT of the switching circuit 10 becomes unstable and ringing occurs. Ringing is undesirable because it causes unnecessary radiation.

[0009] The present disclosure has been made in view of such problems, and an exemplary object of one aspect thereof is to provide a gate driver circuit capable of suppressing through current and ringing caused by the reverse recovery current of the flywheel diode on the opposite side.

[0010] A particular aspect of this disclosure relates to a gate driver circuit for driving an N-type power transistor. The gate driver circuit includes a turn-on circuit that sources a turn-on current to the gate of the power transistor during the turn-on period of the power transistor, a turn-off circuit that sinks a turn-off current from the gate of the power transistor during the turn-off period of the power transistor, and a control circuit that controls the turn-on circuit and the turn-off circuit. The turn-on circuit includes a first current source that sources a fixed amount of first current to the gate of the power transistor during the turn-on period of the power transistor, and a second current source that sources a second current to the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, and whose combination of on transistors changes over time during the turn-on period, with the amount of current changing according to the on transistors, and the sum of the first current and the second current is the turn-on current.

[0011] Another aspect of this disclosure is also a gate driver circuit. This gate driver circuit includes a turn-on circuit that sources a turn-on current to the gate of a power transistor during the turn-on period of the power transistor, a turn-off circuit that sinks a turn-off current from the gate of the power transistor during the turn-off period of the power transistor, and a control circuit that controls the turn-on circuit and the turn-off circuit. The turn-off circuit includes a third current source that sinks a fixed amount of third current from the gate of the power transistor during the turn-off period, and a fourth current source that sinks a fourth current from the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, and whose combination of on transistors changes over time during the turn-off period, with the amount of current changing according to the on transistors, the sum of the third current and the fourth current being the turn-off current.

[0012] Furthermore, any combination of the above components, and any substitution of the components or expressions of this disclosure between methods, apparatus, systems, etc., are also valid embodiments of the present invention. [Brief explanation of the drawing]

[0013] [Figure 1] Figure 1 is a circuit diagram of a bridge circuit. [Figure 2] Figure 2 is a circuit diagram of a switching circuit according to Embodiment 1. [Figure 3] Figure 3 shows the current source mode operating waveform of the gate driver circuit in Figure 2. [Figure 4] Figure 4 shows the operating waveform of the gate driver circuit in current sink mode shown in Figure 2. [Figure 5] Figure 5 is a circuit diagram of a gate driver circuit according to an embodiment. [Figure 6] Figure 6 is a waveform diagram illustrating the operation of the turn-on circuit shown in Figure 5. [Figure 7] Figure 7 is a circuit diagram of a turn-on circuit according to one embodiment. [Figure 8] Figure 8 is a circuit diagram of a turn-on circuit according to one embodiment. [Figure 9] Figure 9 is a circuit diagram of a turn-on circuit according to one embodiment. [Figure 10] Figure 10 is a circuit diagram illustrating the switching of a switching circuit. [Figure 11] Figure 11 is an operating waveform diagram of the switching circuit shown in Figure 10. [Figure 12] Figure 12 is a circuit diagram of a switching circuit according to Embodiment 2. [Figure 13] Figure 13 is a waveform diagram illustrating the operation of the switching circuit shown in Figure 12. [Figure 14] Figure 14 is a circuit diagram of a gate driver circuit according to Embodiment 2. [Figure 15] Figure 15 is a circuit diagram of a motor drive device according to an embodiment.

[0014] [Detailed explanation] (Summary of the embodiment) This section outlines some exemplary embodiments of the present disclosure. This outline is intended to provide a basic understanding of the embodiments and to simplify some concepts of one or more embodiments, serving as a prelude to the more detailed descriptions that follow later, and is not intended to limit the scope of the invention or disclosure. For convenience, “one embodiment” may be used to refer to one embodiment (example or variation) or more embodiments (example or variation) disclosed herein.

[0015] This summary is not intended to be a comprehensive overview of all possible embodiments, nor is it intended to identify key elements of all embodiments or to define the scope of some or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed descriptions that will follow.

[0016] A gate driver circuit according to one embodiment drives an N-type power transistor. The gate driver circuit includes a turn-on circuit that sources a turn-on current to the gate of the power transistor during the turn-on period of the power transistor, a turn-off circuit that sinks a turn-off current from the gate of the power transistor during the turn-off period of the power transistor, and a control circuit that controls the turn-on circuit and the turn-off circuit. The turn-on circuit includes a first current source that sources a fixed amount of first current to the gate of the power transistor during the turn-on period, and a second current source that sources a second current to the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, and whose combination of on transistors changes over time during the turn-on period, and whose current amount changes according to the on transistors, and the sum of the first current and the second current is the turn-on current.

[0017] The current driving capability (also simply called driving capability or capability) of the second current source is the sum of the driving capabilities of the on-state transistors among the multiple transistors, and the driving capability of each transistor is defined by its size, i.e., W / L (gate width / gate length ratio). During the turn-on period, after the power transistor has turned on and during the period when a reverse recovery current can flow through the flywheel diode on the opposite arm, the current driving capability of the second current source is reduced to allow the power transistor to turn on slowly while maintaining a high on-resistance. This suppresses shoot-through current and ringing caused by the reverse recovery current of the flywheel diode on the opposite arm.

[0018] In this configuration, the turn-on current is the sum of the first and second currents. However, the first current is constant, and only the amount of the second current changes. Therefore, it is possible to prevent the turn-on current from becoming zero at the switching timing.

[0019] In one embodiment, the first current source may include a constant current source that generates a reference current and a current mirror circuit that copies the reference current and generates a first current.

[0020] In one embodiment, the first current source includes a plurality of transistors connected in parallel, which can be individually controlled to be on or off, and the amount of the first current may depend on the combination of the plurality of transistors that are on.

[0021] In one embodiment, the second current source may have all of its transistors turned off during a minimum current interval within a portion of the turn-on period, resulting in a second current of zero. This prevents the turn-on current from becoming zero when transitioning to the minimum current interval, and prevents a jump (glitch) in the turn-on current when transitioning from the minimum current interval to the next interval.

[0022] In one embodiment, the second current source may generate a second current with a non-zero current amount in a first section prior to the minimum current section of the turn-on period, which turns on at least one of the transistors. Since a turn-on current with a larger current amount than in the minimum current section is supplied in the first section, the rate at which the gate voltage of the power transistor rises can be increased, and the turn-on period of the power transistor can be shortened. This reduces the power consumption of the power transistor.

[0023] In one embodiment, the second current source may generate a second current in which at least one of the transistors is turned on during a third period following the minimum current period of the turn-on time, and the current amount is non-zero. During the third period, when the likelihood of reverse recovery current flow is low, the turn-on time of the power transistor can be shortened and power consumption reduced by increasing the amount of the turn-on current compared to the minimum current period.

[0024] In one embodiment, the second current in the third section may be greater than the second current in the first section. After the influence of the reverse recovery characteristics of the flywheel diode on the opposite arm has decreased, increasing the amount of the turn-on current can reduce the on-resistance of the power transistor in a short time, thereby improving the efficiency of the bridge circuit.

[0025] In one embodiment, the sizes of the multiple transistors constituting the second current source may be binary weighted.

[0026] In one embodiment, the turn-off circuit includes a third current source that sinks a fixed amount of third current from the gate of a power transistor during the turn-off period, and a fourth current source that sinks a fourth current from the gate of a power transistor, which is connected in parallel and includes a plurality of transistors whose on / off states can be individually controlled, and whose combination of on transistors changes over time during the turn-off period, with the amount of current changing according to the on transistors, and the sum of the third current and the fourth current may be the turn-off current.

[0027] With this configuration, in the section where the drain current flowing through the power transistor is substantially constant, increasing the turn-off current shortens the turn-off time and reduces power consumption. Furthermore, during the period when the drain current changes, reducing the turn-off current slows down the rate of change of the high-side current and suppresses EMI. It also suppresses negative voltage generated at the output. The turn-off current is the sum of the third current and the fourth current, but the third current is a constant amount, and only the amount of the fourth current changes. Therefore, it is possible to prevent the turn-off current from becoming zero at the switching timing.

[0028] In one embodiment, the gate driver circuit may be integrated onto a single semiconductor substrate. "Integrated integration" includes cases where all the circuit components are formed on the semiconductor substrate, or where the main components of the circuit are integrated, and some resistors, capacitors, etc., may be provided outside the semiconductor substrate for adjusting circuit constants. Integrating the circuit onto a single chip can reduce the circuit area and maintain uniformity of the characteristics of the circuit elements.

[0029] A motor drive circuit according to one embodiment comprises a bridge circuit including a high-side transistor and a low-side transistor, a high-side driver which is one of the above-described gate driver circuits that drives the high-side transistor as a power transistor, and a low-side driver which is one of the above-described gate driver circuits that drives the low-side transistor as a power transistor.

[0030] An electronic device according to one embodiment comprises a motor and the motor drive device described above for driving the motor.

[0031] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, members, and processes shown in each drawing will be denoted by the same reference numerals, and redundant descriptions will be omitted as appropriate. Furthermore, these embodiments are illustrative and not limiting to the invention, and not all features or combinations thereof described in the embodiments are necessarily essential to the invention.

[0032] In this specification, "member A connected to member B" includes not only cases where member A and member B are directly connected physically, but also cases where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection or impair the functions or effects produced by their combination.

[0033] Similarly, "the state in which member C is provided between member A and member B" includes not only cases where member A and member C, or member B and member C, are directly connected, but also cases where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions or effects produced by their combination.

[0034] (Embodiment 1) Figure 2 is a circuit diagram of a switching circuit 100 according to Embodiment 1. The switching circuit 100 comprises a bridge circuit 110 and a gate driver circuit 200. Here, only the configuration of one phase of the switching circuit 100 is shown, but the switching circuit 100 may be a three-phase circuit or an H-bridge circuit.

[0035] The bridge circuit 110 includes a high-side transistor MH located between the power line (input line) 102 and the output terminal (output line) 104, and a low-side transistor ML located between the output line 104 and the ground line 106. The input line 102 is connected to the input voltage V MThis is supplied. In this embodiment, the high-side transistor MH and the low-side transistor ML are N-channel MOSFETs, and their respective body diodes also function as flywheel diodes.

[0036] The gate driver circuit 200 drives the high-side transistor MH and the low-side transistor ML of the bridge circuit 110.

[0037] Between the bootstrap pin BST and output line 104 is the bootstrap capacitor C. BST The following connections are made. The high-side gate pin HG is connected to the gate of the high-side transistor MH. The switching pin SW is connected to the source of the high-side transistor MH and the drain of the low-side transistor ML. The low-side gate pin LG is connected to the gate of the low-side transistor ML.

[0038] Bootstrap line 202 is connected to bootstrap pin BST. A constant voltage V is supplied to bootstrap line 202 via rectifier element 203. REG A voltage is applied. Rectifier element 203 and bootstrap capacitor C BST This forms a bootstrap circuit, and the voltage V of the bootstrap line 202 BST V OUT +V REG Maintain the forward voltage at -Vf. Vf is the forward voltage of the rectifier element 203.

[0039] The gate driver circuit 200 is a functional IC integrated on a single semiconductor substrate, comprising a control circuit 210, a high-side driver 220, a low-side driver 250, a high-side off sensor 290, and a low-side off sensor 292. The control circuit 210 controls the high-side driver 220 and the low-side driver 250 in response to the input signal IN.

[0040] The high-side driver 220 includes a turn-on circuit 230 and a turn-off circuit 240. The turn-on circuit 230 is connected between the bootstrap line 202 and the high-side gate pin HG. The turn-on circuit 230 becomes active when the high-side transistor MH is turned on, and a gate current (turn-on current) I is supplied to the gate of the high-side transistor MH. HG_ON Source this. Turn-on current I HG_ON This charges the gate capacitance of the high-side transistor MH, causing the gate-source voltage of the high-side transistor MH to rise.

[0041] The turn-off circuit 240 is connected between the high-side gate pin HG and the switching line 204. The turn-off circuit 240 becomes active when the high-side transistor MH is turned off, and the gate current (turn-off current) I is released from the gate of the high-side transistor MH. HG_OFF Sink it. Turn-off current I HG_OFF This discharges the gate capacitance of the high-side transistor MH, causing the gate-source voltage of the high-side transistor MH to decrease.

[0042] The low-side driver 250 includes a turn-on circuit 260 and a turn-off circuit 270. The turn-on circuit 260 is connected between the power line 206 and the low-side gate pin LG. The turn-on circuit 260 becomes active when the low-side transistor ML is turned on, and a gate current (turn-on current) I is supplied to the gate of the low-side transistor ML. LG_ON Source this. Turn-on current I LG_ON This charges the gate capacitance of the low-side transistor ML, increasing the gate-source voltage of the low-side transistor ML.

[0043] The turn-off circuit 270 is connected between the low-side gate pin LG and the ground line 208. The turn-off circuit 270 becomes active when the low-side transistor ML is turned off, and the gate current (turn-off current) I is generated from the gate of the low-side transistor ML. LG_OFFSink it. Turn-off current I LG_OFF This discharges the gate capacitance of the low-side transistor ML, causing the gate-source voltage of the low-side transistor ML to decrease.

[0044] The high-side-off sensor 290 asserts (e.g., high) the high-side-off detection signal HS_OFF when it detects the turn-off of the high-side transistor MH. For example, the high-side-off sensor 290 detects the gate-source voltage V of the high-side transistor MH. HGS A predetermined threshold voltage V OFF Compared with V HGS <V OFF Therefore, the high-side off detection signal HS_OFF is asserted.

[0045] When the low-side off sensor 292 detects the turn-off of the low-side transistor ML, it asserts (e.g., high) the low-side off detection signal LSOFF. For example, the low-side off sensor 292 detects the gate-source voltage V of the low-side transistor ML. LGS A predetermined threshold voltage V OFF Compared with V LGS <V OFF Therefore, the low-side off detection signal LS_OFF is asserted.

[0046] The control circuit 210 controls the high-side driver 220 and the low-side driver 250 so that the high-side transistor MH is turned on and the low-side transistor ML is turned off when the input signal IN is at a first level (e.g., high). The control circuit 210 also controls the high-side driver 220 and the low-side driver 250 so that the high-side transistor MH is turned off and the low-side transistor ML is turned on when the input signal IN is at a second level (e.g., low).

[0047] When the input signal IN changes from the first level to the second level, the control circuit 210 turns off the high-side transistor MH and then turns on the low-side transistor ML. Specifically, it activates the turn-off circuit 240 of the high-side driver 220. This causes a turn-off current I to flow from the gate of the high-side transistor MH. HG_OFF The signal is synced, and the high-side transistor MH turns off. When the high-side transistor MH turns off, the high-side off detection signal HS_OFF is asserted.

[0048] The control circuit 210 activates the turn-on circuit 260 of the low-side driver 250 in response to the assertion of the high-side off detection signal HS_OFF. This causes a turn-on current I to be supplied to the gate of the low-side transistor ML. LG_ON The signal is sourced, and the low-side transistor ML turns on.

[0049] When the input signal IN changes from the second level to the first level, the control circuit 210 turns off the low-side transistor ML and then turns on the high-side transistor MH. Specifically, it activates the turn-off circuit 270 of the low-side driver 250. This causes a turn-off current I to flow from the gate of the low-side transistor ML. LG_OFF The signal is synced, and the low-side transistor ML turns off. When the low-side transistor ML turns off, the low-side off detection signal LS_OFF is asserted.

[0050] The control circuit 210 activates the turn-on circuit 230 of the high-side driver 220 in response to the assertion of the low-side off detection signal LS_OFF. This causes a turn-on current I to be supplied to the gate of the high-side transistor MH. HG_ON The signal is supplied, and the high-side transistor MH turns on.

[0051] In this embodiment, the turn-on circuit 230 of the high-side driver 220 has a turn-on current I HG_ONThe control circuit 210 is configured to be switchable in multiple stages, in addition to turning the turn-on circuit 230 on and off when the bridge circuit 110 is operating in current source mode, and also controls the turn-on current I generated by the turn-on circuit 230. HG_ON It controls the amount of current.

[0052] Specifically, the control circuit 210 controls the output current I of the bridge circuit 110. OUT In the operating mode (source mode) where the fluid flows out toward the load (not shown), the turn-on circuit 230 of the high-side driver 220 is controlled as follows.

[0053] Figure 3 is an operating waveform diagram of the gate driver circuit 200 in current source mode shown in Figure 2. The input signal IN is a logic signal that indicates the state of the bridge circuit 110. GS(L) V is the gate voltage (gate-source voltage) of the low-side transistor ML. HG V is the gate voltage of the high-side transistor MH, OUT V represents the source voltage, or output voltage, of the high-side transistor MH. GS(H) V is the gate-source voltage of the high-side transistor MH. HG and V OUT This is the potential difference.

[0054] Before time t0, the input signal IN is low level, the high-side transistor MH is off, the low-side transistor ML is on, and the output voltage V OUT The voltage is low (0V).

[0055] Figure 3 shows the operation in current source mode, where, before time t0, a negative current I is supplied to the low-side transistor ML. ML It's playing.

[0056] At time t0, the input signal IN transitions to a high level. As a result, the low-side driver 250 controls the gate voltage V of the low-side transistor ML. LG This reduces the voltage and turns off the low-side transistor ML.

[0057] At time t1, the gate voltage V of the low-side transistor ML LG When the voltage falls below a predetermined threshold voltage, the low-side off detection signal LS_OFF is asserted. In response to the assertion of the low-side off detection signal LS_OFF, the control circuit 210 enables the turn-on circuit 230 of the high-side driver 220.

[0058] During the first period T1, the turn-on circuit 230 has a turn-on current I of the first current I1. HG_ON Generates.

[0059] Then, at time t2, the gate-source voltage V of the high-side transistor MH GS(H) However, the first threshold voltage V th1 When it exceeds this value, it transitions to the second period T2 (minimum current section). In the second period T2, the turn-on current I HG_ON This results in the minimum current I2.

[0060] Since the current I2 in the minimum current section is less than the current I1 in the first period T1, the gate-source voltage V GS(H) The rate of increase will be slower compared to the first period T1.

[0061] Then, at time t3, the output voltage V OUT The second threshold voltage V th2 When it exceeds this value, the program transitions to the third period T3. In the third period T3, the turn-on current I HG_ON This results in a third current I3 that is greater than the minimum current I2. The third current I3 may also be greater than the first current I1. This results in a gate-source voltage V during the third period T3. GS(H) The rate of increase will accelerate.

[0062] Then, at time t4, the output voltage V OUT However, the input voltage V M A third threshold voltage V defined in the vicinity of th3When this value is exceeded, the system transitions to the fourth period T4. During the fourth period T4, the turn-on circuit 230 enters a strong-on state, and the gate voltage V of the high-side transistor MH is reached. HG This is a high-level voltage (bootstrap voltage V BST ) is fixed in this position, and the high-side transistor MH is strongly fixed in the ON state.

[0063] The above describes the operation of the switching circuit 100.

[0064] According to this switching circuit 100, the first period T1 is defined as the time until just before the high-side transistor MH turns on, and the turn-on current I of the first current I1 is supplied to the gate of the high-side transistor MH. HG_ON It supplies the gate voltage V HG This increases the turn-on current I supplied to the gate of the high-side transistor MH during the second period (minimum current interval) T2, after the high-side transistor MH has turned on and a reverse recovery current can flow through the lower arm flywheel diode. HG_ON By reducing the current to the second current I2, the high-side transistor MH is turned on gradually while maintaining a high on-resistance. This suppresses shoot-through current and ringing caused by the reverse recovery current of the flywheel diode on the opposite side (i.e., the low side) from the high-side transistor MH, which is the target of the gate driver circuit 200.

[0065] Next, in the third period T3, where the possibility of reverse recovery current flowing is low, the turn-on current I supplied to the gate of the high-side transistor MH is... HG_ON By increasing the current to a third current I3, which is greater than the second period T2, the turn-on time of the high-side transistor MH can be shortened, thereby reducing power consumption.

[0066] Furthermore, the turn-on current I supplied to the gate of the high-side transistor MH during the third period T3 HG_ONThis is greater than the first current I1 in the first period T1. This allows the on-resistance of the high-side transistor MH to be reduced in a short time, thereby further improving the efficiency of the bridge circuit.

[0067] Similarly, the turn-on circuit 260 of the low-side driver 250 also has a turn-on current I LG_ON The control circuit 210 is configured to be switchable in multiple stages, in addition to turning the turn-on circuit 260 on and off when the bridge circuit 110 is operating in current sink mode, and also controls the turn-on current I generated by the turn-on circuit 260. LG_ON It controls the amount of current.

[0068] Figure 4 is an operating waveform diagram of the gate driver circuit 200 in current sink mode shown in Figure 2.

[0069] Before time t0, the input signal IN is high level, the high-side transistor MH is on, the low-side transistor ML is off, and the output voltage V OUT The input voltage is V M That's how it is.

[0070] At time t0, the input signal IN transitions to a low level. As a result, the turn-off circuit 240 turns off the gate voltage V of the high-side transistor MH. HG This reduces the voltage and turns off the high-side transistor MH.

[0071] At time t1, the gate-source voltage V of the high-side transistor MH is GS(H) When the voltage falls below a predetermined threshold voltage, the high-side off detection signal HS_OFF is asserted. In response to the assertion of the high-side off detection signal HS_OFF, the control circuit 210 enables the turn-on circuit 260 of the low-side driver 250.

[0072] During the first period T1, the turn-on circuit 260 has a turn-on current I of the first current I1. LG_ON Generates.

[0073] Then, at time t2, the gate-source voltage V of the low-side transistor ML GS(L) However, the first threshold voltage V th1 When it exceeds this value, it transitions to the second period T2 (minimum current section). In the second period T2, the turn-on current I LG_ON This results in the minimum current I2.

[0074] The current I2 in the minimum current section T2 is less than the current I1 in the first period T1, therefore the gate-source voltage V GS(L) The rate of increase will be slower compared to the first period T1.

[0075] Then, at time t3, the output voltage V OUT When the voltage drops to a predetermined threshold voltage, the system transitions to the third period T3. In the third period T3, the turn-on current I HG_ON This results in a third current I3 that is greater than the minimum current I2. The third current I3 may also be greater than the first current I1. This results in a gate-source voltage V during the third period T3. GS(L) The rate of increase will accelerate.

[0076] Then, at time t4, the output voltage V OUT However, when the voltage drops to a threshold voltage set near 0V, the system transitions to the fourth period T4. In the fourth period T4, the turn-on circuit 260 enters a strong-on state, and the gate voltage of the low-side transistor ML V LG The voltage is fixed at a high level, and the low-side transistor ML is strongly fixed in the ON state.

[0077] This control suppresses shoot-through current and ringing caused by the reverse recovery current of the high-side flywheel diode.

[0078] Next, we will explain the specific configuration of the gate driver circuit 200.

[0079] Figure 5 is a circuit diagram of the gate driver circuit 200 according to the embodiment.

[0080] The turn-on circuit 230 includes a first current source 232 and a second current source 234. The first current source 232 supplies a constant amount of first current I during the turn-on period T1 to T3. C This is sourced to the gate of the power transistor to be driven, i.e., the high-side transistor MH.

[0081] The second current source 234 includes multiple n (n≧2) transistors M1, M2, ... Mn connected in parallel, whose on / off states can be individually controlled. During the turn-on period T1~T3, the combination of transistors that are on in the second current source 234 changes over time. The multiple transistors M1~Mn are PMOS transistors, and their size (W / L) is designed to operate in the non-saturation region.

[0082] The second current source 234 provides a second current I whose current amount changes depending on the combination of transistors that are turned on. V This is sourced to the gate of the high-side transistor MH. First current I C and the second current I V The sum of these is the turn-on current IHG_ON.

[0083] The turn-on circuit 260 is configured similarly to the turn-on circuit 230 and includes a first current source 262 and a second current source 264. The first current source 262 supplies a constant amount of first current I during the turn-on period T1 to T3. C This is sourced to the gate of the power transistor to be driven, i.e., the low-side transistor ML.

[0084] The second current source 264 is configured similarly to the second current source 234. Specifically, the second current source 264 includes multiple n (n≧2) transistors M1, M2, ... Mn connected in parallel, whose on / off states can be individually controlled. During the turn-on period T1 to T3, the combination of transistors that are on in the second current source 264 changes over time.

[0085] FIG. 6 is a waveform diagram for explaining the operation of the turn-on circuit 230 in FIG. 5. During the first period T1 to the third period T3, the first current source 232 is on, and a constant first current I C is generated. In the first period T1, some of the transistors M1 to Mn of the second current source 234 are on, and a second current I V1 is generated. In the second period T2, all the transistors M1 to Mn of the second current source 234 are off, and the second current I V is 0. In the third period T3, some of the transistors M1 to Mn of the second current source 234 are on, and a second current I V3 is generated.

[0086] According to the turn-on circuit 230 in FIG. 5, it is possible to prevent the current from becoming zero or from jumping significantly when switching between the first period T1, the second period T2, and the third period T3.

[0087] The same applies to the turn-on circuit 260.

[0088] FIG. 7 is a circuit diagram of a turn-on circuit 230A according to an embodiment. The first current source 232A includes a constant current source CS1 and a current mirror circuit CM1. The constant current source CS1 generates a reference current I0. The current mirror circuit CM1 copies and folds back the reference current I0 to generate the first current I C .

[0089] FIG. 8 is a circuit diagram of a turn-on circuit 230B according to an embodiment. The first current source 232B is a transistor M0 including one or a plurality of PMOS transistors connected in parallel, and the current flowing through the transistor M0 is the first current I C .

[0090] FIG. 9 is a circuit diagram of a turn-on circuit 230C according to an embodiment. The first current source 232C is a combination of the first current source 232A in FIG. 7 and the first current source 232B in FIG. 8, and includes a constant current source CS1, a current mirror circuit CM1, and a transistor M0.

[0091] (Embodiment 2) In Embodiment 1, a configuration for solving problems that occur when turning on the high-side transistor MH and the low-side transistor ML (collectively referred to as power transistors) was described. In Embodiment 2, a configuration for solving problems that occur when turning off the high-side transistor MH and the low-side transistor ML (collectively referred to as power transistors) will be described.

[0092] First, problems that occur when turning off a power transistor in a switching circuit will be described.

[0093] FIG. 10 is a circuit diagram for explaining the switching of the switching circuit 10. Here, the turn-off operation of the high-side transistor will be described. The switching circuit 10 includes a high-side transistor MH and a low-side transistor ML provided in series between a power supply terminal and a ground terminal.

[0094] The switching circuit 10 in FIG. 10 operates in a current source mode, and a current I OUT is supplied from the switching circuit 10 toward a load (not shown).

[0095] State φ H indicates a high output state in which the high-side transistor MH is on and the low-side transistor ML is off. A high-side current I HO flowing from the power supply line through the high-side transistor MH is supplied to the load as an output current I OUT .

[0096] States φ1 and φ2 indicate the turn-off period of the high-side transistor MH. The high-side driver 20 extracts a gate current I HG of a constant current from the gate of the high-side transistor MH, and reduces the gate-source voltage of the high-side transistor MH with time. In state φ1, the load current mainly flows as the high-side current I HOIn state φ2, the load current is the high-side current I flowing through the high-side transistor MH. HO And the current I flowing through the body diode of the low-side transistor ML LO This is the total.

[0097] state φ DT This indicates a dead-time state where both the high-side transistor MH and the low-side transistor ML are off. In this state, the load is supplied from the body diode ML of the low-side transistor ML.

[0098] Figure 11 is an operating waveform diagram of the switching circuit 10 in Figure 10. In states φ1 and φ2, the high-side driver 20 has a constant gate current I HG The gate current I is assumed to be sunk from the gate of the high-side transistor MH. HG In this case, the direction in which current flows into the gate of the high-side transistor MH is taken as positive, and the direction in which it is pulled out from the gate is taken as negative.

[0099] Gate current I HG In control where the gate current I is constant, HG If the value is small, the power consumption of the high-side transistor MH increases, and the amount of heat generated increases.

[0100] Conversely, gate current I HG Increasing the power consumption of the high-side transistor MH decreases, but the high-side current I flowing through the high-side transistor MH in state φ2 decreases. HO The slope of the curve increases, and the EMI increases. Also, the high-side current I in state φ2 HO If the slope is large, the output voltage V will be present until the body diode of the low-side transistor ML conducts. OUT This results in a large negative voltage.

[0101] Thus, the gate current I HG In control systems that maintain a constant level, there is a trade-off relationship between the power consumption of the high-side transistor MH and the EMI and negative output voltage.

[0102] The following describes a gate driver circuit that can suppress EMI and negative voltage while reducing power consumption.

[0103] Figure 12 is a circuit diagram of the switching circuit 100D according to Embodiment 2. The basic configuration of the gate driver circuit 200D is the same as that of the gate driver circuit 200 in Figure 2. In Embodiment 2, the turn-off circuit 240 of the high-side driver 220 has a turn-off current I HG_OFF This is configured to be switchable in multiple stages. Furthermore, the turn-off circuit 270 of the low-side driver 250 has a turn-off current I LG_OFF It is configured to be switchable in multiple stages.

[0104] The gate driver circuit 200D includes a first output sensor 280 and a second output sensor 286.

[0105] The first output sensor 280 is connected to the switching line 206, and the output voltage V OUT It monitors the output voltage V. The first output sensor 280 monitors the output voltage V. OUT However, the first threshold voltage V th1 If it falls below this level, the first output detection signal VOUTDET1 is asserted (for example, set to high).

[0106] The second output sensor 286 is connected to the switching line 206, and the output voltage V OUT The second output sensor 286 monitors the output voltage V. OUT However, the third threshold voltage V th3 If it falls below this level, the third output detection signal VOUTDET3 is asserted (for example, set to high).

[0107] When the bridge circuit 110 is operating in current source mode, the control circuit 210D controls the on / off state of the turn-off circuit 240, as well as the turn-off current I generated by the turn-off circuit 240. HG_OFF The current is controlled as follows.

[0108] The control circuit 210D responds to the instruction to turn off the high-side transistor MH by controlling the gate current I of the turn-off circuit 240. HG_OFF Set the first current quantity I1. Then, in response to the assertion of the first output detection signal VOUTDET1, the gate current I HG_OFF Set the current to a second current I2, which is less than the first current I1.

[0109] In response to the assertion of the high-side off signal HS_OFF, the control circuit 210 activates the low-side driver 250 and initiates the turn-on operation of the low-side transistor ML.

[0110] Furthermore, the control circuit 210D controls the turn-off circuit 240 in response to the assertion of the high-side off signal HS_OFF, thereby controlling the gate-source voltage V of the high-side transistor MH. HGS The voltage is fixed at 0V. For example, the turn-off circuit 240 includes an off-fixing switch connected between the gate and source of the high-side transistor MH, and when the off-fixing switch is turned on, the gate-source voltage of the high-side transistor MH is fixed at 0V. HGS You may also fix it to 0V.

[0111] Figure 13 is a waveform diagram illustrating the operation of the switching circuit 100D shown in Figure 12. The switching circuit 100D is operating in current source mode.

[0112] When a command to turn off the high-side transistor MH is issued at time t0, the control circuit 210 controls the gate current I HG Set the current to the first current I1 and activate the turn-off circuit 240 of the high-side driver 220.

[0113] At time t1, the output voltage V OUT The first threshold voltage V th1 When the value falls below a certain level, the first output detection signal VOUTDET1 is asserted. In response to the assertion of the first output detection signal VOUTDET1, the control circuit 210 sets the gate current I HG Set this to the second current quantity I2.

[0114] At time t2, the gate-source voltage V of the high-side transistor MH is HGS The threshold voltage V OFF When the voltage drops to a certain level, the high-side off signal HS_OFF is asserted.

[0115] When the high-side off signal HS_OFF is asserted, the gate-source voltage V of the high-side transistor MH is activated. HGS The voltage is fixed at 0V.

[0116] Furthermore, in response to the assertion of the high-side off signal HS_OFF, the low-side driver 250 becomes active, and the low-side transistor ML starts turning on.

[0117] The above describes the operation of the switching circuit 100.

[0118] In the time chart of Figure 13, the period t0 to t1 corresponds to state φ1 in Figure 10, and the period t1 to t2 corresponds to state φ2 in Figure 10. According to the gate driver circuit 200D of Embodiment 2, the first output sensor 280 detects the transition from state φ1 to φ2, and in state φ1, the gate current I HG_OFF By increasing the current, the turn-off time can be shortened, and the power consumption of the high-side transistor MH can be reduced. Also, in state φ2, the gate current I HG_OFF By reducing the amount of current, the high-side current I HO The slope can be reduced, and EMI can be suppressed. Also, the output voltage V OUT This can suppress the generation of negative voltage.

[0119] Gate current I HG_OFF You could also make it possible to switch between three or more levels.

[0120] The control circuit 210D controls the output current I of the bridge circuit 110. OUT In the operation mode (sink mode) in which current flows in from a load (not shown), the turn-off circuit 270 is controlled as follows.

[0121] The control circuit 210D responds to the instruction to turn off the low-side transistor ML by controlling the gate current I of the turn-off circuit 270D. LG_OFF Set the fourth current quantity I4. Then, in response to the assertion of the third output detection signal VOUTDET3, the gate current I LG_OFF Set the current to the fifth current I5, which is less than the fourth current I4.

[0122] In response to the assertion of the low-side off signal LS_OFF, the control circuit 210D activates the high-side driver 220 and initiates the turn-on operation of the high-side transistor MH.

[0123] Furthermore, the control circuit 210D controls the turn-off circuit 270D in response to the assertion of the low-side off signal LS_OFF, thereby controlling the gate-source voltage V of the low-side transistor ML. LGS The voltage is fixed at 0V. For example, the turn-off circuit 270 includes an off-fixing switch connected between the gate and source of the low-side transistor ML, and when the off-fixing switch is turned on, the gate-source voltage of the low-side transistor ML is fixed at 0V. LGS You may also fix it to 0V.

[0124] This control reduces the power consumption of the low-side transistor ML while suppressing EMI.

[0125] Figure 14 is a circuit diagram of the gate driver circuit 200D according to Embodiment 2. The turn-off circuit 240 of the high-side driver 220 includes a third current source 242 and a fourth current source 244.

[0126] The third current source 242 supplies a constant amount of third current I during the turn-off period t0 to t2 shown in Figure 13. C This is sinked from the gate of the high-side transistor MH.

[0127] The fourth current source 244 supplies the fourth current I during the turn-off period t0 to t2. VThe current is sunk from the gate of the high-side transistor MH. Third current I C and the fourth current I V The sum of the turn-off currents I HG_OFF The fourth current source 244, like the second current source 234 in Figure 5, includes transistors connected in parallel and individually controllable on or off. The transistors of the fourth current source 244 are N-channel MOSFETs.

[0128] 4th current I V In Figure 13, the period t0 to t1 is 0, and the period t1 to t2 can be non-zero.

[0129] The turn-off circuit 270 of the low-side driver 250 is configured similarly to the turn-off circuit 240 of the high-side driver 220 and includes a third current source 272 and a fourth current source 274.

[0130] The third current source 272 supplies a constant amount of third current I C This is sinked from the gate of the low-side transistor ML.

[0131] The fourth current source 274 is the fourth current I V The current is sunk from the gate of the low-side transistor ML. Third current I C and the fourth current I V The sum of the turn-off currents I LG_OFF The fourth current source 274, like the fourth current source 274 in Figure 5, includes transistors connected in parallel and individually controllable on or off. The transistors of the fourth current source 274 are N-channel MOSFETs.

[0132] According to the gate driver circuit 200D in Figure 14, it is possible to prevent the current from becoming zero or glitches from occurring at the timing of the switchover of the turn-off current.

[0133] (Application) Next, the applications of the switching circuit 100 will be explained. The switching circuit 100 can be suitably used in a motor drive circuit.

[0134] Figure 15 is a circuit diagram of a motor drive device 300 according to an embodiment. The motor drive device 300 drives the load, a three-phase motor 302, and controls its rotational state.

[0135] The motor drive unit 300 comprises a bridge circuit 310 and a gate driver circuit 400. The bridge circuit 310 is a three-phase inverter having U-phase, V-phase, and W-phase legs, and each phase leg has a high-side transistor MH and a low-side transistor ML.

[0136] The gate driver circuit 400 includes a control circuit 410 and high-side drivers 420U~420W and low-side drivers 450U~450W. The control circuit 410 generates control signals that indicate the state of the six arms constituting the bridge circuit 310 based on the state of the load, which is a three-phase motor 302.

[0137] The high-side drivers 420U to 420W are constructed using the same architecture as the high-side driver 220 described above. The low-side drivers 450U to 450W are constructed using the same architecture as the low-side driver 250 described above.

[0138] Here, a three-phase motor is used as an example, but a single-phase motor can also be used. In this case, the bridge circuit 310 becomes an H-bridge circuit.

[0139] Next, the applications of the motor drive unit 300 will be explained. The motor drive unit 300 can be used to control the spindle motor of a hard disk, or to control the lens drive motor of an imaging device. Alternatively, it can be used to drive the drive motor of a printer head, or the paper feed motor. Alternatively, the motor drive unit 300 can be used to drive motors in electric vehicles, hybrid vehicles, and the like.

[0140] The embodiments are illustrative, and it will be understood by those skilled in the art that various modifications are possible in combinations of their components and processing steps, and that such modifications also fall within the scope of this disclosure or the present invention. Such modifications will be described below.

[0141] (Variation 1) In this embodiment, the bridge circuit 110 is composed of discrete components, but it is not limited to that, and the bridge circuit 110 may be integrated into the gate driver circuit 200.

[0142] (Modification 2) The power transistor may be constructed using an IGBT (Insulated Gate Bipolar Transistor).

[0143] (Variation 3) The applications of the switching circuit 100 are not limited to the motor drive device 300. For example, the switching circuit 100 can be suitably used in switching regulators (DC / DC converters), various power conversion devices (inverters and converters), inverters for lighting discharge lamps, digital audio amplifiers, and so on. Therefore, the switching circuit 100 can be used in consumer electronics including electronic devices and home appliances, automobiles and in-vehicle components, industrial vehicles and industrial machinery.

[0144] The embodiments described using specific terminology merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted in the embodiments, without departing from the spirit of the present invention as defined in the claims.

[0145] (Note) This specification discloses the following technologies:

[0146] (Item 1) A gate driver circuit for driving an N-type power transistor, During the turn-on period of the power transistor, a turn-on circuit is provided that sources a turn-on current to the gate of the power transistor. A turn-off circuit that sinks the turn-off current from the gate of the power transistor during the turn-off period of the power transistor, A control circuit that controls the turn-on circuit and the turn-off circuit, Equipped with, The aforementioned turn-on circuit is During the turn-on period, a first current source supplies a fixed amount of first current to the gate of the power transistor, A second current source that sources a second current to the gate of a power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-on period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on, A gate driver circuit, wherein the sum of the first current and the second current is the turn-on current.

[0147] (Item 2) The first current source is, A constant current source that generates a reference current, A current mirror circuit that copies the reference current and generates the first current, The gate driver circuit described in item 1, including the gate driver circuit described in item 1.

[0148] (Item 3) The gate driver circuit described in item 1, wherein the first current source includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, and the amount of the first current depends on the combination of the plurality of transistors that are on.

[0149] (Item 4) The second current source is a gate driver circuit according to any one of items 1 to 3, wherein all of the plurality of transistors are turned off and the second current is zero during a minimum current interval of a part of the turn-on period.

[0150] (Item 5) The gate driver circuit according to item 4, wherein the second current source generates the second current, in which at least one of the plurality of transistors is turned on during a first interval prior to the minimum current interval of the turn-on period, and the amount of current is non-zero.

[0151] (Item 6) The gate driver circuit according to item 5, wherein the second current source generates the second current, in which at least one of the plurality of transistors is turned on during a third interval after the minimum current interval of the turn-on period, and the amount of current is non-zero.

[0152] (Item 7) The gate driver circuit described in item 6, wherein the second current in the third section is greater than the second current in the first section.

[0153] (Item 8) The gate driver circuit described in any of items 1 to 7, wherein the sizes of the plurality of transistors constituting the second current source are binary weighted.

[0154] (Item 9) The aforementioned turn-off circuit is During the aforementioned turn-off period, a third current source sinks a certain amount of third current from the gate of the power transistor, A fourth current source sinks a fourth current from the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-off period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on. A gate driver circuit according to any one of items 1 to 8, wherein the sum of the third current and the fourth current is the turn-off current.

[0155] (Item 10) A gate driver circuit for driving an N-type power transistor, During the turn-on period of the power transistor, a turn-on circuit is provided that sources a turn-on current to the gate of the power transistor. A turn-off circuit that sinks the turn-off current from the gate of the power transistor during the turn-off period of the power transistor, A control circuit that controls the turn-on circuit and the turn-off circuit, Equipped with, The aforementioned turn-off circuit is During the aforementioned turn-off period, a third current source sinks a certain amount of third current from the gate of the power transistor, A fourth current source sinks a fourth current from the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-off period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on. A gate driver circuit including the third current and the fourth current, wherein the sum of the third current and the fourth current is the turn-off current.

[0156] (Item 11) A gate driver circuit described in any of items 1 through 10, integrated onto a single semiconductor substrate.

[0157] (Item 12) A bridge circuit including a high-side transistor and a low-side transistor, A high-side driver is a gate driver circuit according to any one of items 1 to 11 that drives the high-side transistor as the power transistor, A low-side driver, which is a gate driver circuit according to any one of items 1 to 11 that drives the low-side transistor as the power transistor, A motor drive device equipped with the following features.

[0158] (Item 13) Motor and, A motor drive device as described in item 12 for driving the motor, An electronic device equipped with the following features. [Explanation of Symbols]

[0159] 100 Switching Circuits 102 Power Line 104 output lines 106 Grounding line 110 Bridge Circuit MH High-Side Transistor ML Low-Side Transistor 200 Gate Driver Circuit 202 Bootstrap Line 203 Rectifier 204 Switching Line 206 Power Line 208 Grounding line 210 Control circuits 220 High-Side Driver 230 Turn-on Circuit 232 1st current source 234 Second current source 240 Turn-off Circuit 242 Third current source 244 4th current source 250 Low-Side Driver 260 Turn-on Circuit 262 1st current source 264 2nd current source 270 Turn-off circuit 272 Third current source 274 4th current source 280 First Output Sensor 286 Third Output Sensor VOUTDET1 First output detection signal VOUTDET3 Third Output Detection Signal 290 High-side off-sensor 292 Low-side off-sensor 300 Motor drive unit 302 Three-phase motor 310 Bridge Circuit 400 Gate Driver Circuit

Claims

1. A gate driver circuit for driving an N-type power transistor, During the turn-on period of the power transistor, a turn-on circuit is provided that sources a turn-on current to the gate of the power transistor. A turn-off circuit that sinks the turn-off current from the gate of the power transistor during the turn-off period of the power transistor, A control circuit that controls the turn-on circuit and the turn-off circuit, Equipped with, The aforementioned turn-on circuit is During the turn-on period, a first current source supplies a fixed amount of first current to the gate of the power transistor, A second current source that supplies a second current to the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-on period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on, A gate driver circuit, wherein the sum of the first current and the second current is the turn-on current.

2. The first current source is, A constant current source that generates a reference current, A current mirror circuit that copies the reference current and generates the first current, The gate driver circuit according to claim 1, including the gate driver circuit described in claim 1.

3. The gate driver circuit according to claim 1, wherein the first current source includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, and the amount of the first current depends on the combination of the plurality of transistors that are on.

4. The gate driver circuit according to any one of claims 1 to 3, wherein the second current source is such that all of the plurality of transistors are turned off and the second current is zero during a minimum current interval that is part of the turn-on period.

5. The gate driver circuit according to claim 4, wherein the second current source generates the second current, in which at least one of the plurality of transistors is turned on during a first interval prior to the minimum current interval of the turn-on period, and the amount of current is non-zero.

6. The gate driver circuit according to claim 5, wherein the second current source generates the second current, in a third section after the minimum current section of the turn-on period, by turning on at least one of the plurality of transistors and having a non-zero current amount.

7. The gate driver circuit according to claim 6, wherein the second current in the third section is greater than the second current in the first section.

8. The gate driver circuit according to any one of claims 1 to 3, wherein the sizes of the plurality of transistors constituting the second current source are binary weighted.

9. The aforementioned turn-off circuit is During the turn-off period, a third current source sinks a certain amount of third current from the gate of the power transistor, A fourth current source sinks a fourth current from the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-off period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on. A gate driver circuit according to any one of claims 1 to 3, wherein the sum of the third current and the fourth current is the turn-off current.

10. A gate driver circuit for driving an N-type power transistor, During the turn-on period of the power transistor, a turn-on circuit is provided that sources a turn-on current to the gate of the power transistor. A turn-off circuit that sinks the turn-off current from the gate of the power transistor during the turn-off period of the power transistor, A control circuit that controls the turn-on circuit and the turn-off circuit, Equipped with, The aforementioned turn-off circuit is During the turn-off period, a third current source sinks a certain amount of third current from the gate of the power transistor, A fourth current source sinks a fourth current from the gate of the power transistor, which includes a plurality of transistors connected in parallel and whose on / off states can be individually controlled, wherein during the turn-off period, the combination of the plurality of transistors that are on changes over time, and the amount of current changes according to the transistors that are on. A gate driver circuit, wherein the sum of the third current and the fourth current is the turn-off current.

11. A gate driver circuit according to any one of claims 1 to 3 or 10, which is integrated on a single semiconductor substrate.

12. A bridge circuit including a high-side transistor and a low-side transistor, A gate driver circuit according to any one of claims 1 to 3, 10, which drives the high-side transistor as the power transistor, comprising a high-side driver, A gate driver circuit according to any one of claims 1 to 3, 10, which drives the low-side transistor as the power transistor, a low-side driver, A motor drive device equipped with the following features.

13. Motor and, A motor drive device according to claim 12 for driving the motor, An electronic device equipped with the following features.