Circuits, memory devices, and calibration methods

JP2026090605APending Publication Date: 2026-06-02YANGTZE MEMORY TECH CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
YANGTZE MEMORY TECH CO LTD
Filing Date
2026-03-05
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

Conventional resistance offset calibration (RXOC) procedures in static dynamic random access memory (SDRAM) require a full-rate write clock (WCK) with a large frequency range, necessitating additional circuitry and synchronization states, which complicates design and reduces calibration accuracy.

Method used

A fully synchronous RXOC training strategy using a local oscillator in the RXOC circuit to synchronize DFE selection and control logic, eliminating the need for CAS commands and reducing silicon footprint while improving calibration stability.

Benefits of technology

The solution simplifies RXOC control logic operations, enhances calibration accuracy, and reduces the silicon footprint by using an internal clock source for precise DFE component calibration without requiring additional synchronization states.

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Abstract

We provide RXOC training strategies. [Solution] According to one aspect of the present disclosure, a synchronous dynamic random access memory comprising peripheral circuits is provided. The peripheral circuits may include a DQ circuit comprising a plurality of DFE components. The peripheral circuits may include an RXOC circuit. The RXOC circuit may include an oscillator. The oscillator may generate an internal clock source. The RXOC circuit may include a DQ selection component. The DQ selection component may select a DFE component from a plurality of DFE components for calibration. The DQ selection component may output a slicer result signal indicating the offset value received from the DFE component. The RXOC circuit may include control logic. The control logic may transmit a calibration signal associated with the DFE component to the DQ circuit based on the slicer result signal.
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