Multilayer ceramic capacitor and method for manufacturing the same

Abstract

This invention provides a multilayer ceramic capacitor for high-voltage applications with excellent temperature characteristics, voltage withstand characteristics, and DC bias characteristics. [Solution] A multilayer ceramic capacitor and a method for manufacturing the same is provided, comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed on the outside of the capacitor body, wherein the dielectric layer includes a plurality of dielectric crystal grains, and at least one of the plurality of dielectric crystal grains has a core-shell structure including a core portion and a shell portion surrounding at least a part of the core portion, the core portion includes barium (Ba) and titanium (Ti), and the shell portion includes calcium (Ca) or strontium (Sr) and zirconium (Zr).

Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, varistors, thermistors, etc. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) can be used in various electronic devices due to its advantages of being small, having a high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor mounted on the substrates of various electronic products such as video equipment such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal mobile terminals, and smartphones to charge or discharge electricity.

[0004] Recently, in order to ensure the high functionality and stability of equipment for the electrical and IT industries, the need for smaller size, higher capacitance, and higher guaranteed voltage of multilayer ceramic capacitors is expected to continue to increase.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a high-voltage multilayer ceramic capacitor having excellent temperature characteristics, withstand voltage characteristics, and DC bias characteristics.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor.

Means for Solving the Problems

[0007] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed outside the capacitor body, wherein the dielectric layer includes a plurality of dielectric crystal grains, and at least one of the plurality of dielectric crystal grains has a core-shell structure including a core portion and a shell portion surrounding at least a part of the core portion, the core portion includes barium (Ba) and titanium (Ti), and the shell portion includes calcium (Ca) or strontium (Sr) and zirconium (Zr), and in TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) line analysis of a linear section of the long axis passing through the center of the dielectric crystal grain having the core-shell structure, the core portion is a region in which the zirconium (Zr) is less than 3 moles per 100 moles of titanium (Ti), and the shell portion is a region in which the zirconium (Zr) is 3 moles or more per 100 moles of titanium (Ti).

[0008] The content of calcium (Ca) or strontium (Sr) in the shell portion may be 2.5 to 40 moles per 100 moles of titanium (Ti).

[0009] The zirconium (Zr) content in the shell portion may be 3 to 150 moles per 100 moles of titanium (Ti).

[0010] In the shell portion, the calcium (Ca) content may be 2.5 to 40 parts per 10

[0011] In the shell portion, the strontium (Sr) content may be 2.5 to 40 moles per 100 moles of titanium (Ti), and the zirconium (Zr) content may be 3 to 150 moles per 100 moles of titanium (Ti).

[0012] The shell portion may further contain rare earth elements.

[0013] The aforementioned rare earth elements may include elements with an ionic radius larger than yttrium (Y).

[0014] The rare earth elements may include one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce).

[0015] The total content of the rare earth elements in the shell portion may be 0.5 to 10 moles per 100 moles of titanium (Ti).

[0016] The shell portion may further contain a transition metal.

[0017] The transition metal may include one or more selected from manganese (Mn), vanadium (V), and chromium (Cr).

[0018] The shell portion may further contain rare earth elements and transition metals.

[0019] The shell portion may further contain rare earth elements, including one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce), as well as transition metals, including one or more selected from manganese (Mn), vanadium (V), and chromium (Cr).

[0020] The dielectric layer further includes a grain boundary disposed between the plurality of dielectric crystallites, and the grain boundary can contain silicon (Si).

[0021] The content of the silicon (Si) in the grain boundary may be 2.5 to 20 parts by mole with respect to 100 parts by mole of the titanium (Ti).

[0022] The grain boundary can further contain a rare earth element.

[0023] The rare earth element can include one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce).

[0024] The total content of the rare earth element in the grain boundary may be 3 to 30 parts by mole with respect to 100 parts by mole of the titanium (Ti).

[0025] The diameter of the core portion may be 15% to 85% of the diameter of the dielectric crystallite.

[0026] The number of dielectric crystallites having the core-shell structure may be 5% to 100% of the total number of dielectric crystallites present in the dielectric layer.

[0027] Other embodiments include the steps of manufacturing a dielectric slurry including component main powder containing a barium titanate-based compound and a zirconium-based compound; manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; laminating the dielectric green sheets with the conductive paste layer formed thereon to manufacture a dielectric green sheet laminate; firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body. The zirconium-based compound includes one or more selected from compounds containing Zr and Ca and compounds containing Zr and Sr. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-shell structure including a core portion and a shell portion surrounding at least a part of the core portion. The core portion includes barium (Ba) and titanium (Ti), and the shell portion includes calcium (Ca) or strontium (Sr) and zirconium (Zr). A method for manufacturing a multilayer ceramic capacitor is provided.

[0028] The component main powder may include a mixture of the barium titanate-based compound and the zirconium-based compound, or a composite in which the zirconium-based compound is coated on the surface of the barium titanate-based compound.

[0029] The zirconium-based compound may include one or more selected from CaZrO3 and SrZrO3.

[0030] The dielectric slurry may further include sub-component powder including one or more selected from a silicon (Si)-containing compound, a rare earth element-containing compound, and a transition metal-containing compound.

[0031] The rare earth element-containing compound may include one or more compounds selected from dysprosium (Dy)-containing compounds, gadolinium (Gd)-containing compounds, lanthanum (La)-containing compounds, and cerium (Ce)-containing compounds.

[0032] The transition metal-containing compound may include one or more compounds selected from manganese (Mn)-containing compounds, vanadium (V)-containing compounds, and chromium (Cr)-containing compounds.

[0033] The aforementioned auxiliary component powder may include the silicon (Si)-containing compound, the rare earth element-containing compound, and the transition metal-containing compound.

[0034] The zirconium-based compound may be present in an amount of 1 mol% to 20 mol% relative to the total amount of the barium titanate-based compound and the zirconium-based compound. [Effects of the Invention]

[0035] This makes it possible to realize multilayer ceramic capacitors that not only have high capacitance and high voltage characteristics, but also excellent temperature characteristics, voltage withstand characteristics, and DC bias characteristics. [Brief explanation of the drawing]

[0036] [Figure 1] This is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] This is a cross-sectional view of a multilayer ceramic capacitor along the line I-I' in Figure 1. [Figure 3] This is a cross-sectional view of a multilayer ceramic capacitor along the line II-II' in Figure 1. [Figure 4] Figure 1 is an exploded perspective view showing the layered structure of the capacitor body after disassembly. [Figure 5] This is a schematic diagram showing a dielectric layer according to one embodiment. [Figure 6A] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6B] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6C] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6D] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6E] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6F] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 6G] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis of the dielectric layer according to Example 3. [Figure 7A] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of the dielectric layer according to Example 3. [Figure 7B] This is an image of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of the dielectric layer according to Example 3. [Figure 8] This graph shows the temperature coefficient of capacitance (TCC) of multilayer ceramic capacitors according to Examples 1-4 and Comparative Example 1. [Figure 9] This graph shows the STEP-IR characteristics of multilayer ceramic capacitors according to Examples 2-5 and Comparative Example 1. [Figure 10] This graph shows the DC bias characteristics of multilayer ceramic capacitors according to Examples 1-5 and Comparative Example 1. [Modes for carrying out the invention]

[0037] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings, so that those with ordinary skill in the art to which the present invention pertains can easily implement it. In the drawings, parts that are not necessary for the explanation of the present invention have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. In addition, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0038] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and it should be understood that the accompanying drawings do not limit the technical ideas disclosed herein and include all modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0039] Terms including ordinal numbers, such as "first," "second," etc., can be used to describe a variety of components, but the components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.

[0040] Furthermore, when we say that a layer, membrane, region, plate, or other part is "on top" of another part, this includes not only the case where it is "directly above" the other part, but also the case where the other part is in between. Conversely, when we say that one part is "directly above" another part, it means that there is no other part in between. Moreover, being "on top" of a reference part means being located above or below the reference part, and does not necessarily mean being located "on top" in the opposite direction of gravity.

[0041] Throughout the specification, terms such as “includes” or “have” are intended to indicate the presence of features, figures, stages, operations, components, parts, or combinations thereof described in the specification, and should be understood not to preemptively exclude the possibility of the presence or addition of one or more other features, figures, stages, operations, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this means, unless otherwise stated, that it may further include other components rather than excluding them.

[0042] Furthermore, throughout the specification, "on a plane" means when the subject is viewed from above, and "on a cross-section" means when the subject is viewed from the side of a cross-section obtained by cutting the subject perpendicularly.

[0043] Furthermore, throughout the specification, when we use the term "connected," it does not only mean that two or more components are directly connected, but can also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are integrated by location or function, even though they are referred to by different names.

[0044] Furthermore, throughout the specification, when it is stated that a substance "is included as a main component," this means that among the at least one component present in a given region, one component has the highest content relative to the total amount of the components.

[0045] A multilayer ceramic capacitor according to one embodiment will be described below with reference to Figures 1 to 4.

[0046] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor along the line II-II' in Figure 1; and Figure 4 is an exploded perspective view showing the multilayer structure when the capacitor body of Figure 1 is disassembled.

[0047] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and can be used, for example, with the same concept as the stacking direction in which the dielectric layers 111 are stacked. The length direction (L-axis direction) may be a direction extending alongside the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction), and can be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides, for example. The width direction (W-axis direction) may be a direction extending alongside the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction), and the length in the length direction (L-axis direction) of the sheet-shaped component may be longer than the length in the width direction (W-axis direction).

[0048] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0049] The capacitor body 110 may, for example, have a roughly hexahedral shape.

[0050] For the convenience of describing one embodiment, in the capacitor body 110, the two surfaces facing each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces are defined as the third and fourth surfaces, the two surfaces facing each other in the length direction (L-axis direction) are defined as the first and second surfaces, the two surfaces connected to the third and fourth surfaces are defined as the fifth and sixth surfaces, and the two surfaces facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0051] For example, the first surface on the bottom may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0052] The shape, dimensions, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in this embodiment.

[0053] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0054] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can become so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0055] The capacitor body 110 may include an active region and cover regions 112 and 113.

[0056] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are arranged alternately, and is the part that contributes to the formation of the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.

[0057] The cover regions 112 and 113 are margins in the thickness direction and can be located on the sides of the first and second surfaces of the active region in the thickness direction (T-axis direction), respectively. Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.

[0058] Furthermore, the capacitor body 110 may also include a side margin region.

[0059] The side margin region is a margin portion in the width direction and can be located on both sides of the active region opposite to each other in the width direction (W-axis direction), i.e., on the fifth and sixth surfaces, respectively. The side margin region can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and not applying the conductive paste layer to the sides of the dielectric green sheet surface, then laminating the dielectric green sheet and firing it, but the method of formation is not limited to this.

[0060] The cover regions 112, 113 and the side margin regions serve to prevent damage to the internal electrode layers 121, 122 due to physical or chemical stress.

[0061] Dielectric layer A dielectric layer according to one embodiment will be described with reference to Figure 5.

[0062] Figure 5 is a schematic diagram showing a dielectric layer according to one embodiment.

[0063] Referring to Figure 5, the dielectric layer 111 includes a plurality of dielectric crystal grains 10. The dielectric layer 111 may further include grain boundaries 20 arranged between the plurality of dielectric crystal grains 10.

[0064] At least one of the plurality of dielectric crystal grains 10 may have a core-shell structure including a core portion 12 and a shell portion 14 surrounding at least a part of the core portion 12.

[0065] The core portion 12 may contain barium (Ba) and titanium (Ti), and the shell portion 14 may contain calcium (Ca) or strontium (Sr) and zirconium (Zr).

[0066] The Ba and Ti in the core portion 12 can be derived from a barium titanate-based compound used as a dielectric matrix. The barium titanate-based compound may be a ferroelectric material with a high dielectric constant and stable temperature characteristics. As an example, the barium titanate-based compound may include one or more selected from BaTiO3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, and (Ba,Sr)TiO3.

[0067] The Ca or Sr and Zr in the shell portion 14 may be derived from a zirconium-based compound used as a dielectric matrix. The zirconium-based compound may be a paraelectric material with high dielectric strength and excellent electrostrictive properties. For example, the zirconium-based compound may include one or more selected from CaZrO3, SrZrO3, (Ba,Ca)ZrO3, and (Ba,Sr)ZrO3, for example, one or more selected from CaZrO3 and SrZrO3.

[0068] According to one embodiment, by mixing and applying a barium titanate-based compound base material and a zirconium-based compound base material, the material properties of the core portion 12 satisfy the X7R class temperature characteristics in the intermediate dielectric constant region of 1500 to 2000, and the material properties of the shell portion 14 enable excellent reduction resistance, reliability, and dielectric strength.

[0069] Furthermore, the Ca or Sr contained in the shell portion 14 can minimize the low-temperature shift of the Curie temperature (Tc) of Zr, thereby preventing deterioration of the temperature characteristics.

[0070] Barium titanate compounds, which are ferroelectric materials, possess electrostrictive and piezoelectric properties. When a high electric field is applied, stress and structural deformation occur, which can lead to physical and mechanical defects in the chip. Therefore, high-voltage products are being developed using design methods that minimize the application of high voltage, such as shielding lamination and voltage division. However, such methods make it difficult to secure capacitance at the same dielectric constant, and in particular, they induce a decrease in DC bias characteristics, leading to a reduction in product competitiveness. Another strategy is to secure capacitance and improve DC bias characteristics by minimizing the application of designs that reduce applied voltage, such as shielding lamination and voltage division, through material design that increases the withstand voltage. However, such methods have the disadvantages of degraded temperature characteristics and low dielectric constant, limiting the development of models that simultaneously satisfy high capacitance and high-voltage characteristics.

[0071] According to one embodiment, when the dielectric layer 111 has dielectric crystal grains 10 containing Ba and Ti derived from a ferroelectric material in the core portion 12 and Ca or Sr and Zr derived from a paraelectric material in the shell portion 14, the degradation of temperature characteristics can be minimized, and at the same time, the application of designs that reduce the boosting voltage via the shell portion 14 with high withstand voltage can be minimized. In other words, since the temperature characteristics satisfy the X7R class and the withstand voltage is increased at the same time, design factors that hinder capacitance and DC bias characteristics, such as voltage division designs, can be minimized. Furthermore, excellent reliability and reduction resistance can be achieved via the shell portion 14 with high withstand voltage, making it usable in high-voltage models that require a guaranteed voltage of 250V or more. In addition, temperature downgrade associated with improving withstand voltage can be minimized, thereby improving technological competitiveness. As a result, it is possible to secure multilayer ceramic capacitors that not only have high capacitance and high-voltage characteristics but also excellent temperature characteristics, withstand voltage characteristics, and DC bias characteristics.

[0072] In the dielectric crystal grain 10 having the core-shell structure, when performing TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis on a linear section of the long axis passing through the center of the dielectric crystal grain 10 having the core-shell structure, the core portion 12 may be a region where Zr is less than about 3 moles per 100 moles of Ti, and the shell portion 14 may be a region where Zr is about 3 moles or more per 100 moles of Ti. For example, the core portion 12 may be a region where Zr is greater than 0 to less than 3 moles per 100 moles of Ti, and the shell portion 14 may be a region where Zr is 3 moles or more to less than 300 moles per 100 moles of Ti.

[0073] The shell portion 14 may contain Ca and Zr, or it may contain Sr and Zr.

[0074] The Ca or Sr content in the shell portion 14 may be 2.5 to 40 moles per 100 moles of Ti, for example, 2.8 to 35 moles, or 3.0 to 30 moles. When the Ca or Sr content in the shell portion 14 is within the above range, the degradation of temperature characteristics can be minimized, and the application of designs that reduce the boosting voltage can be minimized. This makes it possible to secure a multilayer ceramic capacitor that not only has high capacitance and high voltage characteristics, but also excellent temperature characteristics, withstand voltage characteristics, and DC bias characteristics.

[0075] Furthermore, the Zr content in the shell portion 14 may be 3 to 150 parts per 100 parts of Ti, for example, 5 to 140 parts, 7 to 130 parts, or 10 to 120 parts. When the Zr content in the shell portion 14 is within the above range, it is possible to minimize the degradation of temperature characteristics and minimize the application of designs that reduce the boosting voltage, thereby ensuring a multilayer ceramic capacitor that not only has high capacitance and high voltage characteristics but also excellent temperature characteristics, withstand voltage characteristics, and DC bias characteristics.

[0076] According to one embodiment, the shell portion 14 may further contain rare earth elements.

[0077] Rare earth elements may include elements with an ionic radius greater than yttrium (Y). For example, rare earth elements may include one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce). Elements with an ionic radius greater than Y prefer to substitute at the A site in the dielectric matrix represented by the chemical formula ABO3.

[0078] The rare earth elements contained in the shell portion 14 can originate from rare earth element-containing compounds used as additives added to the dielectric base material during the formation of the dielectric layer.

[0079] If the shell portion 14 contains Ca or Sr and Zr, as well as the aforementioned rare earth elements, the substitution of the A-site of the rare earth elements induces n-type semiconductor properties, thereby suppressing oxygen vacancies and improving the dielectric strength, i.e., reliability.

[0080] The total content of rare earth elements in the shell portion 14 may be 0.5 to 10 moles per 100 moles of Ti, for example, 0.7 to 9 moles or 1 to 7 moles. When the total content of rare earth elements in the shell portion 14 is within the above range, a multilayer ceramic capacitor can be obtained that not only has high capacitance and high voltage characteristics but also excellent temperature characteristics, withstand voltage characteristics, and DC bias characteristics. When the total content of rare earth elements in the shell portion 14 is less than 0.5 moles per 100 moles of Ti, the withstand voltage characteristics may decrease, making it difficult to apply to high voltage applications, and when it exceeds 10 moles, the temperature characteristics may deteriorate.

[0081] According to one embodiment, the shell portion 14 may further contain a transition metal.

[0082] The transition metal may include one or more selected from, for example, manganese (Mn), vanadium (V), and chromium (Cr).

[0083] The transition metal contained in the shell portion 14 can be derived from a transition metal-containing compound used as an additive added to the dielectric matrix during the formation of the dielectric layer.

[0084] When the shell portion 14 contains Ca or Sr and Zr, as well as the aforementioned transition metal, the multilayer ceramic capacitor can have excellent temperature characteristics and high capacitance and high voltage characteristics.

[0085] As an example, the shell portion 14 may contain Ca or Sr, Zr, the rare earth element, and the transition metal.

[0086] The grain boundaries 20, which are arranged between multiple dielectric crystal grains 10, may contain silicon (Si).

[0087] Silicon (Si) can be derived from silicon (Si)-containing compounds used as additives added to dielectric base materials.

[0088] When Si is present in the grain boundary 20, the reliability of the multilayer ceramic capacitor can be improved by increasing the grain boundary resistance.

[0089] The Si content at the grain boundaries 20 may be 2.5 to 20 parts per 100 parts of Ti, for example, 2.8 to 19 parts, 3.0 to 18 parts, or 3.5 to 17 parts. When the Si content at the grain boundaries 20 is within the above range, the reliability of the multilayer ceramic capacitor can be improved.

[0090] The grain boundary 20 may be a region where Si is present in an area of ​​2.5 to 20 moles per 100 moles of Ti, as determined by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) line analysis of a linear section along the long axis passing through the center of a dielectric crystal grain 10 having a core-shell structure within the dielectric layer 111.

[0091] The grain boundaries 20 may contain rare earth elements in addition to Si.

[0092] The rare earth elements contained in the grain boundaries 20 may originate from rare earth element-containing compounds used as additives added to the dielectric matrix during the formation of the dielectric layer. In other words, they may be the same as the rare earth elements contained in the shell portion 14.

[0093] Specifically, rare earth elements can include elements with an ionic radius greater than yttrium (Y), such as one or more selected from Dy, Gd, La, and Ce.

[0094] If the grain boundaries 20 contain the aforementioned rare earth elements in addition to Si, the insulating effect can be further enhanced.

[0095] The total content of rare earth elements at the grain boundaries 20 may be 3 to 30 moles per 100 moles of Ti, for example, 4 to 29 moles, 5 to 28 moles, or 6 to 27 moles. When the total content of rare earth elements at the grain boundaries 20 is within the above range, the multilayer ceramic capacitor can exhibit excellent temperature characteristics and high capacitance and high pressure properties.

[0096] The structure, components, and composition of the dielectric layer 111 described above can be confirmed by TEM-EDS (transmission electron microscope-energy dispersive spectroscopy). TEM-EDS can be measured using the following method.

[0097] After curing the multilayer ceramic capacitor 100 in an epoxy mixture, the L-axis and T-axis planes (LT planes) of the capacitor body 110 are polished to a depth of 1 / 2 in the W-axis direction to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the active region of the cross-sectional sample is divided into three equal parts: the upper region, the middle region, and the lower region. Each region is then measured using a TEM (transmission electron microscope) so that at least one dielectric layer 111 and one internal electrode layer 121 and 122 are visible. The TEM can be measured using a Xe-FIB (focused ion beam) with an acceleration voltage of 200 kV and a magnification of 50,000x.

[0098] Next, EDS (energy-dispersive spectroscopy) mapping analysis is performed on the dielectric layer in the TEM image of the measured cross-sectional sample. From the EDS mapping analysis, the structure and composition of the dielectric crystal grains 10 and grain boundaries 20, which have a core-shell structure, can be confirmed. Specifically, it can be confirmed that Ba and Ti are present in the core portion 12 of the dielectric crystal grain 10, and Ca or Sr and Zr are present in the shell portion 14 of the dielectric crystal grain 10. In addition, it can be confirmed that Si is present at the grain boundaries 20.

[0099] Furthermore, by performing EDS (energy-dispersive spectroscopy) line analysis on the dielectric layer in the TEM image of the measured cross-sectional sample, the content of components within the dielectric crystal grains 10 and grain boundaries 20 having a core-shell structure can be confirmed. In other words, the content of Ca, Sr, Zr, etc. in the shell portion 14, and the content of Si, etc. in the grain boundaries 20 can be confirmed.

[0100] Specifically, in the TEM images of the upper, central, and lower regions, at least one dielectric layer 111 can be arbitrarily selected for each region, and then at least one dielectric crystal grain 10 and grain boundary 20 having a core-shell structure can be selected within that dielectric layer 111. EDS line analysis can be performed on a straight section of the long axis passing through the center of the selected dielectric crystal grain having a core-shell structure. For example, one dielectric layer can be arbitrarily selected for each region, and five dielectric crystal grains and grain boundaries having a core-shell structure can be selected for each dielectric crystal grain and grain boundary, and EDS line analysis can be performed on a total of 15 dielectric crystal grains and grain boundaries. In other words, the content of Ca, Sr, Zr, etc. in the shell portion 14, and the content of Si, etc. in the grain boundary 20 may be the average value of the content obtained from the EDS line analysis of the total of 15 items.

[0101] Furthermore, as described above, the EDS line analysis allows for the differentiation of the dielectric crystal grain 10 into a core portion 12 and a shell portion 14. For example, the core portion 12 may be a region where Zr is less than 3 moles per 100 moles of Ti, and the shell portion 14 may be a region where Zr is 3 moles or more per 100 moles of Ti.

[0102] According to one embodiment, the diameter of the core portion 12 may be 15% to 85% of the diameter of the dielectric crystal grains 10, for example, 18% to 82%, 20% to 80%, 23% to 77%, or 25% to 75%. When the diameter of the core portion has the above range, the multilayer ceramic capacitor can have not only excellent temperature characteristics but also high capacitance and high voltage characteristics.

[0103] The ratio of the diameters of the core portion 12 can be measured by the following method.

[0104] In the TEM images of the upper, central, and lower regions, after arbitrarily selecting at least one dielectric layer 111 for each region, and after confirming at least one dielectric crystal grain 10 having a core-shell structure in the dielectric layer 111, the diameter of the dielectric crystal grain 10 and the diameter of the core portion 12 can be measured and their ratio can be determined. For example, one dielectric layer can be arbitrarily selected for each region, and five dielectric crystal grains having a core-shell structure can be selected for each dielectric layer, and the ratio can be calculated as the average value of the ratio of the diameter of the core portion to the total of 15 dielectric crystal grains. In this case, the diameter of the dielectric crystal grain 10 is obtained as the average value of the length of the major axis having the maximum diameter passing through the center of the dielectric crystal grain 10 and the length of the minor axis having the minimum diameter. The diameter of the core portion 12 is obtained as the average value of the length of the core portion 12 obtained on the length of the major axis having the maximum diameter passing through the center of the dielectric crystal grain 10 and the length of the core portion 12 obtained on the length of the minor axis having the minimum diameter.

[0105] The number of dielectric crystal grains 10 having a core-shell structure may be 5% to 100% of the total number of dielectric crystal grains present in the dielectric layer 111, for example, 10% to 95%, 15% to 90%, or 20% to 85%. When the number of dielectric crystal grains 10 having a core-shell structure is within the above range, the multilayer ceramic capacitor can have not only excellent temperature characteristics but also high capacitance and high voltage characteristics.

[0106] The ratio of the number of dielectric crystal grains 10 having a core-shell structure can be measured by the following method.

[0107] In the TEM images of the upper, central, and lower regions, at least one dielectric layer 111 can be arbitrarily selected for each region, and the total number of dielectric crystal grains present in that dielectric layer and the number of dielectric crystal grains 10 having a core-shell structure can be measured to determine the ratio of the number of dielectric crystal grains having a core-shell structure. For example, two dielectric layers can be arbitrarily selected for each region, and the ratio can be calculated as the average value of the ratio of the number of dielectric crystal grains to a total of six dielectric layers.

[0108] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be between 0.1 μm and 8.0 μm, for example, between 0.1 μm and 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0109] The average thickness of the dielectric layer 111 can be measured by scanning electron microscopy (SEM) analysis after curing the multilayer ceramic capacitor 100 in an epoxy mixture, polishing, and ion milling. The SEM can be used, for example, at 10kV and 100x magnification, and can be measured so that at least one, three, five, or ten layers of the dielectric layer 111 are visible in the active region where the dielectric layer 111 intersects with the internal electrode layers 121 and 122. In the SEM image, the center point of the dielectric layer 111 in the length direction (L-axis direction) or width direction (W-axis direction) is used as the reference point, and the average thickness of the dielectric layer 111 can be determined at 10 points separated by a predetermined interval from the reference point. The interval of the 10 points can be adjusted according to the scale of the SEM image, for example, between 1 μm and 100 μm, between 1 μm and 50 μm, or between 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the spacing between the 10 points can be adjusted. Furthermore, by extending this average value measurement to 10 dielectric layers and measuring the average value, the average thickness of the dielectric layers can be further generalized.

[0110] internal electrode layer The internal electrode layers 121 and 122, that is, the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities, and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each being exposed through the third and fourth surfaces of the capacitor body 110.

[0111] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by the dielectric layer 111 placed in between them.

[0112] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, are electrically connectable to the first external electrode 131 and the second external electrode 132, respectively.

[0113] The internal electrode layers 121 and 122 contain a conductive metal, and may include one or more selected from metals such as Ni, Cu, Ag, Pd, Au, and alloys thereof.

[0114] Furthermore, the internal electrode layers 121 and 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111.

[0115] The internal electrode layers 121 and 122 may be formed using a conductive paste containing a conductive metal. The conductive paste can be printed using screen printing or gravure printing.

[0116] The average thickness of the internal electrode layers 121 and 122 may be 0.1 μm to 2 μm.

[0117] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscopy (SEM) analysis. Specifically, in an SEM image of a cross-sectional sample obtained in the same manner as the method for measuring the average thickness of the dielectric layer 111, the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the internal electrode layers 121 and 122 is used as a reference point, and the average thickness of the internal electrode layers 121 and 122 can be determined at 10 points separated by a predetermined interval from the reference point. The interval of the 10 points can be adjusted according to the scale of the SEM image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the internal electrode layers 121 and 122. If all 10 points are not located within the internal electrode layers 121 and 122, the position of the reference point can be changed or the interval between the 10 points can be adjusted. Furthermore, by extending this average measurement to 10 internal electrode layers and measuring the average values, the average thickness of the internal electrode layers can be further generalized.

[0118] The capacitor body 110 may be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0119] external electrode External electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities from each other and are electrically connectable to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0120] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which are opposite each other. At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the overlapping area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which are superimposed on each other along the T-axis in the active region.

[0121] The first external electrode 131 and the second external electrode 132 may each include first and second connecting portions, which are arranged on the third and fourth surfaces of the capacitor body 110 and connected to the first internal electrode layer 121 and the second internal electrode layer 122, respectively, and first and second band portions, which are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0122] The first and second band portions can extend from the first and second connection portions to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0123] The external electrodes 131 and 132 may include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer positioned to cover the sintered metal layer, and a plating layer positioned to cover the conductive resin layer.

[0124] The sintered metal layer may contain conductive metals and glass.

[0125] Conductive metals may include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof. For example, copper (Cu) may include copper (Cu) alloys. If the conductive metal contains copper, other metals may be present in amounts of 5 moles or less per 100 moles of copper.

[0126] The glass may contain a composition of mixed oxides, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0127] Selectively, the conductive resin layer may be formed on the sintered metal layer, for example, in a manner that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 do not have to include the sintered metal layer, in which case the conductive resin layer can directly contact the capacitor body 110.

[0128] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) in which the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer can be formed on the sintered metal layer and can be formed in a manner that completely covers the sintered metal layer.

[0129] The conductive resin layer contains resin and conductive metal.

[0130] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive metal powder to make a paste. For example, it may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0131] The conductive metal contained in the conductive resin layer serves to electrically connect with the internal electrode layers 121, 122, or the sintered metal layer.

[0132] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. In other words, the conductive metal may consist solely of flakes, solely of spheres, or a mixture of flakes and spheres.

[0133] Here, "spherical" can include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. "Flake powder" means powder having a flat and elongated form, and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more.

[0134] The external electrodes 131 and 132 may further include a plating layer positioned outside the conductive resin layer.

[0135] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), or alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or a nickel (Ni) plating layer and a tin (Sn) plating layer stacked sequentially, or a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer stacked sequentially. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0136] The plating layer can improve the mountability of the multilayer ceramic capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0137] Manufacturing method for multilayer ceramic capacitors The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0138] A multilayer ceramic capacitor 100 according to one embodiment can be manufactured by the following steps: manufacturing a dielectric slurry containing a main component powder including a barium titanate compound and a zirconium compound; manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; manufacturing a dielectric green sheet laminate by stacking the dielectric green sheets on which the conductive paste layer is formed; manufacturing a capacitor body including a dielectric layer and an internal electrode layer by firing the dielectric green sheet laminate; and forming an external electrode on one surface of the capacitor body.

[0139] Barium titanate compounds may include one or more selected from BaTiO3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, and (Ba,Sr)TiO3.

[0140] A zirconium-based compound may include one or more compounds selected from those containing Zr and Ca, and those containing Zr and Sr. For example, a zirconium-based compound may include one or more compounds selected from CaZrO3, SrZrO3, (Ba,Ca)ZrO3, and (Ba,Sr)ZrO3. As an example, a zirconium-based compound may include one or more compounds selected from CaZrO3 and SrZrO3.

[0141] Barium titanate compounds and zirconium compounds can be used in mixed or coated forms. That is, the main component powder may contain a mixture of barium titanate compounds and zirconium compounds, or a composite in which the surface of a barium titanate compound is coated with a zirconium compound.

[0142] The coated composite may be, for example, a composite formed with a core of a barium titanate compound, which is a ferroelectric, and a shell on the surface of the core coated with a zirconium compound, which is a paraelectric.

[0143] The zirconium-based compound may be present in an amount of 1 mol% to 20 mol% relative to the total amount of the barium titanate-based compound and the zirconium-based compound, for example, 2 mol% to 19 mol%, 3 mol% to 18 mol%, or 4 mol% to 17 mol%. When the zirconium-based compound is present within the above content range, the multilayer ceramic capacitor can exhibit excellent temperature characteristics and high capacitance and high voltage properties.

[0144] The dielectric slurry may further contain auxiliary component powders.

[0145] The auxiliary powder may contain one or more compounds selected from silicon (Si)-containing compounds, rare earth element-containing compounds, and transition metal-containing compounds.

[0146] Rare earth element-containing compounds may include, for example, one or more compounds selected from dysprosium (Dy)-containing compounds, gadolinium (Gd)-containing compounds, lanthanum (La)-containing compounds, and cerium (Ce)-containing compounds.

[0147] The rare earth element-containing compound may be present in an amount of 0.5 to 10 moles per 100 moles of the main component powder.

[0148] The transition metal-containing compound may include, for example, one or more compounds selected from manganese (Mn)-containing compounds, vanadium (V)-containing compounds, and chromium (Cr)-containing compounds.

[0149] As an example, the auxiliary component powder may include silicon (Si)-containing compounds, rare earth element-containing compounds, and transition metal-containing compounds.

[0150] Dielectric slurry can be manufactured by additionally mixing solvents with additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents.

[0151] The dispersant may include, for example, a phosphate ester-based dispersant, a polycarboxylic acid-based dispersant, or a combination thereof. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight per 100 parts by weight of the barium titanate compound, for example, 0.3 to 3 parts by weight. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0152] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, or an ethyl cellulose resin. The binder may be added in an amount of 0.1 to 50 parts by weight per 100 parts by weight of the barium titanate compound, for example, 3 to 30 parts by weight. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0153] The plasticizer may be, for example, phthalate compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate; adipic acid compounds such as dihexyl adipic acid and bis(2-ethylhexyl) adipic acid; glycol compounds such as ethylene glycol, diethylene glycol, and triethylene glycol; or glycol ester compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight per 100 parts by weight of the barium titanate compound, for example, 1 to 10 parts by weight. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0154] The solvent may be an aqueous solvent such as water; an alcoholic solvent such as ethanol, methanol, benzyl alcohol, or 2-methoxyethanol; a glycolic solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an esteric solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an etheric solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. The solvent can be an alcoholic or aromatic solvent, for example, considering the solubility and dispersibility of the various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 to 1000 parts by weight per 100 parts by weight of the barium titanate compound, for example, 100 to 500 parts by weight. When the solvent is mixed within the above content range, the dielectric slurry components can be sufficiently mixed, and the solvent can be easily removed thereafter.

[0155] The aforementioned dielectric slurry can be mixed using a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, a large number of zirconia balls with diameters from 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0156] The manufactured dielectric slurry is formed into a dielectric layer after firing.

[0157] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. After that, the molded body can be dried to obtain a dielectric green sheet.

[0158] After firing, a conductive paste can be manufactured by mixing conductive powder made of a conductive metal or an alloy thereof, a binder, and a solvent to form a conductive paste layer that will become the internal electrode layer. Additionally, barium titanate powder may be mixed in as a co-material if necessary. The co-material can suppress the sintering of the conductive powder during the firing process. The conductive paste layer is then formed by applying the conductive paste in a predetermined pattern to the surface of the dielectric green sheet using various printing or transfer methods, such as screen printing.

[0159] The conductive powder may include nickel (Ni) or a nickel (Ni) alloy.

[0160] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them, and then pressing them in the stacking direction. At this time, the dielectric green sheets and the internal electrode layer patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0161] The process of cutting the manufactured dielectric green sheet laminate to predetermined dimensions by dicing or other methods can be selectively advanced.

[0162] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and unwanted parts such as burrs generated during cutting can be polished off by applying rotational motion or vibration to the barrel container. After barrel polishing, the dielectric green sheet laminate can be washed with a cleaning solution such as water and then dried.

[0163] Next, the dielectric green sheet laminate can be debindered (calcined) and fired to manufacture a capacitor body.

[0164] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0165] The firing conditions can be appropriately adjusted depending on the composition of the main components of the dielectric layer and the internal electrode layer. For example, firing may be carried out at a temperature of 1100°C to 1400°C, or for example, at a temperature of 1200°C to 1350°C. Furthermore, firing may be carried out for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. Also, firing may be carried out in a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen and hydrogen, or for example, under conditions of a hydrogen concentration of 1.0% or less. If the internal electrode layer contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0x10 -14 MPa~1.0X10 -10 MPa is also acceptable.

[0166] After firing, annealing can be carried out as needed. Annealing is a process to re-oxidize the dielectric layer, and it can be carried out when firing is performed in a reducing atmosphere. The conditions for the annealing process can also be appropriately adjusted depending on the composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 x 10⁻⁶. -9 MPa~1.0X10 -5 MPa is also acceptable.

[0167] In the debindering, calcining, or annealing processes, a wetter, for example, can be used to humidify nitrogen gas or a mixed gas, in which case the water temperature may be between 5°C and 75°C. The debindering, calcining, and annealing processes may be carried out continuously or independently.

[0168] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sandblasting, laser irradiation, and barrel polishing. By performing such surface treatments, the edges of the first and second internal electrode layers are exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrode layers, and potentially facilitating the formation of alloy parts.

[0169] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0170] As an example, a paste for forming a sintered metal layer can be applied to the external electrode, and then sintered to form a sintered metal layer.

[0171] The paste for forming a sintered metal layer may contain conductive metals and glass. The descriptions of conductive metals and glass are as described above, so a repetition is omitted. The paste for forming a sintered metal layer may also selectively contain binders, solvents, dispersants, plasticizers, oxide powders, etc. Binders can include, for example, ethyl cellulose, acrylic, butyral, and solvents can include, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, or aqueous solvents.

[0172] Methods for applying the sintered metal layer-forming paste to the outer surface of the capacitor body 110 include various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprays. The sintered metal layer-forming paste is applied to at least the third and fourth surfaces of the capacitor body 110, and may also be selectively applied to a portion of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are formed.

[0173] Subsequently, the capacitor body 110 coated with the paste for forming a sintered metal layer is dried and then fired at a temperature of 700°C to 1000°C for 0.1 to 3 hours to form a sintered metal layer.

[0174] Selectively, a conductive resin layer can be formed by applying a paste for forming a conductive resin layer to the outer surface of the obtained capacitor body 110 and then curing it.

[0175] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The descriptions of conductive metals and resins are as described above, so repeated explanations are omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Examples of binders include ethylcellulose, acrylic, and butyral, while solvents may include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, as well as aqueous solvents.

[0176] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, or by printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or by applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0177] Next, a plating layer is formed on the outside of the conductive resin layer.

[0178] For example, the plating layer may be formed by a plating method, or by sputtering or electroplating (electric deposition).

[0179] The embodiments described above will be explained in more detail below through the examples provided. However, the following examples are for illustrative purposes only and do not limit the scope of the rights.

[0180] (Manufacturing of multilayer ceramic capacitors) Examples 1-5 A dielectric slurry was prepared by mixing a main component powder, which consisted of barium titanate (BaTiO3) and calcium zirconate (CaZrO3) in a molar ratio of 9:1, with a secondary component powder. The secondary component powder consisted of a mixture of rare earth element oxides (dysprosium oxide (Dy2O3) and gadolinium oxide (Gd2O3)), silicon dioxide (SiO2), and transition metal oxides (manganese dioxide (MnO2), vanadium oxide (V2O5), and chromium oxide (Cr2O3)). In this case, the rare earth element oxide was mixed in amounts of 0.1, 0.5, 5.0, 10.0, and 13.0 parts per 100 moles of the main component powder, SiO2 was mixed in amounts of 2 parts per 100 moles of the main component powder, and the transition metal oxide was mixed in amounts of 0.4 parts per 100 moles of the main component powder.

[0181] Furthermore, during the production of the dielectric slurry, mixing was carried out using zirconia balls (ZrO-2 balls) as a dispersion medium, adding ethanol / toluene, a wetting dispersant, and polyvinyl butyral (PVB) resin as a binder, and then mechanically milling the mixture.

[0182] Dielectric green sheets were manufactured using the manufactured dielectric slurry and an on-roll molding coater with a head discharge method.

[0183] A dielectric green sheet laminate was manufactured by printing a conductive paste layer containing nickel (Ni) onto the surface of a dielectric green sheet, and then laminating and pressing the dielectric green sheets with the conductive paste layer formed on them.

[0184] The dielectric green sheet laminate was subjected to a calcination process at a temperature of 400°C or lower and in a nitrogen atmosphere, followed by firing at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0%H2 or lower.

[0185] Next, the multilayer ceramic capacitor was manufactured through processes such as the formation of external electrodes and plating.

[0186] Comparative Example 1 A multilayer ceramic capacitor was manufactured in the same manner as in Example 3, except that BaTiO3 was used alone as the main component powder.

[0187] Evaluation 1: TEM-EDS analysis TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis was performed on the multilayer ceramic capacitors manufactured in Examples 1-5 and Comparative Example 1 using the method described below. The results are shown in Figures 6A-6G, 7A and 7B, and Table 1 below.

[0188] After curing the multilayer ceramic capacitor in an epoxy mixture, the L-axis and T-axis planes (LT planes) of the capacitor body were polished to a depth of 1 / 2 in the W-axis direction to obtain a cross-sectional sample that allowed observation of the active region where the dielectric layer and the internal electrode layer intersect. Next, the active region of the cross-sectional sample was divided into three equal parts: the upper region, the middle region, and the lower region. Each region was then measured using a TEM (transmission electron microscope) to ensure that at least one dielectric layer and one internal electrode layer were visible. The TEM was performed using a Xe-FIB (focused ion beam) with an acceleration voltage of 200 kV and a magnification of 50,000x. Next, EDS (energy-dispersive spectroscopy) mapping analysis was performed on the dielectric layer in the TEM images of the measured cross-sectional sample.

[0189] Figures 6A to 6G show TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis images of the dielectric layer according to Example 3.

[0190] Referring to Figures 6A-6G and Table 1 below, it can be confirmed that the dielectric layer according to Example 3 contains dielectric crystal grains and grain boundaries having a core-shell structure. Furthermore, it can be confirmed that Ba and Ti are present in the core portion of the dielectric crystal grains, and Ca and Zr are present in the shell portion. In addition, it can be confirmed that Si is present at the grain boundaries.

[0191] Furthermore, in the TEM images of the upper, central, and lower regions, one dielectric layer was arbitrarily selected for each region, and five dielectric grains and grain boundaries with a core-shell structure were selected for each dielectric layer. EDS line analysis was then performed on a total of 15 dielectric grains and grain boundaries. The EDS line analysis was performed on the straight-line section of the long axis passing through the center of the dielectric grain with a core-shell structure.

[0192] Figures 7A and 7B show TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis images of the dielectric layer according to Example 3.

[0193] Referring to Figures 7A and 7B, in Example 3, the core portion within the dielectric crystal grain may be a region where Zr is less than 3 moles per 100 moles of Ti, while the shell portion may be a region where Zr is 3 moles or more per 100 moles of Ti.

[0194] Furthermore, the total content of rare earth elements present in the shell portion within the dielectric crystal grains was measured from the TEM-EDS line analysis and is shown in Table 1 below. In Table 1 below, the total content of rare earth elements is determined as the average value obtained from the EDS line analysis of the 15 dielectric crystal grains, and the total content of rare earth elements is shown based on 100 molar parts of Ti.

[0195] [Table 1]

[0196] From the TEM-EDS analysis, it can be seen that in Examples 1 to 5, Ba and Ti are present in the core portion of the dielectric crystal grains, and Ca and Zr are present in the shell portion, whereas in Comparative Example 1, Ca and Zr are not present in the dielectric crystal grains.

[0197] Evaluation 2: Temperature characteristics (TCC) The capacitance change rate (temperature coefficient of capacitance, TCC) was measured for the multilayer ceramic capacitors manufactured in Examples 1-4 and Comparative Example 1 using the method described below, and the results are shown in Figure 8.

[0198] Capacitance was measured at 2°C intervals within a temperature range of -55°C to 150°C, under the conditions of applying 1kHz and AC 1V. From the capacitance measurements, the rate of change of capacitance at each temperature relative to the capacitance at 25°C was calculated using Equation 1 below. [Formula 1] Percentage change in capacity (%) = [(C - CRT) / CRT] × 100 (In the above formula 1, C is the capacitance measured within the temperature range of -55°C to 150°C, and CRT is the capacitance measured at 25°C.)

[0199] Figure 8 is a graph showing the rate of change in capacitance (temperature coefficient of capacitance, TCC) of multilayer ceramic capacitors for Examples 1-4 and Comparative Example 1.

[0200] Referring to Figure 8, in Examples 1-4, where the core contains Ba and Ti and the shell contains Ca and Zr, the change in capacity is small between -55°C and 125°C, and the temperature characteristics satisfy the X7R grade, meaning they have excellent temperature characteristics.

[0201] Evaluation 3: Measurement of STEP-IR The resistance degradation behavior due to increasing voltage steps was evaluated for the multilayer ceramic capacitors manufactured in Examples 2-5 and Comparative Example 1 using the following method, and the results are shown in Figure 9.

[0202] The STEP-IR system measured resistance degradation behavior while increasing the voltage step by 50V at 150°C. Each step lasted 5 minutes, and resistance values ​​were measured at 10-second intervals.

[0203] Furthermore, the withstand voltage characteristics were evaluated from STEP-IR measurements. This was done by applying a voltage step of DC 50V at 150°C for 5 minutes, and measuring while continuously increasing this voltage step, when the IR was 10 5 This refers to a voltage that can withstand resistance of ohms or more.

[0204] Figure 9 is a graph showing the STEP-IR characteristics of multilayer ceramic capacitors according to Examples 2-5 and Comparative Example 1.

[0205] Referring to Figure 9, it can be seen that in Examples 2-5, where Ba and Ti are included in the core and Ca and Zr are included in the shell, the dielectric strength is superior to that of Comparative Example 1.

[0206] Rating 4: DC bias characteristics The DC bias characteristics of the multilayer ceramic capacitors manufactured in Examples 1-5 and Comparative Example 1 were evaluated using the following method, and the results are shown in Figure 10.

[0207] Under conditions of 1kHz and AC 1V, the dielectric constants were measured after maintaining DC voltages of 0V / μm, 1.0V / μm, 4.8V / μm, 9.6V / μm, 14.3V / μm, 19.1V / μm, and 23.9V / μm for 60 seconds each.

[0208] Figure 10 is a graph showing the DC bias characteristics of multilayer ceramic capacitors according to Examples 1-5 and Comparative Example 1.

[0209] Referring to Figure 10, it can be seen that in Examples 1-5, where the core contains Ba and Ti and the shell contains Ca and Zr, the DC bias characteristics are superior to those of Comparative Example 1.

[0210] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and it goes without saying that these also fall within the scope of the present invention. [Explanation of Symbols]

[0211] 10: Dielectric crystal grain 12: Core 14: Shell section 20: Grain boundary 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 112: Coverage Area 113: Coverage Area 121: First internal electrode layer 122: Second internal electrode layer 131: 1st external electrode 132:Second external electrode

Claims

1. A capacitor body including a dielectric layer and an internal electrode layer, The capacitor body includes an external electrode positioned outside the capacitor body, The dielectric layer comprises a plurality of dielectric crystal grains. At least one of the plurality of dielectric crystal grains has a core-shell structure including a core portion and a shell portion surrounding at least a part of the core portion. The core portion includes barium (Ba) and titanium (Ti), The shell portion comprises calcium (Ca) or strontium (Sr) and zirconium (Zr). A multilayer ceramic capacitor in which, during TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) line analysis of a linear section along the long axis passing through the center of a dielectric crystal grain having the core-shell structure, the core portion is a region in which the zirconium (Zr) is less than 3 moles per 100 moles of titanium (Ti), and the shell portion is a region in which the zirconium (Zr) is 3 moles or more per 100 moles of titanium (Ti).

2. The multilayer ceramic capacitor according to claim 1, wherein the content of calcium (Ca) or strontium (Sr) in the shell portion is 2.5 moles to 40 moles per 100 moles of titanium (Ti).

3. The multilayer ceramic capacitor according to claim 1, wherein the zirconium (Zr) content in the shell portion is 3 moles to 150 moles per 100 moles of titanium (Ti).

4. In the aforementioned shell portion, The calcium (Ca) content is 2.5 to 40 moles per 100 moles of titanium (Ti). The multilayer ceramic capacitor according to claim 1, wherein the zirconium (Zr) content is 3 moles to 150 moles per 100 moles of titanium (Ti).

5. In the aforementioned shell portion, The strontium (Sr) content is 2.5 to 40 moles per 100 moles of titanium (Ti). The multilayer ceramic capacitor according to claim 1, wherein the zirconium (Zr) content is 3 moles to 150 moles per 100 moles of titanium (Ti).

6. The multilayer ceramic capacitor according to claim 1, wherein the shell portion further contains rare earth elements.

7. The multilayer ceramic capacitor according to claim 6, wherein the rare earth element includes an element with a larger ionic radius than yttrium (Y).

8. The multilayer ceramic capacitor according to claim 6, wherein the rare earth element comprises one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce).

9. The multilayer ceramic capacitor according to claim 6, wherein the total content of the rare earth element in the shell portion is 0.5 moles to 10 moles per 100 moles of titanium (Ti).

10. The multilayer ceramic capacitor according to claim 1, wherein the shell portion further comprises a transition metal.

11. The multilayer ceramic capacitor according to claim 10, wherein the transition metal comprises one or more selected from manganese (Mn), vanadium (V), and chromium (Cr).

12. The multilayer ceramic capacitor according to claim 1, wherein the shell portion further comprises a rare earth element and a transition metal.

13. The multilayer ceramic capacitor according to claim 1, wherein the shell portion further comprises a rare earth element including one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce), and a transition metal including one or more selected from manganese (Mn), vanadium (V), and chromium (Cr).

14. The dielectric layer further includes grain boundaries arranged between the plurality of dielectric crystal grains, The multilayer ceramic capacitor according to claim 1, wherein the grain boundaries contain silicon (Si).

15. The multilayer ceramic capacitor according to claim 14, wherein the silicon (Si) content in the grain boundaries is 2.5 moles to 20 moles per 100 moles of titanium (Ti).

16. The multilayer ceramic capacitor according to claim 14, wherein the grain boundaries further contain rare earth elements.

17. The multilayer ceramic capacitor according to claim 16, wherein the rare earth element comprises one or more selected from dysprosium (Dy), gadolinium (Gd), lanthanum (La), and cerium (Ce).

18. The multilayer ceramic capacitor according to claim 16, wherein the total content of the rare earth element in the grain boundaries is 3 moles to 30 moles per 100 moles of titanium (Ti).

19. The multilayer ceramic capacitor according to claim 1, wherein the diameter of the core portion is 15% to 85% of the diameter of the dielectric crystal grains.

20. The multilayer ceramic capacitor according to claim 1, wherein the number of dielectric crystal grains having the core-shell structure is 5% to 100% of the total number of dielectric crystal grains present in the dielectric layer.

21. A step of manufacturing a dielectric slurry containing a main component powder containing a barium titanate compound and a zirconium compound, The steps include: manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; The steps include: manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which the conductive paste layer is formed; A step of firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer, The step includes forming an external electrode on one surface of the capacitor body, The zirconium-based compound comprises one or more compounds selected from those containing Zr and Ca, and those containing Zr and Sr. A method for manufacturing a multilayer ceramic capacitor, wherein the dielectric layer comprises a plurality of dielectric crystal grains, at least one of the plurality of dielectric crystal grains has a core-shell structure comprising a core portion and a shell portion surrounding at least a part of the core portion, the core portion comprises barium (Ba) and titanium (Ti), and the shell portion comprises calcium (Ca) or strontium (Sr) and zirconium (Zr).

22. The method for manufacturing a multilayer ceramic capacitor according to claim 21, wherein the main component powder includes a mixture of the barium titanate-based compound and the zirconium-based compound, or a composite obtained by coating the surface of the barium titanate-based compound with the zirconium-based compound.

23. The aforementioned zirconium-based compound is CaZrO ３ and SrZrO ３ A method for manufacturing a multilayer ceramic capacitor according to claim 21, comprising one or more selected from among the following.

24. The method for manufacturing a multilayer ceramic capacitor according to claim 21, wherein the dielectric slurry further comprises a minor component powder containing one or more selected from silicon (Si)-containing compounds, rare earth element-containing compounds, and transition metal-containing compounds.

25. The method for manufacturing a multilayer ceramic capacitor according to claim 24, wherein the rare earth element-containing compound comprises one or more selected from a dysprosium (Dy)-containing compound, a gadolinium (Gd)-containing compound, a lanthanum (La)-containing compound, and a cerium (Ce)-containing compound.

26. The method for manufacturing a multilayer ceramic capacitor according to claim 24, wherein the transition metal-containing compound comprises one or more selected from manganese (Mn)-containing compounds, vanadium (V)-containing compounds, and chromium (Cr)-containing compounds.

27. The method for manufacturing a multilayer ceramic capacitor according to claim 24, wherein the auxiliary component powder comprises the silicon (Si)-containing compound, the rare earth element-containing compound, and the transition metal-containing compound.

28. The method for manufacturing a multilayer ceramic capacitor according to claim 21, wherein the zirconium-based compound is contained in an amount of 1 mol% to 20 mol% relative to the total amount of the barium titanate-based compound and the zirconium-based compound.

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