Method for manufacturing semiconductor thin films containing tellurium oxide doped with sulfur atoms and heterologous atoms.

Abstract

A method for manufacturing a semiconductor thin film containing tellurium oxide doped with sulfur atoms and heterologous atoms is disclosed. [Solution] According to the present invention, by using sulfur atoms and adjusting the annealing of a semiconductor thin film, a high hole field effect mobility and 10 7 This provides a thin-film transistor having a semiconductor thin film that exhibits excellent output / transmission characteristics and superior electrical performance with a high on / off current ratio reaching [a certain value].

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor thin film containing tellurium oxide doped with sulfur atoms and heteroatoms.

Background Art

[0002] In the past few decades, metal oxide semiconductors have promoted great progress in modern optoelectronic research and have been widely used in transistors, solar cells, thermoelectrics, light-emitting diodes, displays, etc. However, all commercially available oxide semiconductors with high electrical performance are n-type semiconductors that are only efficient in electron transport at room temperature, and there is no p-type semiconductor capable of hole transport, so there are limitations in applying to various application fields. Amorphous a-InGaZnO, a typical n-type semiconductor, has been commercialized as a backplane transistor for driving organic light-emitting diode (OLED) displays. The high dispersion conduction band minimum value (CBM) enables excellent electron transport characteristics even in an amorphous structure, but there is a problem that p-type characteristics are not shown at room temperature.

[0003] As p-type metal oxide semiconductors capable of hole movement even at room temperature, materials such as CuO and SnO have been studied, but they have shown poor electrical performance such as lower hole field effect mobility and lower on / off current ratio compared to n-type metal oxides. This greatly limits the development of pn junction diode-based optoelectronics and CMOS (Complementary Metal Oxide Semiconductor) circuits.

[0004] The main reason for the poor p-type characteristics of metal oxide semiconductors is that the valence band maximum value for hole transport in metal oxides is mainly anisotropic and relatively small in size, and it is composed of highly localized oxygen 2p orbitals. Also, the metastable cation valence states of Cu + and Sn 2+ are unstable under air conditions, so there is a problem of poor ambient stability.

[0005] ​ Therefore, it is currently highly necessary in the microelectronics industry to develop a high-mobility p-type semiconductor that is stable and low-cost.

Summary of the Invention

Problems to be Solved by the Invention

[0006] The object of the present invention is to solve such problems. By adopting a vacuum evaporation technique such as thermal evaporation or sputtering, a new method for manufacturing an amorphous p-type semiconductor in which heteroatoms are alloyed with sulfur in TeO x is provided.

[0007] Another object of the present invention is that the charge amount of holes in a p-type semiconductor can be precisely adjusted using sulfur, and a high-performance p-channel TeO x semiconductor thin film having excellent electrical property stability and high performance of a thin film and an element at a low process temperature is provided.

[0008] Another object of the present invention is to provide a method for forming a semiconductor thin film that can be used in the manufacturing process of a low-cost, large-area flexible thin film transistor.

Means for Solving the Problems

[0009] According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor thin film having tellurium oxide, including: (a) manufacturing a first semiconductor thin film including a first semiconductor formed by depositing one or more targets selected from the group consisting of a target containing a Group 14 atom of the periodic table, a target containing a Group 15 atom, a target containing a Group 16 atom, a target containing copper (Cu), and a target containing zinc (Zn); one or more targets selected from the group consisting of a target containing tellurium atoms (Te) and a target containing tellurium dioxide (TeO2); and a target containing sulfur atoms (S); and (b) annealing the first semiconductor thin film to manufacture a second semiconductor thin film including a second semiconductor.

[0010] Furthermore, the Group 14 atoms may include one or more selected from the group consisting of germanium (Ge), tin (Sn), and lead (Pb), the Group 15 atoms may include one or more selected from the group consisting of antimony (Sb), bismuth (Bi), nitrogen (N), and phosphorus (P), and the Group 16 atoms may include selenium (Se).

[0011] Furthermore, the first semiconductor comprises a tellurium complex containing tellurium (Te) atoms and tellurium oxide; one selected from the group consisting of group 14 atoms, group 15 atoms, group 16 atoms, copper (Cu), zinc (Zn), and combinations thereof, which are alloyed with the tellurium complex; and sulfur oxide (SO4) mixed with the tellurium complex. x It may include: , x is 2 or 3); Furthermore, the deposition in step (a) may be carried out in a temperature range of room temperature to 70°C.

[0012] Furthermore, the first semiconductor may be represented by the following chemical formula 1. [Chemical formula 1] TeO x :M1M2 (In the formula, M1 is one selected from the group consisting of Group 14, Group 15, Group 16 atoms of the periodic table, copper (Cu), zinc (Zn), and combinations thereof, M2 is a sulfur atom, and x is 0) <x<2である。)

[0013] Furthermore, the concentration of M1 in the first semiconductor may be 1 to 50 atom% relative to the total number of atoms. Furthermore, the concentration of M2 in the first semiconductor may be 1 to 20 atom% relative to the total number of atoms. Furthermore, the annealing in step (b) may be carried out in a temperature range of 100 to 300°C, preferably 150 to 200°C.

[0014] Furthermore, the second semiconductor may be represented by the following chemical formula 2. [Chemical formula 2] TeO x :M'1M'2 (In the formula, M’1 is any one selected from the group consisting of Group 14 atoms, Group 15 atoms, Group 16 atoms, copper (Cu), zinc (Zn) in the periodic table, and combinations thereof; M’2 is a sulfur atom; and x satisfies 0 < x < 2.)

[0015] In addition, the second semiconductor may include a tellurium complex containing a tellurium (Te) atom and tellurium oxide, and any one heteroatom selected from the group consisting of germanium (Ge), antimony (Sb), selenium (Se), copper (Cu), zinc (Zn), and combinations thereof alloyed with the tellurium complex.

[0016] In addition, the atomic percentage of sulfur (S atom% ) and the atomic percentage of heteroatom (E atom% ) in the second semiconductor, the ratio (S atom% :E atom% ) may be 5:2 to 5:7, preferably 5:3 to 5:5. In addition, the tellurium oxide of the second semiconductor may include tellurium monoxide (TeO) and tellurium dioxide (TeO2). In addition, the tellurium atoms of the second semiconductor may include the ionized state of Te 4+ , the ionized state of Te 2+ , and the non-ionized state of Te 0 .

[0017] In addition, the second semiconductor may be in an oxygen-deficient state. In addition, the second semiconductor may be amorphous, polycrystalline, or single crystalline. In addition, the second semiconductor may be p-type.

[0018] In addition, during the annealing in step (b), the sulfur atoms of the first semiconductor may be oxidized to sulfates to reduce tellurium oxide and increase the oxygen vacancies of the second semiconductor. Furthermore, the generation of oxygen vacancies may increase the number of conduction channels in the second semiconductor. Furthermore, the second semiconductor may be used for the semiconductor layer of a thin-film transistor.

[0019] Furthermore, the thickness of the second semiconductor thin film may be 5 to 40 nm. Furthermore, the method for manufacturing the semiconductor thin film includes, between step (a) and step (b), a step of (b') in which the first semiconductor thin film is annealed at the same temperature as, or lower than or higher than, the annealing temperature of step (b) to form a second' semiconductor thin film, and the first semiconductor thin film of step (b) may be the second' semiconductor thin film.

[0020] Furthermore, the annealing temperature in step (b') may be in the temperature range of 150 to 200°C. Furthermore, the deposition in step (a) may be carried out by thermal deposition, sputtering, vapor-phase chemical deposition (CVD), molecular layer deposition (ALD), or solution coating. [Effects of the Invention]

[0021] TeO according to the present invention x Thin-film transistors (TFTs) fabricated using channel layer manufacturing methods exhibit high hole field-effect mobility and 10 7 It exhibits excellent output / transmission characteristics and superior electrical performance with a high on / off current ratio reaching [value missing].

[0022] Furthermore, when sulfur is doped with heterologous atoms such as Se according to the present invention, the bonding properties of Te, which is more oxygen-deficient, become TeO x Formed within a thin film, the presence of heterogeneous atoms such as Se in the thin film creates an alloy between the heterogeneous atoms and Te, making it possible to control the electronic properties of the semiconductor thin film. [Brief explanation of the drawing]

[0023] These figures are for reference in illustrating exemplary embodiments of the present invention, and the technical concept of the present invention should not be interpreted as being limited to these figures.

[0024] [Figure 1] This is a schematic diagram illustrating a method for manufacturing a semiconductor layer for use in a p-channel thin-film transistor using a thermal deposition process according to the examples, which involves tellurium oxide containing sulfur atoms and heterogeneous atoms. [Figure 2] This graph shows how the transfer characteristics of the transistor of the present invention change depending on the type of heterogeneous atoms and the doping concentration. [Figure 3] This is an XPS (X-ray photoelectron spectroscopy) result analyzing whether heterogeneous atoms remain in a thin film formed by mixing heterogeneous atoms according to the present invention.

[0025] [Figure 4] This graph shows the XRD (X-Ray Diffractometer) spectral results of the TeOx:Se:S thin film from Example 3-2 that was thermally evaporated and annealed at 180°C. [Figure 5a] This graph shows the transfer characteristics of a TeOx:Se:S TFT using the thermal deposition process according to Example 3-2. [Figure 5b] This graph shows the output curve of a TeOx:Se:S thin-film transistor (TFT) using the thermal deposition process according to Example 3-2. [Figure 5c] This graph shows the transfer curves of TeOx:Se:S thin-film transistors (TFTs) fabricated with a channel thickness of 25 nm, using the thermal deposition process according to Example 3-2, with different channel layers deposited at the post-annealing temperature.

[0026] [Figure 6] These are absorbance graphs by wavelength of light measured by UV-Vis (Ultraviolet-visible spectroscopy) in Example 3-2, and optical bandgap graphs calculated using Tauc plots. [Figure 7a]This graph shows the transfer characteristics of TeOx:Se:S TFTs from Examples 2-1, 2-2, 2-3, and 2-4, in which tellurium oxide containing 5 atom% heterogeneous selenium (Se) was doped with 1, 3, 5, and 7 atom% sulfur (S) atoms, respectively. [Figure 7b] These are graphs of hole concentration and resistivity for TeOx:Se:S TFTs from Examples 2-1, 2-2, 2-3, and 2-4, in which tellurium oxide containing 5 atom% heteroatom selenium (Se) was doped with 1, 3, 5, and 7 atom% sulfur (S) atoms, respectively. [Figure 7c] These are field-effect mobility graphs of TeOx:Se:S TFTs from Examples 2-1, 2-2, 2-3, and 2-4, in which tellurium oxide containing 5 atom% heterogeneous selenium (Se) was doped with 1, 3, 5, and 7 atom% sulfur (S) atoms, respectively.

[0027] [Figure 8a] This graph shows the transfer characteristics of TeOx:Se:S TFTs from Examples 3-1, 3-2, 2-3, 3-3, and 3-4, in which tellurium oxide containing 5 atom% sulfur (S) was doped with 3, 4, 5, 6, and 7 atom% heterogeneous selenium (Se) atoms, respectively. [Figure 8b] These are graphs of hole concentration and resistivity for TeOx:Se:S TFTs from Examples 3-1, 3-2, 2-3, 3-3, and 3-4, in which tellurium oxide containing 5 atom% sulfur (S) was doped with 3, 4, 5, 6, and 7 atom% heterogeneous selenium (Se) atoms, respectively. [Figure 8c] These are field-effect mobility graphs of TeOx:Se:S TFTs from Examples 3-1, 3-2, 2-3, 3-3, and 3-4, in which tellurium oxide containing 5 atom% sulfur (S) was doped with 3, 4, 5, 6, and 7 atom% of heterogeneous selenium (Se) atoms, respectively. [Modes for carrying out the invention]

[0028] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains.

[0029] However, the following description is not intended to limit the present invention to any particular embodiment, and in describing the present invention, if it is determined that a specific description of related known technology may obscure the gist of the present invention, such detailed description will be omitted.

[0030] The terms used herein are used solely to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions insofar as they clearly have different meanings in context. In this application, terms such as “includes” or “having” are intended to specify the existence of features, figures, steps, actions, components, or combinations thereof described in the specification, and should be understood not to preemptively exclude the existence or possibility of adding one or more other features, figures, steps, actions, components, or combinations thereof.

[0031] Furthermore, terms including ordinal numbers, such as "first," "second," etc., used below, can be used to describe various components, but these components are not limited by these terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component.

[0032] Furthermore, when one component is described as being "formed" or "laminated" on another component, it should be understood that it may be formed by being directly attached to or laminated on all or one surface of the other component, but there may also be other components interposed between them.

[0033] The following describes in detail a method for manufacturing a semiconductor thin film containing tellurium oxide doped with sulfur atoms and other atoms. However, this is presented as an example only and does not limit the present invention; the present invention is defined solely by the scope of the claims described later.

[0034] According to one aspect of the present invention, a method for producing a semiconductor thin film having a tellurium oxide is provided, comprising the steps of: (a) producing a first semiconductor thin film comprising a first semiconductor formed by depositing one or more targets selected from the group consisting of a target comprising a group 14 atom of the periodic table, a target comprising a group 15 atom, a target comprising a group 16 atom, a target comprising copper (Cu), and a target comprising zinc (Zn); one or more targets selected from the group consisting of a target comprising a tellurium atom (Te) and a target comprising tellurium dioxide (TeO2); and a target comprising a sulfur atom (S); and (b) producing a second semiconductor thin film comprising a second semiconductor by annealing the first semiconductor thin film.

[0035] Furthermore, the Group 14 atom may include one or more elements selected from the group consisting of germanium (Ge), tin (Sn), and lead (Pb), the Group 15 atom may include one or more elements selected from the group consisting of antimony (Sb), bismuth (Bi), nitrogen (N), and phosphorus (P), and the Group 16 atom may include selenium (Se).

[0036] Furthermore, the first semiconductor comprises a tellurium complex containing tellurium (Te) atoms and tellurium oxide; one selected from the group consisting of Group 14 atoms, Group 15 atoms, Group 16 atoms, copper (Cu), zinc (Zn), and combinations thereof, alloyed with the tellurium complex; and sulfur oxide (SO4) mixed with the tellurium complex. x It may include: , x is 2 or 3);

[0037] Furthermore, the deposition in step (a) may be carried out in a temperature range of room temperature to 70°C. However, if the deposition temperature is below room temperature, surface diffusion of the deposited atoms or molecules is suppressed, making it difficult to form a uniform thin film, which is undesirable. If the deposition temperature exceeds 70°C, it is undesirable because it can cause re-evaporation of the deposited particles or damage to the substrate due to thermal stress.

[0038] Furthermore, the first semiconductor may be represented by the following chemical formula 1. [Chemical formula 1] TeO x :M1M2 (In the formula, M1 is one selected from the group consisting of Group 14, Group 15, Group 16 atoms of the periodic table, copper (Cu), zinc (Zn), and combinations thereof, M2 is a sulfur atom, and x is 0) <x<2である。)

[0039] Furthermore, the concentration of M1 in the first semiconductor may be 1 to 50 atom% relative to the total number of atoms. Furthermore, the concentration of M2 in the first semiconductor may be 1 to 20 atom% relative to the total number of atoms.

[0040] Furthermore, the annealing in step (b) may be carried out in a temperature range of 100 to 300°C, preferably 150 to 200°C. Here, if the annealing temperature is less than 100°C, it is undesirable because sufficient thermal energy is not supplied for the volatilization of sulfur oxides and the formation of tellurium-based conduction channels. If the annealing temperature exceeds 300°C, it is undesirable because the electrical properties change due to oxidation or volatilization of the thin film.

[0041] Furthermore, the second semiconductor may be represented by the following chemical formula 2. [Chemical formula 2] TeO x :M'1M'2 (In the formula, M'1 is one selected from the group consisting of Group 14, Group 15, Group 16 atoms of the periodic table, copper (Cu), zinc (Zn), and combinations thereof, M'2 is a sulfur atom, and x is 0 <x<2である。)

[0042] Furthermore, the second semiconductor may also include a tellurium complex containing a tellurium (Te) atom and a tellurium oxide; and one heteroatom selected from the group consisting of germanium (Ge), antimony (Sb), selenium (Se), copper (Cu), zinc (Zn), and combinations thereof, which is alloyed with the tellurium complex.

[0043] Furthermore, the atom%(S) of sulfur in the second semiconductor atom% ) and heteroatoms atom%(E atom% ) ratio (S atom% :E atom% ) may be 5:2 to 5:7, preferably 5:3 to 5:5. Here, the atom%(S) of sulfur in the second semiconductor. atom% ) and heteroatoms atom%(E atom% ) ratio (S atom% :E atom% If the ratio is less than 5:2, it is undesirable because the amount of doping is insufficient to produce a doping effect of heteroatoms, and if it exceeds 5:7, it is undesirable because it is difficult for a tellurium oxide-based conduction channel matrix for p-type semiconductors to function properly.

[0044] Furthermore, the tellurium oxide of the second semiconductor may also include tellurium monoxide (TeO) and tellurium dioxide (TeO2). Furthermore, the tellurium atoms in the second semiconductor are Te 4+ The ionization state of Te 2+ The ionization state of Te 0 This may include a non-ionized state.

[0045] Furthermore, the second semiconductor may be in an oxygen-deficient state. Furthermore, the second semiconductor may be amorphous, polycrystalline, or single-crystal. Furthermore, the second semiconductor may be p-type.

[0046] Alternatively, during the annealing in step (b), the sulfur atoms of the first semiconductor may be oxidized with sulfur oxide to reduce the tellurium oxide and increase the oxygen vacancies of the second semiconductor. Furthermore, the generation of oxygen vacancies may increase the number of conduction channels in the second semiconductor. Furthermore, the second semiconductor may be used for the semiconductor layer of a thin-film transistor.

[0047] Furthermore, the thickness of the second semiconductor thin film may be 5 to 40 nm. Furthermore, the method for manufacturing the semiconductor thin film includes, between step (a) and step (b), a step of (b') in which the first semiconductor thin film is annealed at the same temperature as, or lower than or higher than, the annealing temperature of step (b) to form a second' semiconductor thin film, and the first semiconductor thin film of step (b) may be the second' semiconductor thin film.

[0048] Furthermore, the annealing temperature in step (b') may be in the temperature range of 150 to 200°C. Here, if the annealing temperature is less than 150°C, it is undesirable because the thin film does not have a sufficient amount of charge, and if the annealing temperature exceeds 200°C, it is undesirable because the amount of charge increases rapidly with the increase in sulfur oxide volatility, making it difficult to control the amount of charge.

[0049] Furthermore, the deposition in step (a) may be carried out by thermal deposition, sputtering, vapor-phase chemical deposition (CVD), molecular layer deposition (ALD), or solution coating.

[0050] [Examples] The following describes preferred embodiments of the present invention. However, these are illustrative examples and do not limit the scope of the present invention.

[0051] Example: p-channel tellurium oxide thin-film transistor Example 1: Control of heterogeneous atom types and doping concentrations Example 1-1: Using 6 mg of antimony (Sb) and 5 mg of sulfur (S) Figure 1 is a schematic diagram showing a method for manufacturing a semiconductor layer for use in amorphous p-channel thin-film transistors doped with sulfur atoms and heterogeneous atoms using a thermal deposition process according to an example.

[0052] Referring to Figure 1, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) were used as evaporation sources to deposit a tellurium oxide-based semiconductor film containing sulfur atoms and heterogeneous atoms. x The base film was deposited using a standard thermal evaporator. The substrate temperature was 25°C, and the vacuum pressure before evaporation was 10°C. -3 The Torr was less than 1. The distance between the substrate and the boat loaded with TeO2 was 2-50 cm. The deposition rate was 1 Å / s. x The film thickness (5-40 nm) was monitored during the deposition process. The deposited samples were annealed in air at 180°C for 30 minutes to obtain TeO2. x A thin film of :Sb:S tellurium oxide semiconductor was formed.

[0053] Subsequently, thin-film transistors (TFTs) were fabricated using Ni as the source and drain electrodes, respectively, and by deposition. The fabricated thin-film transistors (TFTs) were then passivated from moisture and oxygen by depositing aluminum oxide (Al2O3) to a thickness of approximately 10 nm using atomic layer deposition at a process temperature of 150°C.

[0054] Examples 1-2: Using 11 mg of antimony (Sb) and 5 mg of sulfur (S). In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11 mg of antimony (Sb), and 5 mg of sulfur (S) were used as evaporation sources. x Thin-film transistors (TFTs) containing :Sb:S tellurium oxide semiconductors were manufactured.

[0055] Examples 1-3: Using 6 mg of germanium (Ge) and 5 mg of sulfur (S). In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of germanium (Ge), and 5 mg of sulfur (S) were used as evaporation sources. x Thin-film transistors (TFTs) containing Ge:S tellurium oxide semiconductors were manufactured.

[0056] Examples 1-4: 11 mg of germanium (Ge) and 5 mg of sulfur (S) were used. In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11 mg of germanium (Ge), and 5 mg of sulfur (S) were used as evaporation sources. x Thin-film transistors (TFTs) containing Ge:S tellurium oxide semiconductors were manufactured.

[0057] Examples 1-5: Using 6 mg of copper (Cu) and 5 mg of sulfur (S). In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of copper (Cu), and 5 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing Cu:S tellurium oxide semiconductors.

[0058] Examples 1-6: Using 11 mg of copper (Cu) and 5 mg of sulfur (S). In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11 mg of copper (Cu), and 5 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing Cu:S tellurium oxide semiconductors.

[0059] Examples 1-7: 6 mg of selenium (Se) and 5 mg of sulfur (S) were used. In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of selenium (Se), and 5 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0060] Examples 1-8: 11 mg of selenium (Se) and 5 mg of sulfur (S) were used. In the same manner as in Example 1-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6 mg of antimony (Sb), and 5 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11 mg of selenium (Se), and 5 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0061] Example 2: Adjustment of sulfur concentration in the introduction of heterogeneous selenium atoms Example 2-1: 1 atom% of S and 5 atom% of Se 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 10.96 mg of selenium (Se), and 0.87 mg of sulfur (S) were used as evaporation sources to deposit a tellurium oxide-based semiconductor film doped with sulfur and selenium atoms.x The base film was deposited using a standard thermal evaporator. The substrate temperature was 25°C, and the vacuum pressure before evaporation was 10°C. -3 The Torr was less than 1. The distance between the substrate and the boat loaded with TeO2 was 2-50 cm. The deposition rate was 1 Å / s. x The film thickness (5-40 nm) was monitored during the deposition process. 。 The deposited sample was annealed in air at 180°C for 30 minutes to obtain TeO2 with 1 atom% S and 5 atom% Se. x A Se:S tellurium oxide semiconductor thin film was formed.

[0062] Subsequently, thin-film transistors (TFTs) were fabricated using Ni as the source and drain electrodes, respectively, and by deposition. The fabricated thin-film transistors (TFTs) were then passivated from moisture and oxygen by depositing aluminum oxide (Al2O3) to a thickness of approximately 10 nm using atomic layer deposition at a process temperature of 150°C.

[0063] Example 2-2: 3 atom% S and 5 atom% Se In the same manner as in Example 2-1, TeO2 having 3 atom% S and 5 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 10.96 mg of selenium (Se), and 0.87 mg of sulfur (S) as the evaporation source, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11.08 mg of selenium (Se), and 2.62 mg of sulfur (S) were used as the evaporation source. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0064] Examples 2-3: 5 atom% S and 5 atom% Se In the same manner as in Example 2-1, TeO2 having 5 atom% S and 5 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 10.96 mg of selenium (Se), and 0.87 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 10.94 mg of selenium (Se), and 4.48 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0065] Examples 2-4: 7 atom% S and 5 atom% Se In the same manner as in Example 2-1, a TeO2 having 7 atom% S and 5 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 10.96 mg of selenium (Se), and 0.87 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 11.09 mg of selenium (Se), and 6.39 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0066] Example 3: Selenium concentration control in the introduction of heterogeneous selenium atoms Example 3-1: 5 atom% S and 3 atom% Se 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6.53 mg of selenium (Se), and 4.45 mg of sulfur (S) were used as evaporation sources to deposit a tellurium oxide-based semiconductor film doped with sulfur and selenium atoms. x The base film was deposited using a conventional thermal evaporator. The substrate temperature was 25°C, and the vacuum pressure before evaporation was 10°C. -3 The Torr was less than 1. The distance between the substrate and the boat loaded with TeO2 was 2-50 cm. The deposition rate was 1 Å / s. xThe film thickness (5-40 nm) was monitored during the deposition process. The deposited sample was annealed in air at 180°C for 30 minutes to obtain TeO2 with 5 atom% S and 3 atom% Se. x A Se:S tellurium oxide semiconductor thin film was formed.

[0067] Subsequently, thin-film transistors (TFTs) were fabricated using Ni as the source and drain electrodes, respectively, and by deposition. The fabricated thin-film transistors (TFTs) were then passivated from moisture and oxygen by depositing aluminum oxide (Al2O3) to a thickness of approximately 10 nm using atomic layer deposition at a process temperature of 150°C.

[0068] Example 3-2: 5 atom% S and 4 atom% Se In the same manner as in Example 3-1, a TeO2 having 5 atom% S and 4 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6.53 mg of selenium (Se), and 4.45 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 8.73 mg of selenium (Se), and 4.43 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0069] Example 3-3: 5 atom% S and 6 atom% Se In the same manner as in Example 3-3, a TeO2 having 5 atom% S and 6 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6.53 mg of selenium (Se), and 4.45 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 13.33 mg of selenium (Se), and 4.42 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0070] Examples 3-4: 5 atom% S and 7 atom% Se In the same manner as in Example 3-1, a TeO2 having 5 atom% S and 7 atom% Se was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6.53 mg of selenium (Se), and 4.45 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 15.83 mg of selenium (Se), and 4.42 mg of sulfur (S) were used as evaporation sources. x We manufactured thin-film transistors (TFTs) containing :Se:S tellurium oxide semiconductors.

[0071] Comparative Example 1: Not doped with heterogeneous atoms and sulfur. Comparative Example 1-1: Untreated (pristine) tellurium oxide In the same manner as in Example 3-1, TeO2 was prepared, except that instead of using 400 mg of commercially available TeO2 powder (purity 99.995% or higher), 6.53 mg of selenium (Se), and 4.45 mg of sulfur (S) as evaporation sources, 400 mg of commercially available TeO2 powder (purity 99.995% or higher) was used as the evaporation source. x We manufactured thin-film transistors (TFTs) containing tellurium oxide semiconductors.

[0072] Table 1 below summarizes the manufacturing conditions and atom percentages of sulfur (S) and other atoms in the examples and comparative examples of the present invention. [Table 1]

[0073] [Example Test] Test Example 1: Changes in transistor transfer characteristics due to the type and concentration of heterogeneous atoms Figure 2 shows the trends in the mobility and current flash ratio characteristics of thin-film transistors depending on the type of heterogeneous atoms and doping concentration for Examples 1-1 to 1-8. Referring to Figure 2, it can be seen that in the case of tellurium oxide containing sulfur, it is possible to realize thin-film transistors with high mobility or a large current flash ratio even at low heat treatment temperatures of 200°C or less, depending on the type and degree of heterogeneous atom inclusion.

[0074] Test Example 2: Confirmation of the persistence of heterogeneous atoms in the formed thin film Figure 3 shows the results of XPS (X-ray photoelectron spectroscopy) analysis of the thin films formed by Examples 1-1 to 1-8, confirming the presence and concentration of heterogeneous atoms within the thin films. Referring to Figure 3, it was confirmed that a sufficient amount of heterogeneous atoms remained within the thin films.

[0075] Test Example 3: Amorphous Thin Film Figure 4 shows the thermal evaporation and annealing of TeO2 at 180°C in Example 3-2. x This graph shows the XRD (X-Ray Diffractometer) spectral results of the :Se:S thin film. Referring to Figure 4, TeO x We were able to confirm that the :Se:S thin film is formed in a nearly amorphous state on a glass substrate.

[0076] Test Example 4: TeO x :Se:S TFT transfer characteristics and optical bandgap Figure 5a shows the thermal deposition process according to Example 3-2 using TeO x TeO2 was measured under optimized conditions (VDS = -0.1V) when manufacturing a Se:S thin-film transistor (TFT) element. x This graph shows the transfer curve of a :Se:S thin-film transistor (TFT). Figure 5b shows the TeO2 used in the thermal deposition process according to Example 3-2. x This graph shows the output curve of a :Se:S thin-film transistor (TFT). Figure 6 shows the absorbance at different wavelengths of light measured by UV-Vis (Ultraviolet-visible spectroscopy) for Example 3-2, and the optical bandgap graph calculated using a Tauc plot.

[0077] Referring to Figures 5a and 5b, TeO according to Example 3-2 x The field-effect mobility (μh) of a thin-film transistor (TFT) is 19.2 cm⁻¹. 2 / V·s, and on / off is approximately 10 7It can be seen that... Referring to Figure 6, looking at the x-axis intercept value of the Tauc plot computation graph, TeO x It can be seen that the optical band gap of a :Se:S thin-film transistor (TFT) is approximately 1.79 eV.

[0078] Test Example 5: TeO2 by post-annealing temperature x :Se:S TFT transfer curve Figure 5c shows TeO2 fabricated with a channel thickness of 25 nm, deposited at the post-annealing temperature of different channel layers using the thermal deposition process according to Example 3-2. x This graph shows the transfer curve of a thin-film transistor (TFT). Referring to Figure 5c, we were able to confirm that the amount of charge increases as the post-annealing temperature increases, and that the optimal process temperature is 180°C.

[0079] Test Example 6: TeO2 by change in sulfur (S) ratio x Electrical characteristics of :Se:S TFT Figures 7a, 7b, and 7c show TeO2 produced in Examples 2-1, 2-2, 2-3, and 2-4, respectively, in which tellurium oxide containing 5 atom% heteroatom selenium (Se) was doped with 1, 3, 5, and 7 atom% sulfur (S) atoms. x This graph shows the transfer characteristics, hole concentration, resistivity, and field-effect mobility for a :Se:S thin-film transistor (TFT). Referring to Figures 7a to 7c, it was confirmed that the highest hole mobility was obtained when doped with 5 atom% sulfur (S), and that the amount of charge decreased at doping concentrations exceeding this.

[0080] Test Example 7: Changes in the ratio of selenium (Se) and TeO x Electrical characteristics of :Se:S TFT Figures 8a, 8b, and 8c show TeO2 obtained in Examples 3-1, 3-2, 2-3, 3-3, and 3-4, in which tellurium oxide containing 5 atom% sulfur (S) was doped with 3, 4, 5, 6, and 7 atom% heteroatomic selenium (Se) atoms, respectively. xThis graph shows the transfer characteristics, hole concentration, resistivity, and field-effect mobility for a :Se:S thin-film transistor (TFT). Referring to Figures 8a to 8c, it was confirmed that the highest hole mobility was obtained when doped with 4 atom% selenium (Se), and that mobility decreased at doping concentrations exceeding this.

[0081] The scope of the present invention is defined more by the claims described below than by the detailed description above, and all modifications or variations derived from the meaning and scope of the claims, as well as the concept of equivalents, should be interpreted as being included within the scope of the present invention.

Claims

1. (a) One or more targets selected from the group consisting of targets containing group 14 atoms of the periodic table, targets containing group 15 atoms, targets containing group 16 atoms, targets containing copper (Cu), and targets containing zinc (Zn); targets containing tellurium atoms (Te) and tellurium dioxide (TeO) ２ A step of manufacturing a first semiconductor thin film, which includes a first semiconductor formed by depositing one or more targets selected from the group consisting of targets including ), and a target containing a sulfur atom (S); and (b) The step of annealing the first semiconductor thin film to produce a second semiconductor thin film containing a second semiconductor. A method for manufacturing semiconductor thin films, including

2. The group 14 atoms include one or more selected from the group consisting of germanium (Ge), tin (Sn), and lead (Pb). The Group 15 atoms include one or more selected from the group consisting of antimony (Sb), bismuth (Bi), nitrogen (N), and phosphorus (P). A method for producing a semiconductor thin film according to claim 1, characterized in that the group 16 atom contains selenium (Se).

3. The first semiconductor is Tellurium complexes containing tellurium (Te) atoms and tellurium oxides; Any one selected from the group consisting of Group 14, Group 15, Group 16 atoms, copper (Cu), zinc (Zn), and combinations thereof, which are alloyed with the tellurium complex; and The sulfur oxide (SO4) mixed with the tellurium complex ｘ A method for manufacturing a semiconductor thin film according to claim 1, characterized in that x is 2 or 3.

4. The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the deposition in step (a) is carried out in a temperature range of room temperature to 70°C.

5. A method for manufacturing a semiconductor thin film according to claim 1, characterized in that the first semiconductor is represented by the following chemical formula 1. [Chemical formula 1] TeO ｘ :M １ M ２ (In the formula, M １ M is one selected from the group consisting of Group 14, Group 15, Group 16 atoms of the periodic table, copper (Cu), zinc (Zn), and combinations thereof. ２ (where x is a sulfur atom and x is 0 < x < 2).

6. The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the annealing in step (b) is performed at a temperature of 100 to 300°C.

7. The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the second semiconductor is represented by the following chemical formula 2. [Chemical formula 2] TeO ｘ :M’ １ M’ ２ (In the formula, M' １ M' is one selected from the group consisting of Group 14, Group 15, Group 16 atoms of the periodic table, copper (Cu), zinc (Zn), and combinations thereof. ２ (where x is a sulfur atom and x is 0 < x < 2.)

8. The second semiconductor is Tellurium complexes containing tellurium (Te) atoms and tellurium oxides; and A method for producing a semiconductor thin film according to claim 1, characterized in that it contains one heteroatom selected from the group consisting of germanium (Ge), antimony (Sb), selenium (Se), copper (Cu), zinc (Zn), and combinations thereof, which are alloyed with the tellurium complex.

9. atom% of sulfur in the second semiconductor (S ａｔｏｍ％ ) and atom% (E) of different atoms ａｔｏｍ％ ) ratio (S ａｔｏｍ％ : E ａｔｏｍ％ A method for manufacturing a semiconductor thin film according to claim 8, characterized in that the ratio of ) is 5:2 to 5:

7.

10. The second semiconductor is tellurium oxide, which is tellurium monoxide (TeO) and tellurium dioxide (TeO) ２ A method for manufacturing a semiconductor thin film according to claim 8, characterized by including )

11. The tellurium atoms in the second semiconductor, Te ４＋ The ionization state of Te ２＋ The ionization state of, and Te ０ A method for manufacturing a semiconductor thin film according to claim 1, characterized in that it includes a non-ionized state.

12. A method for manufacturing a semiconductor thin film according to claim 1, characterized in that the second semiconductor is in an oxygen-deficient state.

13. A method for manufacturing a semiconductor thin film according to claim 1, characterized in that the second semiconductor is p-type.

14. A method for manufacturing a semiconductor thin film according to claim 1, characterized in that, during annealing in step (b), the sulfur atoms of the first semiconductor are oxidized with sulfur oxide, thereby reducing the tellurium oxide and increasing the oxygen vacancies of the second semiconductor.

15. A method for manufacturing a semiconductor thin film according to claim 14, characterized in that the number of conduction channels in the second semiconductor increases by the generation of oxygen vacancies.

16. The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the second semiconductor is for use in the semiconductor layer of a thin-film transistor.

17. A method for manufacturing a semiconductor thin film according to claim 1, characterized in that the thickness of the second semiconductor thin film is 5 to 40 nm.

18. A semiconductor thin film manufacturing method involves, between step (a) and step (b), (b') Further comprising the step of annealing the first semiconductor thin film at the same temperature as, or lower than or higher than, the annealing temperature of step (b) to form a second' semiconductor thin film, The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the first semiconductor thin film in step (b) is the second' semiconductor thin film.

19. The method for manufacturing a semiconductor thin film according to claim 18, characterized in that the annealing temperature in step (b') is carried out in the temperature range of 150 to 200°C.

20. The method for manufacturing a semiconductor thin film according to claim 1, characterized in that the deposition in step (a) is carried out by thermal deposition, sputtering, chemical vapor deposition (CVD), molecular layer deposition (ALD), or solution coating.

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