Gaming machine

Abstract

The objective is to achieve efficient control processing. [Solution] The frame-side control CPU executes a counting notification transmission process which consists of at least the following: a ninth frame-side control load instruction that loads a counting subtraction counter into the first frame-side control register; a tenth frame-side control load instruction that saves the counting subtraction counter to the address of the frame-side control transmit buffer with 3 added to it; a third frame-side control call instruction that calls and executes an SC transmit process that transmits the contents of the frame-side control transmit buffer to the card unit via the first frame-side control serial port; a fifteenth frame-side control load instruction that sets information indicating the completion of counting into the second frame-side control pair register; and a sixth frame-side control call instruction that calls and executes a main transmit process that transmits the contents of the second frame-side control pair register to the game control board via the second frame-side control serial port.

Claims

[Claim 1] A game control board equipped with a game control microprocessor that controls the progress of the game, A frame-side control board equipped with a frame-side control microprocessor that performs various controls based on commands from the aforementioned game control board, A gaming machine equipped with, A card unit, which is an external device of a gaming machine and is electrically connected to the management device of the gaming hall, is electrically connectable to the frame-side control board. The frame-side control microprocessor includes: Frame-side control CPU, A frame-side control program executed by the frame-side control CPU, and a frame-side control ROM storing information referenced by the frame-side control program, A frame-side control RAM capable of storing information updated by the frame-side control program, A first frame-side control serial port transmits and receives information bidirectionally between the frame-side control board and the card unit as a serial signal using a first frame-side control data register, A second frame-side control serial port transmits and receives information bidirectionally between the frame-side control board and the game control board as a serial signal using a second frame-side control data register, It is built in to at least The aforementioned frame-side control CPU is Multiple 1-byte general-purpose frame control registers, A 1-byte frame-side control flag register, Having at least, The aforementioned frame-side control RAM is A predetermined byte frame-side control transmission buffer. Having at least, The aforementioned frame-side control CPU is A first frame-side control load instruction loads the lower byte of the 3 bytes of the number of game balls stored in the frame-side control RAM into the first frame-side control register among the plurality of frame-side control general-purpose registers, A first frame-side control return instruction determines whether the value of the first frame-side control register loaded by the first frame-side control load instruction is 0, and if the determined value is not 0, the value of the zero flag in the frame-side control flag register becomes 0 and the process returns to the caller. When the determination value is 0, the value of the zero flag in the frame-side control flag register becomes 1, and a second frame-side control load instruction loads the upper two bytes of the number of game balls into the first frame-side control pair register, which is composed of the second frame-side control register and the third frame-side control register among the plurality of general-purpose frame-side control registers. Following the second frame-side control load instruction, a second frame-side control return instruction returns to the calling process, The game ball count determination process, which consists of at least the following, is called and executed from another process: The aforementioned frame-side control CPU is A third frame-side control load instruction sets the address of the frame-side control transmit buffer in the first frame-side control pair register, The contents of the address indicated by the first frame-side control pair register contain a fourth frame-side control load instruction that saves the message length, A fifth frame-side control load instruction saves a command to the address obtained by adding 1 to the address indicated by the first frame-side control pair register, A sixth frame-side control load instruction loads the counting communication number stored in the frame-side control RAM into the first frame-side control register, A seventh frame-side control load instruction saves the counting communication number, which is the value of the first frame-side control register, to the address obtained by adding 2 to the address indicated by the first frame-side control pair register, A first frame-side control call instruction calls and executes a circular addition process that assigns a value to the value of the first frame-side control register that cycles within a predetermined numerical range, The counting communication number is given an eighth frame-side control load command that saves the value of the first frame-side control register assigned by the circular addition process, A second frame-side control call command calls and executes a count subtraction value processing that saves the count subtraction value, which is the number of items counted, as a count subtraction counter stored in the frame-side control RAM based on the operation pattern of the count button, A ninth frame-side control load instruction loads the counting / subtracting counter into the first frame-side control register, A tenth frame-side control load instruction saves the value of the first frame-side control register, which is the counting subtraction counter, to the address obtained by adding 3 to the address of the frame-side control transmit buffer, An eleventh frame-side control load instruction loads the cumulative counting counter stored in the frame-side control RAM into the first frame-side control pair register, A first frame-side control arithmetic instruction that adds the value of the first frame-side control register to the value of the first frame-side control pair register, The cumulative counting counter includes a 12th frame-side control load instruction that saves the value of the first frame-side control pair register, which is calculated by the first frame-side control arithmetic instruction and is an added value, A thirteenth frame-side control load instruction saves the value of the first frame-side control pair register, which is calculated and added by the first frame-side control arithmetic instruction, to the address obtained by adding 4 to the address of the frame-side control transmit buffer, A third frame-side control call command which calls and executes an SC transmission process that transmits the contents of the frame-side control transmission buffer to the card unit via the first frame-side control serial port, A 14th frame-side control load instruction loads the counting / subtracting counter stored in the frame-side control RAM into the first frame-side control register, A third frame-side control return instruction determines whether the value of the counting subtraction counter loaded by the 14th frame-side control load instruction is 0, and if the result of the determination is 0, it returns to the calling process. A fourth frame-side control call command calls and executes a game ball subtraction process that, when the value of the count subtraction counter loaded by the 14th frame-side control load command is not 0, uses the value of the count subtraction counter as the subtraction value and subtracts the subtraction value from the current number of balls held. A first frame-side control clear command that clears the aforementioned counting subtraction counter to zero, A 15th frame-side control load instruction sets information indicating the completion of counting in a second frame-side control pair register, which is composed of a fourth frame-side control register and a fifth frame-side control register among the plurality of frame-side control general-purpose registers, A fifth frame-side control call command is used to call and execute the aforementioned game ball count determination process, A first frame-side control determination command determines whether the determination value in the game ball count determination process is 0 based on the value of the zero flag in the frame-side control flag register obtained by the fifth frame-side control call command, A second frame-side control determination command, which, when the determination result of the first frame-side control determination command is that the determination value is 0, determines whether a specific bit of the counting switch data stored in the frame-side control RAM is 0, and returns to the caller when the determination result is that the specific bit of the counting switch data is 0, The second frame-side control determination command includes a 16th frame-side control load command which, if the determination result is that a specific bit of the counting switch data is not 0, sets information indicating that counting is in progress in the second frame-side control pair register, After the 16th frame-side control load command, or when the determination result of the first frame-side control determination command is not zero, a sixth frame-side control call command is called and executed to call the main transmission process that transmits the contents of the second frame-side control pair register to the game control board via the second frame-side control serial port, The process of sending a count notification consists of at least the following: A gaming machine characterized by the following features.

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