Multilayer ceramic capacitor and method for manufacturing the same
By integrating a glass composition with Ag and Pd in the external electrodes, the adhesion and connectivity issues in multilayer ceramic capacitors are addressed, resulting in reduced resistance and improved structural stability for high-capacitance capacitors.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-05-22
- Publication Date
- 2026-06-12
AI Technical Summary
Existing multilayer ceramic capacitors face challenges in achieving ultra-high capacitance and reliability due to issues with adhesion and connectivity between conductive metal and glass in external electrodes, leading to structural instability and high resistance.
Incorporating a glass composition with Ag and Pd in the external electrodes, including interface regions and a central region, enhances adhesion and connectivity, improving the reliability and structural stability of the capacitors.
The improved adhesion and connectivity between the conductive metal and glass in the external electrodes result in reduced resistance and enhanced structural stability, ensuring high reliability and capacitance in multilayer ceramic capacitors.
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Figure 2026096145000001_ABST
Abstract
Description
[Technical Field] 【0001】 The disclosures of this application relate to multilayer ceramic capacitors and methods for manufacturing the same. [Background technology] 【0002】 Electronic components that use ceramic materials include capacitors, inductors, piezoelectric elements, varistors, and thermistors. Among these ceramic electronic components, multilayer ceramic capacitors (MLCCs) can be used in a variety of electronic devices due to their small size, guaranteed high capacitance, and ease of mounting. 【0003】 For example, multilayer ceramic capacitors can be used as chip-type capacitors that are mounted on the substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal portable devices, and smartphones, and play a role in charging and discharging electricity. 【0004】 In recent years, with the miniaturization of electronic products, there has been a demand for ultra-miniaturization and ultra-high capacitance in multilayer ceramic capacitors. To this end, multilayer ceramic capacitors are being manufactured with thinner dielectric layers and internal electrode layers, and a structure that allows for a greater number of dielectric and internal electrode layers to be stacked. Such ultra-miniaturized and ultra-high capacitance multilayer ceramic capacitors are increasingly being used in fields requiring high levels of reliability, such as electric vehicles, thus demanding high stability and reliability to meet these requirements. [Overview of the project] [Problems that the invention aims to solve] 【0005】 According to one aspect of this disclosure, it is possible to provide a multilayer ceramic capacitor with improved reliability and low resistance characteristics. 【0006】 According to another aspect of this disclosure, a method for manufacturing a multilayer ceramic capacitor with improved reliability and low resistance characteristics can be provided. 【0007】 However, the problems that the embodiments of the present invention aim to solve are not limited to those described above, and can be broadly expanded within the scope of the technical ideas included in the present invention. [Means for solving the problem] 【0008】 A multilayer ceramic capacitor according to one embodiment includes a capacitor body comprising a dielectric layer and an internal electrode layer, and an external electrode located outside the capacitor body and comprising a conductive metal and glass, wherein the glass includes a first interface region in contact with the conductive metal, and the first interface region comprises at least one of Ag and Pd. 【0009】 The first interface region may be defined as a region extending 500 nm inward from the interface between the conductive metal and the glass. 【0010】 The glass further includes a second interface region in contact with the internal electrode layer, and the second interface region may include at least one of Ag and Pd. 【0011】 The second interface region may be defined as a region extending 500 nm inward from the interface between the glass and the internal electrode layer in the direction of the glass. 【0012】 The second interface region may include Ni and an alloy containing at least one of Ag and Pd. 【0013】 The second interface region may further include at least one of Fe, Co, and In. 【0014】 The first interface region may further contain an oxide of the conductive metal. 【0015】 The first interface region may include an alloy comprising the conductive metal and at least one of Ag and Pd. 【0016】 The glass further includes a central region whose depth in the direction inward from the interface between the conductive metal and the glass exceeds 500 nm, and the central region may include at least one of Ag and Pd. 【0017】 The central region may further contain at least one of Fe, Co, and In. 【0018】 The glass may further contain at least one of the following: Si, Al, Fe, Sn, Zn, Li, Na, K, Ba, Ca, Sr, B, Ni, Mn, Ge, Cu, In, Co, Ti, and P. 【0019】 The external electrode includes an electrode layer that is electrically connected to the internal electrode layer and located on the cross-section of the capacitor body, and the electrode layer may include the conductive metal and the glass. 【0020】 The conductive metal may include at least one of Cu, Ni, Au, Pt, Sn, W, Ti, and Pb. 【0021】 Another embodiment of a multilayer ceramic capacitor includes a capacitor body comprising a dielectric layer and an internal electrode layer, and external electrodes located outside the capacitor body, comprising a conductive metal including Cu and glass, wherein the glass comprises at least one of Ag and Pd. 【0022】 The glass includes a first interface region that is in contact with the conductive metal, and the first interface region may include at least one of Ag and Pd. 【0023】 The glass further includes a second interface region that contacts the internal electrode layer, and the second interface region may include at least one of Ag and Pd. 【0024】 The glass further includes a central region with a depth exceeding 500 nm from the interface between the conductive metal and the glass toward the interior of the glass, and the central region may include at least one of Ag and Pd. 【0025】 According to the manufacturing method of a multilayer ceramic capacitor of an embodiment, an electrode layer forming paste containing a conductive metal and a glass composition is applied on one surface of a capacitor body including a dielectric layer and an internal electrode layer, and the electrode layer forming paste is sintered to form an electrode layer of an external electrode. The glass composition includes at least one selected from the group consisting of Ag oxide and Pd oxide. 【0026】 Among the total weight of the glass composition, the content of at least one selected from the group consisting of Ag oxide and Pd oxide may be 0.01 wt% to 15 wt%. 【0027】 The glass composition may further include at least one selected from the group consisting of Si oxide, Al oxide, Fe oxide, Sn oxide, Zn oxide, Li oxide, Na oxide, K oxide, Ba oxide, Ca oxide, Sr oxide, B oxide, Ni oxide, Mn oxide, Ge oxide, Cu oxide, In oxide, Co oxide, Ti oxide, and P oxide. 【Advantages of the Invention】 【0028】 According to an example of the present disclosure, the adhesive force between the conductive metal and the glass included in the external electrode and the denseness of the external electrode are improved, and the reliability and structural stability of the multilayer ceramic capacitor can be enhanced. 【0029】 According to another example of this disclosure, the connectivity and low-resistance characteristics between the glass contained in the external electrode and the internal electrode layer can be further improved, thereby further enhancing the reliability and structural stability of the multilayer ceramic capacitor. [Brief explanation of the drawing] 【0030】 [Figure 1] This is a perspective view showing an example of a multilayer ceramic capacitor. [Figure 2] This is a cross-sectional view of a multilayer ceramic capacitor cut along the line I-I' in Figure 1. [Figure 3] This is a cross-sectional view of a multilayer ceramic capacitor cut along the line II-II' in Figure 1. [Figure 4] This is a magnified partial cross-sectional view of portion A in Figure 2. [Figure 5] This graph shows the equivalent series resistance (ESR) of the multilayer ceramic capacitors according to Example 7 and Comparative Example 7. [Modes for carrying out the invention] 【0031】 Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings, so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. In order to clearly illustrate the present invention in the drawings, unnecessary parts have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. Furthermore, the components shown in the attached drawings are exaggerated, omitted, or illustrated conceptually, and the size of each component does not fully reflect its actual size. 【0032】 The accompanying drawings are provided to facilitate understanding of the embodiments disclosed herein, and should be understood that the technical ideas disclosed herein are not limited by the accompanying drawings and include all modifications, equivalents, or substitutions that fall within the concept and technical scope of the present invention. 【0033】 Terms including ordinal numbers such as "1st," "2nd," etc., can be used to describe various components, but the components are not limited to those terms. Such terms are used solely for the purpose of distinguishing one component from another. 【0034】 Furthermore, when a layer, membrane, region, plate, or other part is "on top of" or "above" another part, this includes not only when it is "directly above" the other part, but also when there are other parts in between. Conversely, when one part is "directly above" another part, it means that there are no other parts in between. Also, being "on top of" or "above" a reference part means being located "on top of" or "above" the reference part, and does not necessarily mean being located "on top of" or "above" in the opposite direction of gravity. 【0035】 Terms such as "includes" or "has" indicate the presence of features, figures, steps, actions, components, parts, or combinations thereof described in the specification, and do not preemptively exclude the presence or possibility of one or more other features or figures, steps, actions, components, parts, or combinations thereof. Therefore, when we say "includes," it means that, unless otherwise stated, it may include other components rather than excluding them. 【0036】 Furthermore, throughout the specification, "on a plane" means when the subject is viewed from above, and "on a cross-section" means when the subject is viewed from the side of a cross-section obtained by cutting the subject perpendicularly. 【0037】 Furthermore, throughout the specification, the term "connected" does not mean only that two or more components are directly connected, but may also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are a single unit but are referred to by different names depending on their location or function. 【0038】 The following describes a multilayer ceramic capacitor, an example of which is described herein, with reference to Figures 1 to 3. 【0039】 Figure 1 is a conceptual perspective view of an example multilayer ceramic capacitor. Figure 2 is a conceptual cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' in Figure 1. Figure 3 is a conceptual cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' in Figure 1. 【0040】 Referring to Figures 1 to 3, the multilayer ceramic capacitor 100 may include a capacitor body 110 and external electrodes 131 and 132 positioned outside the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 positioned at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction). 【0041】 The L-axis, W-axis, and T-axis shown in Figures 1 to 3 represent the length, width, and stacking direction of the capacitor body 110, respectively. Here, the stacking direction (T-axis direction) may be a direction perpendicular to the broad surface (main surface) of the sheet-shaped component, and for example, it may be used as the same concept as the stacking direction in which the dielectric layer 111 is stacked. The length direction (L-axis direction) may be a direction approximately perpendicular to the stacking direction (T-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-like component, and for example, it may be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be a direction approximately perpendicular to the stacking direction (T-axis direction) and the length direction (L-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-like component, and the length in the length direction (L-axis direction) of the sheet-like component may be longer than the length in the width direction (W-axis direction). 【0042】 In one example, the capacitor body 110 may include a roughly hexahedral shape. 【0043】 For the sake of explanation, the following will define the capacitor body 110 as follows: the two surfaces facing each other in the stacking direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces and facing each other in the length direction (L-axis direction) are defined as the third and fourth surfaces, the two surfaces connected to the first and second surfaces and the two surfaces connected to the third and fourth surfaces, and the two surfaces facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces. 【0044】 The first surface, which is the lower surface of the capacitor body 110, may be the surface facing the mounting direction of the multilayer ceramic capacitor 100. At least one of the first to sixth surfaces may be flat. Alternatively, at least one of the first to sixth surfaces may be a curved surface with a convex central portion, and the corners that form the boundaries of each surface may be rounded. 【0045】 The shape, size, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this disclosure. 【0046】 The capacitor body 110 may include a dielectric layer 111 and internal electrode layers 121 and 122. The capacitor body 110 may include multiple dielectric layers 111. 【0047】 The capacitor body 110 may include a plurality of dielectric layers 111, and first internal electrodes 121 and second internal electrodes 122 that are alternately arranged in the stacking direction (T-axis direction) between the dielectric layers 111. 【0048】 The boundaries between adjacent dielectric layers 111 may be integrated to such an extent that they are difficult to confirm without using a scanning electron spectroscopy (SEM). 【0049】 The capacitor body 110 may include an active region. The active region may be a part that contributes to the capacitance formation of the multilayer ceramic capacitor 100. For example, the active region may be an overlapping region of the first internal electrode 121 or the second internal electrode 122 stacked along the stacking direction (T-axis direction). 【0050】 The capacitor body 110 may further include a cover area and a side margin area. 【0051】 The cover region may be positioned adjacent to the first and second surfaces of the active region in the stacking direction (T-axis direction) as a stacking direction margin. For example, a single dielectric layer 111 or two or more dielectric layers 111 may be stacked on the upper and lower surfaces of the active region, respectively, and provided as the cover region. 【0052】 The side margin region may be positioned adjacent to the fifth and sixth surfaces of the active region in the width direction (W-axis direction) as a width-direction margin portion. The side margin region may be formed by applying a conductive paste layer to only a portion of the dielectric green sheet surface, and stacking dielectric green sheets without the conductive paste layer on both sides of the dielectric green sheet surface and firing them. 【0053】 For example, damage to the first internal electrode 121 and the second internal electrode 122 due to physical or chemical stress may be prevented through the cover region and the side margin region. 【0054】 The dielectric layer 111 may contain a barium titanate-based compound as its main component. For example, the dielectric properties of the multilayer ceramic capacitor 100 may be ensured by using the barium titanate-based compound as the dielectric base material. 【0055】 The barium titanate-based compounds may include BaTiO3, BaZrO3, BaSnO3, CaTiO3, CaZrO3, CaSnO3, SrTiO3, SrZrO3, SrSnO3, etc. These can be used individually or in combination of two or more. 【0056】 The dielectric layer 111 may further contain minor components. 【0057】 The aforementioned minor components may include manganese (Mn), chromium (Cr), silicon (Si), aluminum (Al), magnesium (Mg), tin (Sn), antimony (Sb), germanium (Ge), gallium (Ga), indium (In), barium (Ba), lanthanum (La), yttrium (Y), actinium (Ac), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), hafnium (Hf), vanadium (V), etc. These can be used individually or in combination of two or more. 【0058】 For example, the average thickness (average length in the T-axis direction) of the dielectric layer 111 may be approximately 1.0 μm to 8.0 μm. For another example, the average thickness (average length in the T-axis direction) of the dielectric layer 111 may be 2 μm to 6 μm. By setting it within this range, the reliability of the multilayer ceramic capacitor 100 can be further improved. 【0059】 For example, the average thickness of the dielectric layer 111 can be determined as the arithmetic mean of the dielectric layer 111 thickness measured at 10 points separated by a predetermined interval from the reference point, using the reference point as the center of the dielectric layer 111 in the length direction (L direction) or width direction (W direction) of the dielectric layer 111 in an SEM analysis image of a cross section (LT cross section) cut perpendicular to the width direction from the center in the width direction (W direction) of the multilayer ceramic capacitor 100 in the length direction (L direction) and the stacking direction (T direction). The interval between the 10 points can be adjusted by the scale of the SEM image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111, and if all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the interval between the 10 points can be adjusted. 【0060】 The first internal electrode 121 and the second internal electrode 122 of the internal electrode layers 121 and 122 may have different polarities. For example, the first internal electrode 121 and the second internal electrode 122 may be arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between. For example, one end of the first internal electrode 121 may be exposed through the third surface of the capacitor body 110, and one end of the second internal electrode 122 may be exposed through the fourth surface of the capacitor body 110. 【0061】 The first internal electrode 121 and the second internal electrode 122 may be electrically insulated by a dielectric layer 111 placed between them. 【0062】 The end of the first internal electrode 121 exposed through the third surface of the capacitor body 110 may be electrically connected to the first external electrode 131. For example, the end of the second internal electrode 122 exposed through the fourth surface of the capacitor body 110 may be electrically connected to the second external electrode 132. 【0063】 The first internal electrode 121 and the second internal electrode 122 may each contain a conductive metal. For example, the conductive metal may include metals such as Ni, Cu, Ag, Pd, Au, or alloys thereof (e.g., Ag-Pd alloy). 【0064】 The first internal electrode 121 and the second internal electrode 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111. 【0065】 The first internal electrode 121 and the second internal electrode 122 may be formed using a conductive paste containing a conductive metal. For example, the conductive paste may be printed by screen printing or gravure printing. 【0066】 For example, the average thickness of the first internal electrode 121 and the second internal electrode 122 may be 0.1 μm to 2 μm. By setting it within this range, miniaturization and thinning of the multilayer ceramic capacitor 100 can be achieved, and the resistance can be further reduced. 【0067】 The average thickness of the first internal electrode 121 and the second internal electrode 122 may be measured by SEM analysis. The SEM analysis may be substantially the same as the method for measuring the average thickness of the dielectric layer 111 described above. 【0068】 The capacitor body 110 may be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked. 【0069】 Referring to Figure 2, the first external electrode 131 and the second external electrode 132 may have different polarities. 【0070】 The first external electrode 131 may be electrically connected to the portion of the first internal electrode 121 that is exposed. For example, the second external electrode 132 may be electrically connected to the portion of the second internal electrode 122 that is exposed. 【0071】 When a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge may accumulate between the opposing first internal electrode 121 and the second internal electrode 122. The capacitance of the multilayer ceramic capacitor 100 may be proportional to the area overlapping on the plane of the first internal electrode 121 and the second internal electrode 122, which overlap each other in the stacking direction (T-axis direction) in the active region. 【0072】 The first external electrode 131 and the second external electrode 132 may include first and second connecting portions (not shown) that are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and connected to the first internal electrode 121 and the second internal electrode 122, respectively. The first external electrode 131 and the second external electrode 132 may also include first and second band portions (not shown) that are arranged at the corners where the third and fourth surfaces, the first and second surfaces, or the fifth and sixth surfaces of the capacitor body 110 intersect. 【0073】 The first and second band portions may extend from the first and second connection portions to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, respectively. The fixing strength of the first external electrode 131 and the second external electrode 132 can be improved via the first and second band portions. 【0074】 The external electrodes 131 and 132 may include electrode layers 10 and 20 located on the surface of the capacitor body 110. 【0075】 The first external electrode 131 may include a first electrode layer 10 that is directly located on the surface of the capacitor body 110 (e.g., the third surface) and electrically connected to the first internal electrode 121. For example, the second external electrode 132 may include a second electrode layer 20 that is directly located on the surface of the capacitor body 110 (e.g., the fourth surface) and electrically connected to the second internal electrode 122. 【0076】 Figure 4 is an enlarged partial cross-sectional view of portion A in Figure 2. 【0077】 Referring to Figure 4, the external electrodes 131, 132 or electrode layers 10, 20 may include a conductive metal 11 and glass 12. For example, the glass 12 may be dispersed within the conductive metal 11. The conductive metal 11 and glass 12 may be included in the electrode layers 10, 20. 【0078】 The conductive metal 11 may contain at least one of copper (Cu), nickel (Ni), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and lead (Pb). The conductive metal 11 may also contain alloys or combinations of the above-mentioned metals. For example, the conductive metal 11 may contain Cu or a Cu alloy. If the conductive metal 11 contains Cu, the metal other than Cu may be included in an amount of 5 moles or less per 100 moles of Cu. 【0079】 The glass 12 may contain a composition of mixed oxides, for example, at least one selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. 【0080】 The transition metal may include at least one selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni). The alkali metal may include at least one selected from the group consisting of lithium (Li), sodium (Na), and potassium (K). The alkaline earth metal may include at least one selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba). 【0081】 Glass 12 may contain at least one of silver (Ag) and palladium (Pd). 【0082】 The glass 12 may include a first interface region that is in contact with the conductive metal 11. The first interface region may be defined as a region extending 500 nm inward from the interface between the conductive metal 11 and the glass 12. 【0083】 The first interface region may contain at least one of Ag and Pd. This improves the adhesion between the conductive metal 11 and the glass 12 and the density of the external electrodes 131 and 132, thereby improving the reliability and structural stability of the multilayer ceramic capacitor 100. 【0084】 As shown in Figure 4, at least one of the Ag and Pd 13a contained in the first interface region is in contact with both the conductive metal 11 and the glass 12, which can improve the adhesion between the conductive metal 11 and the glass 12 and the density of the external electrodes 131 and 132. 【0085】 The first interface region may further contain an oxide of the conductive metal 11. This may further improve the wettability and adhesion between the conductive metal 11 and the glass 12, and further improve the structural stability and density of the external electrodes 131 and 132. For example, Ag oxide or Pd oxide contained in the glass composition may be reduced, and a portion of the conductive metal 11 in contact with the glass composition may be oxidized. This may result in an oxide of the conductive metal 11 being present in the first interface region. 【0086】 For example, when Cu is used as the conductive metal 11, the first interface region may contain Cu oxide. 【0087】 At least one of Ag and Pd 13a included in the first interface region may exist in the form of an alloy with the conductive metal 11. For example, Cu and an alloy containing at least one of Ag and Pd may be located in the first interface region. This may further improve the wettability and adhesion between the conductive metal 11 and the glass 12, and further improve the structural stability and density of the external electrodes 131 and 132. 【0088】 In one example, the glass 12 may further include a second interface region that is in contact with the internal electrode layers 121 and 122. The second interface region may be defined as a region extending 500 nm inward from the interface between the glass 12 and the internal electrode layers 121 and 122. 【0089】 The second interface region may include at least one of Ag and Pd. This improves the connectivity between the glass 12 and the internal electrode layers 121 and 122, thereby further enhancing the reliability and structural stability of the multilayer ceramic capacitor 100. 【0090】 As illustrated in Figure 4, at least one of the Ag and Pd 13b contained in the second interface region is in contact with both the glass 12 and the internal electrode layers 121 and 122, thereby further improving the coupling stability and electrical reliability between the glass 12 and the internal electrode layers 121 and 122. 【0091】 At least one of Ag and Pd 13b included in the second interface region may exist in the form of an alloy with the constituent elements of the internal electrode layers 121 and 122. For example, Ni and an alloy containing at least one of Ag and Pd may be located in the second interface region. This further improves the connectivity and low-resistance characteristics between the glass 12 and the internal electrode layers 121 and 122, thereby further enhancing the reliability and structural stability of the multilayer ceramic capacitor 100. 【0092】 For example, the glass 12 may further include a central region where the depth from the interface between the conductive metal 11 and the glass 12 in the direction of the glass 12 exceeds 500 nm. When the glass 12 is in contact with the internal electrode layers 121 and 122, the central region may be defined as a region where the depth from the interface between the conductive metal 11 and the glass 12 in the direction of the glass 12, and the depth from the interface between the glass 12 and the internal electrode layers 121 and 122 in the direction of the glass 12, each exceed 500 nm. 【0093】 The central region may contain at least one of Ag and Pd. This can further improve the density and stability of the glass 12. 【0094】 As shown in Figure 4, at least one of the Ag and Pd 13c contained in the central region may be located not only at the interface in contact with the outside of the glass 12, but also internally. 【0095】 At least one of the Ag and Pd contained in the first interface region, the second interface region, and the central region 13a, 13b, and 13c may be derived from at least one selected from the group consisting of Ag oxide or Pd oxide. For example, Ag oxide (e.g., Ag2O) or Pd oxide (e.g., PdO) contained in the glass composition may oxidize the conductive metal 11 (e.g., Cu) and reduce it to Ag or Pd. The reduced Ag and Pd may flow together with the glass 12 by sintering and diffuse from the central region to the first interface region and the second interface region due to the density difference. This makes it possible to improve the adhesion between the conductive metal 11 and the glass 12, the density of the external electrodes 131 and 132, and the connectivity and low resistance characteristics between the external electrodes 131 and 132 and the internal electrode layers 121 and 122. 【0096】 The first interface region, the second interface region, and / or the central region may further contain at least one of Fe, Co, and In. The fluidity, dispersibility, and density of the glass 12 may be easily adjusted by changing the ratio of the elements. 【0097】 The presence and elements of the first interface region, second interface region, and central region in the glass 12 described above may be measured by performing scanning electron microscopy-energy dispersive X-ray spectroscopy (SEM-EDS) on cross-sections (LT cross-sections) obtained by cutting the multilayer ceramic capacitor 100 perpendicular to the width direction (W-axis direction) from the center in the width direction (W-axis direction), in the length direction (L-axis direction), and in the stacking direction (T-axis direction). The multilayer ceramic capacitor 100 may be fixed in epoxy resin and polished with a polishing machine so that the LT cross-section is exposed. The polishing may be performed so that half of the length in the width direction (W-axis direction) is removed. One to six rectangular regions of 40 μm horizontally and 40 μm vertically are set on the exposed LT cross-section so that the internal electrode layers 121 and 122 include the electrode layers 10 and 20, and SEM analysis images may be obtained for each of the rectangular regions. The SEM-EDS analysis results for each of the glass 12 may be obtained by magnifying the SEM analysis image by 5000 times or more and performing EDS mapping analysis and point / line scan. In the SEM-EDS analysis image, the brightness of the regions where Ag and / or Pd are present may be represented as relatively higher. The SEM-EDS analysis results for the glass 12 included in the entire square region may be averaged to obtain information (e.g., location, content, etc.) of the elements (e.g., Ag and / or Pd) contained in the first interface region, second interface region, and central region of the glass 12. 【0098】 The presence and constituent elements of the oxide of the conductive metal 11 described above may be measured by transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS). Ten or more rectangular regions measuring 20 μm horizontally and 20 μm vertically may be set up with respect to the LT cross-section so as to include the interface between the glass 12 and the conductive metal 11, and a TEM analysis image may be obtained for each of these rectangular regions. The presence and content of the constituent elements of the oxide of the conductive metal 11 may be measured by performing EDS mapping analysis and point / line scanning of the rectangular regions (20 μm horizontally and 20 μm vertically or less) with an analysis magnification of 5000 times or more from the TEM analysis image. The presence and content of the oxide of the conductive metal 11 contained in the first interface region may be measured by averaging all measurement results. 【0099】 Glass 12 may further contain, in addition to Ag and Pd, Si, Al, Fe, Sn, Zn, Li, Na, K, Ba, Ca, Sr, B, Ni, Mn, Ge, Cu, In, Co, Ti, P, etc. These can be used individually or in combination of two or more. 【0100】 The average particle size D50 of the glass 12 may be 0.1 μm to 10 μm. By setting it within this range, Ag and / or Pd are sufficiently included in the first and second interface regions described above, which can further improve adhesion and bonding. The D50 of the glass 12 may be calculated by measuring the longest major axis of at least 100 glass 12 particles in the SEM analysis image of the LT cross section and creating a size distribution cumulative curve. D50 represents the size at the point where the size distribution cumulative curve reaches 50%. 【0101】 For example, the external electrodes 131 and 132 may further include plating layers 30 and 40 located on the electrode layers 10 and 20. 【0102】 The external electrodes 131 and 132 may further selectively include a conductive resin layer (not shown) located between the electrode layers 10 and 20 and the plating layers 30 and 40. 【0103】 The conductive resin layer may extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In this case, the length of the region where the conductive resin layer is located (e.g., the band portion) may be longer than the length of the region where the electrode layers 10 and 20 extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 (e.g., the band portion). For example, the conductive resin layer can completely cover the electrode layers 10 and 20. 【0104】 The conductive resin layer may include a resin and a conductive member. 【0105】 The resin is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive member powder to form a paste, and may include, for example, phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin. 【0106】 The conductive member may be electrically connected to the internal electrode layers 121, 122 or the electrode layers 10, 20. 【0107】 The conductive member may be spherical, flake-shaped, or a combination thereof. For example, the conductive member may consist only of flake-shaped members, only of spherical members, or may include a mixture of flake-shaped and spherical members. 【0108】 The aforementioned spherical shape may include forms that are not perfectly spherical, for example, a form in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. Flake-like powder refers to powder having a flat and elongated shape and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more. 【0109】 The external electrodes 131 and 132 may further include plating layers 30 and 40 arranged to cover the conductive resin layer described above. 【0110】 The plating layers 30 and 40 may include a first plating layer 30 placed on the first electrode layer 10 and a second plating layer 40 placed on the second electrode layer 20. 【0111】 The plating layers 30 and 40 may contain nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), or alloys thereof. These can be used individually or in combination of two or more. 【0112】 The plating layers 30 and 40 may be nickel (Ni) plating layers or tin (Sn) plating layers. For example, the plating layers 30 and 40 may include a configuration in which nickel (Ni) plating layers and tin (Sn) plating layers are sequentially laminated, or a configuration in which tin (Sn) plating layers, nickel (Ni) plating layers, and tin (Sn) plating layers are sequentially laminated. For example, the plating layers 30 and 40 may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers. 【0113】 The plated layers 30 and 40 may improve the mountability of the multilayer ceramic capacitor 100 on the substrate, its structural reliability, its durability against external elements, its heat resistance, and its equivalent series resistance (ESR). 【0114】 The following describes a manufacturing method for a multilayer ceramic capacitor 100, relating to other examples. 【0115】 The manufacturing method for the multilayer ceramic capacitor 100 may include the steps of manufacturing a capacitor body 110 including a dielectric layer 111 and internal electrodes 121 and 122, and forming external electrodes 131 and 132 on the outside of the capacitor body 110. 【0116】 In the manufacturing process of the capacitor body 110, a dielectric paste that will become the dielectric layer 111 after firing and a conductive paste that will become the internal electrodes 121 and 122 after firing can be prepared. 【0117】 A dielectric powder can be uniformly mixed and dried by wet mixing or the like, and then heat-treated under predetermined conditions to obtain calcined powder. The dielectric paste can be manufactured by adding an organic vehicle or an aqueous vehicle to the calcined powder and heating and mixing it. 【0118】 The dielectric paste can be formed into a sheet using techniques such as the doctor blade method to obtain a dielectric green sheet. For example, the dielectric paste may contain additives selected from various dispersants, plasticizers, dielectrics, minor component compounds and / or glass. 【0119】 The conductive paste for the internal electrodes may be prepared by kneading conductive powder made of a conductive metal or an alloy thereof with a binder or solvent. 【0120】 The conductive paste for the internal electrodes may also contain indium (In). 【0121】 The conductive paste for the internal electrodes may also contain ceramic powder (for example, barium titanate powder) as a co-material. This co-material can suppress the sintering of the conductive powder during the firing process. 【0122】 The conductive paste for the internal electrodes may be applied to the surface of the dielectric green sheet in a predetermined pattern using various printing methods such as screen printing or transfer methods. A dielectric green sheet laminate can be obtained by laminating multiple dielectric green sheets on which the internal electrode pattern is formed and applying pressure in the lamination direction. Dielectric green sheets and internal electrode patterns may be laminated such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the lamination direction. 【0123】 Selectively, the dielectric green sheet laminate may be cut to predetermined dimensions by dicing or the like. 【0124】 The dielectric green sheet laminate may be solidified and dried as needed to remove plasticizers and other substances, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container together with media and polishing fluid, and rotational motion or vibration is applied to the barrel container to polish away unwanted parts such as burrs generated during cutting. For example, after barrel polishing, the dielectric green sheet laminate may be washed with a cleaning solution such as water and then dried. 【0125】 The dielectric green sheet laminate can be subjected to a binder removal process and a firing process to obtain the capacitor body 110. 【0126】 The conditions for the binder removal process can be appropriately adjusted according to the main component composition of the dielectric layer and the main component composition of the internal electrodes. For example, the heating rate during the binder removal process may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The binder removal atmosphere may be air or a reducing atmosphere. 【0127】 The firing conditions may be appropriately adjusted according to the main component composition of the dielectric layer and the main component composition of the internal electrodes. For example, the firing temperature may be 1200°C to 1350°C or 1220°C to 1300°C, and the firing time may be 0.5 hours to 8 hours or 1 hour to 3 hours. The firing atmosphere may be a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen gas (N2) and hydrogen gas (H2). If the internal electrodes 121 and 122 contain nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶. -14 MPa ~ 1.0 × 10 -10 MPa is also acceptable. 【0128】 After the firing process, annealing may be performed as needed. This annealing is a process to re-oxidize the dielectric layer, and can be performed when the firing process is carried out in a reducing atmosphere. The conditions for the annealing process may also be appropriately adjusted according to the main component composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 × 10⁻⁶. -9 MPa ~ 1.0 × 10 -5 MPa is also acceptable. 【0129】 In the debindering, calcining, or annealing processes, a wetter, for example, can be used to humidify nitrogen gas or a mixed gas, in which case the water temperature may be between 5°C and 75°C. The debindering, calcining, and annealing processes may be performed continuously or independently. 【0130】 Selectively, the third and fourth surfaces of the obtained capacitor body 110 may be subjected to surface treatments such as sandblasting, laser irradiation, or barrel polishing. Such surface treatments allow the ends of the first internal electrode 121 and the second internal electrode 122 to be exposed on the surfaces of the third and fourth surfaces. This improves the electrical connection between the first external electrode 131 and the second external electrode 132 and the first internal electrode 121 and the second internal electrode 122, and facilitates the formation of the alloy portion. 【0131】 Electrode layers 10 and 20 can be formed by applying an electrode layer forming paste to the outer surface of the capacitor body 110 and sintering it, thereby manufacturing external electrodes 131 and 132. 【0132】 The electrode layer forming paste may contain a conductive metal 11 and a glass composition. The glass 12 may be formed by firing the glass composition. 【0133】 The glass composition may contain at least one selected from the group consisting of Ag oxide and Pd oxide. For example, the Ag oxide may include Ag2O. For example, the Pd oxide may include PdO. 【0134】 The Ag oxide and / or Pd oxide may oxidize a portion of the conductive metal 11 that comes into contact with the glass composition during sintering, and be reduced to Ag and Pd. The reduced Ag and Pd flow together with the glass 12 during sintering and can diffuse from the central region to the first and second interface regions according to the density difference. This improves the adhesion between the conductive metal 11 and the glass 12, the density of the external electrodes 131 and 132, and the connectivity and low resistance characteristics between the external electrodes 131 and 132 and the internal electrode layers 121 and 122. 【0135】 The content of at least one selected from the group consisting of Ag oxide and Pd oxide in the total weight of the glass composition may be 0.01% to 15% by weight. By setting it within this range, sufficient Ag and / or Pd are formed, and the fluidity and dispersibility of the glass 12 can be further improved while the adhesive strength, electrode density, connectability and low resistance characteristics described above are further improved. 【0136】 The glass composition may further include at least one selected from the group consisting of Si oxide, Al oxide, Fe oxide, Sn oxide, Zn oxide, Li oxide, Na oxide, K oxide, Ba oxide, Ca oxide, Sr oxide, B oxide, Ni oxide, Mn oxide, Ge oxide, Cu oxide, In oxide, Co oxide, Ti oxide, and P oxide. 【0137】 For example, the glass composition may further contain Li2O, Na2O, K2O, SiO2, Al2O3, FeO, Fe2O3, Fe3O4, NiO, Ni2O3, Ni3O4, In2O3, TiO2, P2O5, BaO, CaO, SrO, B2O3, ZnO, SnO, SnO2, Cu2O, CuO, CoO, Co2O3, GeO2, MnO, Mn2O, Mn2O3, Mn3O4, etc. These can be used individually or in combination of two or more. 【0138】 Of the glass composition, Si oxide is 5 to 20 parts by weight, Al oxide is 5 to 15 parts by weight, Fe oxide is 0.01 to 15 parts by weight, Sn oxide is 0.01 to 15 parts by weight, Zn oxide is 1 to 15 parts by weight, Li oxide is 10 to 25 parts by weight, Na oxide is 10 to 25 parts by weight, K oxide is 10 to 25 parts by weight, Ba oxide is 15 to 45 parts by weight, Ca oxide is 15 to 45 parts by weight, Sr oxide is The following may be included: 15 to 45 parts by weight of , B oxide 15 to 25 parts by weight, Ni oxide 0.01 to 15 parts by weight, Mn oxide 0.01 to 15 parts by weight, Ge oxide 0.01 to 15 parts by weight, Cu oxide 0.01 to 15 parts by weight, In oxide 0.01 to 15 parts by weight, Co oxide 0.01 to 15 parts by weight, Ti oxide 0.01 to 15 parts by weight, and P oxide 0.01 to 15 parts by weight. 【0139】 The glass 12 may be manufactured by mixing the components of the glass composition, heat-treating them at a certain temperature or higher, rapidly cooling them, and then atomizing them, or by using gas phase, liquid phase, or spray pyrolysis methods. 【0140】 The glass composition may be included in an amount of 1 to 40 parts by weight per 100 parts by weight of the conductive metal 11, for example, in an amount of 5 to 35 parts by weight. 【0141】 The electrode layer forming paste may further contain a binder, a solvent, a dispersant, a plasticizer, an oxide powder, and the like. 【0142】 The binder may include, for example, ethylcellulose, acrylic, butyral, and the solvent may include, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents. 【0143】 As a method for applying the electrode layer forming paste to the outer surface of the capacitor body 110, various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprays can be used. The electrode layer forming paste is applied to at least the third and fourth surfaces of the capacitor body 110, and may also be selectively applied to a part of the first, second, fifth, or sixth surface where the band portions of the first and second external electrodes are formed. 【0144】 The sintering may be carried out at a temperature of 400°C to 900°C. By using this range, the Ag oxide and / or Pd oxide of the glass 12 are sufficiently reduced, and Ag and Pd can sufficiently migrate to the first interface region, or the first interface region and the second interface region described above. 【0145】 Next, a conductive resin layer-forming paste may be selectively applied to the outer surface of the capacitor body 110 on which the electrode layers 10 and 20 are formed, and then cured to form a conductive resin layer. 【0146】 The conductive resin layer-forming paste may contain a resin and, selectively, a conductive metal or a non-conductive filler. The descriptions of conductive metals and resins are the same as above, so redundant explanations are omitted. The conductive resin layer-forming paste may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. The binder may include, for example, ethyl cellulose, acrylic, butyral, etc., and the solvent may include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents. 【0147】 As an example, the conductive resin layer may be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, or by printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or by applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it. 【0148】 Plating layers 30 and 40 may be formed on the outside of the conductive resin layer. 【0149】 The plating layers 30 and 40 can be formed by a plating method, and can be formed by sputtering or electroplating. 【0150】 The following are specific examples of the present disclosure. However, the examples described below are for illustrative or illustrative purposes only. 【0151】 [Examples 1-11] (Manufacturing of glass compositions) A glass composition was formed having the composition shown in Table 1 below. 【0152】 [Table 1] 【0153】 (Manufacturing of multilayer ceramic capacitors) Barium titanate (BaTiO3) was used as the main component powder to produce dielectric green sheets. A conductive paste layer containing Ni was then printed onto the surface of the dielectric green sheets. The dielectric green sheets (width × length × height = 3.2 mm × 2.5 mm × 2.5 mm) with the conductive paste layer formed thereon were laminated and pressed to produce a dielectric green sheet laminate. The dielectric green sheet laminate was then fired in a nitrogen atmosphere at a temperature of 400°C or lower, at a firing temperature of 1300°C or lower, and at a hydrogen concentration of 1.0%H2 or lower to produce a capacitor body. 【0154】 A paste for forming an electrode layer was prepared by mixing 100 parts by weight of Cu, 10 parts by weight of glass composition, and 8 parts by weight of acrylic binder. 【0155】 The electrode layer forming paste was applied to the outer surface of the capacitor body and dried, and then sintered at 400°C to 900°C as shown in Table 2 below to form the electrode layer of the external electrode. Next, a Ni plating layer and a Sn plating layer were sequentially formed on the surface of the electrode layer to manufacture a multilayer ceramic capacitor. 【0156】 [Comparative Examples 1-11] (Manufacturing of glass compositions) A glass composition was prepared in the same manner as in Example 1, except that Ag2O and PdO were not added. 【0157】 (Manufacturing of multilayer ceramic capacitors) The multilayer ceramic capacitors of Comparative Examples 1 to 11 were manufactured in the same manner as those of Examples 1 to 11, except that the aforementioned glass composition was used. 【0158】 [Evaluation 1: SEM-EDS analysis (Ag, Pd)] The multilayer ceramic capacitors described in the above-mentioned examples and comparative examples were placed horizontally, and the periphery of the multilayer ceramic capacitors was fixed with epoxy resin. 【0159】 The multilayer ceramic capacitor was polished using a polishing machine so that the cross-sections (LT cross-sections) cut perpendicular to the width direction (W-axis direction) from the center in the width direction (W-axis direction), and in the length direction (L-axis direction) and stacking direction (W-axis direction) were exposed. 【0160】 Three rectangular regions measuring 40 μm horizontally and 40 μm vertically were defined on the exposed LT cross section, including the internal electrode layer and the electrode layer. SEM imaging was performed on each of these rectangular regions, and three SEM analysis images were obtained. The SEM imaging was performed using a Thermofisher Scientific Verios G4 under 200 kV acceleration voltage conditions. 【0161】 EDS mapping analysis and point scanning were performed on the aforementioned SEM analysis images, respectively, to measure the presence and content of Ag and Pd elements in the region where the glass is in contact with copper (first interface region), expressing them as brightness. The brightness measured from the images was averaged and evaluated as the brightness of Ag and Pd elements. 【0162】 In the aforementioned mapping analysis image, the higher the brightness of the Ag and Pd elements observed with the naked eye, the higher the Ag and Pd content was evaluated, and the lower the brightness, the lower the Ag and Pd content was evaluated. Specifically, the measurement results are as follows: ◎: 80% to 100% of the observed maximum brightness ○: 50% or more and less than 80% of the observed maximum brightness. △: Greater than 0% and less than 50% of the observed maximum brightness. ×: Ag and Pd elements were not observed. This is how it was evaluated. 【0163】 [Evaluation 2: TEM-EDS analysis (Cu oxide)] The multilayer ceramic capacitors according to the above-described examples and comparative examples were placed horizontally, and the area around the multilayer ceramic capacitors was fixed with epoxy resin. 【0164】 The multilayer ceramic capacitor was polished using a polishing machine so that the cross-sections (LT cross-sections) cut perpendicular to the width direction (W-axis direction) from the center in the width direction (W-axis direction), and in the length direction (L-axis direction) and stacking direction (W-axis direction) were exposed. 【0165】 Ten rectangular regions measuring 20 μm horizontally and 20 μm vertically were defined on the exposed LT cross section to include the glass-copper interface. TEM imaging was performed on each of these rectangular regions, and ten TEM images were acquired. The TEM imaging was performed using Xe-FIB equipment under an accelerating voltage of 20 kV. 【0166】 For the TEM analysis images, EDS mapping analysis and point scanning were respectively performed to measure the presence and content of copper oxide in the region where the glass contacts the copper (the first interface region). The content of copper oxide included in all the TEM analysis images was averaged and evaluated as the content of copper oxide. Specifically, the measurement results are as follows: ◎: 80% - 100% of the measured maximum content ○: 50% or more and less than 80% of the measured maximum content △: More than 0% and less than 50% of the measured maximum content ×: Copper oxide was not measured / observed It was evaluated as follows. 【0167】 [Evaluation 3: Moisture resistance reliability] For the multilayer ceramic capacitors according to the above-described examples and comparative examples, using an ESPEC (PR-3J, 8585) device, the change in insulation resistance (IR) was measured under the conditions of 85°C, relative humidity of 85%, and 12V for 10 hours, and the moisture resistance reliability was evaluated. 【0168】 Specifically, the measurement results are as follows: ◎: The measured IR value is more than 1.0×10 7 Ω ○: The measured IR value is more than 1.0×10 6 Ω and less than or equal to 1.0×10 7 Ω △: The measured IR value is more than 1.0×10 5 Ω and less than or equal to 1.0×10 6 Ω ×: The measured IR value is less than 1.0×10 5 Ω It was evaluated as follows. 【0169】 The sintering temperature of the conductive paste for the electrode and the evaluation results are shown in Table 2 below. 【0170】 【Table 2】 【0171】 Referring to Table 2, in the example in which the first interface region in contact with the conductive metal of the glass contains at least one of Ag and Pd, the density of the external electrode, structural stability, connectivity between the external and internal electrodes, and moisture resistance reliability were relatively improved compared to the comparative example. 【0172】 [Evaluation 4: Equivalent Series Resistance (ESR) Evaluation] Forty multilayer ceramic capacitors from Example 7 and Comparative Example 7 were each welded onto an aluminum belt to prepare samples. However, the sintering temperatures for Example 7 and Comparative Example 7 were adjusted to 730°C for this evaluation. The ESR of these samples was measured using a KEYSIGHT E4980A model under conditions of 100kHz and 1.5±0.5V. 【0173】 Figure 5 is a graph showing the ESR of the multilayer ceramic capacitors according to Example 7 and Comparative Example 7. 【0174】 Referring to Figure 5, the ESR of the multilayer ceramic capacitor according to Example 7 was 3.4724 mΩ, and the ESR of the multilayer ceramic capacitor according to Comparative Example 7 was 3.656 mΩ. 【0175】 In Example 7, where the first interface region in contact with the conductive metal of the glass includes at least one of Ag and Pd, the low-resistance characteristics were relatively improved compared to Comparative Example 7, which was sintered at the same temperature. [Explanation of Symbols] 【0176】 10 1st electrode layer 11 Conductive metals 12 Glass 13a At least one of Ag and Pd included in the first interface region 13b At least one of Ag and Pd included in the second interface region 13c At least one of Ag and Pd contained in the central region 20 Second electrode layer 30 First plating layer 40 Second plating layer 100 Multilayer Ceramic Capacitors 110 Capacitor Body 111 Dielectric layer 121 1st internal electrode 122 2nd internal electrode 131 1st external electrode 132 2nd external electrode
Claims
[Claim 1] A capacitor body including a dielectric layer and an internal electrode layer, The capacitor body includes external electrodes located on the outside of the capacitor body, which include conductive metal and glass, The glass includes a first interface region that is in contact with the conductive metal. The first interface region includes at least one of Ag and Pd in a multilayer ceramic capacitor. [Claim 2] The multilayer ceramic capacitor according to claim 1, wherein the first interface region is defined as a region extending 500 nm inward from the interface between the conductive metal and the glass. [Claim 3] The multilayer ceramic capacitor according to claim 1, wherein the glass further includes a second interface region in contact with the internal electrode layer, and the second interface region includes at least one of Ag and Pd. [Claim 4] The multilayer ceramic capacitor according to claim 3, wherein the second interface region is defined as a region extending 500 nm inward from the interface between the glass and the internal electrode layer to the interior of the glass. [Claim 5] The multilayer ceramic capacitor according to claim 3, wherein the second interface region comprises Ni and an alloy containing at least one of Ag and Pd. [Claim 6] The multilayer ceramic capacitor according to claim 3, wherein the second interface region further comprises at least one of Fe, Co, and In. [Claim 7] The multilayer ceramic capacitor according to claim 1, wherein the first interface region further comprises an oxide of the conductive metal. [Claim 8] The multilayer ceramic capacitor according to claim 1, wherein the first interface region comprises the conductive metal and an alloy containing at least one of Ag and Pd. [Claim 9] The multilayer ceramic capacitor according to claim 1, wherein the glass further includes a central region having a depth of more than 500 nm in the inward direction of the glass from the interface between the conductive metal and the glass, and the central region includes at least one of Ag and Pd. [Claim 10] The multilayer ceramic capacitor according to claim 9, wherein the central region further comprises at least one of Fe, Co, and In. [Claim 11] The multilayer ceramic capacitor according to claim 1, wherein the glass further comprises at least one of Si, Al, Fe, Sn, Zn, Li, Na, K, Ba, Ca, Sr, B, Ni, Mn, Ge, Cu, In, Co, Ti, and P. [Claim 12] The external electrode includes an electrode layer that is electrically connected to the internal electrode layer and is located on the cross-section of the capacitor body. The multilayer ceramic capacitor according to claim 1, wherein the electrode layer includes the conductive metal and the glass. [Claim 13] The multilayer ceramic capacitor according to claim 1, wherein the conductive metal includes at least one of Cu, Ni, Au, Pt, Sn, W, Ti, and Pb. [Claim 14] A capacitor body including a dielectric layer and an internal electrode layer, The capacitor body is located on the outside and includes an external electrode comprising a conductive metal containing Cu and glass, The glass comprises at least one of Ag and Pd in a multilayer ceramic capacitor. [Claim 15] The multilayer ceramic capacitor according to claim 14, wherein the glass includes a first interface region in contact with the conductive metal, and the first interface region includes at least one of Ag and Pd. [Claim 16] The multilayer ceramic capacitor according to claim 14, wherein the glass further includes a second interface region in contact with the internal electrode layer, and the second interface region includes at least one of Ag and Pd. [Claim 17] The multilayer ceramic capacitor according to claim 14, wherein the glass further includes a central region having a depth of more than 500 nm in the inward direction of the glass from the interface between the conductive metal and the glass, and the central region includes at least one of Ag and Pd. [Claim 18] The steps include applying an electrode layer forming paste containing a conductive metal and a glass composition onto one surface of a capacitor body including a dielectric layer and an internal electrode layer, The step includes sintering the electrode layer forming paste to form the electrode layer of the external electrode, A method for manufacturing a multilayer ceramic capacitor, wherein the glass composition comprises at least one selected from the group consisting of Ag oxide and Pd oxide. [Claim 19] The method for manufacturing a multilayer ceramic capacitor according to claim 18, wherein the content of at least one selected from the group consisting of Ag oxide and Pd oxide is 0.01% by weight or more and 15% by weight or less of the total weight of the glass composition. [Claim 20] The method for manufacturing a multilayer ceramic capacitor according to claim 18, wherein the glass composition further comprises at least one selected from the group consisting of Si oxide, Al oxide, Fe oxide, Sn oxide, Zn oxide, Li oxide, Na oxide, K oxide, Ba oxide, Ca oxide, Sr oxide, B oxide, Ni oxide, Mn oxide, Ge oxide, Cu oxide, In oxide, Co oxide, Ti oxide, and P oxide.