Wiring board
The wiring board design addresses crack issues in glass substrates by using a glass plate with controlled thermal expansion and spacing through-hole conductors, enhancing reliability and reducing warping through stress management.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- IBIDEN CO LTD
- Filing Date
- 2024-12-04
- Publication Date
- 2026-06-16
AI Technical Summary
Cracks may occur around through-holes in glass substrates due to the characteristics of the glass substrate, which affects the integrity and reliability of wiring boards.
A wiring board design with a core portion composed of a glass plate and build-up portions featuring laminated conductor and insulation layers, where the glass plate has a specific thermal expansion rate and thickness, and the through-hole conductors are spaced to minimize stress concentration, with a minimum arrangement pitch of 200 μm to 400 μm to suppress crack formation.
The design provides a high-quality wiring board with reduced warping and cracking, ensuring reliable connectivity and durability by managing thermal expansion and stress distribution.
Smart Images

Figure 2026097479000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a wiring board.
Background Art
[0002] Patent Document 1 discloses a wiring board. The wiring board has a glass substrate and a core substrate including through-hole conductors penetrating the substrate. Resin insulation layers and conductor layers are alternately laminated on both surfaces of the core substrate.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] A plurality of through-holes are formed in the glass substrate, and cracks may occur around the through-holes depending on the characteristics of the glass substrate.
Means for Solving the Problems
[0005] The wiring board of the present invention includes a core portion including a glass plate having a first surface and a second surface opposite to the first surface, and a build-up portion formed on each of both surfaces of the glass plate and composed of laminated conductor layers and insulation layers. The build-up portion is composed of four or more conductor layers and four or more insulation layers, the core portion includes a plurality of through-hole conductors connecting the conductor layer in the build-up portion formed on the first surface side and the conductor layer in the build-up portion formed on the second surface side, the glass plate has a thickness of 0.4 mm or more and 1.2 mm or less, and a thermal expansion rate of 3 ppm / °C or more and 5 ppm / °C or less, and the minimum arrangement pitch of the plurality of through-hole conductors is 200 μm or more and 400 μm or less.
[0006] According to embodiments of the present invention, a high-quality wiring board can be provided in which the occurrence of cracks in the glass plate constituting the core is suppressed. [Brief explanation of the drawing]
[0007] [Figure 1] A cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. [Figure 2] A plan view showing the surface of the core portion of a wiring board according to an embodiment of the present invention. [Figure 3A] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3B] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3C] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3D] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3E] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3F] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3G] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Figure 3H] A cross-sectional view showing an example of the manufacturing process for a circuit board. [Modes for carrying out the invention]
[0008] A wiring board according to an embodiment of the present invention will be described with reference to the drawings. Figure 1 shows a cross-sectional view of a wiring board 1, which is an example of a wiring board according to the embodiment. The wiring board 1 has a core portion 100 having a first surface 100A and a second surface 100B which is the opposite surface of the first surface 100A. The core portion 100 is composed of a glass plate 100G and a through-hole conductor 100t in which through holes 100h formed in the glass plate 100G are filled with a conductor.
[0009] The wiring board of the embodiment has a build-up section formed on both sides of the core, each consisting of four or more insulating layers and four or more conductive layers. The first surface 100A and the second surface 100B consist of the surface of the glass plate 100G and the surface of the through-hole conductor 100t. A first build-up section 11 is formed on the first surface 100A. A second build-up section 12 is formed on the second surface 100B.
[0010] In the description of the wiring board of this embodiment, the side furthest from the core portion 100 is also referred to as "top," "upper side," "outside," or "outer," and the side closer to the core portion 100 is also referred to as "bottom," "lower side," "inside," or "inner." Furthermore, in each insulating layer and conductor layer, the surface facing away from the core portion 100 is also referred to as the "top surface," and the surface facing towards the core portion 100 is also referred to as the "bottom surface." Accordingly, for example, in the description of each element constituting the first build-up portion 11 and the second build-up portion 12, the side furthest from the core portion 100 is referred to as "top," "upper," "upper layer side," "outside," or simply "top" or "outer," and the side closer to the core portion 100 is referred to as "bottom," "downward," "lower layer side," "inside," or simply "bottom" or "inner."
[0011] The first build-up section 11 is composed of insulating layers 111 and conductor layers 112 that are alternately stacked on the first surface 100A of the core section 100. The second build-up section 12 is composed of insulating layers 121 and conductor layers 122 that are alternately stacked on the second surface 100B of the core section 100. The insulating layer 111 constituting the first build-up section 11 includes via conductors 113 that connect conductors (conductor layers 112 to each other, or conductor layer 112 to a through-hole conductor 100t) formed on opposite sides of the insulating layer 111 in the thickness direction. The insulating layer 121 constituting the second build-up section 12 includes via conductors 123 that connect conductors (conductor layers 122 to each other, or conductor layer 122 to a through-hole conductor 100t) formed on opposite sides of the insulating layer 121 in the thickness direction.
[0012] A solder resist layer SR1 is formed on the first build-up section 11. A solder resist layer SR2 is formed on the second build-up section 12. An opening SR1o is formed in the solder resist layer SR1, and the conductor pad 112p of the outermost conductor layer 112 in the first build-up section 11 is exposed through the opening SR1o. An opening SR2o is formed in the solder resist layer SR2, and the conductor pad 122p of the outermost conductor layer 122 in the second build-up section 12 is exposed through the opening SR2o.
[0013] The conductor pad 112p may be a connection pad used for mounting external electronic components. As shown in the figure, the conductor pad 112p may be electrically and mechanically connected to a connection pad of an external element IP, which may be a silicon interposer, for example, by a bonding material such as solder. In the illustrated example, components E1 and E2, which are electronic components (e.g., logic chips and memory elements) such as semiconductor integrated circuit devices and active components such as transistors, are connected to the external element IP. That is, electronic components may be mounted on the wiring board 1 in the form of an interposer. On the other hand, the conductor pad 122p may be a connection pad used for connecting to any external board such as a motherboard, electrical components, or mechanical components (not shown).
[0014] In the illustrated example, a reinforcing member ST is provided on the solder resist layer SR1. The reinforcing member ST is provided so as not to hinder the mounting of components on the surface of the wiring board 1, by surrounding the area where the external element IP is mounted, while avoiding the area where the conductor pad 112p is provided. By providing the reinforcing member ST, deformation such as bending and warping of the wiring board 1 can be suppressed. By suppressing the deformation of the wiring board 1, the mounting of the external element IP on the wiring board 1 can be achieved with high reliability.
[0015] The glass plate 100G constituting the core part 100 is formed of glass selected from soda-lime glass, aluminosilicate glass, and borosilicate glass. The glass plate 100G may contain, as additives, magnesium, calcium, manganese, aluminum, lead, iron, chromium, potassium, sulfur, antimony, boron, and the like. In the wiring board of the embodiment, the thermal expansion coefficient of the glass plate 100G is relatively low, 3 ppm / °C or more and 5 ppm / °C or less.
[0016] The insulating layer 111 constituting the first build-up part 11 and the insulating layer 121 constituting the second build-up part 12 are each formed using an insulating resin such as, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), or a phenol resin. Each of the insulating layers 111, 121 may contain a reinforcing material (core material) such as glass fiber and / or an inorganic filler such as silica or alumina. The thermal expansion coefficient of the insulating layers 111, 121 is, for example, 15 ppm / °C or more and 25 ppm / °C or less.
[0017] The solder resist layers SR1, SR2 are formed using, for example, a photosensitive epoxy resin or polyimide resin. The material of the reinforcing material ST may be any material that can suppress deformation of the wiring board 1, and metal materials such as copper alloy, aluminum alloy, and iron alloy can be used, but it is preferably formed using a material with high rigidity, and for example, stainless steel is used.
[0018] The conductor layers 112 and 122, via conductors 113 and 123, and through-hole conductor 100t can be formed using any metal such as copper or nickel. For example, the conductor layers 112 and 122 can be formed by a metal foil such as a copper foil and / or a metal film formed by plating or sputtering. In FIG. 1, the conductor layers 112 and 122, via conductors 113 and 123, and through-hole conductor 100t are shown in a single-layer structure for simplicity of viewing, but they can have a multilayer structure of two or more layers. The conductor layers 112 and 122, via conductors 113 and 123, and through-hole conductor 100t can have a two-layer structure including a metal film layer (e.g., electroless copper plating film) and a plating film layer (e.g., electrolytic copper plating film). Each of the conductor layers 112 and 122 included in the wiring substrate 1 is patterned to have a predetermined conductor pattern.
[0019] The through-hole conductor 100t constituting the core portion 100 connects the conductor layer 112 constituting the first build-up portion 11 and the conductor layer 122 constituting the second build-up portion 12. In the illustrated example, the through-hole conductor 100t is directly connected to the via conductor 113, thereby being connected to the conductor layer 112 via the via conductor 113, and is directly connected to the via conductor 123, thereby being connected to the conductor layer 122 via the via conductor 123.
[0020] The through-hole conductor 100t is composed of a conductor that entirely fills the through-hole 100h formed in the glass plate 100G. In the illustration, the through-hole 100h is formed to have substantially the same dimensions in the thickness direction of the glass plate 100G. However, the through-hole 100h (and thus the through-hole conductor 100t) can also have a mode of reducing the diameter from the first surface 100A side and the second surface 100B side toward the central portion of the thickness of the glass plate 100G.
[0021] Here, for convenience, the term "reduced diameter" is used, but the opening shape of the through-hole 100h in plan view is not necessarily limited to a circle. "Diameter" refers to the straight-line distance between the two furthest apart points on the outer edge of the object when viewed from above. "Reduced diameter" simply means that the straight-line distance between the two furthest apart points on the outer edge in the horizontal cross-section of the through-hole 100h becomes smaller. Note that "plan view" means viewing the object with a line of sight parallel to the thickness direction of the wiring board 1 (i.e., the thickness direction of the glass plate 100G).
[0022] As described above, in the wiring board of the embodiment, the thermal expansion coefficient of the glass plate 100G is relatively low, being 3 ppm / °C or more and 5 ppm / °C or less. When the core portion 100 includes a glass plate 100G with such a relatively low thermal expansion coefficient, the degree of warping that may occur in the wiring board 1 is reduced, and the thickness of the core portion 100 (i.e., the thickness of the glass plate 100G) can be made relatively thin, between 0.4 mm and 1.2 mm. This allows for the reduction of warping and thinning of the wiring board. In such a glass plate 100G with a relatively low thermal expansion coefficient and small thickness, cracks may easily occur if the distance (arrangement pitch) between adjacent through-hole conductors 100t (through-holes 100h) is small. To address this problem, in the wiring board of the embodiment, the arrangement pitch between through-hole conductors (between through-holes) is set to a predetermined value or higher, thereby suppressing the occurrence of cracks in the glass plate.
[0023] Next, the arrangement of through-hole conductors 100t (through-holes 100h) to suppress the occurrence of cracks in the glass plate 100G will be specifically explained with reference to Figure 2. Figure 2 shows a top view of the first surface 100A in a plan view, with the upper components of the core portion 100 of the wiring board 1 shown in Figure 1 removed. Therefore, in Figure 2, the surface of the glass plate 100G and the surface of the through-hole conductor 100t constituting the first surface 100A of the core portion 100 are exposed. Figure 1 is a cross-sectional view of the wiring board 1 when it is cut along line II in Figure 2. The wiring board 1 is formed to have a rectangular shape with each side length of 50 mm or more in a plan view, and therefore, the glass plate 100G also has a rectangular shape with each side length of 50 mm or more.
[0024] In the wiring board of this embodiment, the shortest distance CT between the centers CT of two adjacent through-hole conductors 100t among the multiple through-hole conductors 100t included in the core portion 100 (i.e., the arrangement pitch PT between the through-hole conductors 100t) is set to 200 μm or more and 400 μm or less. By setting the arrangement pitch between the through-hole conductors 100t to the above value, localized stress concentration caused by the difference between the thermal expansion coefficient of the glass material constituting the glass plate 100G and the thermal expansion coefficient of the conductor constituting the through-hole conductor 100t can be avoided. The occurrence of cracks in the glass plate 100G can be suppressed. Here, the "center" of the through-hole conductor 100t means the midpoint of the line connecting the two farthest points on the outer edge of the through-hole conductor 100t in a plan view. Furthermore, the center CT and arrangement pitch PT of the through-hole conductor 100t may be replaced with the center CT and arrangement pitch of the through-hole 100h.
[0025] Furthermore, the diameter DA of the through-hole conductor 100t on the two surfaces (first surface 100A and second surface 100B) perpendicular to the thickness direction of the glass plate 100G represents the maximum diameter of the through-hole 100h or the through-hole conductor 100t, and is, for example, 50 μm or more and 150 μm or less. From the viewpoint of suppressing crack occurrence in the glass plate 100G by suppressing the degree of stress strain caused by the thermal expansion of the through-hole conductor 100t, it is preferable that the diameter DA of the through-hole conductor 100t is 100 μm or less.
[0026] Furthermore, the shortest distance SP between the outer edges of adjacent through-hole conductors 100t on two surfaces (first surface 100A and second surface 100B) perpendicular to the thickness direction of the glass plate 100G of the through-hole conductor 100t (i.e., the space between the through-hole conductors 100t) is, for example, 50 μm or more and 150 μm or less. From the viewpoint of effectively distributing the stress caused by the thermal expansion of the through-hole conductor 100t to the glass plate 100G and suppressing the occurrence of cracks in the glass plate 100G, it is preferable that the space SP between adjacent through-hole conductors 100t is 100 μm or more.
[0027] Next, using the case where the wiring board 1 shown in Figure 1 is manufactured as an example, an example of a method for manufacturing a wiring board will be explained with reference to Figures 3A to 3H. In Figures 3A to 3H, as in Figure 1, the structure of each conductor layer is simplified and shown as having a single-layer structure.
[0028] First, a glass plate 100G is prepared as shown in Figure 3A. The thermal expansion coefficient of the prepared glass plate 100G is 3 ppm / °C or more and 5 ppm / °C or less. As a glass plate 100G having a thermal expansion coefficient within this range, a plate material made of glass selected from, for example, soda-lime glass, aluminosilicate glass, and borosilicate glass may be prepared. The thickness of the glass plate 100G is 0.4 mm or more and 1.2 mm or less. The glass plate 100G has a rectangular shape with each side length of 50 mm or more in a plan view.
[0029] Modified areas hp are formed in the glass plate 100G at the location where the through-hole 100h should be formed (see Figure 3B) by irradiation with laser light. Helium-neon lasers, argon ion lasers, excimer lasers, and various YAG lasers are used as the laser light. The modified areas hp are altered parts of the glass structure and are easily removed by a subsequent etching process. The shortest distance (arrangement pitch) between the centers of two adjacent modified areas hp is between 200 μm and 400 μm, thereby suppressing the degree of stress and strain that may occur in the glass plate 100G due to the heat generated by laser irradiation. Crack formation in the glass plate 100G during the laser irradiation process can be suppressed.
[0030] Next, the modified portion hp is removed using an etching solution containing, for example, an aqueous solution of hydrogen fluoride. Specifically, the modified portion hp is removed by immersing the glass plate 100G on which the modified portion hp is formed in an etching solution containing, for example, an aqueous solution of hydrogen fluoride. The concentration of the aqueous solution of hydrogen fluoride is adjusted appropriately so that etching proceeds sufficiently. Furthermore, from the viewpoint of promoting etching, hydrochloric acid and / or nitric acid may be added to the etching solution, and ultrasonic waves may be transmitted to the etching tank during etching of the glass plate 100G. Through holes 100h are formed in the portion from which the modified portion hp has been removed, as shown in Figure 3B. The diameter of the formed through holes 100h is, for example, 50 μm or more and 150 μm or less. Also, among the multiple through holes 100h formed, the shortest distance between two adjacent through holes 100h is, for example, 50 μm or more and 150 μm or less.
[0031] Next, as shown in Figure 3C, the through-hole 100h is filled with a conductor CM. The conductor CM is formed to completely fill the inside of the through-hole 100h and to completely cover the two surfaces of the glass plate 100G that are perpendicular to the thickness direction. In forming the conductor CM, first, a metal film layer (not shown) is formed on the inner wall surface of the through-hole 100h and on the two surfaces of the glass plate 100G, for example, by electroless plating. Subsequently, a plating layer is formed on the metal film layer by electroplating using the metal film layer as a power supply layer, and a through-hole conductor 100t with a two-layer structure (single layer in the illustration) of the metal film layer and the plating layer is formed inside the through-hole 100h, and the two surfaces of the glass plate 100G are covered with a layer of conductor CM with a two-layer structure (single layer in the illustration) of the metal film layer and the plating layer.
[0032] Next, the layers of conductive material CM covering two surfaces perpendicular to the thickness direction of the glass plate 100G are removed by polishing. As shown in Figure 3D, the surface of the glass plate 100G and the surface of the through-hole conductor 100t are exposed. A core portion 100 is formed, comprising a first surface 100A and a second surface 100B, which are composed of the surface of the glass plate 100G and the surface of the through-hole conductor 100t. The removal of the conductive material CM layer by polishing can be carried out, for example, by chemical mechanical polishing (CMP).
[0033] Next, as shown in Figure 3E, an insulating layer 111 is laminated on the first surface 100A of the core portion 100, and then a conductor layer 112 is formed on top of the insulating layer 111. A via conductor 113 is formed simultaneously with the formation of the conductor layer 112. Furthermore, an insulating layer 121 is laminated on the second surface 100B of the core portion 100, and then a conductor layer 122 is formed on top of the insulating layer 121. A via conductor 123 is formed simultaneously with the formation of the conductor layer 122.
[0034] The insulating layers 111 and 121 are formed, for example, by thermocompression bonding of a film-like insulating resin (e.g., epoxy resin) onto the surface (first surface 100A and second surface 100B) of the core portion 100. The thermal expansion coefficient of the insulating layer is 15 ppm / °C or higher and 25 ppm / °C or lower. Through holes vh are formed in the insulating resin at the positions where the via conductors 113 and 123 are to be formed, for example, by irradiation with carbon dioxide laser light. Conductor layers 112 and 122, and via conductors 113 and 123 are formed by forming a metal film layer (not shown) on the inner surface of the through holes vh and the upper surface of the insulating layers 111 and 121 by electroless plating or sputtering, and by electroplating using a metal film layer with a plating resist having appropriate openings as a power supply layer. In other words, the conductor layers 112 and 122, and via conductors 113 and 123 are formed by a semi-additive process (SAP).
[0035] Next, as shown in Figure 3F, on the upper side of the first surface 100A of the core portion 100, the same process as described above for forming the insulating layer 111, the conductor layer 112, and the via conductor 113 is repeated three or more times to form a first build-up portion 11 including four or more insulating layers 111 and four or more conductor layers 112. Also, on the upper side of the second surface 100B of the core portion 100, the same process as described above for forming the insulating layer 121, the conductor layer 122, and the via conductor 123 is repeated three or more times to form a second build-up portion 12 including four or more insulating layers 121 and four or more conductor layers 122. The outermost conductor layer 112 of the first build-up portion 11 is formed in a pattern including a conductor pad 112p. The outermost conductor layer 122 of the second build-up portion 12 is formed in a pattern including a conductor pad 122p.
[0036] Next, as shown in Figure 3G, a solder resist layer SR1 is formed on the first build-up section 11, and a solder resist layer SR2 is formed on the second build-up section 12. Solder resist layers SR1 and SR2 are formed by, for example, forming a resin layer containing a photosensitive epoxy resin or polyimide resin, and then exposure and development using a mask having an appropriate aperture pattern. Solder resist layers SR1 and SR2 are formed to have openings SR1o and SR2o that expose the conductor pads 112p and 122p. A surface protective film (not shown) made of Au, Ni / Au, Ni / Pd / Au, solder, or heat-resistant preflux may be formed on the exposed surfaces of the conductor pads 112p and 122p by electroless plating, solder leveling, or spray coating.
[0037] Next, as shown in Figure 3H, a reinforcing material ST is attached to the solder resist layer SR1. For the reinforcing material ST, for example, a plate-shaped stainless steel may be used, but a metal material other than stainless steel may also be used. The reinforcing material ST is made by punching or laser processing a plate-shaped metal material so that its planar shape follows the contour of the area on the wiring board 1 where the components are mounted. The plate-shaped reinforcing material ST is joined to the solder resist layer SR1 via, for example, a thermosetting adhesive (not shown). Through these steps, the wiring board 1 is completed.
[0038] The wiring boards of the embodiments are not limited to those having the structures illustrated in each drawing, or the structures, shapes, and materials illustrated herein. In the wiring board 1 described, the first build-up section 11 and the second build-up section 12 each include five conductor layers and five insulating layers, but the number of insulating and conductor layers in the first and second build-up sections 11 and 12 is not limited thereto. The first build-up section 11 and the second build-up section 12 of the wiring board of the embodiments may each include four or more conductor layers and four or more insulating layers, or they may include six or more conductor layers and six or more insulating layers. For example, the first build-up section 11 and the second build-up section 12 may have different numbers of insulating and conductor layers. [Explanation of symbols]
[0039] 1 Wiring board 11. First Build-up Department 12. Second Build-up Department 113, 123 via conductors 100A, Side 1 100B 2nd side 100G glass plate 100 Core section 111, 121 Insulating layer 112, 122 Conductor layer 100t through-hole conductor PT placement pitch CT center DA diameter SP Space
Claims
1. A core portion including a glass plate having a first surface and a second surface which is the opposite surface of the first surface, A build-up portion formed on each of the two sides of the glass plate, consisting of a laminated conductive layer and an insulating layer, A wiring board including, The aforementioned build-up section is composed of four or more conductive layers and four or more insulating layers. The core portion includes a plurality of through-hole conductors that connect the conductor layer in the build-up portion formed on the first surface side and the conductor layer in the build-up portion formed on the second surface side. The glass plate has a thickness of 0.4 mm or more and 1.2 mm or less, and a thermal expansion coefficient of 3 ppm / °C or more and 5 ppm / °C or less. The minimum arrangement pitch of the multiple through-hole conductors is 200 μm or more and 400 μm or less.
2. The wiring board according to claim 1, wherein the shortest distance between adjacent through-hole conductors among the plurality of through-hole conductors is 100 μm or more.
3. The wiring board according to claim 1, wherein the diameter of the through-hole conductor is 100 μm or less.
4. The wiring board according to claim 1, wherein the glass plate has a rectangular planar shape, and the length of each side of the rectangle is 50 mm or more.
5. The wiring board according to claim 1, wherein the thermal expansion coefficient of the insulating layer constituting the build-up portion is 15 ppm / °C or more and 25 ppm / °C or less.
6. The wiring board according to claim 1, wherein the through-hole conductor is made of a conductor that fills the through-holes that penetrate the glass plate.
7. The wiring board according to claim 1, wherein the glass plate has a thickness of 0.6 mm or more and 0.9 mm or less.