Quantum devices

Abstract

This invention provides a quantum device that suppresses poor contact between a spring pin and a conductive pad due to temperature changes. [Solution] The quantum device has a qubit and a conductive pad coupled to the qubit, and comprises a qubit substrate having a first thermal expansion coefficient, a first support having a second thermal expansion coefficient, a plurality of second supports provided between the qubit substrate and the first support and having a third thermal expansion coefficient, a plurality of connecting members each connecting the first support and the second support, and a spring pin supported by the second support and in contact with the conductive pad, wherein a control signal for controlling the state of the qubit is supplied to the conductive pad through the spring pin, and the absolute value of the difference between the first thermal expansion coefficient and the second thermal expansion coefficient is smaller than the absolute value of the difference between the first thermal expansion coefficient and the third thermal expansion coefficient. The quantum device can be used, for example, in quantum computing.

Description

[Technical Field]

[0001] This disclosure relates to quantum devices. [Background technology]

[0002] A quantum device has been proposed that controls the state of a qubit on a qubit chip by contacting a spring pin with a conductive pad coupled to the qubit, and supplying a control signal through the spring pin. The spring pin is supported by a metal housing. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2023 / 188391 [Patent Document 2] U.S. Patent No. 10756004 [Patent Document 3] Japanese Patent Publication No. 2007-093320 [Patent Document 4] Japanese Patent Publication No. 2020-061554 [Non-patent literature]

[0004] [Non-Patent Document 1] "Basic Knowledge for Understanding Research on Quantum Computers Using Superconducting Circuits," Tsuyoshi Yamamoto, Journal of the Physical Society of Japan, Vol. 75, No. 10, 2020. [Overview of the project] [Problems that the invention aims to solve]

[0005] Quantum devices are used at extremely low temperatures, such as tens of mK. When a quantum device is cooled from room temperature to extremely low temperatures, the metal casing shrinks more than the qubit chip. As a result, even if a spring pin is in contact with a conductive pad at room temperature, at extremely low temperatures the spring pin may detach from the conductive pad, making it impossible to maintain contact between the spring pin and the conductive pad.

[0006] An object of the present disclosure is to provide a quantum device that suppresses poor contact between a spring pin and a conductive pad due to temperature changes.

Means for Solving the Problems

[0007] According to one aspect of the present disclosure, there are provided a quantum bit, a conductive pad coupled to the quantum bit, a quantum bit substrate having a first coefficient of thermal expansion, a first support having a second coefficient of thermal expansion, and a plurality of second supports provided between the quantum bit substrate and the first support and having a third coefficient of thermal expansion. A plurality of connecting members each connecting the first support and the second support, and a spring pin supported by the second support and contacting the conductive pad. A control signal for controlling the state of the quantum bit is supplied to the conductive pad through the spring pin, and an absolute value of a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is smaller than an absolute value of a difference between the first coefficient of thermal expansion and the third coefficient of thermal expansion. A quantum device is provided.

Advantages of the Invention

[0008] According to the present disclosure, poor contact between the spring pin and the conductive pad due to temperature changes can be suppressed.

Brief Description of the Drawings

[0009] [Figure 1] It is a cross-sectional view showing a quantum device according to a first embodiment. [Figure 2] It is a plan view showing the arrangement of a quantum bit chip, a first support, and a second support in the quantum device according to the first embodiment. [Figure 3] It is a diagram showing an outline of a quantum bit chip. [Figure 4] It is a cross-sectional view showing a quantum device according to a second embodiment. [Figure 5] It is a plan view showing the arrangement of a quantum bit chip, a first support, and a second support in the quantum device according to the second embodiment. [Figure 6]This is a cross-sectional view showing a quantum device according to the third embodiment. [Figure 7] This is a plan view showing the arrangement of the qubit chip, the first support, and the second support in a quantum device according to the third embodiment. [Figure 8] This is a cross-sectional view showing a quantum device according to the fourth embodiment. [Figure 9] This is a cross-sectional view showing the rotation suppression member. [Figure 10] This is a cross-sectional view showing a quantum device according to the fifth embodiment. [Figure 11] This is a cross-sectional view showing a quantum device according to the sixth embodiment. [Figure 12] This is a cross-sectional view showing a quantum device according to the seventh embodiment. [Figure 13] This is a cross-sectional view showing a quantum device according to the eighth embodiment. [Modes for carrying out the invention]

[0010] Embodiments of this disclosure will be described in detail below with reference to the attached drawings. In this specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals to avoid redundant descriptions. In this disclosure, the coefficient of thermal expansion is the value at 293K, and the thermal shrinkage rate is the amount of thermal shrinkage per unit length.

[0011] (First Embodiment) A first embodiment will be described. The first embodiment relates to a quantum device. Figure 1 is a cross-sectional view showing a quantum device according to the first embodiment. Figure 2 is a plan view showing the arrangement of the qubit chip, first support and second support in the quantum device according to the first embodiment. Figure 1 corresponds to a cross-sectional view along line II in Figure 2. Figure 3 is a diagram showing an overview of the qubit chip.

[0012] As shown in Figures 1 and 2, the quantum device 1 according to the first embodiment includes a qubit substrate 170, a first support 210, a plurality of second supports 220, a plurality of connecting members 230, a spring pin 310, and a housing 400.

[0013] The housing 400 comprises a container 410 and a lid 420. The container 410 houses a qubit substrate 170, a first support 210, a plurality of second supports 220, and a plurality of connecting members 230. The lid 420 is fixed to the container 410, for example, by screws 430. The housing has a fourth thermal expansion coefficient α4. The container 410 and lid 420 are made of metal, mainly composed of aluminum or copper, for example. The thermal expansion coefficient of aluminum is 24 × 10⁻¹⁴. -6 K -1 The thermal expansion coefficient of copper is 17 × 10⁻⁶. -6 K -1 Therefore, the fourth thermal expansion coefficient α4 is, for example, 17 × 10⁻⁶. -6 K -1 The above 24 x 10 -6 K -1 The following applies:

[0014] The thermal shrinkage rates of aluminum and copper when the temperature changes from room temperature to 0K are 0.4% and 0.3%, respectively. The thermal shrinkage rate of enclosure 400 when the temperature changes from room temperature to 0K is, for example, between 0.3% and 0.4%.

[0015] The qubit substrate 170 has a qubit chip 100. As shown in Figure 3, the qubit chip 100 has a substrate 110. As shown in Figure 1, the substrate 110 has a first main surface 111 and a second main surface 112 opposite to the first main surface 111. In this specification, the direction in which the first main surface 111 is located when viewed from the second main surface 112 is referred to as "up," and the direction in which the second main surface 112 is located when viewed from the first main surface 111 is referred to as "down." Also, a plan view means viewing an object from above, and a planar shape means the shape of an object when viewed from above. As shown in Figure 2, the qubit chip 100 has a square planar shape. For example, in a planar view, the length of one side of the qubit chip 100 is 40 mm or more and 50 mm or less.

[0016] As shown in FIG. 3, the quantum bit chip 100 has an input / output unit 115. The input / output unit 115 has, for example, four quantum bits 101, four conductive pads 102, four resonators 103, one filter 104, one input / output port 105, and four inter-bit wirings 106. For example, the quantum bits 101, resonators 103, filter 104, and inter-bit wirings 106 are provided on the first major surface 111, the conductive pads 102 are provided on the second major surface 112, and the input / output port 105 has a portion provided on the first major surface 111 and a portion provided on the second major surface 112.

[0017] In plan view, the four quantum bits 101 are arranged at the vertices of a square, and the input / output port 105 is arranged at the center of the square. The resonator 103 is arranged between the quantum bit 101 and the input / output port 105. The resonator 103 is coupled to the quantum bit 101. The filter 104 is arranged between the resonator 103 and the input / output port 105 and is coupled to the resonator 103 and the input / output port 105. The resonator 103 is coupled to the input / output port 105 via the filter 104. The inter-bit wiring 106 is arranged between two quantum bits 101 and is coupled to the two quantum bits 101. The four conductive pads 102 are each arranged at a position overlapping the quantum bit 101 in plan view and are coupled to the quantum bit 101. The quantum bit chip 100 may have two or more input / output units 115.

[0018] The substrate 110 is, for example, a single crystal silicon substrate or a sapphire substrate, and the quantum bit chip 100 has a first thermal expansion coefficient α1. The thermal expansion coefficient of single crystal silicon is 2.32×10 -6 K -1 and the thermal expansion coefficient of sapphire is 6.4×10 -6 K -1 The substrate 110 may be a quartz substrate or a diamond substrate. The thermal expansion coefficient of quartz is 7.5×10 -6 K -1 and the thermal expansion coefficient of diamond is 1×10 -6 K -1The volumes of the qubit 101, conductive pad 102, resonator 103, filter 104, input / output port 105, and inter-bit wiring 106 are negligibly small compared to the volume of the substrate 110, so the first thermal expansion coefficient α1 may be approximated by the thermal expansion coefficient of the substrate 110. The first thermal expansion coefficient α1 is, for example, 1 × 10⁻⁶ -6 K -1 The above 7.5 × 10 -6 K -1 The following applies:

[0019] The thermal expansion rates of single-crystal silicon, sapphire, quartz, and diamond when the temperature changes from room temperature to 0K are 0.02%, 0.08%, 0.1%, and 0.02%, respectively. The thermal expansion rate of the quantum bit chip 100 when the temperature changes from room temperature to 0K is, for example, between 0.02% and 0.1%.

[0020] The first support 210 is placed on the bottom of the container 410. For example, the first support 210 is in contact with the bottom surface of the container 410. The first support 210 has a flat plate shape. As shown in Figure 2, the first support 210 has a square planar shape. In plan view, the first support 210 may extend beyond the qubit chip 100. The first support 210 is, for example, a single crystal silicon plate, a sapphire plate, or a ceramic plate, and has a second thermal expansion coefficient α2. Examples of ceramics include alumina, aluminum nitride, and low-temperature co-fired ceramics (LTCC). The thermal expansion coefficient of the ceramic is, for example, 3 × 10⁻⁶. -6 K -1 The above 8 x 10 -6 K -1 The following applies: The first support 210 may be a quartz plate or a diamond plate. The second thermal expansion coefficient α2 is, for example, 1 × 10⁻⁶. -6 K -1 The above 8 x 10 -6 K -1 The following applies: The second thermal expansion coefficient α2 is preferably equal to the first thermal expansion coefficient α1, but they may be different.

[0021] The thermal shrinkage rate of the ceramics when the temperature changes from room temperature to 0K is, for example, 0.05% to 0.1%. The thermal shrinkage rate of the first support 210 when the temperature changes from room temperature to 0K is, for example, 0.02% to 0.1%.

[0022] Multiple second supports 220, in this case four second supports 220, are arranged on the first support 210. For example, the second supports 220 are in contact with the upper surface of the first support 210. Each second support 220 is provided between the qubit chip 100 and the first support 210. The second supports 220 have a flat plate shape. As shown in Figure 2, the second supports 220 have a square planar shape. In plan view, the four second supports 220 are arranged to form a 2x2 matrix. In plan view, the sides of the qubit chip 100, the first support 210, and the second supports 220 are either parallel or perpendicular to each other. For example, in plan view, the length of one side of the second support 220 is 20 mm or more and 25 mm or less. The second support 220 is, for example, a metal plate and has a third thermal expansion coefficient α3. Examples of metal plates include aluminum plates and copper plates. The third thermal expansion coefficient α3 is, for example, 17 × 10⁻⁶. -6 K -1 The above 24 x 10 -6 K -1 The following applies:

[0023] The thermal contraction rate of the second support 220 when the temperature changes from room temperature to 0K is, for example, 0.3% to 0.4%.

[0024] Multiple connecting members 230, in this case four connecting members 230, each connect the first support 210 and the second support 220. That is, each of the four second support 220s is connected to the first support 210 by one connecting member 230. For example, four holes 215 are formed on the upper surface of the first support 210, and holes 225 are formed in the second support 220 that penetrate through the second support 220, and alignment pins as connecting members 230 are fitted into the holes 215 and 225. The connecting members 230 have a cylindrical shape. For example, the diameter of the connecting member 230 is about 1 mm. The material of the connecting member 230 is the same as the material of the second support 220. The connecting members 230 and the second support 220 may be constructed as a single unit.

[0025] Multiple holes 221 are formed in the second support 220, multiple holes 211 are formed in the first support 210, and multiple holes 411 are formed in the bottom plate of the container 410. The holes 221, 211, and 411 are linearly connected to each other. Spring pins 310 are provided in the holes 221, 211, and 411. In plan view, the diameters of holes 221 and 211 are larger than the diameter of the spring pins 310. A dielectric member 320 is provided between the spring pins 310 and the wall surface of the holes 221. The dielectric member 320 is made of, for example, an organic resin. The spring pins 310 are supported by the second support 220 via the dielectric member 320. There is a gap between the spring pins 310 and the wall surface of the holes 211. There may be a gap between the spring pin 310 and the wall of the hole 411, or the spring pin 310 may be in close contact with the wall of the hole 411. The spring pin 310 is in contact with the conductive pad 102. A control signal that controls the state of the qubit 101 is supplied to the conductive pad 102 through the spring pin 310. The control signal is, for example, a radio frequency (RF) signal with a frequency of 2 GHz or more and 10 GHz or less. The spring pin 310 is made of metal, for example, mainly composed of copper.

[0026] The quantum bit chip 100 further includes a cover chip 120, a plurality of bonding members 130, and a plurality of elastic pressing members 440.

[0027] The cover chip 120 is provided between the qubit chip 100 and the lid 420. A bonding member 130 is provided between the qubit chip 100 and the cover chip 120. The bonding member 130 bonds the qubit chip 100 and the cover chip 120. An elastic pressing member 440 is provided between the cover chip 120 and the lid 420 and contacts the cover chip 120 and the lid 420. The elastic pressing member 440 is, for example, a leaf spring and is supported by the lid 420 to press the cover chip 120 toward the bottom plate of the container 410. Also, the spring pin 310 presses the qubit chip 100 toward the lid 420. The bonding member 130 may be conductive and the cover chip 120 may have wiring or the like that connects to the qubit chip 100.

[0028] The absolute value Δα21(|α2-α1|) of the difference between the first thermal expansion coefficient α1 and the second thermal expansion coefficient α2 is smaller than the absolute value Δα31(|α3-α1|) of the difference between the first thermal expansion coefficient α1 and the third thermal expansion coefficient α3. Furthermore, the absolute value Δα21 is smaller than the absolute value Δα41(|α4-α1|) of the difference between the first thermal expansion coefficient α1 and the fourth thermal expansion coefficient α4.

[0029] In quantum device 1, the spring pins 310 are supported by four second supports 220. Therefore, compared to the case where all spring pins 310 are supported by a single object, such as a single container 410, the amount of movement of the spring pins 310 due to thermal contraction when quantum device 1 is cooled from room temperature to cryogenic temperatures can be reduced. This makes it easier to maintain contact between the spring pins 310 and the conductive pads 102, and suppresses poor contact between the spring pins 310 and the conductive pads 102 due to temperature changes.

[0030] Because the second support 220 is made of metal, the holes 221 into which the spring pin 310 and dielectric member 320 are inserted can be formed with high precision by machining. Also, because the second support 220 is made of metal, high thermal conductivity can be obtained, making it easier to reduce the temperature difference between the housing 400 and the qubit chip 100, and allowing the qubit chip 100 to cool down quickly when the housing 400 is cooled. Furthermore, the difference in thermal contraction rate between the metal spring pin 310 and the second support 220 can be reduced, and the second support 220 can continue to support the spring pin 310 even when thermal contraction occurs. In addition, because the second support 220 is made of metal, the influence of external electromagnetic waves on the qubit chip 100 can also be reduced by the second support 220. A ground potential may also be applied to the qubit chip 100 via the second support 220.

[0031] However, if the second support 220 is made of metal, the difference between the thermal shrinkage rate of the qubit chip 100 and the thermal shrinkage rate of the second support 220 tends to be large. In contrast, the quantum device 1 has a first support 210 with a small difference in thermal shrinkage rate between it and the qubit chip 100, and a connecting member 230 connects the first support 210 and the second support 220. That is, the absolute value Δα21 is smaller than the absolute value Δα31. Therefore, the relative positional displacement between the qubit chip 100 and the first support 210 is small, and even if the second support 220 connected to the first support 210 by the connecting member 230 shrinks more than the first support 210 due to thermal shrinkage, the amount of movement of the spring pin 310 due to thermal shrinkage can be reduced. Thus, even if the second support 220 is made of metal, it is easier to maintain contact between the spring pin 310 and the conductive pad 102, and poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes can be suppressed.

[0032] Furthermore, the metal construction of the housing 400 reduces the influence of external electromagnetic waves on the qubit chip 100. When the housing 400 is made of metal, the difference between the thermal expansion rate of the qubit chip 100 and the thermal expansion rate of the housing 400 tends to be large. However, in quantum device 1, the spring pin 310 is not supported by the housing 400, so there is no movement of the spring pin 310 due to the thermal expansion rate of the housing 400.

[0033] In quantum device 1, the qubit chip 100 and the cover chip 120 are elastically held vertically by the spring pin 310 and the elastic pressing member 440. This ensures that the positions of the qubit chip 100 and the cover chip 120 are stable. Furthermore, the stroke of the spring pin 310 can be increased to allow for dimensional errors or prevent breakage.

[0034] The elastic pressing member 440 may be in direct contact with the quantum bit chip 100, but the presence of the cover chip 120 prevents the elastic pressing member 440 from influencing the circuits on the quantum bit chip 100 and causing mechanical damage. If grooves are formed in the cover chip 120 so as not to contact the circuits on the quantum bit chip 100, the joining member 130 may be omitted, and the cover chip 120 may be placed on top of the quantum bit chip 100.

[0035] The absolute value Δα²¹ is preferably 5 × 10 -6 K -1 The following, more preferably 3 × 10 -6 K -1 The following, and more preferably 1 × 10 -6 K -1 The following applies. Furthermore, it is preferable that the absolute value Δα21 is 1 / 10 or less of the absolute value Δα31. The smaller the absolute value Δα21, the smaller the relative positional displacement between the qubit chip 100 and the first support 210 due to cooling, the easier it is to maintain contact between the spring pin 310 and the conductive pad 102, and the easier it is to suppress poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes.

[0036] Furthermore, the difference between the thermal shrinkage rate of the qubit chip 100 and the thermal shrinkage rate of the first support 210 when the temperature changes from room temperature to 0K is preferably 0.1% or less, and more preferably 0.05% or less. The smaller this difference, the smaller the relative positional displacement between the qubit chip 100 and the first support 210 due to cooling, the easier it is to maintain contact between the spring pin 310 and the conductive pad 102, and the easier it is to suppress poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes.

[0037] (Second Embodiment) A second embodiment will now be described. The second embodiment differs from the first embodiment mainly in that it has a restraining member. Figure 4 is a cross-sectional view showing the quantum device according to the second embodiment. Figure 5 is a plan view showing the arrangement of the qubit chip, the first support and the second support in the quantum device according to the second embodiment. Figure 4 corresponds to a cross-sectional view along the line IV-IV in Figure 5.

[0038] As shown in Figures 4 and 5, the quantum device 2 according to the second embodiment has a plurality of restraint members 330. In a plan view, inwardly recessed recesses 116 are formed at the four corners of the qubit chip 100, and the restraint members 330 are provided at positions that overlap with the recesses 116 in a plan view of the first support 210. The restraint members 330 and the qubit chip 100 may be in contact with each other. The restraint members 330 have, for example, a cylindrical shape. The restraint members 330 restrain the qubit chip 100 with respect to the first support 210 in a direction parallel to the first main surface 111. The material of the restraint members 330 is the same as the material of the second support 220.

[0039] The other components of quantum device 2 are the same as those of quantum device 1. Quantum device 2 can achieve the same effects as quantum device 1. Furthermore, because quantum device 2 has a constraint member 330, the misalignment between the first support 210 and the qubit chip 100 can be reduced. When quantum device 2 is cooled, the constraint member 330 moves in conjunction with the thermal contraction of the first support 210, but since the qubit chip 100 also thermally contracts to a similar extent as the first support 210, the constraint member 330 can continue to restrain the qubit chip 100 relative to the first support 210. Moreover, when assembling quantum device 2, the qubit chip 100 can be positioned using the constraint member 330 as a guide.

[0040] (Third embodiment) A third embodiment will now be described. The third embodiment differs from the second embodiment mainly in that each of the multiple second supports is connected to the first support by multiple connecting members. Figure 6 is a cross-sectional view showing the quantum device according to the third embodiment. Figure 7 is a plan view showing the arrangement of the qubit chip, the first support and the second support in the quantum device according to the third embodiment. Figure 6 corresponds to a cross-sectional view along the line VI-VI in Figure 7.

[0041] As shown in Figures 6 and 7, in the quantum device 3 according to the third embodiment, each of the four second supports 220 is connected to the first support 210 by a plurality of connecting members 230, in this case two connecting members 230. In other words, two connecting members 230 are provided for each second support 220.

[0042] The other configurations of quantum device 3 are the same as those of quantum device 2. The same effects as quantum device 2 can be obtained with quantum device 3. Furthermore, in quantum device 3, since each of the four second supports 220 is connected to the first support 210 by two connecting members 230, rotation of the second supports 220 in a plane parallel to the first main surface 111 with the connecting members 230 as the center of rotation can be made less likely. Therefore, it is possible to further maintain contact between the spring pin 310 and the conductive pad 102 and to suppress poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes.

[0043] Furthermore, at room temperature, it is preferable that there is a gap between the connecting member 230 and the wall surface of the hole 225 that is greater than the amount of movement of the hole 225 due to the thermal contraction of the second support 220 when cooled to an extremely low temperature. For example, if it is assumed that the second support 220 will contract by 50 μm along the diagonal in a plan view, it is preferable that there be a gap of 25 μm or more between each connecting member 230 and the wall surface of the hole 225.

[0044] (Fourth Embodiment) A fourth embodiment will now be described. The fourth embodiment differs from the second embodiment mainly in that it has a rotation suppression member. Figure 8 is a cross-sectional view showing a quantum device according to the fourth embodiment. Figure 9 is a cross-sectional view showing the rotation suppression member.

[0045] As shown in Figures 8 and 9, in the quantum device 4 according to the fourth embodiment, the second support 220 has a projection 222 that protrudes toward the qubit chip 100. The projection 222 is formed, for example, in the vicinity of an adjacent second support 220. The projection 222 has an inclined surface 223 that slopes toward the qubit chip 100 as it moves away from the connecting member 230. The inclined surface 223 moves toward an adjacent second support 220 as it moves upward.

[0046] The quantum device 4 has a rotation suppression member 340. The rotation suppression member 340 has two first surfaces 341 that contact the inclined surfaces 223 of two adjacent second supports 220, and a second surface 342 that contacts the qubit chip 100.

[0047] The other components of quantum device 4 are the same as those of quantum device 2. The same effects as quantum device 2 can be obtained with quantum device 4. In addition, in quantum device 4, when quantum device 4 is placed under extremely low temperatures and the second support 220 contracts toward the connecting member 230, an upward force acts on the rotation suppression member 340. On the other hand, because the second surface 342 is in contact with the qubit chip 100, a force acts between the first surface 341 and the inclined surface 223, pressing them against each other. As a result, rotation of the second support 220 in a plane parallel to the first main surface 111 with the connecting member 230 as the center of rotation can be made less likely.

[0048] Furthermore, under the operating temperature of the quantum device 4, for example, if the second surface 342 is in contact with the qubit chip 100 at extremely low temperatures, it is not necessary for the second surface 342 to be in contact with the qubit chip 100 at room temperature.

[0049] (Fifth embodiment) A fifth embodiment will now be described. The fifth embodiment differs from the second embodiment in that it mainly has a metal layer covering the first support. Figure 10 is a cross-sectional view showing the quantum device according to the fifth embodiment.

[0050] As shown in Figure 10, the quantum device 5 according to the fifth embodiment has a metal layer 212 covering the first support 210. The metal layer 212 is in contact with the first support 210. For example, the metal layer 212 covers the top, bottom, and side surfaces of the first support 210 and the walls of the hole 211. The metal layer 212 is in contact with the second support 220 and the container 410 of the housing 400. The metal layer 212 is mainly composed of copper, for example.

[0051] The other components of quantum device 5 are the same as those of quantum device 2. Quantum device 5 can achieve the same effects as quantum device 2. Furthermore, in quantum device 5, the first support 210 is covered by a metal layer 212, and the metal layer 212 is in contact with the second support 220 and the container 410, making it easier to cool the first support 210 than in quantum device 2. Therefore, the time required to cool the entire quantum device 5 to cryogenic temperatures can be reduced compared to the time required to cool the entire quantum device 2 to cryogenic temperatures. For example, the cooling time can be reduced to about 1 / 10 to 1 / 100 of the original time.

[0052] (Sixth Embodiment) A sixth embodiment will now be described. The sixth embodiment differs from the first embodiment mainly in that it has a spacer. Figure 11 is a cross-sectional view showing a quantum device according to the sixth embodiment.

[0053] As shown in Figure 11, the quantum device 6 according to the sixth embodiment has a spacer 250 provided between the housing 400 and the first support 210. For example, the spacer 250 is placed on the bottom plate of the container 410 and contacts the bottom surface of the container 410. A hole 251 is formed in the spacer 250 that penetrates the spacer 250. The hole 251 is connected to holes 211 and 411, and a spring pin 310 is also provided inside the hole 251. In plan view, the diameter of the hole 251 is larger than the diameter of the spring pin 310. There is a gap between the spring pin 310 and the wall surface of the hole 251. The material of the spacer 250 can be the same as the material of the first support 210 and the same as the material of the second support 220.

[0054] Furthermore, a recess 118 is formed in the qubit chip 100 into which the tip of the connecting member 230 fits. The recess 118 is formed on the second main surface 112 of the qubit chip 100 that faces the second support 220.

[0055] The other components of quantum device 6 are the same as those of quantum device 1. The same effects as quantum device 1 can be obtained with quantum device 6. In addition, in quantum device 6, there is a spacer 250 between the first support 210 and the bottom plate of the container 410, and the tip of the connecting member 230 fits into the recess 118. Therefore, even if the spring pin 310 can move due to the thermal contraction of the housing 400, the amount of movement will be minimal.

[0056] Furthermore, a spacer 250 may be provided for each second support 220. For example, four spacers 250 may be provided one by one below the second support 220. The same applies to subsequent embodiments.

[0057] (Seventh Embodiment) A seventh embodiment will now be described. The seventh embodiment differs from the sixth embodiment mainly in that the qubit substrate has an interposer. Figure 12 is a cross-sectional view showing a quantum device according to the seventh embodiment.

[0058] As shown in Figure 12, in the quantum device 7 according to the seventh embodiment, the qubit substrate 170 has an interposer 140 and a plurality of conductive bonding members 150 in addition to the qubit chip 100. The interposer 140 is provided between the qubit chip 100 and the second support 220. The conductive bonding members 150 are provided between the qubit chip 100 and the interposer 140 and bond the qubit chip 100 and the interposer 140 to each other. The interposer 140 is fixed to the qubit chip 100 and is electrically connected to the qubit chip 100 via the conductive bonding members 150. In the quantum device 7, the interposer 140 has a conductive pad (not shown) that a spring pin 310 contacts, and this conductive pad is electrically connected to a conductive pad 102 via the conductive bonding members 150. The interposer 140 has a thermal expansion coefficient similar to that of the qubit chip 100, and in this embodiment as well, the qubit substrate 170 has a first thermal expansion coefficient α1.

[0059] Furthermore, the qubit chip 100 does not have a recess 118, but the interposer 140 has a recess 148 into which the tip of the connecting member 230 fits. The recess 148 is formed on the main surface of the interposer 140 facing the second support 220.

[0060] The other components of quantum device 7 are the same as those of quantum device 6. Quantum device 7 can achieve the same effects as quantum device 6. Furthermore, because quantum device 7 has an interposer 140 in the qubit substrate 170, it is easier to incorporate more complex circuits into the qubit substrate 170.

[0061] Quantum devices 1, 2, 3, 4, or 5 may have an interposer similar to the interposer 140.

[0062] (Eighth embodiment) The eighth embodiment will now be described. The eighth embodiment differs from the sixth embodiment mainly in that the connecting member connects the housing and the second support. Figure 13 is a cross-sectional view showing the quantum device according to the eighth embodiment.

[0063] As shown in Figure 13, the quantum device 8 according to the eighth embodiment does not have a first support 210, and the connecting members 230 are supported by the container 410 of the housing 400. Each of the multiple connecting members 230, in this case four connecting members 230, connects the housing 400 to the second support 220. In other words, each of the four second support 220s is connected to the housing 400 by one connecting member 230. For example, four holes 415 are formed on the upper surface of the bottom plate of the container 410, and holes 255 are formed in the spacer 250 that penetrate the spacer 250, and the connecting members 230 are fitted into holes 415, 255 and 225.

[0064] The other configurations of quantum device 8 are the same as those of quantum device 6.

[0065] In quantum device 8, the spring pin 310 is also supported by four second supports 220. Therefore, similar to quantum device 1, it is possible to easily maintain contact between the spring pin 310 and the conductive pad 102, and to suppress poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes. Furthermore, similar to the first embodiment, the benefits of the second supports 220 being made of metal can be obtained.

[0066] Furthermore, there is a spacer 250 between the second support 220 and the bottom plate of the container 410, and the tip of the connecting member 230 fits into the recess 118. As a result, although the connecting member 230 tilts slightly due to thermal contraction because the housing 400 supporting the connecting member 230 is made of metal, the misalignment between the quantum bit chip 100 and the connecting member 230 is small. Therefore, even if the second support 220 is made of metal, it is possible to maintain contact between the spring pin 310 and the conductive pad 102 and suppress poor contact between the spring pin 310 and the conductive pad 102 due to temperature changes.

[0067] The quantum device 8 may have an interposer similar to the interposer 140.

[0068] The number of second supports 220 provided for a single qubit chip 100 is not limited. For example, nine second supports 220 may form a 3x3 matrix, or sixteen second supports may form a 4x4 matrix. The number of rows and columns may differ. Furthermore, the first support 210 may have a portion located between the wall plate of the container 410 and the qubit chip 100 and the second support 220.

[0069] The quantum device relating to this disclosure can be used, for example, in quantum computing.

[0070] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0071] The various aspects of this disclosure are summarized below as an appendix.

[0072] (Note 1) A qubit substrate having a qubit and a conductive pad coupled to the qubit, and having a first thermal expansion coefficient, A first support having a second coefficient of thermal expansion, A plurality of second supports having a third thermal expansion coefficient are provided between the qubit substrate and the first support, Each of the connecting members connects the first support and the second support, A spring pin supported by the second support and in contact with the conductive pad, It has, A control signal for controlling the state of the qubit is supplied to the conductive pad through the spring pin. A quantum device in which the absolute value of the difference between the first thermal expansion coefficient and the second thermal expansion coefficient is smaller than the absolute value of the difference between the first thermal expansion coefficient and the third thermal expansion coefficient. (Note 2) The quantum device as described in Appendix 1, wherein the second support is made of metal. (Note 3) The qubit substrate has a main surface, A quantum device according to Appendix 1 or 2, having a restraining member that restrains the qubit substrate with respect to the first support in a direction parallel to the main surface. (Note 4) A quantum device according to any one of the appendices 1 to 3, wherein each of the plurality of second supports is connected to the first support by a plurality of connecting members. (Note 5) Having a rotation suppression member, The second support has protrusions that project toward the qubit substrate, The projection has an inclined surface that slopes so as it moves away from the connecting member, it approaches the qubit substrate. The rotation suppressing member is Two first surfaces that contact the inclined surfaces of two adjacent second supports, The second surface in contact with the qubit substrate, A quantum device as described in any of Appendix 1 to 4, having the following characteristics: (Note 6) The housing comprises the qubit substrate, the first support, a plurality of the second supports, and a plurality of the connecting members, and has a fourth coefficient of thermal expansion. The quantum device according to any one of the appendices 1 to 5, wherein the absolute value of the difference between the first thermal expansion coefficient and the second thermal expansion coefficient is smaller than the absolute value of the difference between the first thermal expansion coefficient and the fourth thermal expansion coefficient. (Note 7) The quantum device described in Appendix 6, wherein the housing is made of metal. (Note 8) The quantum device according to Appendix 7, having a metal layer that covers the first support and is in contact with the housing and the second support. (Note 9) A quantum device according to any one of appendices 6 to 8, having a spacer provided between the housing and the first support. (Note 10) The quantum device according to any one of the appendices 1 to 9, wherein a recess is formed in the qubit substrate into which the tip of the connecting member fits. (Note 11) The qubit substrate has a single-crystal silicon substrate, a sapphire substrate, a quartz substrate, or a diamond substrate. The quantum device according to any one of the appendices 1 to 10, wherein the first support is a single-crystal silicon plate, a sapphire plate, a ceramic plate, a quartz plate, or a diamond plate. (Note 12) The aforementioned qubit substrate is A qubit chip having the aforementioned qubit, An interposer having the conductive pads, provided between the qubit chip and a plurality of second supports, fixed to the qubit chip, and electrically connected to the qubit chip, A quantum device having any of the specifications 1 to 11. (Note 13) The casing and A qubit substrate housed in the aforementioned housing, having a qubit and conductive pads coupled to the qubit, A plurality of supports housed in the aforementioned enclosure and provided between the qubit substrate and the enclosure, A spacer housed in the aforementioned housing and provided between the housing and the support, A plurality of connecting members housed in the aforementioned housing, each passing through the spacer, and connecting the housing and the support, A spring pin supported by the support and in contact with the conductive pad, It has, A recess is formed in the qubit substrate into which the tip of the connecting member fits. A quantum device in which a control signal for controlling the state of the qubit is supplied to the conductive pad via the spring pin. [Explanation of Symbols]

[0073] 1, 2, 3, 4, 5, 6, 7, 8 Quantum devices 100 qubit chip 101 qubits 102 Conductive Pad 110 circuit boards 111 First Main Surface 112 Second Main Surface 118, 148 recesses 120 cover tips 140 Interposers 150 Conductive bonding member 170-qubit substrate 210 First support 212 Metal layer 220 Second support 222 Protrusion 223 Slope 230 Connecting member 250 Spacer 310 Spring Pin 330 Restraining member 340 Rotation suppression member 341 Page 1 342 2nd page 400 units 440 Elastic pressing member

Claims

1. A qubit substrate having a qubit and a conductive pad coupled to the qubit, and having a first coefficient of thermal expansion, A first support having a second coefficient of thermal expansion, A plurality of second supports having a third thermal expansion coefficient are provided between the qubit substrate and the first support, Each of the following connecting members connects the first support and the second support: A spring pin supported by the second support and in contact with the conductive pad, It has, A control signal for controlling the state of the qubit is supplied to the conductive pad through the spring pin. A quantum device in which the absolute value of the difference between the first thermal expansion coefficient and the second thermal expansion coefficient is smaller than the absolute value of the difference between the first thermal expansion coefficient and the third thermal expansion coefficient.

2. The quantum device according to claim 1, wherein the second support is made of metal.

3. The qubit substrate has a main surface, The quantum device according to claim 1 or 2, further comprising a restraining member that restrains the qubit substrate with respect to the first support in a direction parallel to the main surface.

4. The quantum device according to claim 1 or 2, wherein each of the plurality of second supports is connected to the first support by a plurality of connecting members.

5. Having a rotation suppression member, The second support has a projection that protrudes toward the qubit substrate, The projection has an inclined surface that slopes so as it moves away from the connecting member, it approaches the qubit substrate. The rotation suppressing member is Two first surfaces that contact the inclined surfaces of two adjacent second supports, The second surface in contact with the qubit substrate, A quantum device according to claim 1 or 2, having the following features.

6. The housing comprises the qubit substrate, the first support, a plurality of the second supports, and a plurality of the connecting members, and has a fourth coefficient of thermal expansion. The quantum device according to claim 1 or 2, wherein the absolute value of the difference between the first thermal expansion coefficient and the second thermal expansion coefficient is smaller than the absolute value of the difference between the first thermal expansion coefficient and the fourth thermal expansion coefficient.

7. The quantum device according to claim 6, wherein the housing is made of metal.

8. The quantum device according to claim 7, having a metal layer that covers the first support and is in contact with the housing and the second support.

9. The quantum device according to claim 6, further comprising a spacer provided between the housing and the first support.

10. The quantum device according to claim 1 or 2, wherein a recess is formed in the qubit substrate into which the tip of the connecting member fits.

11. The casing and A qubit substrate housed in the aforementioned housing, having a qubit and conductive pads coupled to the qubit, A plurality of supports housed in the aforementioned enclosure and provided between the qubit substrate and the enclosure, A spacer housed in the aforementioned housing and provided between the housing and the support, A plurality of connecting members housed in the aforementioned housing, each passing through the spacer, and connecting the housing and the support, A spring pin supported by the support and in contact with the conductive pad, It has, A recess is formed in the qubit substrate into which the tip of the connecting member fits. A quantum device in which a control signal for controlling the state of the qubit is supplied to the conductive pad via the spring pin.

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