Semiconductor design support system

The semiconductor design support system addresses defects and complexity in chiplet packaging by using AI to analyze and optimize manufacturing processes, enhancing yield and reducing production time.

JP2026101076APending Publication Date: 2026-06-22RAPIDUS CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
RAPIDUS CORP
Filing Date
2024-12-10
Publication Date
2026-06-22

AI Technical Summary

Technical Problem

The production of semiconductor chips faces challenges such as increased defects due to advanced microfabrication, leading to lower yield rates, especially in large-scale circuits, and the complexity of packaging multiple chiplets and testing them, which prolongs the design and production time.

Method used

A semiconductor design support system that includes a wafer processing unit, packaging process unit, and analysis unit to manage and optimize the manufacturing and packaging processes, utilizing AI models to analyze design and manufacturing data for defect analysis and process corrections.

Benefits of technology

This system shortens the time required from semiconductor design to production by identifying defects and optimizing processes, improving yield and reducing the overall cycle time through AI-assisted design and manufacturing coordination.

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Abstract

This reduces the time required from designing semiconductor devices using miniaturized chips and chiplets to the front-end and back-end production processes. [Solution] The system includes a wafer process unit that manages a wafer process for manufacturing wafers based on silicon design data, a packaging process unit that manages a packaging process for packaging chips obtained from wafers manufactured in the wafer process based on package design data, and an analysis unit that acquires silicon design data, package design data, manufacturing data from the wafer process, and manufacturing data from the packaging process, determines whether the product is good or defective, and outputs at least one corrective action based on the results of a cause analysis performed in the case of a defective product, which includes a process to change the process recipe in the wafer process and / or the packaging process, a process to change the semiconductor design kit, and a process to change either or both of the silicon design data and the package design data.
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