Nitride semiconductor device and method for manufacturing the same

JP2026104723APending Publication Date: 2026-06-25NISSHINBO MICRO DEVICES INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
NISSHINBO MICRO DEVICES INC
Filing Date
2024-12-14
Publication Date
2026-06-25

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Benefits of technology

【0015】 本発明によれば、しきい値電圧が高く、ゲート耐圧が高い窒化物半導体装置を得ることができる。

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Abstract

To provide a nitride semiconductor device with a high threshold voltage and high reliability. [Solution] A first nitride semiconductor layer 13 constituting the channel layer, a second nitride semiconductor layer 14 having a larger band gap than the first nitride semiconductor layer 13 and constituting the carrier supply layer, and a third nitride semiconductor layer 21 containing acceptor-type impurities are sequentially stacked. The third nitride semiconductor layer 21 is island-shaped, and a plasma processing region 21a is formed on its surface. The gate electrode 22 is in Schottky contact with the plasma processing region 21a.
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Claims

1. A normally off nitride semiconductor device, The first nitride semiconductor layer constituting the channel layer, A second nitride semiconductor layer is formed on the first nitride semiconductor layer, has a larger band gap than the first nitride semiconductor layer, and constitutes a carrier supply layer. The present invention comprises a third nitride semiconductor layer formed on the second nitride semiconductor layer and containing acceptor-type impurities, A nitride semiconductor device characterized in that the surface portion of the third nitride semiconductor layer has a plasma-treated region that is in Schottky contact with the gate electrode.

2. The nitride semiconductor device according to claim 1, characterized in that the threshold voltage is 3V or higher.

3. A method for manufacturing a nitride semiconductor device that operates normally off, A step of growing a first nitride semiconductor layer that constitutes a channel layer on a substrate or buffer layer, A step of growing a second nitride semiconductor layer on the first nitride semiconductor layer, the second nitride semiconductor layer having a larger band gap than the first nitride semiconductor layer and constituting a carrier supply layer, A step of growing a third nitride semiconductor layer containing acceptor-type impurities on the second nitride semiconductor layer, A step of selectively etching the third nitride semiconductor layer in a manner corresponding to the gate formation region, The process includes forming a gate electrode on the third nitride semiconductor layer, The process further includes a step of forming a plasma-treated region by performing a plasma surface treatment on the surface portion of the third nitride semiconductor layer in an inert gas atmosphere, either between the step of growing the third nitride semiconductor layer and the step of selectively etching the third nitride semiconductor layer, or between the step of selectively etching the third nitride semiconductor layer and the step of forming the gate electrode. A method for manufacturing a nitride semiconductor device, characterized in that the gate electrode and the plasma processing region are in Schottky contact.