Multistep quantum ground state shift

Abstract

This invention provides a method for performing multi-step quantum ground state shifts, a quantum computer, a quantum simulator, and a quantum circuit. [Solution] In a quantum circuit, 2 N + 1 For a state vector space of size N, the last qubit (q) of a shift register having a total of N+1 qubits. N + 1) is a superposition qubit, which defines a superposition of substates, and the superposition qubit is used to determine which substates to increment and which to decrement, which can be incremented by simply inverting the step qubit. Similarly, odd substates to be decremented can also be decremented. The remaining steps of the quantum circuit are used to rearrange the even substates to be incremented, even substates to be decremented, odd substates to be incremented, and odd substates to be decremented, allowing a multi-step quantum ground state shift to be performed in one step.

Description

[Technical Field]

[0001] The disclosures of this application (hereinafter referred to as "the Disclosure") relate to a method for performing a multi-step quantum ground state shift. The Disclosure also relates to a quantum computer or quantum simulator configured to perform the aforementioned method. The Disclosure further relates to a quantum circuit for performing a multi-step quantum ground state shift. Background

[0002] For quantum algorithms to outperform classical computations, the scale of computational operations relative to the size of the problem must be smaller compared to classical algorithms solving the same problem. A desirable property for state-shifting algorithms is that quantum operations (i.e., gates) exhibit logarithmic scaling with respect to the number of internal qubit states. However, the computational complexity of a quantum algorithm varies greatly depending on the problem being solved and the computational approach used. Generally, computational complexity is not necessarily related to the number of tensor product states, and speedups can arise from diverse algorithmic mechanisms spanning multiple different complexity classes.

[0003] Of note is the fact that the state-shifting process is used as a subroutine in multiple quantum algorithms. Currently known quantum shift procedures can be implemented in two configurations: (i) a first configuration using an additional (variable) ancilla register, and (ii) a second configuration that does not use any additional (variable) ancilla registers. In the first configuration, the introduction of a variable ancilla register provides logarithmic dependence. The first configuration is disclosed in U.S. Patent No. 11,694,107. On the other hand, in the second configuration, an ancilla-less approach (e.g., a shift based on the quantum Fourier transform (QFT)) results in an algorithm that scales quadratically with respect to the number of qubits. This makes the complexity poly-logarithmic with respect to the number of states. Shakeel has proposed a QFT-based shift ("Efficient and scalable quantum walk algorithms via the quantum fourier transform", published in Quantum Information Processing 19 (2020)).

[0004] These two configurations have complementary advantages and disadvantages. When implementing state shifts using the second configuration, fewer qubits are needed in the workspace, but the quantum circuit becomes much deeper than in the first configuration. For example, in QFT-based shifts, the number of gates increases quadratically in proportion to the size of the state space. Also, QFT-based shifts rely on precise rotation gates and phase transition gates, which are very sensitive to noise.

[0005] On the other hand, the first configuration has low computational complexity, and the number of gates increases linearly with the size of the state space. Execution time is primarily device-dependent, but it is understandable that execution time will be shorter as lower computational complexity generally requires less computation. While the size of the first configuration increases or decreases linearly, the initial gate cost is high, which significantly impacts computational complexity in practical applications. Furthermore, the process of setting up quantum circuits is quite complex.

[0006] To mitigate the shortcomings of the state-shift algorithm and achieve further improvements, redesign and optimization of the state-shift algorithm are necessary. Abstract

[0007] This disclosure aims to provide a method for performing a multi-step quantum ground state shift. It also aims to provide a quantum computer or quantum simulator configured to perform the aforementioned method. Furthermore, it aims to provide a quantum circuit for performing a multi-step quantum ground state shift. The objectives of this disclosure are achieved by the method, quantum computer or quantum simulator, and quantum circuit described in the attached independent claims. Advantageous features are described in the attached dependent claims.

[0008] Throughout this specification and in its claims, phrases such as “equipped with,” “include,” and “possess” do not mean that they include a certain element but not that they include only that element. They do not preclude the existence of other components, items, numbers, or steps that are not expressly disclosed. Furthermore, unless otherwise specified in the context, singular expressions also include plural forms. In particular, where an indefinite article is used in the original text, this specification assumes both singular and plural forms unless otherwise required in the context. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic diagram illustrating a part of a method for performing a multi-step quantum ground state shift according to embodiments of the present disclosure. [Figure 2A]Detailed diagrams of quantum circuits for performing multi-step quantum ground state shifts according to embodiments of this disclosure are shown. [Figure 2B] Detailed diagrams of quantum circuits for performing multi-step quantum ground state shifts according to embodiments of this disclosure are shown. [Figure 2C] A detailed diagram of an example of a quantum circuit for the case N = 4 and i = 0, according to an embodiment of this disclosure, is shown. [Figure 3] An example of a multi-step quantum ground state shift on a two-dimensional lattice according to an embodiment of this disclosure is shown. [Figure 4] A detailed diagram of a quantum circuit according to an embodiment of the present disclosure is shown. This quantum circuit uses two controlled swap blocks to perform two multistep quantum ground state shifts in two dimensions. [Figure 5] This shows how the number of CX gates in different bidirectional shifts with step size 1 changes with respect to the number of qubits (N) used to encode a one-dimensional lattice. [Figure 6] This shows how the total number of gates in a bidirectional one-dimensional quantum walk with a step size of 1 changes with respect to the number of qubits (N) used to encode the one-dimensional lattice. [Figure 7] This shows how the total number of gates in a 4-direction 2D quantum walk with step size 1 changes with respect to the number of qubits (N) used to encode one side of a 2D lattice. [Figure 8] This paper shows how the total number of gates in a 2D QLBM model for ADE, which uses multiple different shifts for propagation steps, changes with respect to the number of qubits (N) used to encode one side of the 2D lattice. [Figure 9] This is a comparison of circuit fidelity for the number of qubits N used to encode a one-dimensional lattice, showing a comparison of the circuit fidelity of several different bidirectional shifts with a step size of 1. Detailed description of the embodiment

[0010] The following detailed description illustrates embodiments of the present disclosure and methods by which they may be implemented. While several embodiments for implementing the present disclosure are disclosed, those skilled in the art will recognize that other embodiments for implementing the present disclosure are also possible.

[0011] According to a first aspect, embodiments of the present disclosure provide a method executed by a quantum computer or a quantum simulator. This method includes 2 N+1 setting a shift register and an ancilla register for a quantum circuit utilized to perform a multi-step quantum ground state shift in a state vector space of size 1, q 2, …q N ), where the shift register has a total of N + 1 qubits, the first N qubits (q N+1 ) of the shift register form an array register, the last qubit (q N-1 ) of the shift register is a superposition qubit, and the ancilla register includes a maximum of N - 1 ancilla qubits (a1,…a N-1 ); and 2 N+1 for an input state having N+1 array sub-states, dividing the input state into a first subset that is a subset including the array sub-states for which the superposition qubit (q N+1 ) is 0, regarded as the array sub-states to be incremented, and a second subset that is a subset including the array sub-states for which the superposition qubit (q N+1 ) is 1, regarded as the array sub-states to be decremented, by considering the array sub-states for which the superposition qubit (q N+1 ) is 0 as the array sub-states to be incremented and the array sub-states for which the superposition qubit (q N+1 ) is 1 as the array sub-states to be decremented; and in the multi-step quantum ground state shift, when the step size is 2 i setting the quantum circuit when i < N - 2; including, where the step index i is a non-negative integer less than N, and setting the quantum circuit includes the k-th (k = i + 1) qubit (q kSubstates where ) is 0 are considered even substates, and the k-th qubit (q k By considering substates where ) is 1 as odd substates, the first subset is decomposed into even substates to be incremented and odd substates to be incremented, and the second subset is decomposed into even substates to be decremented and odd substates to be decremented; Remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; The kth qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k By considering a substate where ) is 1 as an odd substate, a recursive process is performed incrementing k by 1 until k reaches N-1, thereby decomposing the incrementing odd substate into a further incrementing even substate and a further incrementing odd substate, and decomposing the decrementing even substate into a further decrementing even substate and a further decrementing odd substate; Each time recursion occurs, the state amplitude of the even substates targeted for further decrement is remapped to the state amplitude of the odd substates targeted for further decrement; The kth qubit (q k With respect to the adjacent decrement target even substates, the size 2 k The amplitude block is swapped, and the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k To swap the amplitude block, the ki-th ancila qubit (a) of the ancila register k-i ) is used as a control to control the k+1th qubit (q k+1 The inversion of ) where k is equal to N-1, and k is decremented by 1 each time it is recursed; Reversing the step of remapping the state amplitude of the even substates to be further decremented with the state amplitude of the odd substates to be further decremented; The steps of decomposition by the recursive process are reversed, provided that the reversal step and the reversal step of remapping are repeated prior to the reversal of each recursion of the decomposition step by the recursive process; The k-th (where k=i+1) qubit (q k With respect to the adjacent decrement target even substates, the size 2 k The amplitude block is swapped, and the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k To swap the amplitude block, the first ancilla qubit (a1) of the ancilla register is used as control to swap the k+1th qubit (q k+1 ) and reversing it; Reversing the step of remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; Reversing the aforementioned disassembly step; The aforementioned multi-step quantum ground state shift with a step size of 2 i To complete the multistep quantum ground state shift of the state amplitude based on, the i+1th qubit (q i+1 ) and reversing it; It is done by [the specified method].

[0012] According to the second interpretation, one embodiment of the present disclosure provides a quantum computer or quantum simulator configured to perform the method according to the first interpretation described above.

[0013] This disclosure provides the aforementioned method and the aforementioned quantum computer or quantum simulator. The aforementioned method provides a step size of 2, which is a power of 2. iMultistep quantum ground state shifts can be performed using this method. Advantageously, multistep quantum ground state shifts can be performed simultaneously in multiple shift directions with the same computational complexity class as single-step ground state shifts. In this regard, as will be discussed later, certain preparatory steps are performed to ensure the correct superposition of "direction substates." This enables a significant increase in quantum speed. Furthermore, by combining multistep quantum ground state shifts performed using the aforementioned method, it is possible to create multistep quantum ground state shifts of any step size.

[0014] The aforementioned method can be considered a redesign of the first configuration described in the background section. This method significantly reduces the initial gate cost, thereby making parallel shifts competitive with QFT-based shifts even with a small number of qubits, despite having a much simpler conceptual design. In particular, this allows for easy extension to multi-stepping and higher-dimensional lattice shifts.

[0015] One of the key advantages of the aforementioned method is the natural parallelization that arises from the superposition of array substates. The number of qubits in the shift register depends on the size of the state vector space. Specifically, if the size of the state vector space is 2 N+1 In this case, the shift register consists of a total of N+1 qubits. Of these N+1 qubits, the last qubit (q) of the entire shift register N+1 ) is a superposition qubit. This superposition qubit allows us to define a superposition of two array substates that are orthogonal (with respect to increment and decrement). In this respect, in the step of partitioning the input state, the superposition qubit is used to determine which array substates are to be incremented (i.e., the first subset) and which array substates are to be decremented (i.e., the second subset). N+1 Array substates where ) is 0 are considered to be incrementable, and the superposition qubit (qN+1 Array substates where ) is 1 are considered to be subject to decrement. As a result, the number of array substates in the first subset and the number of array substates in the second subset are both 2 N The first subset and the second subset mentioned above are (the first N qubits (q) of the shift register. 1, q 2, ...q N At each array point defined by the fundamental state of the array register (composed of ), there are linked state amplitudes that are shifted "up" and state amplitudes that are shifted "down". This means that there are two layers of state amplitudes on the position space defined by the array register (which can be interpreted as, for example, a regular polygonal grid). This means that the total amount of data in the state vector space is 2 N+1 This means the state amplitude, which is also called the size of the state vector space. Here, the superposition qubits are marked as 0. N The array substates are subject to increment, and the superposition qubit is marked as 1. N The array substates are subject to decrement. Therefore, the first subset of array substates that are subject to increment, and the second subset of array substates that are subject to decrement, refer to a superposition of two probability distributions on the same position space defined by the array register. The array substates of the first subset and the array substates of the second subset are the first N qubits (q) of the array register, i.e., the shift register. 1, q 2, ...q N It is defined using ).

[0016] What is noteworthy is (step size 2 i The even substates subject to incrementing are simply the i+1th qubit (q i+1 The key point is that it can be incremented simply by applying a step that inverts ). This qubit is also called a step qubit. Similarly, (step size 2 i The odd substates that are subject to decrement (in this case) are also the i+1th qubit (qi+1 The (i.e., step qubit) can be decremented by applying the same step of inverting it. The remaining steps in the quantum circuit are used to rearrange the even substates to be decremented and the odd substates to be incremented as follows: the (i+1)th qubit (q i+1 The step of inverting the (i.e., step qubit) is used to rearrange the decremented even substates and incremented odd substates so that a multi-step quantum ground state shift is performed in one step. Notably, since the inversion step essentially deals with the incremented even substates and decremented odd substates, no special rearrangement is required for them. Throughout this specification, the notation "i+1th" refers to the (i+1)th. In other words, the parentheses are omitted for convenience and to improve readability. The same notation is used for other similar terms.

[0017] Furthermore, the number of ancilla qubits in an ancilla register depends on the step size of the multistep quantum ground state shift. Therefore, an ancilla register contains at most N-1 ancilla qubits. The step size is 2 i It is defined as follows: That is, the step index i is used. This index is a non-negative integer less than N. The number of steps in the method for performing a multi-step quantum ground state shift depends on the step size. In other words, the number of steps in the method depends on the value of the step index i. This will be discussed later.

[0018] For illustrative purposes, the following shows how the quantum circuit is configured in the method described above.

[0019] When i < N-2, the quantum circuit is set up by performing the following steps.

[0020] Decomposing step (#1): The array substates of the first subset (i.e., the array substates to be incremented) are decomposed into even substates and odd substates to be incremented. On the other hand, the array substates of the second subset (i.e., the array substates to be decremented) are decomposed into even substates and odd substates to be decremented. In this respect, the k-th qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k Substates where ) is 1 are considered odd substates. In this decomposition step, k = i + 1. i + 1 is simply the initial value of k, and as will be described later, the value of k is incremented with each recursion in the subsequent recursive step. k ) is called a partitioned qubit, and k is called the partition index. In the decomposition step (#1), it will be understood that the array substates are partitioned into smaller substates. In each subsequent decomposition, the substates are partitioned into even smaller substates. At the finest level, the smallest substate consists of a single amplitude corresponding to the ground state.

[0021] Remapping step (#2): The state amplitude of the even substate to be decremented is remapped to the state amplitude of the odd substate to be decremented. This remapping is performed on the k-th qubit (q) of the array register. k This does not affect any qubits other than the one being decremented. This remapping can also be described as a step of swapping (flipping) the even substates to be decremented with the odd substates to be decremented. This swapping operation does not affect the data; that is, the data remains held in the state amplitude.

[0022] Recursive decomposing step (#3): The odd substates targeted for incrementing are recursively decomposed into further even substates targeted for incrementing and further odd substates targeted for incrementing. Similarly, the even substates targeted for decrementing are further decomposed into further even substates targeted for decrementing and further odd substates targeted for decrementing through recursion. In this respect, the k-th qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k Substates where ) is 1 are considered odd substates. In the recursive decomposition step, with each recursion, the value of k increases by 1 until it reaches N-1. Therefore, this recursive decomposition step is performed according to the value of i, i.e., until k reaches N-1 (from the initial value i+1).

[0023] Remapping step after each recursion (#4): After each recursion in the recursive decomposition step (#3), the state amplitudes of the even substates targeted for further decrement and the state amplitudes of the odd substates targeted for further decrement are remapped. This remapping is performed on the k-th qubit (q) of the array register. k This does not affect any other qubits. As mentioned above, the even substates and odd substates targeted for further decrement are simply swapped while retaining their state amplitude data.

[0024] Inverting step (#5): The k-th ancila qubit of an ancila register (a k-i Using ) as a control, the k+1th qubit (q k+1 This inverts the kth qubit (q). k Regarding ), between adjacent decrement target even substates, the size is 2 k Swapping the amplitude blocks, and also the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 kThe amplitude block is swapped. This inversion step is performed by substituting N-1 for k as the initial value.

[0025] Here, the size of the exchange depends on the split index 'k'. This is because the quantum gate used for the inversion (also called an inverter) uses the k+1th qubit (q). k+1 This is because it is based on ). In the inversion step (step #5), since this inversion step starts from k = N-1, the inverter is applied to the Nth qubit (i.e., the last qubit of the array register). In other words, the inversion process in step #5 is based on a size 2 for the even substates to be decremented, defined in relation to the (N-1)th qubit. N-1 This involves the exchange of amplitude blocks, along with a size 2 for the increment target odd substate defined in relation to the N-1th qubit. N-1 This involves replacing the amplitude block.

[0026] The inverter controls the ki-th ancila qubit (a) of the ancila register. k-i This is applied using ) as a control. This means that the aforementioned exchange does not shift the entire quantum state, but rather exchanges only specific substates at a specific position in the decomposition sequence. This specific position is the k-th qubit (q k This is defined by ), which will also be referred to as “substate shift” throughout this specification.

[0027] As mentioned above, the number of ancilla qubits in an ancilla register depends on the step size of the multistep quantum ground state shift. For example, if the step size is 1, then step size = 2 i Since = 1, i is equal to 0 (zero). In this case, the kth ancilla qubit (a k-i ) is the N-1 ancila qubit (a N-1This refers to ). Therefore, a maximum of N-1 ancilla qubits are required. When the step size is large (i.e., the step size is greater than 1), i becomes greater than 0, so the number of ancilla qubits required decreases. Specifically, the number of ancilla qubits required becomes Ni-1.

[0028] The reversing step (#6) of the aforementioned remapping step (#4): In this step, we reverse the remapping step (#4) described above. In other words, we undo the swapping (flipping) performed in step (#4).

[0029] Reverse step (#7) of decomposition step (#3) by recursion: In this step, the aforementioned recursive decomposition step (#3) is reversed by recursion. The reversal step of the recursive decomposition step can also be called a recursively re-composing step. The aforementioned inversion step (#5) and remapping inversion step (#6) are repeated before each recursion of the recursive decomposition step (#7). In other words, the inversion step (#5) and remapping inversion step (#6) are executed before each recursion of the recursive decomposition step (#7). The value of k is decremented by 1 with each recursion of step (#7) until k reaches i+1.

[0030] Reversal step (#8) before reversing the decomposition step (#1): When the value of k reaches i+1, the first ancilla qubit (a1) of the ancilla register is used as a control, and the k+1th qubit (q k+1 This inverts the kth qubit (q). k Regarding ), between adjacent decrement target even substates, the size is 2 k Swapping the amplitude blocks, and also the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k Replace the amplitude block.

[0031] Here, the size of the exchange (i.e., substate shift) depends on the partition index 'k'. This is because the quantum gate used for inversion (i.e., inverter) is the k+1th qubit (q). k+1 This is because it is based on the fact that when the value of k reaches i+1, the k+1th qubit (q k+1 ) is the i+2th qubit (q) of the array register. i+2 You will see that this refers to the k-th ancila qubit (a) of the ancila register. k-i Since it is applied using as control, this means that the inverter is applied using the first ancilla qubit (a1) of the ancilla register. This means that the aforementioned exchange does not shift the entire quantum state, but only exchanges a specific substate at a specific position in the decomposition sequence. This specific position is the kth qubit (q k ), that is, the i+1th qubit (q i+1 ) is defined by.

[0032] The reverse step (#9) of the aforementioned remapping step (#2): This step reverses the remapping step (#2) described above. In other words, it reverses the swapping (flipping) performed in step (#2). This step is also performed before reversing the decomposition step (#1).

[0033] The reverse step (#10) of the aforementioned disassembly step (#1): In this step, we reverse the decomposition step (#1). The step of reversing the decomposition step can also be called the recomposing step.

[0034] Final reversal step (#11): Step size 2 i To complete the multistep quantum ground state shift of the state amplitude based on, the i+1th qubit (q i+1This inversion step (#11) inverts the (i.e., step qubit). This final inversion step (#11) completes a multistep quantum ground state shift across all states of the array register prepared by the preceding substate shift sequence (i.e., the preceding inversion step). The final inversion step (#11) inverts the i-th qubit (qi) by a size of 2 between adjacent decrement-targeted even substates. i The amplitude block is swapped, and with respect to the i-th qubit (qi), a size 2 is created between adjacent increment-target odd substates. i Replace the amplitude block.

[0035] Figure 1 is a schematic diagram illustrating a portion of the aforementioned method according to an embodiment of this disclosure. This portion includes the following steps.

[0036] Step S1.0 is (2 N+1 The aforementioned step is shown, in which the input state p (containing n array substates) is divided into a first subset p+ of array substates to be incremented and a second subset p- of array substates to be decremented. In Figure 1, double lines indicate substates to be incremented, and single lines indicate substates to be decremented.

[0037] Step S1.1 represents the decomposition step (#1) described above. In Figure 1, this "decomposition" is indicated by the term "decompose". In Figure 1, the even substates are the divided qubits (i.e., the k-th qubit q). k ) is marked with respect to the following. Therefore, e(k) represents an even substate and o(k) represents an odd substate. The initial value of k is equal to i+1. That is, decomposition step (#1) starts from decomposition index k = i+1. In Figure 1, dashed lines are used to represent odd substates and solid lines are used to represent even substates.

[0038] Step S1.2 represents the aforementioned remapping (Step #2). In Figure 1, this remapping is indicated by the term "flip". In this specification, "remapping" and "swapping" are used interchangeably. Up to this step, the value of k is i+1.

[0039] Step S1.3 represents the first recursion of the decomposition step (#3) using the recursive process described above. The value of k increases by 1 with each recursion.

[0040] Step S1.4 represents the aforementioned remapping step (#4), which is performed after the first recursion of the recursive decomposition step (#3).

[0041] Step S1.5 represents the second recursion of the aforementioned recursive decomposition step (#3). The method then continues as described above. For example, step S1.5 is followed by the aforementioned remapping step (#4). This is executed after the second recursion of the recursive decomposition step (#3). The recursive decomposition step (#3) and the remapping step (#4) are repeated until the partition index 'k' reaches N-1.

[0042] Subsequently, a controlled inverting operation is performed as described above, and a series of steps are executed in reverse, shifting the decomposed substates, until k reaches i+1 again. However, for simplicity, the method steps performed after step S1.5 are not shown in Figure 1. As shown in Figure 1, the cascade of ancilla qubits in the ancilla register implements pairs of even and odd substates in preparation for a multistep quantum ground state shift.

[0043] The method described above has so far explained the case where i < N-2. Different steps may be performed for other values ​​of step index 'i'. This will be discussed later.

[0044] In some embodiments, the method further comprises, in the case i = N-2, a quantum circuit, The sub - state where the (i + 1)-th qubit (q i+1 ) is 0 is regarded as an even sub - state, and the sub - state where the (i + 1)-th qubit (q i+1 ) is 1 is regarded as an odd sub - state. By doing so, the first subset is decomposed into an even sub - state to be incremented and an odd sub - state to be incremented, and the second subset is decomposed into an even sub - state to be decremented and an odd sub - state to be decremented; Remapping the state amplitudes of the even sub - states to be decremented and the state amplitudes of the odd sub - states to be decremented; Regarding the (i + 1)-th qubit (q i+1 ), exchanging amplitude blocks of size 2 i+1 between adjacent even sub - states to be decremented, and regarding the (i + 1)-th qubit (q i+1 ), exchanging amplitude blocks of size 2 i+1 between adjacent odd sub - states to be incremented. To achieve this, the first ancilla qubit (a1) of the ancilla register is used as a control to invert the (i + 2)-th qubit (q i+2 ); Reversing the step of remapping the state amplitudes of the even sub - states to be decremented and the state amplitudes of the odd sub - states to be decremented; Reversing the decomposition step; By inverting the (i + 1)-th qubit (q i+1 ), completing a multi - step quantum ground - state shift of state amplitudes based on a step size of 2 i ; including setting by

[0045] When i = N - 2, the method is executed as follows:

[0046] The foregoing decomposition step (#1) is executed. Decomposition by recursive processing is not performed because the initial value of k (which is regarded as i + 1) becomes N - 1. In this step (#1), the array sub-state of the first subset (i.e., the array sub-state to be incremented) is decomposed into an even sub-state to be incremented and an odd sub-state to be incremented. On the other hand, the array sub-state of the second subset (i.e., the array sub-state to be decremented) is decomposed into an even sub-state to be decremented and an odd sub-state to be decremented. In this regard, the sub-state in which the (i + 1)-th qubit (q i+1 ), i.e., the k-th qubit (q k ) is 0 is regarded as an even sub-state, and the sub-state in which the (i + 1)-th qubit (q i+1 ), i.e., the k-th qubit (q k ) is 1 is regarded as an odd sub-state.

[0047] Subsequently, the foregoing remapping step (#2) is executed. In this step, the state amplitudes of the even sub-state to be decremented and the odd sub-state to be decremented are remapped.

[0048] The decomposition step by recursive processing (#3), the remapping step (#4) after each recursion, the inversion step (#5), the step of reversing the remapping step (#6), and the step of reversing the decomposition step by recursive processing (#7) are skipped when i = N - 2.

[0049] The foregoing inversion step (#8) is executed. Since the value of k is i + 1, the first ancilla qubit (a1) of the ancilla register is used as a control to invert the (i + 2)-th qubit (q i+2 ), i.e., the (k + 1)-th qubit (q k+1 ). As a result, for the (i + 1)-th qubit (q i+1 ), i.e., the k-th qubit (q k ), between adjacent even sub-states to be decremented, the size is 2 i+1The amplitude blocks are swapped. Similarly, the i+1th qubit (q i+1 ), that is, the k-th qubit (q k Regarding ), between adjacent odd substates that are subject to increment, size 2 i+1 The amplitude blocks are swapped.

[0050] The aforementioned remapping step (#2) is reversed, and the aforementioned step (#9) is executed.

[0051] Subsequently, the aforementioned step (#10) is performed, which reverses the aforementioned decomposition step (#1).

[0052] Finally, the aforementioned final inversion step (#11) is performed. In this step, 2 i To complete the multistep quantum ground state shift of the state amplitude based on the step size, the i+1th qubit (q i+1 ) can be reversed.

[0053] Depending on the embodiment, the method further extends to the case where i = N-1, 2 i To complete the multistep quantum ground state shift of the state amplitude based on the step size, the (i+1)th qubit (q i+1 This includes setting up a quantum circuit by inverting ).

[0054] In particular, when i = N-1, only the final inversion step (#11) is performed, and 2 i To complete the multistep quantum ground state shift of the state amplitude based on the step size, the i+1th qubit (q i+1 ) is inverted. i = N-1 has a size of 2 N+1 This corresponds to the largest possible step size for the state vector space. This corresponds to a step size of 2. i The size of the array register (i.e., 2 N This is because it is exactly half of the original value, and flipping the most significant qubit of an array register corresponds to a two-way shift.

[0055] For illustrative purposes only, an example of a quantum circuit that can be configured for i < N-2 or i = N-2 is shown below. Depending on the embodiment, this quantum circuit comprises the following elements in order: A starting segment with two CX gates; Depending on the embodiment, an intermediate segment having multiple CX gates and multiple 2 control gates; A terminal segment having three CX gates and one X gate.

[0056] Note that a two-controlled gate is also called a Toffoli gate. Also note that the intermediate segment may not be included. This is because, in the case of i = N-2, the quantum circuit does not include the intermediate segment. This intermediate segment corresponds to the recursive decomposition step (#3), the remapping step after each recursion (#4), the inversion step (#5), the step that reverses the remapping step (#6), and the step that reverses the recursive decomposition step (#7). As mentioned earlier, these steps are skipped in the case of i = N-2. In other words, in the case of i = N-2, the quantum circuit has the following elements in order: • A starting segment with two CX gates; • A terminal segment with three CX gates and three X gates.

[0057] Depending on the embodiment, the two CX gates of the starting segment are applied in the following order: • The (i+1)th qubit of the array register (q i+1 ) is used as the control corresponding to state |1>, and a CX gate targets the first ancilla qubit (a1) of the ancilla register; • Superposition qubit (q) of a shift register N+1 A CX gate is used, targeting the first ancilla qubit (a1) of an ancilla register, with the control corresponding to state |1>.

[0058] To perform the decomposition step (#1), the first of the two CX gates in the starting segment is applied. As mentioned above, in the decomposition step (#1), the array substates of the first subset (i.e., the array substates to be incremented) are decomposed into even substates to be incremented and odd substates to be incremented. On the other hand, the array substates of the second subset (i.e., the array substates to be decremented) are decomposed into even substates to be decremented and odd substates to be decremented. In this regard, the k-th qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k Substates where ) is 1 are considered odd substates. In this decomposition step, k is considered to be i+1. Thus, the first CX gate of the starting segment is the (i+1)th qubit (q) of the array register. i+1 Use ) as the control.

[0059] To perform the remapping step (#2), the last of the two CX gates in the starting segment is applied. As mentioned above, in the remapping step (#2), the state amplitudes of the even substates to be decremented and the state amplitudes of the odd substates to be decremented are remapped. Therefore, the last CX gate in the starting segment is applied to the superposition qubit (q) of the entire shift register. N+1 Use ) as the control.

[0060] Furthermore, depending on the embodiment, the three CX gates of the terminal segment are applied in the following order: The first ancilla qubit (a1) of the ancilla register is used as the control corresponding to state |1>, and the i+2th qubit (q) of the array register is used. i+2 ) CX gate targeting; • Superposition qubit (q) of a shift register N+1 ) is used as the control corresponding to state |1>, and a CX gate targets the first ancilla qubit (a1) of the ancilla register; • The (i+1)th qubit of the array register (q i+1 ) is used as the control corresponding to state |1>, and a CX gate targets the first ancilla qubit (a1) of the ancilla register; Here, the (i+1)th qubit (q) of the array register i+1 An X-gate is applied to ).

[0061] To perform the inversion step (#8), which is executed before reversing the decomposition step (#1), the first of the three CX gates in the terminal segment is applied in order. As mentioned above, the value of k reaches i+1 again. Therefore, in the inversion step (#8), the first qubit (a1) of the ancilla register is used as control to control the k+1th qubit (q k+1 )(that is, the i+2th qubit (q i+2 )) is inverted. As a result, the i+1th qubit (q i+1 Regarding ), between adjacent decrement target even substates, the size is 2 i+1 The amplitude block is swapped, and the (i+1)th qubit (q i+1 Regarding ), between adjacent incrementable odd substates, the size is 2 i+1 The amplitude block is replaced.

[0062] To perform the step (#9) that reverses the state amplitude remapping step (#2), the middle CX gate of the three CX gates in the terminal segment is applied in order. Thus, the middle CX gate of the terminal segment is the superposition qubit (q) of the shift register. N+1 ) is used as control. Notably, the same qubits applied to perform the aforementioned remapping step (#2), namely the superposition qubits of the shift register (q N+1 ) is used as control by the last CX gate of the starting segment.

[0063] To perform step #10 (i.e., the reconstruction step), which reverses the aforementioned decomposition step (#1), the last of the three CX gates in the terminal segment is applied in order. Thus, the last CX gate in the terminal segment is applied to the i+1th qubit (q) of the array register. i+1 ) is used as control. Notably, the same qubit that is applied to perform the aforementioned decomposition step (#1), namely the i+1th qubit (q) of the array register, is used. i+1 ) is used as control by the first CX gate of the starting segment.

[0064] The X gate in the terminal segment is applied to perform the final inversion step (#11) described above. As previously mentioned, in the final inversion step (#11), step size 2 i To complete the multistep quantum ground state shift of the state amplitude according to the (i+1)th qubit (q i+1 ) is inverted. Therefore, the (i+1)th qubit (q) of the array register is inverted. i+1 An X-gate is applied to ).

[0065] In some embodiments, the intermediate segment has one or more sets consisting of multiple CX gates and 2 control gates. The multiple CX gates and multiple 2 control gates in the intermediate segment take the form of multiple sets consisting of multiple CX gates and multiple 2 control gates. In this respect, the number of sets in the intermediate segment depends on the number of recursions of the decomposition step by recursive processing. In other words, the number of sets in the intermediate segment (and the number of recursions of the decomposition step by recursive processing) depends on the value of i. This is because it is the number of increments until k reaches N-1 from the initial value i+1.

[0066] A given set (among the one or more sets mentioned above) corresponding to a given recursion includes the following elements in order: • Superposition qubit (q) of a shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. kThe first CX gate uses ) as its target; • The k-th qubit (q) of the array register k ) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i The first two control gates use ) as their target; • The ki-th ancila qubit of the ancila register (a k-i ) is used as the control corresponding to state |1>, and the k+1th qubit (q) of the array register is used. k+1 The second CX gate uses ) as its target; • The k-th qubit (q) of the array register k ) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i A second control gate that uses ) as its target; • Superposition qubit (q) of a shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The third CX gate, targeting ).

[0067] The first CX gate in a given set of intermediate segments is applied to perform a remapping step. In the first set of the one or more sets of intermediate segments, the first CX gate is applied to perform a remapping step (#2). In remapping step (#2), the state amplitudes of the even substates to be decremented and the state amplitudes of the odd substates to be decremented are remapped. To perform remapping step (#2), the first CX gate in the first set of intermediate segments is applied to the superposition qubit (q) of the shift register. N+1 ) is used as control, and the k-th qubit (q) of the array register is used. kIt is applied using ) as the target.

[0068] In any other set of the intermediate segment (i.e., any set of the intermediate segment other than the first set), the first CX gate is applied to perform a remapping step (#4) after each recursion of the recursive decomposition step (#3). In the remapping step (#4), the state amplitudes of the further decremented even substates and the further decremented odd substates are remapped. To perform the remapping step (#4), the first CX gate is applied to the superposition qubit (q) of the shift register. N+1 ) is used as control, and the k-th qubit (q) of the array register is used. k It is applied using ) as the target. Note that the value of k also changes with each recursion, making it possible to perform a remapping step on smaller substates.

[0069] To perform the recursive decomposition step (#3), the first two control gates of a given set of intermediate segments are applied. In the recursive decomposition step (#3), the incrementing odd substate is recursively decomposed into a further incrementing even substate and a further incrementing odd substate, and the decrementing even substate is recursively decomposed into a further decrementing even substate and a further decrementing odd substate. In this respect, the k-th qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k Substates where ) is 1 are considered odd substates. In the recursive decomposition step (#3), with each recursion, the value of k is incremented by 1 until it reaches N-1. In other words, a given set (corresponding to a given recursion) has a unique k value because k is incremented with each recursion. To perform the recursive decomposition step (#3), the first 2 control gates of a given set of intermediate segments are set to the k-th qubit (q) of the array register. k) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as control, and the ki-th ancila qubit (a k-i It is applied using ) as the target.

[0070] The second CX gate in a given set of intermediate segments is applied to perform the inversion step (#5). In the inversion step (#5), the ki-th ancilla qubit (a) of the ancilla register is applied. k-i Using ) as a control, the k+1th qubit (q k+1 ) is inverted. As a result, the k-th qubit (q k Regarding ), between adjacent decrement target even substates, the size is 2 k The amplitude blocks are swapped, and the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k The amplitude blocks are swapped. The second CX gate in a given set of intermediate segments performs the inversion step (#5) by setting the ki-th ancila qubit (a) of the ancila register. k-i ) is used as control, and the k+1th qubit (q) of the array register is used. k+1 This is applied using ) as the target. This inversion step is performed with the first set of k equal to N-1, so the first set (of the aforementioned one or more sets of the intermediate segment) uses N-1 as the value of k. For subsequent sets (of the aforementioned one or more sets of the intermediate segment), the value of k is decremented by 1 until it reaches i+1.

[0071] The second set of two control gates of a given set of intermediate segments is applied to perform the step (#6) that reverses the aforementioned remapping step (#4). The second set of two control gates of a given set of intermediate segments is applied to the k-th qubit (q) of the array register to perform the step (#6) that reverses the remapping step (#4). k) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as control, and the ki-th ancila qubit (a k-i It is applied using ) as the target.

[0072] The third CX gate in a given set of intermediate segments is applied to perform the step (#7) of reversing the decomposition step (#3) by the recursive process described above. The third CX gate in a given set of intermediate segments is applied to the superposition qubit (q) of the shift register to perform the reconstruction step (#7). N+1 ) is used as control, and the k-th qubit (q) of the array register is used. k ) is used as the target and applied. As mentioned above, the value of k is decremented by 1 at each recursion of step (#7) until k reaches i+1.

[0073] It should be noted that in the intermediate segment described above, one or more sets consisting of multiple CX gates and multiple 2-control gates are not arranged in order. These sets are arranged in a predetermined manner in order to properly execute recursion. For example, the (M+1)th set corresponding to the (M+1)th recursion is placed after the first 2-control gate of the corresponding (M)th set corresponding to the (M)th recursion. This will be explained in relation to Figure 2C below.

[0074] Referring to Figures 2A and 2B, detailed diagrams of a quantum circuit according to an embodiment of the present disclosure are shown. This quantum circuit is executed by a quantum computer or quantum simulator. This quantum circuit is 2 N+1 It includes a shift register and an ancilla register used to perform a multistep quantum ground state shift in a state vector space of size n. The shift register has N+1 qubits, and its first N qubits (q 1, q 2, ...q N ) forms an array register, and its last qubit (q N+1An ancilla register is a superposition qubit. An ancilla register has up to N-1 ancilla qubits (a1, ... a N-1 ) has. This quantum circuit comprises the following elements in order: • Start segment 202 has two CX gates 2021-2022; Depending on the embodiment, an intermediate segment 206 may be present. This segment may have multiple CX gates 2061, 2063, 2065 and multiple 2 control gates 2062, 2064; • A terminal segment 204 having three CX gates 2041-2043 and one X gate 2044.

[0075] Step size 2 in multi-step quantum ground state shift i The quantum circuit is described below. Here, the step index i is a non-negative integer less than N.

[0076] In some embodiments, as shown in Figure 2A, when i < N-2 or i = N-2, the two CX gates 2021-2022 of the starting segment 202 are applied in the following order: • The (i+1)th qubit q of the array register i+1 Using the control corresponding to state |1>, the CX gate 2021 targets the first ancilla qubit a1 of the ancilla register; • Shift register superposition qubit q N+1 Using the control corresponding to state |1>, the CX gate 2022 targets the first ancilla qubit a1 of the ancilla register.

[0077] Depending on the embodiment, as shown in Figure 2A, when i < N-2 or i = N-2, the three CX gates 2041-2043 of the terminal segment 204 are applied in the following order: The first ancilla qubit a1 of the ancilla register is used as the control corresponding to state |1>, and the i+2th qubit q of the array register is used. i+2 CX gate 2041 targeting; • Shift register superposition qubit q N+1 Using the control corresponding to state |1>, CX gate 2042 targets the first ancilla qubit a1 of the ancilla register; • The (i+1)th qubit q of the array register i+1 Using the control corresponding to state |1>, CX gate 2043 targets the first ancilla qubit a1 of the ancilla register; Here, the (i+1)th qubit (q) of the array register i+1 X-gate 2044 is applied to ).

[0078] In some embodiments, when i < N-2, the intermediate segment 206 has one or more sets consisting of multiple CX gates and multiple 2 control gates. The number of these sets depends on the number of recursions, where the value of k is initially equal to i+1 and is incremented by 1 with each recursion until it reaches N-1. Figure 2B shows a specific set corresponding to a particular recursion for illustrative purposes. This particular set comprises, in order, the following elements: • Superposition qubit (q) of a shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The first CX gate 2061 uses ) as its target; • The k-th qubit (q) of the array register k ) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i The first two control gates 2062 use ) as the target; • The ki-th ancila qubit of the ancila register (a k-i ) is used as the control corresponding to state |1>, and the k+1th qubit (q) of the array register is used. k+1 The second CX gate 2063 uses ) as its target; • The k-th qubit (q) of the array register k) and the ki-1th ancila qubit of the ancila register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i The second control gate 2064 uses ) as its target; • Superposition qubit (q) of a shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The third CX gate, 2065, targets ).

[0079] As shown by the dashed line 208, in the intermediate segment 206, the (M+1)th set corresponding to the (M+1)th recursion is added after the first two control gates of the corresponding (M)th set corresponding to the (M)th recursion.

[0080] Figure 2C shows a detailed diagram of an example quantum circuit for the case N = 4, i = 0, for illustrative purposes only. This illustrative quantum circuit has a size of 2 N+1 = 2 5 = Used to perform multistep quantum ground state shifts in a state vector space of 32. The shift register has a total of 5 qubits, the first 4 of which are (q 1, q 2, q 3, q4) forms an array register, and its last qubit (q5) is a superposition qubit. The ancilla register has three ancilla qubits (a1, a2, a3). The example quantum circuit comprises the following elements in order: • Start segment 202 has two CX gates; • Intermediate segment 206 having two sets, each containing multiple CX gates and multiple 2 control gates; • Termination segment 204 having three CX gates and one X gate.

[0081] As shown in Figure 2C, the two CX gates in the starting segment 202 are applied in the following order: A CX gate that uses the first qubit q1 of an array register as the control bit corresponding to the state |1> and the first anscira qubit a1 of an anscira register as the target; • A CX gate that uses the superposition qubit q5 of the shift register as a control corresponding to state |1> and targets the first anscira qubit a1 of the anscira register.

[0082] As shown in Figure 2C, the three CX gates of the terminal segment 204 are applied in the following order: • A CX gate that uses the first ancilla qubit a1 of the ancilla register as a control corresponding to state |1>, and targets the second qubit q2 of the array register; • A CX gate that uses the superposition qubit q5 of the shift register as a control corresponding to state |1> and targets the first ancilla qubit a1 of the ancilla register; A CX gate that uses the first qubit q1 of an array register as the control bit corresponding to the state |1> and the first anscira qubit a1 of an anscira register as the target. Here, the X gate is applied to the first qubit q1 of the array register.

[0083] As shown in Figure 2C, the intermediate segment 206 has two sets, each containing multiple CX gates and multiple 2 control gates. The number of such sets in the intermediate segment 206 depends on the number of recursions. Here, k starts at 1 and is incremented by 1 with each recursion until it reaches a value of 3. Therefore, for the first set corresponding to the first recursion and the second set corresponding to the second recursion, the values ​​of k are 2 and 3, respectively.

[0084] As shown in Figure 2C, the first set comprises the following elements in order: The first CX gate 2061a uses the superposition qubit q5 of the shift register as the control corresponding to state |1> and the second qubit q2 of the array register as the target; The first two-control gate 2062a uses the second qubit q2 of the array register and the first ancilla qubit a1 of the ancilla register as controls corresponding to state |1>, and the second ancilla qubit a2 of the ancilla register as the target; The second CX gate 2063a uses the second ancilla qubit a2 of the ancilla register as the control corresponding to state |1>, and the third qubit q3 of the array register as the target; • A second 2-control gate 2064a, using the second qubit q2 of the array register and the first ancilla qubit a1 of the ancilla register as controls corresponding to state |1>, and using the second ancilla qubit a2 of the ancilla register as the target; • A third CX gate 2065a uses the superposition qubit q5 of the shift register as the control corresponding to state |1> and the second qubit q2 of the array register as the target.

[0085] In the intermediate segment 206, the second set corresponding to the second recursion is placed after the first set of two control gates 2062a of the first set corresponding to the first recursion. As shown in Figure 2C, the second set comprises the following elements in order: The first CX gate 2061b uses the superposition qubit q5 of the shift register as the control corresponding to state |1> and the third qubit q3 of the array register as the target; The first two-qubit controlled gate 2062b uses the third qubit q3 of the array register and the second ancila qubit a2 of the ancila register as control corresponding to state |1>, and the third ancila qubit a3 of the ancila register as the target; • The second CX gate 2063b uses the third ancilla qubit a3 of the ancilla register as the control corresponding to state |1>, and the last qubit q4 of the array register as the target; • The second 2-control gate 2064b uses the third qubit q3 of the array register and the second ancila qubit a2 of the ancila register as controls corresponding to state |1>, and the third ancila qubit a3 of the ancila register as the target; • A third CX gate 2065b uses the superposition qubit q5 of the shift register as the control corresponding to state |1> and the third qubit q3 of the array register as the target.

[0086] In the example circuit in Figure 2C, the first step of controlled inverting is applied to the last qubit q4 of the array register. This is because this inverting step starts at k = N-1 = 3. Therefore, the step size of the first substate shift is 2 k = 2 3 = 8. Since the first step of controlled inversion is performed after all decomposition operations have been carried out, the first substate shift is applied only to the last substate of the decomposition (i.e., the even and odd substates relating to the third qubit q3). Since the value of k after decrement is 2, the second step of controlled inversion is applied to the third qubit q3. Thus, the step size of the second substate shift is 2 2 = 4. The second substate shift applies only to the even and odd substates of the second qubit q2. Similarly, the third step of controlled inversion applies to the second qubit q2 because the value of k is further subtracted to 1. Thus, the step size of the third substate shift is 2 1= 2. The third substate shift is applied only to the even and odd substates with respect to the first qubit bit q1. Finally, the last inversion step is performed by applying the X gate to the first qubit bit q1. This completes a multi-step quantum ground state shift with a step size of 1 for all states of the array register in this exemplary quantum circuit. In Figures 2A to 2C, each CX and X gate applied to perform the inversion step is enclosed in a dashed line.

[0087] In Figure 2C, the step index i is set to 0 to explain multiple recursion using the simplest example of a quantum circuit where the entire shift register consists of only 5 qubits. Based on the generalized implementation of the quantum circuit shown in Figures 2A to 2B, it is possible to construct larger and more complex quantum circuits.

[0088] Multistep quantum ground state shifts implemented using such quantum circuits can be used in a variety of quantum algorithms, including quantum random walks and other related quantum applications. Particularly advantageous is that multistep quantum ground state shifts can be implemented as a fundamental building block in discrete quantum random walks and can be adopted in multiple quantum algorithms. For example, multistep quantum ground state shifts are used to implement the propagation step in quantum algorithms such as the Quantum Lattice Boltzmann Method (QLBM) and Quantum Lattice Gas Automata (QLGA).

[0089] In this regard, the method may further include executing a quantum algorithm using a quantum circuit that performs multi-step quantum ground state shifts as a subroutine within the quantum algorithm. In the simplest implementation of the method, the quantum circuit is used to perform multi-step quantum ground state shifts in an orthogonal direction on a polygonal lattice. The quantum circuit can also be used to perform multi-step quantum ground state shifts in a non-orthogonal direction on a polygonal lattice. Such multi-step quantum ground state shifts on polygonal lattices are of interest in several quantum algorithms, such as lattice-based physics solvers used to simulate physical processes. QLBM and QLGA are examples of such lattice-based physics solvers. In particular, the simulation of physical processes frequently involves quantum random walks and related quantum applications. Therefore, the quantum circuit of this disclosure can be used to perform multi-step quantum ground state shifts as a subroutine within a quantum algorithm.

[0090] Quantum algorithms can be used in a variety of practical application fields, and quantum circuits offer a clear computational advantage in diverse application areas such as cryptography and cybersecurity, drug discovery and molecular modeling, materials science and engineering, financial modeling and risk analysis, machine learning and artificial intelligence, climate modeling and environmental analysis. In this regard, quantum algorithms are used to perform simulations of physical processes. Here, the method further includes providing the user with measurements obtained after the simulation of the physical process. The state variables measured depend on the quantum algorithm and the physical process being simulated. Multistep quantum ground state shifts achieve a significant quantum speedup because they can execute multiple shift directions simultaneously at a computational complexity class equivalent to that of single-step ground state shifts. This makes it possible to provide measurement results to the user very quickly. In particular, this allows for the execution of multiple simulations of physical processes with a high degree of parallelism. Due to parallelization, the overall depth of the quantum algorithm becomes shallower compared to quantum algorithms using single-step ground state shifts. Advantageously, such shallow quantum algorithms are simpler to operate and tend to accumulate less noise and error in measurements.

[0091] Next, we will explain how the multistep quantum ground state shift performed using the method described above compares to a quantum random walk and how it can be implemented as part of a quantum random walk. The multistep quantum ground state shift relates to a shift of all states in an array register, which can be called a full data array shift. A quantum random walk, on the other hand, is defined as a superposition of at least two full data array shifts, where the interpretation of the walk probability depends on how the superposition is achieved.

[0092] Figure 3 shows an example of a full data array shift, i.e., a combination of two multistep quantum ground state shifts, which can be interpreted as a positional pattern on a two-dimensional lattice. In this example, the combination of two multistep quantum ground state shifts all states of the array register two steps to the right and one step upward. All states of the array register cover the entire two-dimensional lattice, but for illustrative purposes, some of the ground states are marked as lattice points on the two-dimensional lattice. This can be interpreted as particles existing at those lattice points. A "combination of two multistep quantum ground state shifts" means moving all states on the two-dimensional lattice as shown in Figure 3. This can be interpreted as the movement of particles. Algorithmically, not only the non-trivial marked lattice points but the entire state vector space is moved within the lattice. In the context of performing this combination of two multistep quantum ground state shifts, this movement corresponds to a remapping of state amplitudes. For example, if the ground states are indexed, the increment operator moves the state amplitudes to the next ground state according to the index.

[0093] Multistep quantum ground state transitions can be extended to quantum random walks by defining a superposition of all data in the state vector space on a lattice (each representing a different probability). As an example, consider the case where two multistep quantum ground state transitions are combined with equal weights. This can be interpreted as a uniform probability of a particle moving in either direction. This is just a simple example, but superposition can become complex depending on the embodiment. For example, one particle might have a different probability of appearing anywhere on the lattice, and another particle might have a different probability of moving in exactly the correct direction.

[0094] For simplicity, this specification focuses only on uniform superpositions of various different motions in multistep quantum ground state shifts. The simplest example is uniform symmetric motion, in which case the superpositions are symmetrically paired. This can be interpreted as diffusive motion on a regular lattice. As mentioned earlier, quantum circuits of such uniform symmetric motion are highly efficient due to their inherent parallelizability. This parallelizable uniform symmetric motion is also called a "parallel symmetric shift".

[0095] Throughout this specification, the canonical basis state is assumed to be 0 and 1, and the corresponding tensor product basis state is the bit string q m q m-1 ...assuming q1. Here q j The qubits are ∈{0,1}, and the rightmost bit is the least significant bit. In quantum circuit diagrams, the least significant qubit is displayed at the top. A finite subset of N qubits is used for indexing. Here, it is assumed that the index starts from 1.

[0096] The ground state shift is a Fredholm operator on Hilbert space induced by the tensor product of qubits. In other words, the indexed set of ground states {e j} n j=1 In contrast, the increment operator can be expressed as follows: S+:e j →e j +1

[0097] Furthermore, the decrement operator can be expressed as follows: S-:e j →e j -1

[0098] In a multi-step quantum ground state shift, the sequence of state amplitudes, which are the coefficients of the ground state, is shifted. Therefore, a multi-step quantum ground state shift moves the state amplitudes forward or backward in the index sequence of the ground state.

[0099] TIFF2026104805000001.tif28170

[0100] Furthermore, we assume that the indexing of the ground states is isomorphic to the quotient group Z / nZ, where n is the dimension of the state vector space, and n = 2 N This makes the shift periodic, allowing it to be interpreted as amplitude propagation on a cyclic one-dimensional graph. Of particular note is that in a one-dimensional lattice, the parallel symmetric shift is performed as a bidirectional shift. This interpretation of the parallel symmetric shift can be easily extended to higher dimensions from the perspective of orthogonal lattices, as will be discussed later.

[0101] From this perspective, we consider interpretations of parallel symmetric shifts in r-dimensional lattices (i.e., r = 2 or 3). These interpretations are particularly important in the practical application of quantum circuits. As mentioned above, we assume that parallel symmetric shifts are periodic. However, such periodicity is assumed to be with respect to each spatial dimension, such that the indexing is isomorphic to (Z / nZ)r. Here, this product is the direct product of quotient groups. Also, n is the size of the state vector subspace corresponding to one of the spatial dimensions of the entire state vector space, i.e., the length of the lattice edges of the state vector subspace. For simplification, the interpretation is carried out assuming a square lattice (for r = 2) or a cubic lattice (for r = 3), and that n (i.e., the size of the state vector subspace) is a power of 2. Topologically, such lattices can be interpreted as discrete torus surfaces. Furthermore, the different directions along the different dimensions of these lattices are considered orthogonal simply to refer to the structure of these lattices. Note that the dimensions are irrelevant to the purposes of this specification, and rather the fact that the directions are somewhat independent of each other is important.

[0102] The parallel symmetric shift in the one-dimensional lattice described above can be applied to higher dimensions (i.e., two-dimensional or three-dimensional lattices) by additional arrangement of ground states. In this regard, depending on the embodiment, this method can be applied to at least one additional dimension with a size of 2 i This further includes performing at least one additional multistep quantum ground state shift having (i.e., a power of 2). In some embodiments, the multistep quantum ground state shift and at least one additional multistep quantum ground state shift are performed by sequentially stacking one-dimensional shifts for one dimension and at least one additional dimension, respectively. Such stacking of one-dimensional multistep quantum ground state shifts is performed by considering an array register (i.e., an indexed array of ground states) as corresponding to a stack of multiple one-dimensional data. This ensures the correct superposition of "direction substates". It will be seen that this step can be performed using the steps of the method for the multistep quantum ground state shift (i.e., parallel symmetric shifts for a one-dimensional lattice) described above. In the above, when r = 2, at least one additional dimension includes a single additional dimension, and at least one additional multistep quantum ground state shift includes a single additional multistep quantum ground state shift. Similarly, when r = 3, at least one additional dimension includes two additional dimensions, and at least one additional multistep quantum ground state shift includes two additional multistep quantum ground state shifts.

[0103] The technical advantage of this is that multi-step quantum ground state shifts and at least one additional multi-step quantum ground state shifts can be performed together in the same computational complexity class as a single-step ground state shift. This technical advantage stems from the parallelization of multiple shifts under a single operation. Parallelization makes the overall depth of the quantum circuit for multi-step quantum ground state shifts and at least one additional multi-step quantum ground state shift less than twice the overall depth of the quantum circuit for a single-step ground state shift. Furthermore, it allows for different step sizes at once for different array substates corresponding to different dimensions.

[0104] In an r-dimensional lattice (with dimension r), an array register has rN qubits. Furthermore, to consider simple orthogonal shifts in all dimensions, r superposition qubits are required. Therefore, a shift register must have r(N+1) qubits, with the first rN qubits forming the array register and the last r qubits being superposition qubits. The r superposition qubits enable superposition along all directions of the r-dimensional lattice.

[0105] In other embodiments, multistep quantum ground state shifts and at least one additional multistep quantum ground state shifts are performed by changing the qubit order of the corresponding substates in the multistep quantum ground state shift and at least one additional multistep quantum ground state shift using controlled swap blocks for one dimension and at least one additional dimension, respectively. In other words, only a single one-dimensional shift is performed in these controlled swap blocks. The technical advantage of using controlled swap blocks is that they not only guarantee the correct superposition of "direction substates" but are also efficient in larger lattices. Controlled swap gates increase the overall complexity of the quantum circuit compared to a single one-dimensional shift, but the overall complexity remains linear.

[0106] Figure 4 shows a detailed diagram of a quantum circuit that uses two controlled swap blocks to perform two multistep quantum ground state shifts in two dimensions, according to an embodiment of the present disclosure. The two multistep quantum ground state shifts enable a symmetrically equal shift in four directions on a two-dimensional regular lattice using two controlled swap blocks. Referring to Figure 4, the box labeled "Shift" represents the quantum circuit for performing the multistep quantum ground state shift (i.e., shown in Figures 2A and 2B). The first of the two controlled swap blocks is applied before performing the multistep quantum ground state shift, and the second swap block is applied after the multistep quantum ground state shift has been performed.

[0107] Most importantly, the array register has 2N qubits (q 1, q 2, ...q 2N ) has. Here, the quantum circuit for multistep quantum ground state shift is the first half of the array register, i.e., the first N qubits (q) of the array register. 1, q 2, ...q N ) and is applied to the first superposition qubit (c1) of the superposition register. The superposition register has two superposition qubits (c1, c2). Here, the second superposition qubit (c2) is used to provide control over the two uncontrolled swap blocks. In such an implementation, the shift register is an array register (q 1, q 2, ...q 2N It consists of a single register and superposition registers (c1, c2).

[0108] As shown in Figure 4, the first controlled swap block and the second controlled swap block each contain N controlled swap gates. The N controlled swap gates of the first controlled swap block are arranged symmetrically with respect to the N controlled swap gates of the second controlled swap block. In the first controlled swap block, the N controlled swap gates comprise the following elements in order: • The first qubit q1 of the array register and the (N+1)th qubit q of the array register N+1 The first controlled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>; • The second qubit q2 of the array register and the (N+2)th qubit q of the array register N+2 The second controlled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>; The same applies to the following... • The Nth qubit q of the array register N and the 2Nth qubit q of the array register 2N The Nth uncontrolled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>.

[0109] In the second controlled swap block, the N controlled swap gates comprise the following elements in order: • The Nth qubit q of the array register N and the 2Nth qubit q of the array register 2N The first controlled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>; • The (N-1)th qubit N-1 of the array register and the 2N-1th qubit q of the array register 2N-1The second controlled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>; The same applies to the following... • The first qubit q1 of the array register and the (N+1)th qubit q of the array register N+1 The Nth uncontrolled swap gate is applied between the two states, using the second superposition qubit c2 of the superposition register as the control corresponding to state |1>. [Experimental Results]

[0110] In practical implementations of quantum circuits that perform multi-step quantum ground state shifts, it is important to understand the complexity of the quantum circuit in terms of the required gates and qubits. In this regard, gate complexity (i.e., the complexity of a quantum circuit based on the number of required gates) has been measured as the number of CX gates relative to the number of qubits. This is because CX gates (i.e., controlled 1-qubit X gates) are often considered fundamental gates and have the highest gate infidelity in today's actual quantum computers.

[0111] The quantum circuits of this disclosure have only X gates, CX gates, and 2-controlled gates (i.e., Toffoli gates). Step size 2 i It is clear that the number of gates in a quantum circuit is maximized when is 1, i.e., i = 0. To calculate the gate complexity of a quantum circuit, we consider several different implementations of the quantum circuit for N>1 and i = 0. Here, the size of the state vector space is i.e., 2 N As the number of elements increases, the size of the array registers also increases.

[0112] In the first case, N = 1, the array register has only one qubit (q1). In this case, i = N-1, and the first implementation of the quantum circuit consists of only one X gate.

[0113] In the second case, N = 2, the array register has two qubits (q1, q2) is present. In the second case, i = N-2, and the second implementation of the quantum circuit consists of five CX gates and one X gate. This configuration of five CX gates and X gate in the second case can be considered a fundamental configuration for larger circuits.

[0114] Each time a qubit is added to the array register, i.e., when i < N-2, the corresponding implementation of the quantum circuit has, in addition to the five CX and X gates of the basic configuration, one CX gate for performing an additional substate shift, and two Toffoli gates and two CX gates for performing even / odd decomposition of the said substate.

[0115] Using minimal decomposition, which divides the Toffoli gate into six CX gates and several single-qubit gates, the corresponding implementation of the quantum circuit has 15 CX gates in addition to the five CX gates and X gates of the basic configuration. Thus, the gate complexity (measured as the number of CX gates relative to the number of qubits) for N>1 and i = 0 can be expressed as follows: n CX (N) = 15N-25

[0116] Each time a qubit is added to the array register, 15 CX gates are added to the quantum circuit, but each time the step size increases, 15 CX gates are removed from the quantum circuit. Therefore, generally, with a step size of 2... i The gate complexity for (i < N-2 or i = N-2) can be expressed as follows: n CX (N,i) = 15(Ni)-25

[0117] It can be seen that the required number of ancilla qubits is Ni-1.

[0118] Compare the gate complexity of multistep quantum ground state shifts as follows: (i) Shifts based on the quantum Fourier transform proposed by Shakeel ("Efficient and scalable quantum walk algorithms via the quantum fourier transform", Quantum Information Processing 19 (2020)); (ii) The parallel shift method proposed by Budinski et al. (Efficient parallelization of quantum basis state shift, Quantum Science and Technology 8 (2023) 045031).

[0119] In the table below, "QFT" represents (i) above, "Parallel" represents (ii) above, and "Parallel cascade" represents the multistep quantum ground state shift as defined herein. The number of CX gates is calculated using ancilla decomposition and gate cancellation whenever possible. All-to-all connections between qubits are assumed.

[0120] The first table below shows the bidirectional shifts in a one-dimensional lattice, given the number of qubits (N) in the array register and the step size 2. i This indicates the gate complexity as measured by the number of CX gates. The number of qubits refers to the number of qubits used to encode the array register. [Table 1]

[0121] Figure 5 shows how the number of CX gates in various bidirectional shifts with step size 1 changes with respect to the number of qubits (N) used to encode the one-dimensional lattice. Figure 5 shows how the gate complexity changes for (i) above (indicated as QFT) and for multistep quantum ground state shifts (labeled "Parallel cascade" in the first table, but shown as Parallel in Figure 5).

[0122] Table 2 in the lower section shows the gate complexity measured as the number of CX gates relative to the number of qubits for 2D array shifts in four directions on a 2D lattice. Both shifting methods utilize controlled swap blocks for 2D extension. The number of qubits refers to the number of qubits used to encode one side of the lattice. Therefore, twice this number of qubits is required for the array register. [Table 2]

[0123] Table 3 below shows the gate complexity, measured as the number of CX gates relative to the number of qubits, for 3D array shifts in 6 directions on a 3D lattice. 3D extension is performed using controlled swap blocks for all shifting schemes. The number of qubits refers to the number of qubits used to encode one edge of the lattice. Therefore, the array register requires three times this number of qubits. [Table 3]

[0124] Furthermore, to interpret the gate complexity of multistep quantum ground state shifts in various practical implementations, we compare implementation examples of multistep quantum ground state shifts in quantum random walks with the aforementioned implementation example of (i) (i.e., QFT) in quantum random walks. For simplicity, these implementation examples are interpreted assuming trivial initial states and a quantum coin operator as a Hadamard gate. This Hadamard gate sets the increment and decrement to a uniform superposition. This interpretation transpiles the corresponding quantum circuit using the basis gate set {CX,SX,RZ,ID} designed for the IBM Falcon quantum processor family, Q iskit This is done using the SDK's transpiler with default settings. For simplicity, all-to-all connections between qubits are assumed.

[0125] In this regard, Table 4 below shows the gate complexity for a bidirectional one-dimensional quantum walk, measured as the total number of gates and the number of CX gates relative to the number of qubits. The number of qubits refers to the number of qubits used to encode the array register. [Table 4]

[0126] Figure 6 shows how the total number of gates (i.e., the total number of gates) changes with respect to the number of qubits (N) used to encode the one-dimensional lattice in a bidirectional one-dimensional quantum walk with a step size of 1. Figure 6 shows how the gate complexity changes for (i) above (denoted as QFT) and for a multi-step quantum ground state shift (denoted as "Parallel cascade" in Table 4, but shown as Parallel in Figure 6). A similar pattern is observed when focusing only on the number of CX gates.

[0127] Table 5 below shows the gate complexity for a 2D quantum walk in four directions, measured as the total number of gates and the number of CX gates relative to the number of qubits. In both shift schemes, 2D extension is performed using controlled swap blocks. The number of qubits refers to the number of qubits used to encode one side of the lattice. Array registers require twice this number of qubits. [Table 5]

[0128] Figure 7 shows how the total number of gates (i.e., the total number of gates) changes with respect to the number of qubits (N) used to encode one edge of the lattice in a 4-directional 2D quantum walk with a step size of 1. Figure 7 shows how the gate complexity changes for (i) (denoted as QFT) and for a multistep quantum ground state shift (denoted as "Parallel cascade" in Table 4 and shown as Parallel in Figure 7). A similar pattern is observed when focusing only on the number of CX gates.

[0129] Furthermore, to interpret the gate complexity of multistep quantum ground state shifts in various practical implementations, we compare another implementation example of multistep quantum ground state shifts in the quantum lattice Boltzmann method (QLBM) with another implementation example of (i) (i.e., QFT) in QLBM. QLBM involves steps of collision, propagation, and macroscopics, which are executable, for example, as described in Ljubomir Budinski, "Quantum algorithm for the advection-diffusion equation simulated with the lattice Boltzmann method", Quantum Information Processing (2021). These other implementation examples are interpreted assuming trivial initial states for clarity. This interpretation is performed by transpiling using qiskit's default settings. All-to-all connections between qubits are assumed.

[0130] In this regard, Table 6 below shows the gate complexity measured as the total number of gates and CX gates relative to the number of qubits. For a 2D QLBM model in which the Advection-Diffusion Equation (ADE) is used in the propagation step, the gate complexity measured as the total number of gates and CX gates relative to the number of qubits is shown. In this model, there are five possibilities in the shift direction, one of which implements a steady substate. In both shift schemes, a 2D extension is implemented using controlled swap blocks. The number of qubits refers to the number of qubits used to encode one side of the lattice. Array registers require twice this number of qubits. [Table 6]

[0131] In contrast to two-dimensional quantum walks, the two-dimensional QLBM model for the advection-diffusion equation (ADE) employed for the propagation step requires additional control over steady-state substates. For clarity, note that the effects of initial state preparation are excluded, and trivial initial states are assumed. Also note that the overall complexity scale of this QLBM model depends only on the propagation step, as all other steps of the quantum algorithm are constant for a given physical configuration. QLGA quantum circuits, being structurally similar to QLBMs, follow a similar pattern. This highlights the importance of optimizing multi-step quantum ground state shifts.

[0132] Figure 8 shows how the total number of gates (i.e., the total number of gates) changes with respect to the number of qubits (N) encoding one edge of the lattice in a 2D QLBM model for ADE employed with various shifts for the propagation step. Figure 8 shows how the gate complexity changes for (i) above (denoted as QFT) and multistep quantum ground state shift (denoted as "Parallel cascade" in Table 4 and shown as Parallel in Figure 8).

[0133] For a more detailed analysis, the fidelity of the output distribution obtained from simulations was compared with that of existing quantum devices using superconducting qubits. These simulations considered reported gate errors, readout errors, and the actual qubit connectivity of the quantum devices. 2048 shots were used per simulation to map the distributions of QFT-based shifts and multi-step quantum ground state shifts.

[0134] Figure 9 shows a comparison of circuit fidelity for the number of qubits N used to encode a one-dimensional lattice, and compares the circuit fidelity of several different bidirectional shifts with a step size of 1. The comparison of circuit fidelity relates to a comparison of the mean Hellinger fidelity of these simulations against an ideal distribution, with standard deviations obtained from 20 iterations of simulation. In particular, the Hellinger fidelity is calculated by comparing the total state distribution from noisy device simulations with an ideal, noise-free distribution. These distributions were collected from 2048 shots per simulation and repeated 20 times to obtain the mean Hellinger fidelity and standard deviation. In Figure 9, (i) above is shown as QFT, and the multistep quantum ground state shift is shown as Parallel.

[0135] It is clear that multi-step quantum ground state shifts consistently outperform QFT shifts, even with a small number of qubits. The large deviations in multi-step quantum ground state shifts can be explained by the effect of additional ancilla registers. Increasing the number of shots per simulation should reduce this effect.

Claims

1. A method performed by a quantum computer or quantum simulator, wherein the method is 2 N+1 Setting up a shift register and an ancilla register for a quantum circuit used to perform a multistep quantum ground state shift in a state vector space of size n, wherein the shift register has a total of N+1 qubits, and the first N qubits (q) of the shift register 1， q 2， ...q N ) forms an array register, and the last qubit (q) of the shift register N+1 ) is a superposition qubit, and the ancilla register has up to N-1 ancilla qubits (a 1 , ...a N-1 ) including the setting described above; 2 N+1 For an input state having N+1 array sub-states, consider the array sub-states in which the superposed qubit (q N+1 ) is 0 as the array sub-states to be incremented, and consider the array sub-states in which the superposed qubit (q N+1 ) is 1 as the array sub-states to be decremented, thereby dividing the input state into a first subset that is a subset including the array sub-states to be incremented and a second subset that is a subset including the array sub-states to be decremented; In the multi-step quantum ground state shift described above, the step size is 2 i In the case of i < N-2, the quantum circuit is set up accordingly; This includes, however, the step index i is a non-negative integer less than N, and setting up the quantum circuit is, The k-th (k=i+1) qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k By considering substates where ) is 1 as odd substates, the first subset is decomposed into even substates to be incremented and odd substates to be incremented, and the second subset is decomposed into even substates to be decremented and odd substates to be decremented; Remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; The kth qubit (q k Substates where ) is 0 are considered even substates, and the k-th qubit (q k By considering a substate where ) is 1 as an odd substate, and by a recursive process that increments k by 1 until k reaches N-1, the odd substate to be incremented is decomposed into an even substate to be further incremented and an odd substate to be further incremented, and the even substate to be decremented is decomposed into an even substate to be further decremented and an odd substate to be further decremented; Each time recursion occurs, the state amplitude of the even substates to be further decremented is remapped to the state amplitude of the odd substates to be further decremented; The kth qubit (q k With respect to the adjacent decrement target even substates, the size 2 k The amplitude block is swapped, and the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k To swap the amplitude block, the ki-th ancila qubit (a) of the ancila register k-i ) is used as a control to control the k+1th qubit (q k+1 The inversion of ) where k is equal to N-1, and k is decremented by 1 each time it is recursive; Reversing the step of remapping the state amplitude of the even substates to be further decremented with the state amplitude of the odd substates to be further decremented; The steps of decomposition by the recursive process are reversed, provided that the reversal step and the reversal step of remapping are repeated prior to the reversal of each recursion of the decomposition by the recursive process; The k-th (where k=i+1) qubit (q k With respect to the adjacent decrement target even substates, the size 2 k The amplitude block is swapped, and the k-th qubit (q k Regarding ), between adjacent incrementable odd substates, the size is 2 k To swap the amplitude block, the first ancila qubit (a) of the ancila register 1 ) is used as a control to control the k+1th qubit (q k+1 ) and reversing it; Reversing the step of remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; Reversing the aforementioned disassembly step; The aforementioned multi-step quantum ground state shift with a step size of 2 i To complete the multistep quantum ground state shift of the state amplitude based on, the i+1th qubit (q i+1 ) and reversing it; Tested by, method.

2. If i = N-1, the step size is 2 i To complete the multistep quantum ground state shift of the state amplitude based on, the i+1 qubit (q i+1 The method according to claim 1, comprising setting the quantum circuit by inverting ).

3. If i = N-2, The (i+1)th qubit (q) i+1 Substates where is 0 are considered even substates, and the (i+1)th qubit (q i+1 By considering substates where ) is 1 as odd substates, the first subset is decomposed into even substates to be incremented and odd substates to be incremented, and the second subset is decomposed into even substates to be decremented and odd substates to be decremented; Remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; The (i+1)th qubit (q) i+1 With respect to the adjacent decrement target even substates, the size 2 i+1 The amplitude block is swapped, and the i+1th qubit (q i+1 Regarding ), between adjacent incrementable odd substates, the size is 2 i+1 To swap the amplitude block, the first ansizera qubit (a) of the ancilla register 1 ) is used as a control to control the i+2th qubit (q i+2 ) and reversing it; Reversing the step of remapping the state amplitude of the even substate to be decremented with the state amplitude of the odd substate to be decremented; Reversing the aforementioned disassembly step; The aforementioned step size 2 i To complete the multistep quantum ground state shift of the state amplitude based on, the i+1 qubit (q i+1 ) and reversing it; The method according to claim 1 or 2, comprising setting up the quantum circuit by means of the method.

4. The aforementioned quantum circuits, in order, A starting segment with two CX gates; In some cases, an intermediate segment having multiple CX gates and multiple 2 control gates; A terminal segment having three CX gates and one X gate; The method according to claim 1 or 3, comprising:

5. The two CX gates of the aforementioned starting segment are - The i+1th qubit (q) of the array register i+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; The method according to claim 4, applied in the order of:

6. The three CX gates of the termination segment are - The first ancila qubit (a) of the ancila register 1 ) is used as the control corresponding to state |1>, and the i+2th qubit (q) of the array register is used. i+2 ) CX gate targeting; - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; - The i+1th qubit (q) of the array register i+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; The order in which they are applied is such that the i+1th qubit (q) of the array register is applied. i+1 The method according to claim 5, wherein an X gate is applied to ).

7. The intermediate segment has one or more sets consisting of multiple CX gates and multiple 2-control gates, the number of sets in the intermediate segment depends on the number of recursions in the decomposition step by recursive processing, and the given sets corresponding to a given recursion are, in order, - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The first CX gate uses ) as its target; - The k-th qubit (q) of the array register k ) and the ki-1th ancilla qubit of the ancilla register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i The first two control gates use ) as their target; - The ki-th ancila qubit (a k-i ) is used as the control corresponding to state |1>, and the k+1th qubit (q) of the array register is used. k+1 The second CX gate uses ) as its target; - The k-th qubit (q) of the array register k ) and the ki-1th ancilla qubit of the ancilla register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i A second control gate that uses ) as its target; - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The third CX gate targets ); The method according to any one of claims 4 to 6, wherein the (M+1)th set corresponding to the (M+1)th recursion of the given set is positioned after the first two control gates of the (M)th set corresponding to the (M)th recursion of the given set.

8. Size 2 for at least one additional dimension i The method according to any one of claims 1 to 7, further comprising performing at least one additional multistep quantum ground state shift having

9. The method according to claim 8, wherein the multi-step quantum ground state shift and the at least one additional multi-step quantum ground state shift are performed by sequentially stacking one-dimensional shifts for one dimension and the at least one additional dimension, respectively.

10. The method according to claim 8, wherein the multi-step quantum ground state shift and the at least one additional multi-step quantum ground state shift are performed by changing the qubit order of the corresponding substates in the multi-step quantum ground state shift and the at least one additional multi-step quantum ground state shift using controlled swap blocks for each of the one dimension and the at least one additional dimension, respectively.

11. The method according to any one of claims 1 to 10, comprising executing the quantum algorithm using a quantum circuit that performs the multi-step quantum ground state shift as a subroutine within the quantum algorithm.

12. The method according to claim 11, wherein the quantum algorithm is performed to carry out a simulation of a physical process, and the method further comprises providing the user with measurements obtained after the simulation of the physical process.

13. A quantum computer or quantum simulator configured to perform the method described in any one of claims 1 to 12.

14. A quantum circuit executed by a quantum computer or quantum simulator, wherein the quantum circuit is 2 N+1 It has a shift register and an ancilla register used to perform a multistep quantum ground state shift in a state vector space of size n, the shift register contains N+1 qubits, and the first N qubits (q) of the shift register 1， q 2， ...q N ) forms an array register, and the last qubit (q) of the shift register N+1 ) is a superposition qubit, and the ancilla register has up to N-1 ancilla qubits (a 1 , ...a N-1 ) and the quantum circuit is, in order, A starting segment with two CX gates; Depending on the embodiment, an intermediate segment having a plurality of CX gates and a plurality of 2 control gates; A terminal segment having three CX gates and one X gate; A quantum circuit equipped with these features.

15. In the multi-step quantum ground state shift described above, the step size is 2 i In this case, however, the step index i is a non-negative integer less than N, If i < N-2 or i = N-2, the two CX gates of the starting segment are - The i+1th qubit (q) of the array register i+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; The quantum circuit according to claim 14, applied in the order of:

16. In the multi-step quantum ground state shift described above, the step size is 2 i In this case, however, the step index i is a non-negative integer less than N, If i < N-2 or i = N-2, the three CX gates of the terminal segment are: - The first ancila qubit (a) of the ancila register 1 ) is used as the control corresponding to state |1>, and the i+2th qubit (q) of the array register is used. i+2 ) CX gate targeting; - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; - The i+1th qubit (q) of the array register i+1 ) is used as the control corresponding to state |1>, and the first ancilla qubit (a) of the ancilla register is used. 1 ) CX gate targeting; The order in which they are applied is such that the i+1th qubit (q) of the array register is applied. i+1 The quantum circuit according to claim 14 or 15, wherein an X gate is applied to ).

17. In the multi-step quantum ground state shift described above, the step size is 2 i In this case, however, the step index i is a non-negative integer less than N, If i < N-2, the intermediate segment has one or more sets consisting of multiple CX gates and multiple 2 control gates, the number of sets depends on the number of recursions, the value of k is initially equal to i+1 and is incremented by 1 with each recurrence until it reaches N-1, and the given sets corresponding to a given recurrence are, in order, - The superposition qubit (q) of the shift register N+1 ) is used as the control corresponding to state |1>, and the k-th qubit (q) of the array register is used. k The first CX gate uses ) as its target; ・ The k-th qubit (q k ) of the array register and the (k-i-1)-th ancilla qubit (a k-i-1 ) of the ancilla register are used as controls corresponding to the state |1>, and the first two-control gate that uses the (k-i)-th ancilla qubit (a k-i ) of the ancilla register as a target; - The ki-th ancila qubit (a k-i ) is used as the control corresponding to state |1>, and the k+1th qubit (q) of the array register is used. k+1 The second CX gate uses ) as its target; - The k-th qubit (q) of the array register k ) and the ki-1th ancilla qubit of the ancilla register (a k-i-1 ) is used as the control corresponding to state |1>, and the ki-th ancilla qubit (a k-i A second control gate that uses ) as its target; ・ Use the superposed qubit (q N+1 ) of the shift register as control corresponding to the state |1>, and the k-th qubit (q k ) of the array register as the target for the third CX gate; The quantum circuit according to any one of claims 14 to 16, wherein the (M+1)th set corresponding to the (M+1)th recursion of the given set is positioned after the first two control gates of the (M)th set corresponding to the (M)th recursion of the given set.

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