Display panel

The display panel addresses the inefficiencies in OLEDoS structures by optimizing light extraction and reflectivity through individual light-emitting layers and microcavity structures, enhancing brightness and lifespan for high-resolution displays.

JP2026111489APending Publication Date: 2026-07-03LG DISPLAY CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LG DISPLAY CO LTD
Filing Date
2025-09-25
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Display panels with OLEDoS structures face issues such as reduced light extraction efficiency due to the dielectric layer's thickness and refractive index affecting reflectivity, leading to decreased luminous efficiency and brightness, which is exacerbated by increased current density, resulting in thermal and chemical degradation, and difficulty in achieving high brightness and long-term reliability for virtual and augmented reality devices.

Method used

A display panel design with individual light-emitting layers of varying heights and optimized optical resonance conditions through insulating layer thickness control, along with a microcavity structure, enhances reflectivity and luminous efficiency by improving light extraction and reducing power consumption.

Benefits of technology

The design improves brightness and luminous efficiency, extends the lifespan of the display panel by reducing current density, and ensures balanced light emission characteristics for high-quality images, suitable for ultra-high resolution applications.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a display panel that can improve brightness. [Solutions] The display panel according to the embodiment of the present disclosure improves the reflection efficiency of specific subpixels and also improves brightness by arranging individual light-emitting layers on at least one or more first electrodes and further arranging a common light-emitting layer on the individual light-emitting layers.
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Description

Technical Field

[0001] The present disclosure relates to a display panel capable of improving luminance.

Background Art

[0002] Display devices are configured in a variety of forms such as televisions, monitors, smartphones, tablets, notebook computers, wearable devices, and the like.

[0003] Among display devices that display various information in video, an organic light emitting display (OLED) is a self-emitting element that emits light by itself, has a fast response speed, high luminous efficiency, high luminance, and a large viewing angle, and has advantages in contrast ratio and color reproducibility.

[0004] In recent years, as users' demands for high-quality video have increased, the development of high-resolution display devices has been actively carried out.

Summary of the Invention

Problems to be Solved by the Invention

[0005] In recent years, a head-mounted display device (HMD) including an organic light emitting display device has been developed. A head-mounted display device is a device that a user wears on the head and arranges a display screen in front of the eyes. Head-mounted display devices are used in various application fields such as virtual reality (VR), augmented reality (AR), and mixed reality (MR), and can play an important role in providing an immersive experience for users.

[0006] For example, a display device can be fabricated using OLEDoS (Organic Light-Emitting Diode on Silicon) technology, which involves forming an OLED on a silicon substrate. Typically, OLEDoS allows for the creation of higher resolution and higher density display devices by using silicon wafers instead of glass or plastic substrates.

[0007] Applying a microcavity structure to these OLEDoS-structured display devices can help improve the efficiency of the display device and enhance hue representation. The microcavity structure is a technique that amplifies light of specific wavelengths in organic light-emitting devices to improve color reproduction. The microcavity structure consists of a thin dielectric layer and a reflective layer, and can amplify the light emission efficiency in the OLED structure by resonating and enhancing light of specific wavelengths. For example, in a display device with an OLEDoS structure, the emission wavelength of each subpixel can be controlled by changing the thickness of the insulating layer, which is a dielectric layer placed beneath the white organic light-emitting element (WOLED).

[0008] In other words, a display device having an OLEDoS structure can improve luminous efficiency and color reproduction by using a dielectric layer located between the reflective layer and the anode electrode to form an optical resonance distance. In this case, the dielectric layer can directly affect the optical properties of the device and play a role in adjusting the light emission efficiency in a specific wavelength range. However, these display devices having an OLEDoS structure may have the following problems.

[0009] First, the dielectric layer changes its light reflection properties depending on its thickness and refractive index, which can directly affect the light extraction efficiency of subpixels. For example, in the case of green subpixels, applying a dielectric layer can cause a problem where the reflectivity drops to around 70%. This decrease in reflectivity in these specific subpixels prevents the light emitted by the light-emitting layer from being effectively extracted to the front, significantly reducing the luminous efficiency of the element and ultimately lowering the overall brightness performance of the panel.

[0010] Furthermore, when the luminous efficiency of a display panel decreases in this way, a larger current must be driven to achieve the same brightness. Increased current density can accelerate the thermal or chemical degradation of the internal materials of the element, including the light-emitting layer. This shortens the lifespan of the element and can lead to a deterioration in panel performance during long-term use. In particular, in environments that require long-term operation and high-quality configurations, such as virtual reality and augmented reality devices, these lifespan and reliability issues can lead to a serious decline in quality.

[0011] Furthermore, virtual reality and augmented reality devices require ultra-high resolution, high brightness, high color reproduction, and wide viewing angles. However, the dielectric layer in the OLEDoS structure reduces efficiency, which can make it difficult to achieve high brightness. Moreover, if only the current density is increased without alternatives to improve efficiency, the problem of reduced lifespan may become even more pronounced. Therefore, there is a need to invent a display panel that can achieve the highest performance levels required by virtual reality and augmented reality devices, such as high pixel density, long-term safety, and excellent brightness-to-dark ratio.

[0012] Therefore, the inventors of this specification have invented a display panel that can improve brightness through various experiments.

[0013] The problem to be solved by the embodiments of this disclosure is to provide a display panel that can improve the reflectivity of specific subpixels and also improve brightness.

[0014] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that can ensure optimal reflectivity and luminous efficiency in each sub-pixel.

[0015] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that can increase light extraction efficiency and brightness.

[0016] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that can suppress an increase in thickness by efficiently managing the thickness of the display panel.

[0017] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that can achieve well-balanced light emission characteristics and high-quality images overall.

[0018] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that may be advantageous for realizing ultra-high resolution panels for display devices such as virtual reality devices and augmented reality devices.

[0019] Furthermore, the problem to be solved by the embodiments of this disclosure is to provide a display panel that can prevent deterioration of the light-emitting material in the light-emitting layer and extend the lifespan of the element.

[0020] The problems to be solved by the embodiments of this disclosure are not limited to those mentioned above, and other problems not mentioned can be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0021] A display panel according to an embodiment of the present disclosure includes a substrate including a first sub-pixel, a second sub-pixel, and a third sub-pixel; a reflective electrode disposed on each of the first sub-pixel, the second sub-pixel, and the third sub-pixel; a first electrode disposed on each of the reflective electrodes; individual light-emitting layers disposed on at least one of the first electrodes; a common light-emitting layer disposed on the individual light-emitting layers; and a second electrode disposed on the common light-emitting layer.

[0022] The individual light-emitting layers may include a first individual light-emitting layer, a second individual light-emitting layer, and a third individual light-emitting layer, which are arranged in the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively, so as to have different heights from each other.

[0023] The height of the first individual light-emitting layer, the second individual light-emitting layer, and the third individual light-emitting layer may decrease in this order.

[0024] It further includes a first insulating layer disposed between the reflective electrode of the third sub-pixel and the substrate. The first insulating layer is disposed between the reflective electrode of the second sub-pixel and the first electrode, but may not be disposed in the first sub-pixel.

[0025] The distance between the reflective electrode of the third sub-pixel and the second electrode may be shorter than the distance between the reflective electrode of the first sub-pixel and the second electrode and the distance between the reflective electrode of the second sub-pixel and the second electrode.

[0026] The reflective electrode of the first sub-pixel and the first electrode are in contact with each other. The reflective electrode of the third sub-pixel and the first electrode are in contact with each other. A first insulating layer may be disposed between the reflective electrode of the second sub-pixel and the first electrode.

[0027] It further includes a first bank layer including a first patterning portion where the first individual light-emitting element layer is disposed, a second bank layer including a second patterning portion where the second individual light-emitting element layer is disposed, and a third bank layer including a third patterning portion where the third individual light-emitting element layer is disposed. The depth of the first patterning portion may be deeper than the depth of the second patterning portion and the depth of the third patterning portion.

[0028] It further includes a first insulating layer disposed below the second bank layer and the third bank layer. The first bank layer and the first insulating layer may be disposed in the same layer.

[0029] The individual light-emitting element layer includes a third individual light-emitting element layer disposed in the third sub-pixel. A first insulating layer is disposed between the first electrode and the substrate. A second insulating layer may be disposed between the first electrode and the first insulating layer in the first sub-pixel, and the second insulating layer may be disposed between the first electrode and the reflective electrode in the second sub-pixel.

[0030] The individual light-emitting layer includes a second individual light-emitting layer disposed in the second sub-pixel, wherein a first insulating layer is disposed between the first electrode and the substrate, a second insulating layer is disposed between the first electrode and the first insulating layer in the first sub-pixel, and a second insulating layer is disposed between the first insulating layer and the reflective electrode in the third sub-pixel.

[0031] The individual light-emitting layer includes a first individual light-emitting layer disposed in the first sub-pixel, and a first insulating layer may be disposed between the first electrode of the second sub-pixel and the third sub-pixel and the substrate, a second insulating layer may be disposed between the reflective electrode and the first electrode of the second sub-pixel, and a second insulating layer may be disposed between the first insulating layer and the reflective electrode of the third sub-pixel.

[0032] The individual light-emitting layers include a second individual light-emitting layer and a third individual light-emitting layer, respectively, arranged in the second sub-pixel and the third sub-pixel, having different heights from each other, with a first insulating layer disposed between the first electrode and the substrate, and in the first sub-pixel, a second insulating layer may be disposed between the first electrode and the first insulating layer.

[0033] The individual light-emitting layers include a first individual light-emitting layer and a second individual light-emitting layer, respectively, arranged in the first sub-pixel and the second sub-pixel, having different heights from each other. A first insulating layer is disposed between the first electrodes of the second and third sub-pixels and the substrate, and a second insulating layer may be disposed between the reflective electrode and the first insulating layer in the third sub-pixel.

[0034] The individual light-emitting layers include a first individual light-emitting layer and a third individual light-emitting layer, respectively, arranged in the first sub-pixel and the third sub-pixel, having different heights from each other. A first insulating layer is disposed between the first electrodes of the second sub-pixel and the third sub-pixel and the substrate, and a second insulating layer may be disposed between the first electrode and the reflective electrode of the second sub-pixel.

[0035] A display panel according to an embodiment of the present disclosure includes a substrate including a plurality of subpixels, a reflective electrode disposed on each of the plurality of subpixels, a first electrode disposed on each of the reflective electrodes, individual light-emitting layers disposed on at least one of the first electrodes, a common light-emitting layer disposed on the plurality of subpixels, and a second electrode disposed on the common light-emitting layer, wherein the plurality of subpixels have different distances between the reflective electrodes and the first electrodes, or different heights of the individual light-emitting layers. [Effects of the Invention]

[0036] According to the embodiments of this disclosure, by arranging individual light-emitting layers on at least one or more first electrodes, and further arranging a common light-emitting layer on the individual light-emitting layers, the reflection efficiency of specific subpixels can be improved, and the brightness can also be increased. In this way, according to the embodiments of this disclosure, the brightness of the display panel can be improved, and thus power consumption can be reduced by realizing a low-power display panel.

[0037] Furthermore, according to the embodiments of this disclosure, by adjusting the optical resonance conditions by controlling the thickness of the insulating layer placed on the reflective electrode, and by further arranging individual light-emitting layers on one or more sub-pixels, the light extraction conditions for each sub-pixel can be improved, thereby ensuring the optimal reflectivity and luminous efficiency for each sub-pixel. In this way, according to the embodiments of this disclosure, the optimal reflectivity and luminous efficiency of the display panel can be ensured, thereby realizing a low-power display panel and reducing power consumption.

[0038] Furthermore, according to the embodiments of this disclosure, by forming the first individual light-emitting layer, the second individual light-emitting layer, and the third individual light-emitting layer to have different heights from each other, the light extraction efficiency can be increased by the height difference of the individual light-emitting layers, thereby increasing brightness. In this way, according to the embodiments of this disclosure, the light extraction efficiency of the display panel can be increased and brightness can be increased, thereby realizing a low-power display panel and reducing power consumption.

[0039] Furthermore, according to the embodiments of this disclosure, since some insulating layers can be patterned and individual light-emitting layers can be added to the patterned areas, it is possible to remove some of the multiple insulating layers that were formed to adjust the optical distance, or to simplify them into a single layer, thereby efficiently managing the thickness of the display panel and suppressing an increase in thickness. This minimizes the step difference of the display panel, ensures stable thickness uniformity, and improves brightness.

[0040] Furthermore, according to the embodiments of this disclosure, since individual light-emitting layers can be selectively arranged for each sub-pixel, by considering the light emission characteristics of each sub-pixel, such as spectrum, light extraction efficiency, and lifetime, and providing an optimized structure suited to each color, it is possible to achieve balanced light emission characteristics and high-quality images overall.

[0041] Furthermore, according to the embodiments of this disclosure, the improved light extraction efficiency and thickness control technology can further increase pixel density and minimize interference between pixels, which may be advantageous for realizing ultra-high-resolution panels for display devices such as virtual reality and augmented reality devices.

[0042] Furthermore, according to the embodiments of this disclosure, efficiency is improved, and when the same brightness is achieved, the required current can be reduced, thereby decreasing the current density. This prevents degradation of the light-emitting material in the light-emitting layer and extends the lifespan of the element. Thus, according to the embodiments of this disclosure, the lifespan of the element in the display panel can be improved, and by realizing a low-power display panel, power consumption can be reduced.

[0043] The effects described above, as well as the specific effects of the present invention, will be explained and described below in the following descriptions of embodiments for carrying out the invention. [Brief explanation of the drawing]

[0044] [Figure 1] This is a schematic plan view of the display panel. [Figure 2]This is a cross-sectional view of the I-I' region in Figure 1 according to the first embodiment. [Figure 3] Figure 2 is a diagram illustrating the layered structure of the elements in the display panel. [Figure 4] This is a cross-sectional view of the I-I' region in Figure 1 according to the second embodiment. [Figure 5] Figure 4 is a diagram illustrating the layered structure of the elements in the display panel. [Figure 6] This is a cross-sectional view of the I-I' region in Figure 1 according to the third embodiment. [Figure 7] This is a cross-sectional view of the I-I' region in Figure 1 according to the fourth embodiment. [Figure 8] This is a cross-sectional view of the I-I' region in Figure 1 according to the fifth embodiment. [Figure 9] This is a cross-sectional view of the I-I' region in Figure 1 according to the sixth embodiment. [Figure 10] This is a cross-sectional view of the I-I' region in Figure 1 according to the seventh embodiment. [Figure 11] This is a cross-sectional view of the I-I' region in Figure 1 according to the 8th embodiment. [Figure 12] This figure compares the electroluminescence spectra of each subpixel in the first and second embodiments. [Figure 13] This figure compares the electroluminescence spectra of each subpixel in the first and second embodiments. [Figure 14] This figure compares the electroluminescence spectra of each subpixel in the first and second embodiments. [Figure 15] This graph shows a comparison of the optical efficiency of each sub-pixel in the first and second embodiments. [Modes for carrying out the invention]

[0045] The advantages and features of this disclosure, and the methods for achieving them, will become clearer with reference to the examples described below in detail, along with the accompanying drawings. However, this disclosure is not limited to the examples disclosed below, but can be configured in a variety of different forms. These examples are provided to complete the disclosure and to fully inform a person ordinary skill in the art to which this disclosure pertains, and this disclosure is defined only by the scope of the claims.

[0046] The shapes, sizes, proportions, angles, and quantities depicted in the drawings to illustrate embodiments of this disclosure are illustrative, and this disclosure is not limited to those shown. The same reference numerals throughout the disclosure refer to the same component. Furthermore, in describing this disclosure, if specific descriptions of relevant known technology are deemed to obscure the gist of this disclosure, such details are omitted. Where "includes," "possesses," "becomes," etc., used in this disclosure, other parts may be added unless "only" is used. When a component is described singularly, it includes multiple components unless otherwise explicitly stated.

[0047] In interpreting the constituent elements, even if not explicitly stated elsewhere, they shall be interpreted as including a margin of error.

[0048] When describing the positional relationship between two parts, for example, using phrases like "on top of," "above," "below," or "to the side," it is acceptable for one or more other parts to be located between the two parts, unless "immediately" or "directly" is used.

[0049] When describing temporal relationships, for example, when describing the sequence of events using phrases such as "after," "following," "next," or "before," it is acceptable to include cases that are not consecutive, unless "immediately" or "directly" is used.

[0050] While terms such as "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are simply used to distinguish one component from another. Therefore, the first component referred to below may also be the second component within the technical concept of this disclosure.

[0051] The features of some of the embodiments of this disclosure can be combined or linked together in part or as a whole, enabling various technical interdependencies and drives, and each embodiment can be implemented independently of others or in conjunction with others.

[0052] In the following, with reference to Figure 1, a display panel and display device according to one embodiment of the present disclosure will be described in detail. The display device described later will be described as an Organic Light Emitting Diodes Display Device as an example, but will not be limited to this.

[0053] The display panel 10 may include a substrate 100 that includes a display area (DA) and a non-display area (NDA) surrounding the display area (DA). The display panel 10 may also include a substrate 100, a source-driven integrated circuit (IC) 103, a flexible film 102, a circuit board 104, and a timing control unit 105.

[0054] The display area (DA) on the substrate 100 may include a plurality of sub-pixels (SP1, SP2, SP3) formed in areas demarcated by the intersection of a plurality of data wirings extending in a first direction and a plurality of gate wirings extending in a second direction intersecting the first direction. The first direction described in this disclosure is the X-axis direction, the second direction is the Y-axis direction, and the Z-axis direction may be perpendicular to the X and Y axes. Furthermore, although this disclosure describes in one embodiment that one pixel (P) is composed of a first sub-pixel (SP1), a second sub-pixel (SP2), and a third sub-pixel (SP3), it is not limited thereto, and one pixel (P) may further include additional sub-pixels.

[0055] Each subpixel (SP1, SP2, SP3) may be configured to emit light of the same color, such as white light, or to emit light of different colors, such as red, green, or blue light. In one embodiment, the first subpixel (SP1) is a red subpixel representing red light, the second subpixel (SP2) is a green subpixel representing green light, and the third subpixel (SP3) is a blue subpixel representing blue light. Multiple subpixels (SP1, SP2, SP3) may be arranged in a matrix with multiple rows and columns. As an example, multiple subpixels may be formed in a stripe structure in which each subpixel is arranged in a straight line vertically or horizontally.

[0056] A gate drive unit 101 may be located in the non-display area (NDA) on the substrate 100, on one or both sides of the display area (DA). The gate drive unit 101 can be configured in a gate-in-panel (GIP) manner. The gate drive unit 101 can supply gate signals to the gate lines in response to gate control signals input from the timing control unit 105.

[0057] The source-driven integrated circuit 103 may receive digital video data and source control signals from the timing control unit 105. The source-driven integrated circuit 103 can convert the digital video data into analog data voltages according to the source control signals and supply them to the data lines. The source-driven integrated circuit 103 can be manufactured using a COF (chip on film) or COP (chip on plastic) drive chip and mounted on multiple flexible films 102. The circuit board 104 may be attached to multiple flexible films 102. The circuit board 104 may have numerous circuits mounted on it, each consisting of a drive chip such as the timing control unit 105.

[0058] The timing control unit 105 may receive digital video data and timing signals from an external system board via a cable on the circuit board 104. Based on the timing signals, the timing control unit 105 can supply gate control signals to control the operating timing of the gate drive unit 101 and source control signals to control the source drive integrated circuit 103.

[0059] In the following, the laminated structure of the display panel 10 according to the first embodiment will be described based on cross-sectional views, with further reference to Figures 2 and 3.

[0060] The substrate 100 may be made of glass or a plastic such as polyimide, but is not limited to these, and may be made of a semiconductor material such as a silicon wafer. For example, the substrate 100 may be a single-crystal silicon wafer formed by growing single-crystal silicon (Si), but may also be a wafer composed of various semiconductor materials. In the following, an OLEDoS (OLED on Si wafer) structure in which a common light-emitting layer 134 containing an organic light-emitting element is arranged on a silicon wafer substrate 100 will be described as one embodiment, but is not limited to this.

[0061] A circuit section 110 may be arranged on the substrate 100. A circuit section 110 may be arranged on each sub-pixel (SP1, SP2, SP3) included in the display panel 10. The circuit section 110 can be electrically connected to the light-emitting layer arranged on the circuit section 110. As an example, the circuit section 110 may include various circuit-related elements, such as gate wiring, data wiring, thin-film transistors, and storage capacitors. The thin-film transistors may include, but are not limited to, switching thin-film transistors, driving thin-film transistors, and sensing thin-film transistors, and may also include complementary metal oxide semiconductor (CMOS) transistors.

[0062] The display panel 10 may further include a circuit section insulating layer 112, a first reflective electrode 121, a first insulating layer 125a, a second reflective electrode 122, a second insulating layer 125b, and a third reflective electrode 123, which are arranged on the circuit section 110.

[0063] The circuit section insulating layer 112, the first insulating layer 125a, and the second insulating layer 125b may each be formed from a single or multiple layer of an inorganic film such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide, but are not limited thereto, and may also be formed from a single or multiple layer of an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0064] The first reflecting electrode 121, the second reflecting electrode 122, and the third reflecting electrode 123 may contain a metallic substance with high reflectivity, and for example, they may be made of silver (Ag) or a metallic substance containing silver (Ag), but are not limited thereto.

[0065] A circuit section insulating layer 112 may be placed on top of the circuit section 110 so as to cover the entire surface of the substrate 100. A first reflective electrode 121 may be placed on the first sub-pixel (SP1) on the circuit section insulating layer 112. That is, each of the multiple first sub-pixels (SP1) may have its own first reflective electrode 121.

[0066] A first insulating layer 125a may be placed on top of the first reflective electrode 121 so as to cover the entire surface of the substrate 100. A second reflective electrode 122 may be placed on the second sub-pixel (SP2) on the first insulating layer 125a. That is, each of the multiple second sub-pixels (SP2) may have its own second reflective electrode 122.

[0067] A second insulating layer 125b may be placed above the second reflective electrode 122 so as to cover the entire surface of the substrate 100. A third reflective electrode 123 may be placed on the third sub-pixel (SP3) on the second insulating layer 125b. That is, each of the multiple third sub-pixels (SP3) may have its own third reflective electrode 123.

[0068] A first electrode 131 may be placed on each of the first reflective electrode 121, second reflective electrode 122, and third reflective electrode 123 arranged in this manner. That is, each of the multiple subpixels may have a first electrode 131. The first electrode 131 is electrically connected to the common light-emitting layer 134, which will be described later, and can function as an anode electrode. For example, the first electrode 131 may contain a transparent conductive material or a semi-transparent metallic material, but is not limited to these.

[0069] The first electrode 131, which is positioned on the third reflective electrode 123, may, but is not limited to, being in direct contact with the third reflective electrode 123. For example, a third insulating layer may be further positioned between the third reflective electrode 123 and the first electrode 131, with the third reflective electrode 123 and the first electrode 131 being positioned so as to cover the entire surface of the substrate 100, and the third reflective electrode 123 and the first electrode 131 not being in contact with each other but separated by a predetermined distance.

[0070] The first electrodes 131, positioned between adjacent subpixels, may be positioned spaced apart from each other. A bank layer 132 may be positioned on the first electrodes 131. The bank layer 132 is formed to cover the ends of the first electrodes 131, thereby preventing current from concentrating at the ends of the first electrodes 131. The bank layer 132 may consist of a single layer or multiple layers of an insulating material made of an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited to this. The bank layer 132 may also be made of an organic material, and may include, for example, a material made of polyimide, acrylic, or benzocyclobutene resin. The bank layer 132 may also consist of a black bank containing a black material. The bank layer 132 may also be named a fence.

[0071] A trench portion 128 may be formed between bank layers 132 at the boundary between adjacent subpixels. The trench portion 128 may be formed by removing a portion of the insulating layer. For example, the trench portion 128 may be formed as a recessed groove that penetrates the second insulating layer 125b and is drawn downwards to have a predetermined left-right width and height in the first insulating layer 125a. The trench portion 128 may be formed at the boundary between a plurality of adjacent subpixels.

[0072] A common light-emitting layer 134 may be placed on the first electrode 131. The common light-emitting layer 134 may consist of a single stack. However, it is not limited to this, and the common light-emitting layer 134 may be a tandem structure in which two stacks, including a first stack, a charge generation layer (CGL), and a second stack, are stacked, or a tandem structure in which three or more stacks are stacked.

[0073] When the common light-emitting layer 134 is a single stack, the common light-emitting layer 134 may include a hole injection layer (HIL), a hole transport layer (HTL), an emission material layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL).

[0074] If the common light-emitting layer 134 includes a first stack, a charge generation layer, and a second stack, the first stack includes a hole injection layer (HIL), a hole transport layer (HTL), an electron-emitting material layer (EML), and an electron transport layer (ETL), and the electron-emitting material layer (EML) of the first stack can emit one of red light, green light, blue light, or yellow light. The charge generation layer may include a negative-type (N-type) charge generation layer for supplying electrons to the first stack and a positive-type (P-type) charge generation layer for supplying holes to the second stack. The second stack includes a hole transport layer (HTL), an electron-emitting material layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL), and the electron-emitting material layer (EML) of the second stack can emit one of red light, green light, blue light, or yellow light. The luminescent material layer (EML) of the first stack and the luminescent material layer (EML) of the second stack emit light of different hues, so that the common light-emitting layer 134, including the first and second stacks, can emit white light.

[0075] The common light-emitting layer 134, which is placed on the first electrode 131, includes a bank layer 132 and may be formed over the entire surface of the substrate 100 so as to cover adjacent subpixels. In this case, the common light-emitting layer 134 may be placed to fill the trench portion 128. A void portion 137 having a hollow form may be formed inside the common light-emitting layer 134 in the trench portion 128. The void portion 137 can serve to break the horizontal connection of the charge generation layers (CGLs) placed in a plurality of adjacent subpixels. By forming the void portion 137 in the trench portion 128 in this way, the generation of lateral leakage currents that may occur due to short circuits of the charge generation layers (CGLs) between adjacent subpixels can be reduced.

[0076] A second electrode 135 may be disposed on the common light-emitting layer 134. The second electrode 135 may be formed over the entire surface of the substrate 100 so as to be connected in common with the common light-emitting layer 134 which is formed to cover all subpixels. Thus, the second electrode 135 can also be named a common electrode. The second electrode 135 can be electrically connected to the common light-emitting layer 134 and function as a cathode electrode. For example, the second electrode 135 may contain, but is not limited to, a transparent conductive material or a semi-transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0077] A sealing layer 139 that blocks external moisture and oxygen may be formed on the second electrode 135. The sealing layer 139 may contain an inorganic insulating film such as silicon oxide (SiOx) or silicon nitride (SiNx) or an organic insulating film such as acrylic resin or epoxy resin, and may be formed from a single layer or multiple layers.

[0078] Color filter layers (CF1, CF2, CF3) may be arranged on the sealing layer 139. For example, the color filter layers may include a red first color filter layer (CF1) provided on the first sub-pixel (SP1), a green second color filter layer (CF2) provided on the second sub-pixel (SP2), and a blue third color filter layer (CF3) provided on the third sub-pixel (SP3). For example, the first color filter layer (CF1) may contain a red pigment or red dye, the second color filter layer (CF2) may contain a green pigment or green dye, and the third color filter layer (CF3) may contain a blue pigment or blue dye. The color filter layers may be made of an organic material having a relatively high transmittance.

[0079] A common light-emitting layer 134 according to one embodiment of the present disclosure can be configured to emit white light. Therefore, in the first sub-pixel (SP1), only red light is transmitted as the white light emitted by the common light-emitting layer 134 passes through the first color filter (CF1); in the second sub-pixel (SP2), only green light is transmitted as the white light emitted by the common light-emitting layer 134 passes through the second color filter (CF2); and in the third sub-pixel (SP3), only blue light is transmitted as the white light emitted by the common light-emitting layer 134 passes through the third color filter (CF3).

[0080] A planarization layer 160 may be placed on the color filter layers (CF1, CF2, CF3). The planarization layer 160 may be made of an organic material. A cover layer 164 may be placed on the planarization layer 160. For example, the cover layer 164 may be a cover glass made of glass material. The cover layer 164 may be placed on the planarization layer 160 by an adhesive layer 162.

[0081] The first reflective electrode 121, the second reflective electrode 122, and the third reflective electrode 123 can reflect light emitted from the common light-emitting layer 134 upward towards where the second electrode 135 is located. That is, light emitted from the common light-emitting layer 134 can be reflected and reinforced by interference between the second electrode 135 and the first reflective electrode 121, the second reflective electrode 122, and the third reflective electrode 123, and then passed through the second electrode 135 and emitted to the outside.

[0082] Since the first reflective electrode 121, the second reflective electrode 122, and the third reflective electrode 123 are arranged in different layers, the separation distances from the first reflective electrode 121, the second reflective electrode 122, and the third reflective electrode 123 to the second electrode 135 may be set differently for subpixels that represent different colors.

[0083] For example, the first distance, which is the distance between the first reflective electrode 121 and the second electrode 135, may be greater than the second distance, which is the distance between the second reflective electrode 122 and the second electrode 135, and the second distance, which is the distance between the second reflective electrode 122 and the second electrode 135, may be greater than the third distance, which is the distance between the third reflective electrode 123 and the second electrode 135. By shaping the first, second, and third distances to be different in this way, it is possible to extract light of different colors using microcavity characteristics.

[0084] Specifically, the longer the distance between the reflective electrode and the second electrode 135, the better the efficiency of extracting long-wavelength light, thus improving the efficiency of extracting red light between the first reflective electrode 121 and the second electrode 135. Conversely, the shorter the distance between the reflective electrode and the second electrode 135, the better the efficiency of extracting short-wavelength light, thus improving the efficiency of extracting blue light between the third reflective electrode 123 and the second electrode 135. Furthermore, since the distance between the second reflective electrode 122 and the second electrode 135 is shorter than the distance between the first reflective electrode 121 and the second electrode 135, and longer than the distance between the third reflective electrode 123 and the second electrode 135, the efficiency of extracting green light can be improved.

[0085] Referring to Figure 3, an insulating layer 125 including a first insulating layer 125a and a second insulating layer 125b may be formed between the first reflective electrode 121 and the first electrode 131. An insulating layer 125 including a second insulating layer 125b may be formed between the second reflective electrode 122 and the first electrode 131. Therefore, the height of the insulating layer 125 formed between the second reflective electrode 122 and the first electrode 131 may be lower than the height of the insulating layer 125 formed between the first reflective electrode 121 and the first electrode 131. Neither the first insulating layer 125a nor the second insulating layer 125b may be formed between the third reflective electrode 123 and the first electrode 131, and the third reflective electrode 123 and the first electrode 131 may be in contact with each other.

[0086] As a result, according to the present invention, by applying a microcavity structure to the display panel 10 to cause light emission, the light extraction efficiency of red light is improved in the first sub-pixel (SP1), causing red light to be emitted; the light extraction efficiency of green light is improved in the second sub-pixel (SP2), causing green light to be emitted; and the light extraction efficiency of blue light is improved in the third sub-pixel (SP3), causing blue light to be emitted.

[0087] In the following, the laminated structure of the display panel 10 according to various embodiments will be described based on cross-sectional views, with further reference to Figures 4 to 11. In the case of the laminated structure of the display panel 10 according to the various embodiments described below, the differences from the laminated structure of the display panel 10 according to the first embodiment described above will be the main focus of the explanation. Therefore, in the following, where explanations are omitted, the explanation of the display panel 10 according to the first embodiment can be applied similarly.

[0088] The display panel 10 may further include individual light-emitting layers disposed on at least one or more first electrodes 131. A common light-emitting layer 134 may be disposed on the individual light-emitting layers, and a second electrode 135 may be disposed on the common light-emitting layer 134.

[0089] Referring to Figures 4 and 5, the display panel 10 according to the second embodiment may include a first individual light-emitting layer 133a, a second individual light-emitting layer 133b, and a third individual light-emitting layer 133c, which are arranged in the first sub-pixel (SP1), second sub-pixel (SP2), and third sub-pixel (SP3), respectively, so as to have different heights from each other. In this case, the heights may decrease in the order of the first individual light-emitting layer 133a, the second individual light-emitting layer 133b, and the third individual light-emitting layer 133c. That is, the height of the first individual light-emitting layer 133a may be the highest, and the height of the third individual light-emitting layer 133c may be the lowest.

[0090] For example, the first individual light-emitting element layer 133a may include a hole injection layer (HIL), a hole transport layer (HTL), a red light-emitting material layer (R-EML), and an electron transport layer (ETL), and may be an element that emits red light. The second individual light-emitting element layer 133b may include a hole injection layer (HIL), a hole transport layer (HTL), a green light-emitting material layer (G-EML), and an electron transport layer (ETL), and may be an element that emits green light. The third individual light-emitting layer 133c may include a hole injection layer (HIL), a hole transport layer (HTL), a blue light-emitting material layer (R-EML), and an electron transport layer (ETL), and may be a blue light-emitting element.

[0091] A first reflective electrode 121 may be placed on the circuit section insulating layer 112 corresponding to the first sub-pixel (SP1). A first electrode 131 may be placed on the first reflective electrode 121, and the first electrode 131 may be placed in contact with the first reflective electrode 121. Therefore, a separate insulating layer does not need to exist between the first reflective electrode 121 and the first electrode 131. A first bank layer 132a may be placed on the first electrode 131. The first bank layer 132a is formed to cover the end of the first electrode 131 and can form a boundary with other adjacent sub-pixels. The first bank layer 132a may be formed to cover the end of the first reflective electrode 121 which is placed below the first electrode 131. Furthermore, the first bank layer 132a that covers the end of the first reflective electrode 121 and extends outside the first reflective electrode 121 may be placed on the circuit section insulating layer 112. Therefore, the first bank layer 132a and the first reflective electrode 121 may be arranged on the same layer on the circuit section insulating layer 112. Also, the first bank layer 132a and the first reflective electrode 121 may be in contact with the circuit section insulating layer 112.

[0092] On the other hand, a second reflective electrode 122 may be placed on the circuit section insulating layer 112 corresponding to the second sub-pixel (SP2). A first insulating layer 125a may be placed on the second reflective electrode 122. The first insulating layer 125a may be formed to extend to the third sub-pixel (SP3). That is, the first insulating layer 125a may be placed in the region corresponding to the second sub-pixel (SP2) and the third sub-pixel (SP3), but not in the region corresponding to the first sub-pixel (SP1). Therefore, the first insulating layer 125a and the first bank layer 132a placed on the circuit section insulating layer 112 may be placed on the same layer. A first electrode 131 may be placed on the first insulating layer 125a corresponding to the second sub-pixel (SP2), and a second bank layer 132b may be placed on the first electrode 131. The second bank layer 132b is formed to cover the end of the first electrode 131 and can form a boundary with other adjacent subpixels. The second bank layer 132b and the first electrode 131 corresponding to the second subpixel (SP2) may be in contact with the first insulating layer 125a. Thus, the first insulating layer 125a may be placed between the second reflective electrode 122 and the first electrode 131 of the second subpixel (SP2).

[0093] A first insulating layer 125a may be placed on the circuit insulating layer 112 corresponding to the third sub-pixel (SP3). A third reflective electrode 123 may be placed on the first insulating layer 125a corresponding to the third sub-pixel (SP3). A first electrode 131 may be placed on the third reflective electrode 123, and the first electrode 131 may be placed in contact with the third reflective electrode 123. Therefore, a separate insulating layer does not need to exist between the third reflective electrode 123 and the first electrode 131. A third bank layer 132c may be placed on the first electrode 131 corresponding to the third sub-pixel (SP3). The third bank layer 132c is formed to cover the end of the first electrode 131 and can form a boundary with other adjacent sub-pixels. The third bank layer 132c may be formed to cover the end of the third reflective electrode 123 located below the first electrode 131. Furthermore, the third bank layer 132c, which covers the end of the third reflective electrode 123 and extends outside the third reflective electrode 123, may be placed on the first insulating layer 125a.

[0094] The third bank layer 132c and the second bank layer 132b may be arranged on the same layer on the first insulating layer 125a. Also, the third reflective electrode 123 and the first electrode 131 corresponding to the second sub-pixel (SP2) may be arranged on the same layer on the first insulating layer 125a. Therefore, the third bank layer 132c, the second bank layer 132b, the third reflective electrode 123, and the first electrode 131 corresponding to the second sub-pixel (SP2) may all be arranged on the same layer on the first insulating layer 125a. Furthermore, the third bank layer 132c and the third reflective electrode 123 may be in contact with the first insulating layer 125a.

[0095] The distance between the third reflective electrode 123 of the third sub-pixel (SP3) and the second electrode 135 may be shorter than the distance between the first reflective electrode 121 of the first sub-pixel (SP1) and the second electrode 135, and the distance between the second reflective electrode 122 of the second sub-pixel (SP2) and the second electrode 135.

[0096] First patterning sections 136a, second patterning section 136b, and third patterning section 136c may be formed inside the first bank layer 132a, second bank layer 132b, and third bank layer 132c, respectively. The height of the first bank layer 132a may be greater than the height of the second bank layer 132b and the height of the third bank layer 132c. For example, the sum of the height of the first insulating layer 125a and the height of the second bank layer 132b, and the sum of the height of the first insulating layer 125a and the height of the third bank layer 132c can substantially coincide with the height of the first bank layer 132a.

[0097] Furthermore, the depth of the first patterning section 136a may be formed to be greater than the depth of the second patterning section 136b and the depth of the third patterning section 136c. The first patterning section 136a, the second patterning section 136b, and the third patterning section 136c may each contain a first individual light-emitting layer 133a, a second individual light-emitting layer 133b, and a third individual light-emitting layer 133c, respectively. The first individual light-emitting layer 133a, the second individual light-emitting layer 133b, and the third individual light-emitting layer 133c may be formed by various patterning processes such as the FMM (Fine Metal Mask) method, the inkjet printing method, and the photo process.

[0098] Since the depths of the first patterning portion 136a, the second patterning portion 136b, and the third patterning portion 136c are different from each other, the heights of the first individual light-emitting layer 133a, the second individual light-emitting layer 133b, and the third individual light-emitting layer 133c may also be formed to be different from each other. In this case, the heights of the upper ends of the first individual light-emitting layer 133a, the second individual light-emitting layer 133b, and the third individual light-emitting layer 133c may be formed to be the same as each other. On the other hand, although the depths of the second patterning portion 136b and the third patterning portion 136c may be formed substantially similarly, in the case of the second sub-pixel (SP2), only the first electrode 131 is located on the first insulating layer 125a, whereas in the case of the third sub-pixel (SP3), not only the first electrode 131 but also the third reflective electrode 123 is located on the first insulating layer 125a. Therefore, the height at which the third individual light-emitting element layer 133c may be formed may be substantially less than the height at which the second individual light-emitting element layer 133b may be formed.

[0099] Referring to Figure 5, an insulating layer is not formed between the first reflective electrode 121 and the first electrode 131, and the first reflective electrode 121 and the first electrode 131 may be in contact with each other. A first individual light-emitting layer 133a may be placed on the first electrode 131 on the first reflective electrode 121. A first insulating layer 125a may be placed between the second reflective electrode 122 and the first electrode 131. The first electrode 131 may be placed on the first insulating layer 125a on the second reflective electrode 122, and a second individual light-emitting layer 133b may be placed on the first electrode 131. An insulating layer is not formed between the third reflective electrode 123 and the first electrode 131, and the third reflective electrode 123 and the first electrode 131 may be in contact with each other. A third individual light-emitting layer 133c may be placed on the first electrode 131 on the third reflective electrode 123.

[0100] As described above, according to the embodiments of this disclosure, by arranging individual light-emitting layers on at least the first electrode, and further arranging a common light-emitting layer on the individual light-emitting layers, it is possible to improve the reflection efficiency of a specific subpixel and also improve its brightness.

[0101] Furthermore, according to the embodiments of this disclosure, by adjusting the optical resonance conditions through control of the thickness of the insulating layer placed on the reflective electrode, and by further arranging individual light-emitting layers for each sub-pixel, the light extraction conditions for each sub-pixel can be improved. This ensures optimal reflectivity and luminous efficiency for each sub-pixel.

[0102] Referring to Figures 12 to 14, these compare the electroluminescence spectra (EL spectra) of each sub-pixel in the first and second embodiments as relative values. Figure 12 compares the electroluminescence spectra of the first sub-pixel, confirming that the brightness in the second embodiment is improved compared to the first embodiment. Figure 13 compares the electroluminescence spectra of the second sub-pixel, confirming that the brightness in the second embodiment is significantly improved compared to the first embodiment. Figure 14 compares the electroluminescence spectra of the third sub-pixel, confirming that the brightness in the second embodiment is improved compared to the first embodiment.

[0103] The optical efficiency of each sub-pixel may differ depending on the optical distance, which is adjusted by the position of the light-emitting layer between the reflective electrode and the second electrode, which is the cathode electrode. In the second embodiment, it can be confirmed that the brightness improvement effect is even greater by adjusting the optical distance so that the second sub-pixel has a relatively higher optical efficiency than the first and third sub-pixels.

[0104] As a result, in the embodiment of this disclosure, it can be confirmed that the brightness of subpixels of all hues is improved by patterning a portion of the insulating layer for each subpixel and further arranging individual light-emitting layers in addition to the common light-emitting layer.

[0105] Furthermore, Figure 15 is a graph showing a relative comparison of the light efficiency of the first and second embodiments for each sub-pixel. As can be seen from Figure 15, it can be confirmed that the luminous efficiency of the second embodiment is higher than that of the first embodiment for the first, second, and third sub-pixels. In particular, for the second sub-pixel which represents green, it can be confirmed that the light efficiency is even more significantly improved than that of the first and third sub-pixels which represent other hues.

[0106] As a result, in the second embodiment, it can be clearly confirmed that not only the brightness but also the light efficiency of all subpixels is improved compared to the first embodiment, and in particular, the improvement effect in the second subpixel that expresses green is even more noticeable. Therefore, according to the second embodiment, not only the brightness but also the light efficiency of each subpixel can be maximized by further arrangement of individual light-emitting layers.

[0107] Furthermore, according to the embodiments of this disclosure, by forming the first individual light-emitting layer, the second individual light-emitting layer, and the third individual light-emitting layer to have different heights from each other, the light extraction efficiency can be increased and the brightness increased by the height difference of the individual light-emitting layers.

[0108] Furthermore, according to the embodiments of this disclosure, since some insulating layers can be patterned and individual light-emitting layers can be added to the patterned areas, it is possible to remove some of the multiple insulating layers that were formed to adjust the optical distance, or to simplify them into a single layer, thereby efficiently managing the thickness of the display panel and suppressing an increase in thickness. This makes it possible to minimize the step difference of the display panel and improve brightness while ensuring stable thickness uniformity.

[0109] For example, referring to Figure 3, the stacked structure of the elements of the display panel according to the first embodiment can be compared with referring to Figure 5, the stacked structure of the elements of the display panel according to the second embodiment. Referring to Figure 3, in the case of the first embodiment, an insulating layer 125 having a thickness equal to the combined thickness of the first insulating layer 125a and the second insulating layer 125b, or an insulating layer 125 having the thickness of the second insulating layer 125b, is placed between the reflective electrode and the first electrode 131 for each sub-pixel. In contrast, referring to Figure 5, in the case of the second embodiment, when an individual light-emitting element layer is formed for each sub-pixel, the insulating layer is either completely removed or only a portion of the insulating layer remains together with the first insulating layer 125a when the individual light-emitting element layer is formed. Therefore, an individual light-emitting element layer can be added without increasing the thickness of the display panel.

[0110] In other words, in the first embodiment, a double insulating layer was formed to adjust the optical distance for obtaining the microcavity effect in the OLEDoS structure, but in the second embodiment, the optical distance can be adjusted by simply removing one insulating layer and forming a single insulating layer on only some of the subpixels. In this case, the optical distance can be adjusted by adjusting the thickness of the individual light-emitting layer added to each subpixel in place of the insulating layer.

[0111] Furthermore, according to the embodiments of this disclosure, as the insulating layer placed between the reflective electrode and the first electrode 131 is simplified from a double layer to a single layer, the number of insulating layers placed between the circuit section 110 and the first electrode 131 also decreases. Therefore, the number of contact holes required to electrically connect the circuit section 110 and the first electrode 131 can be reduced by at least one further. In this way, as the number of contact holes formed in the insulating layer decreases, the advantageous effect of increasing the aperture ratio of the display panel 10 can be obtained.

[0112] The display panel described above can be applied to various display devices. For example, the display panel 10 according to the embodiment of this disclosure may be included in a head-mounted display device. A head-mounted display device can provide the user with images representing virtual reality (VR) or augmented reality (AR). Therefore, according to the embodiment of this disclosure, the improved light extraction efficiency and thickness control technology can further increase pixel density and minimize interference between pixels, which may be advantageous for realizing ultra-high-resolution panels for display devices such as virtual reality devices and augmented reality devices.

[0113] On the other hand, the display panel 10 according to the embodiments of this disclosure can be configured in various embodiments as follows. For example, in the third to eighth embodiments described below, individual light-emitting layers can be selectively arranged for each sub-pixel.

[0114] Referring to Figure 6, in the case of the display panel 10 according to the third embodiment, a third individual light-emitting element layer may be arranged on the third sub-pixel (SP3). In this case, separate individual light-emitting elements do not need to be arranged on the first sub-pixel (SP1) and the second sub-pixel (SP2). Also, a first insulating layer 125a may be arranged on the substrate 100 corresponding to the first sub-pixel (SP1), the second sub-pixel (SP2), and the third sub-pixel (SP3). In this case, a first reflective electrode 121 may be arranged between the circuit section insulating layer 112 and the first insulating layer 125a for the first sub-pixel (SP1). Furthermore, for the second sub-pixel (SP2) and the third sub-pixel (SP3), a second reflective electrode 122 and a third reflective electrode 123 may be arranged on the first insulating layer 125a, respectively. A second insulating layer 125b may be arranged on the first sub-pixel (SP1) and the second sub-pixel (SP2).

[0115] A first electrode 131 may be placed on the second insulating layer 125b of the first sub-pixel (SP1), and a first bank layer 132a may also be placed thereon. Therefore, in the case of the first sub-pixel (SP1), the first insulating layer 125a and the second insulating layer 125b may be placed between the first reflective electrode 121 and the first electrode 131. A first electrode 131 may be placed on the second insulating layer 125b of the second sub-pixel (SP2), and a second bank layer 132b may be placed on the first electrode 131. Therefore, in the case of the second sub-pixel (SP2), the second insulating layer 125b may be placed between the second reflective electrode 122 and the first electrode 131. A first electrode 131 may be placed in contact with the third reflective electrode 123 of the third sub-pixel (SP3), and a third bank layer 132c including a third patterning portion 136c may be placed on the first electrode 131. Therefore, the third bank layer 132c may be formed on the same layer as the second insulating layer 125b and the first insulating layer 125a. A third individual light-emitting element layer 133c may be formed on the third patterning portion 136c.

[0116] Thus, according to the third embodiment, if the display panel 10 lacks sufficient blue light characteristics, the brightness of the blue light can be improved by further arranging a third individual light-emitting element layer 133c on the third sub-pixel (SP3) that represents blue light, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0117] Referring to Figure 7, in the case of the display panel 10 according to the fourth embodiment, a second individual light-emitting element layer 133b may be placed on the second sub-pixel (SP2). In this case, separate individual light-emitting elements do not need to be placed on the first sub-pixel (SP1) and the third sub-pixel (SP3). Also, a first insulating layer 125a may be placed on the substrate 100 corresponding to the first sub-pixel (SP1), the second sub-pixel (SP2), and the third sub-pixel (SP3). In this case, a first reflective electrode 121 and a second reflective electrode 122 may be placed between the circuit section insulating layer 112 and the first insulating layer 125a, respectively, for the first sub-pixel (SP1) and the second sub-pixel (SP2). A second insulating layer 125b may be placed on the first insulating layer 125a of the first sub-pixel (SP1) and the third sub-pixel (SP3).

[0118] A first electrode 131 may be placed on the second insulating layer 125b of the first sub-pixel (SP1), and a first bank layer 132a may also be placed thereon. Therefore, in the case of the first sub-pixel (SP1), a first insulating layer 125a and a second insulating layer 125b may be placed between the first reflective electrode 121 and the first electrode 131. A third reflective electrode 123 may be placed on the second insulating layer 125b of the third sub-pixel (SP3). A first electrode 131 may be placed in contact with the third reflective electrode 123, and a third bank layer 132c may be placed on the first electrode 131. A first electrode 131 may be placed on the first insulating layer 125a of the second sub-pixel (SP2). Therefore, in the case of the second sub-pixel (SP2), a first insulating layer 125a may be placed between the second reflective electrode 122 and the first electrode 131. A second bank layer 132b having a second patterned portion 136b may be disposed on the first electrode 131. Therefore, the second bank layer 132b may be formed on the same layer as the second insulating layer 125b and the first insulating layer 125a. A second individual light-emitting element layer 133b may be formed on the second patterned portion 136b.

[0119] Thus, according to the fourth embodiment, if the display panel 10 lacks sufficient green characteristics, the brightness of the green can be improved by further arranging a second individual light-emitting layer 133b on the second sub-pixel (SP2) that represents green, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0120] Referring to Figure 8, in the case of the display panel 10 according to the fifth embodiment, a first individual light-emitting element layer 133a may be placed on the first sub-pixel (SP1). In this case, separate individual light-emitting elements do not need to be placed on the second sub-pixel (SP2) and the third sub-pixel (SP3). Also, a first insulating layer 125a may be placed on the substrate 100 corresponding to the second sub-pixel (SP2) and the third sub-pixel (SP3). A second insulating layer 125b may be placed on the first insulating layer 125a of the second sub-pixel (SP2) and the third sub-pixel (SP3). In this case, a second reflective electrode 122 may be placed between the first insulating layer 125a and the second insulating layer 125b of the second sub-pixel (SP2). A first electrode 131 and a second bank layer 132b may be placed on the second insulating layer 125b of the second sub-pixel (SP2). A third reflective electrode 123 may be placed on the second insulating layer 125b of the third sub-pixel (SP3). A first electrode 131 may be placed in contact with the third reflective electrode 123, and a third bank layer 132c may be placed on the first electrode 131.

[0121] A first reflective electrode 121 may be placed on the circuit section insulating layer 112 on the substrate 100 of the first sub-pixel (SP1). A first electrode 131 may be placed in contact with the first reflective electrode 121. A first bank layer 132a including a first patterning section 136a may be placed on the first electrode 131 of the first sub-pixel (SP1). The first bank layer 132a may be formed on the same layer as the first insulating layer 125a on the circuit section insulating layer 112. A first individual light-emitting element layer 133a may be placed on the first patterning section 136a.

[0122] Thus, according to the fifth embodiment, if the display panel 10 lacks sufficient red characteristics, the brightness of the red color can be improved by further arranging the first individual light-emitting layer 133a on the first sub-pixel (SP1) that represents red, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0123] Referring to Figure 9, in the case of the display panel 10 according to the sixth embodiment, the individual light-emitting layer may include a second individual light-emitting layer 133b and a third individual light-emitting layer 133c, which are arranged in the second sub-pixel (SP2) and the third sub-pixel (SP3), respectively, so as to have different heights from each other. In this case, the first sub-pixel (SP1) does not necessarily need to have a separate individual light-emitting layer.

[0124] Therefore, in the case of the first sub-pixel (SP1), the first reflective electrode 121 may be placed on the circuit section insulating layer 112, the first insulating layer 125a and the second insulating layer 125b may be sequentially stacked on the first reflective electrode 121, and the first electrode 131 may be placed on the second insulating layer 125b. Therefore, in the case of the first sub-pixel (SP1), the first insulating layer 125a and the second insulating layer 125b may be placed between the first reflective electrode 121 and the first electrode 131.

[0125] In the case of a second sub-pixel (SP2), a second reflective electrode 122 may be placed on the circuit section insulating layer 112, a first insulating layer 125a may be placed on the second reflective electrode 122, and a first electrode 131 may be placed on the first insulating layer 125a. A second bank layer 132b including a second patterning section 136b may be placed on the first electrode 131, and a second individual light-emitting element layer 133b may be placed on the second patterning section 136b. Therefore, in the case of a second sub-pixel (SP2), a first insulating layer 125a may be placed between the second reflective electrode 122 and the first electrode 131.

[0126] In the case of the third sub-pixel (SP3), a first insulating layer 125a may be formed on the circuit insulating layer 112, a first reflective electrode 121 may be placed on the first insulating layer 125a, and a first electrode 131 may be placed in contact with the first reflective electrode 121. A third bank layer 132c including a third patterning portion 136c may be placed on the first electrode 131, and a third individual light-emitting element layer 133c may be placed on the third patterning portion 136c.

[0127] Thus, according to the sixth embodiment, if the display panel 10 lacks sufficient green and blue characteristics, the brightness of the green and blue can be improved by further arranging the second individual light-emitting layer 133b and the second individual light-emitting layer 133b on the second sub-pixel (SP2) and third sub-pixel (SP3) that represent green and blue, respectively, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0128] Referring to Figure 10, in the case of the display panel 10 according to the seventh embodiment, the individual light-emitting layer may include a first individual light-emitting layer 133a and a second individual light-emitting layer 133b, which are arranged in the first sub-pixel (SP1) and the second sub-pixel (SP2), respectively, so as to have different heights from each other. In this case, a separate individual light-emitting layer does not need to be arranged in the third sub-pixel (SP3).

[0129] Therefore, in the case of the third sub-pixel (SP3), the first insulating layer 125a and the second insulating layer 125b may be sequentially stacked on the circuit insulating layer 112. The third reflective electrode 123 may be placed on the second insulating layer 125b. The first electrode 131 may be placed in contact with the third reflective electrode 123. The third bank layer 132c may be placed on the first electrode 131.

[0130] In the case of a second sub-pixel (SP2), a second reflective electrode 122 may be placed on the circuit section insulating layer 112, a first insulating layer 125a may be placed on the second reflective electrode 122, and a first electrode 131 may be placed on the first insulating layer 125a. A second bank layer 132b including a second patterning section 136b may be placed on the first electrode 131, and a second individual light-emitting element layer 133b may be placed on the second patterning section 136b. Therefore, in the case of a second sub-pixel (SP2), a first insulating layer 125a may be placed between the second reflective electrode 122 and the first electrode 131.

[0131] In the case of the first sub-pixel (SP1), the first reflective electrode 121 may be placed on the circuit section insulating layer 112, and the first electrode 131 may be placed in contact with the first reflective electrode 121. A first bank layer 132a including a first patterning section 136a may be placed on the first electrode 131, and a first individual light-emitting element layer 133a may be placed on the first patterning section 136a. Therefore, the first bank layer 132a may be placed on the same layer as the first insulating layer 125a on the circuit section insulating layer 112.

[0132] Thus, according to the seventh embodiment, if the display panel 10 lacks sufficient red and green characteristics, the brightness of the red and green can be improved by further arranging the first individual light-emitting layer 133a and the second individual light-emitting layer 133b on the first sub-pixel (SP1) and second sub-pixel (SP2) that represent red and green, respectively, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0133] Referring to Figure 11, in the case of the display panel 10 according to the eighth embodiment, the individual light-emitting layer may include a first individual light-emitting layer 133a and a third individual light-emitting layer 133c, which are arranged in the first sub-pixel (SP1) and the third sub-pixel (SP3), respectively, so as to have different heights from each other. In this case, a separate individual light-emitting layer does not need to be arranged in the second sub-pixel (SP2).

[0134] Therefore, in the case of a second sub-pixel (SP2), a first insulating layer 125a may be formed on the circuit insulating layer 112. A first reflective electrode 121 may be placed on the first insulating layer 125a, and a second insulating layer 125b may be placed on the first electrode 131. A first electrode 131 may be placed on the second insulating layer 125b, and a second bank layer 132b may be placed on the first electrode 131. Therefore, in the case of a second sub-pixel (SP2), a second insulating layer 125b may be placed between the second reflective electrode 122 and the first electrode 131.

[0135] In the case of the first sub-pixel (SP1), the first reflective electrode 121 may be placed on the circuit section insulating layer 112, and the first electrode 131 may be placed in contact with the first reflective electrode 121. A first bank layer 132a including a first patterning section 136a may be placed on the first electrode 131, and a first individual light-emitting element layer 133a may be placed on the first patterning section 136a. Therefore, the first bank layer 132a may be placed on the same layer as the first insulating layer 125a on the circuit section insulating layer 112.

[0136] In the case of the third sub-pixel (SP3), a first insulating layer 125a may be formed on the circuit insulating layer 112, a first reflective electrode 121 may be placed on the first insulating layer 125a, and a first electrode 131 may be placed in contact with the first reflective electrode 121. A third bank layer 132c including a third patterning portion 136c may be placed on the first electrode 131, and a third individual light-emitting element layer 133c may be placed on the third patterning portion 136c.

[0137] Thus, according to the eighth embodiment, if the display panel 10 lacks sufficient red and blue characteristics, the brightness of the red and blue can be improved by further arranging the first individual light-emitting layer 133a and the third individual light-emitting layer 133c on the first sub-pixel (SP1) and third sub-pixel (SP3) that represent red and blue, respectively, thereby balancing the red, green, and blue characteristics of the display panel 10.

[0138] As described above, according to the embodiments of this disclosure, the distances between the reflective electrode and the first electrode of the multiple subpixels may be set to be different from each other. In this case, an insulating layer is placed between the reflective electrode and the first electrode, so that the distances between the reflective electrode and the first electrode are different for the multiple subpixels. On the other hand, there may be cases where the distances between the reflective electrode and the first electrode are the same for the multiple subpixels. However, the heights of the individual light-emitting layers placed in each subpixel where the distances between the reflective electrode and the first electrode are the same may be set to be different from each other. Alternatively, one of the multiple subpixels where the distances between the reflective electrode and the first electrode are the same may have an individual light-emitting layer having a predetermined height, while the other subpixel may not have an individual light-emitting layer at all. Therefore, there may be no object for comparing the heights of the individual light-emitting layers.

[0139] Therefore, according to the embodiments of this disclosure, the subpixels may have different distances between the reflective electrode and the first electrode, or different heights of the individual light-emitting layers. In this case, the meaning of different heights of the individual light-emitting layers can be interpreted to include the case where a subpixel without an individual light-emitting layer is compared to a subpixel with an individual light-emitting layer.

[0140] As described above, according to the embodiments of this disclosure, individual light-emitting layers can be selectively arranged for each sub-pixel. By considering the light emission characteristics of each sub-pixel, such as spectrum, light extraction efficiency, and lifetime, and providing an optimized structure suited to each color, it is possible to achieve balanced light emission characteristics and high-quality images overall.

[0141] While embodiments of this disclosure have been described in more detail above with reference to the attached drawings, this disclosure is not necessarily limited to these embodiments, and various modifications are possible within the scope of the technical concept of this disclosure. Therefore, the embodiments disclosed in this disclosure are for illustrative purposes only, not to limit the technical concept of this disclosure, and the scope of the technical concept of this disclosure is not limited by these embodiments. Accordingly, the embodiments described above should be understood to be illustrative and not limiting in all respects. [Explanation of Symbols]

[0142] 10 Display Panel 100 circuit boards 121 1st reflective electrode 122 Second reflective electrode 123 Third reflective electrode 133a First individual light-emitting layer 133b Second individual light-emitting layer 133c Third individual light-emitting layer

Claims

1. A substrate including a first sub-pixel, a second sub-pixel, and a third sub-pixel, A reflective electrode is arranged in each of the first sub-pixel, the second sub-pixel, and the third sub-pixel, A first electrode is arranged on the aforementioned reflective electrode, Individual light-emitting layers, each disposed on at least one of the first electrodes, A common light-emitting layer is disposed on the individual light-emitting layers, A second electrode disposed on the common light-emitting layer, including, Display panel.

2. The individual light-emitting layers include a first individual light-emitting layer, a second individual light-emitting layer, and a third individual light-emitting layer, which are arranged in the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively, so as to have different heights from each other. The display panel according to claim 1.

3. The height decreases in the order of the first individual light-emitting layer, the second individual light-emitting layer, and the third individual light-emitting layer. The display panel according to claim 2.

4. The third sub-pixel further includes a first insulating layer disposed between the reflective electrode and the substrate, The first insulating layer is disposed between the reflective electrode and the first electrode of the second sub-pixel, but not on the first sub-pixel. The display panel according to claim 2.

5. The distance between the reflective electrode and the second electrode of the third sub-pixel is The distance between the reflective electrode of the first sub-pixel and the second electrode is shorter than the distance between the reflective electrode of the second sub-pixel and the second electrode. The display panel according to claim 2.

6. The reflective electrode and the first electrode of the first sub-pixel are in contact with each other. The reflective electrode and the first electrode of the third sub-pixel are in contact with each other. A first insulating layer is placed between the reflective electrode and the first electrode of the second sub-pixel. The display panel according to claim 2.

7. A first bank layer including a first patterning portion on which the first individual light-emitting layer is arranged, A second bank layer including a second patterning portion on which the second individual light-emitting layer is arranged, A third bank layer including a third patterning portion on which the third individual light-emitting layer is arranged, It further includes, The depth of the first patterning section is greater than the depth of the second patterning section and the depth of the third patterning section. The display panel according to claim 2.

8. It further includes a first insulating layer disposed below the second bank layer and the third bank layer, The first bank layer and the first insulating layer are arranged in the same layer. The display panel according to claim 7.

9. The individual light-emitting layer includes a third individual light-emitting layer disposed in the third sub-pixel, A first insulating layer is placed between the first electrode and the substrate. In the first sub-pixel, a second insulating layer is disposed between the first electrode and the first insulating layer. In the second sub-pixel, the second insulating layer is disposed between the first electrode and the reflective electrode. The display panel according to claim 1.

10. The individual light-emitting layer includes a second individual light-emitting layer disposed in the second sub-pixel, A first insulating layer is placed between the first electrode and the substrate. In the first sub-pixel, a second insulating layer is disposed between the first electrode and the first insulating layer. In the third sub-pixel, the second insulating layer is disposed between the first insulating layer and the reflective electrode. The display panel according to claim 1.

11. The individual light-emitting layer includes a first individual light-emitting layer disposed in the first sub-pixel, A first insulating layer is disposed between the first electrode of the second sub-pixel and the third sub-pixel and the substrate. In the second sub-pixel, a second insulating layer is placed between the reflective electrode and the first electrode. In the third sub-pixel, the second insulating layer is disposed between the first insulating layer and the reflective electrode. The display panel according to claim 1.

12. The individual light-emitting layer includes a second individual light-emitting layer and a third individual light-emitting layer, which are arranged in the second sub-pixel and the third sub-pixel, respectively, so as to have different heights from each other. A first insulating layer is placed between the first electrode and the substrate. In the first sub-pixel, a second insulating layer is disposed between the first electrode and the first insulating layer. The display panel according to claim 1.

13. The individual light-emitting layers include a first individual light-emitting layer and a second individual light-emitting layer, which are arranged in the first sub-pixel and the second sub-pixel, respectively, so as to have different heights from each other. A first insulating layer is disposed between the first electrode of the second sub-pixel and the third sub-pixel and the substrate. In the third sub-pixel, a second insulating layer is disposed between the reflective electrode and the first insulating layer. The display panel according to claim 1.

14. The individual light-emitting layers include a first individual light-emitting layer and a third individual light-emitting layer, which are arranged in the first sub-pixel and the third sub-pixel, respectively, so as to have different heights from each other. A first insulating layer is disposed between the first electrode of the second sub-pixel and the third sub-pixel and the substrate. In the second sub-pixel, a second insulating layer is disposed between the first electrode and the reflective electrode. The display panel according to claim 1.

15. A substrate containing multiple subpixels, A reflective electrode is placed in each of the aforementioned plurality of subpixels, A first electrode is arranged on the aforementioned reflective electrode, Individual light-emitting layers, each disposed on at least one of the first electrodes, A common light-emitting layer arranged in the plurality of subpixels, A second electrode disposed on the common light-emitting layer, Includes, The plurality of subpixels are such that the distance between the reflective electrode and the first electrode is different from each other, or the height of the individual light-emitting layers is different from each other. Display panel.