Semiconductor device and method for inspecting a semiconductor device

Abstract

This facilitates the identification of faulty processing units within semiconductor devices. [Solution] The method according to the present disclosure is a method for inspecting a semiconductor device including a plurality of processing units, each having a scan chain, comprising: a first step of inputting a scan signal to the plurality of processing units and determining whether a failure has occurred in any of the plurality of processing units based on the output signals of the plurality of processing units and the expected value corresponding to the scan signal; and a second step of, when it is determined in the first step that a failure has occurred, inputting the scan signal to some of the plurality of processing units and determining whether a failure has occurred in the some processing units based on the output signals of the some processing units and the expected value.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for inspecting a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a technique for avoiding a malfunction of a semiconductor device by using a redundant cell instead of a basic cell when the basic cell is faulty.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, it is not easy to identify a faulty cell, and a lot of time and cost are required for inspection.

[0005] The present disclosure has been made in view of the above problems, and provides a method for easily identifying a faulty processing unit in the inspection of a semiconductor device.

Means for Solving the Problems

[0006] A method according to one aspect of the present disclosure is a method for inspecting a semiconductor device including a plurality of processing units, each having a scan chain, comprising: a first step of inputting a scan signal to the plurality of processing units and determining whether a failure has occurred in any of the plurality of processing units based on the output signals of the plurality of processing units and the expected value corresponding to the scan signal; and a second step, when it is determined in the first step that a failure has occurred, inputting the scan signal to some of the plurality of processing units and determining whether a failure has occurred in some of the processing units based on the output signals of some of the processing units and the expected value.

[0007] A semiconductor device according to one aspect of the present disclosure comprises: a plurality of processing units, each having a scan chain; a redundant processing unit having a configuration corresponding to the processing unit and being able to replace a faulty processing unit; a scan expansion unit that expands an input signal into a plurality of scan signals; a scan compression unit that receives a plurality of output signals corresponding to the scan signals from the plurality of processing units and the redundant processing unit, and outputs the plurality of output signals as a single signal; a plurality of input signal paths that transmit the plurality of scan signals from the scan expansion unit to the plurality of processing units and the redundant processing unit; a plurality of output signal paths that transmit the plurality of output signals from the plurality of processing units and the redundant processing unit to the scan compression unit; and a plurality of bypasses that transmit the scan signals from the scan expansion unit to the scan compression unit, bypassing the plurality of processing units. [Effects of the Invention]

[0008] According to this disclosure, it is possible to improve the yield of semiconductor devices and reduce the time and cost required for inspecting them. [Brief explanation of the drawing]

[0009] [Figure 1] This is a block diagram showing the schematic configuration of a semiconductor device in the first embodiment. [Figure 2] This block diagram shows another schematic configuration of the semiconductor device in the first embodiment. [Figure 3] This flowchart shows the procedure for identifying a faulty processing unit in a semiconductor device according to the first embodiment and replacing that processing unit with a redundant unit. [Figure 4] This flowchart shows the procedure for identifying a faulty processing unit in a semiconductor device according to the second embodiment and replacing that processing unit with a redundant unit. [Figure 5] This is a block diagram showing the schematic configuration of the device according to the third embodiment. [Figure 6] This is a block diagram showing the schematic configuration of the device according to the fourth embodiment. [Modes for carrying out the invention]

[0010] Embodiments of the present invention will be described below with reference to the drawings. Elements identical or corresponding to each other across multiple drawings are denoted by the same reference numerals, and their descriptions may be omitted or simplified.

[0011] [First Embodiment] A semiconductor device according to this disclosure will be described with reference to Figure 1. Figure 1 is a block diagram showing the schematic configuration of a semiconductor device 11 in this embodiment. The semiconductor device 11 includes a control unit 100, a scan unfolding unit 110, selection units 121 to 123, processing units 131 to 134, a redundancy unit 135, selection units 141 to 144, selection units 151 to 154, a circuit unit 160, and a scan compression unit 170.

[0012] The control unit 100 controls the operation of selection units 121-123, 141-144, and 151-154. Specifically, the control unit 100 receives a setting signal S109 containing setting parameters for a scan test. The setting signal S109 is used to generate a test pattern, which will be described later. In response to the setting signal S109, the control unit 100 generates control signals C12, C14, and C15 to control the operation of selection units 121-123, 141-144, and 151-154. The control unit 100 is connected to selection units 121-123, 141-144, and 151-154 so that the control signals can be transmitted. The control unit 100 outputs control signal C12 to selection units 121-123. The control unit 100 also outputs control signal C14 to selection units 141-144. Furthermore, the control unit 100 outputs a control signal C15 to the selection units 151 to 154.

[0013] The scan unpacking unit 110 unpacks the scan data signal used for scan testing. Specifically, the scan unpacking unit 110 receives a compressed scan data signal S110. The scan data signal S110 is output from, for example, a tester that inspects a semiconductor device 11. The scan unpacking unit 110 unpacks the scan data signal S110 into pattern signals S111 to S115. The scan unpacking unit 110 is connected to the selection units 121 to 123, the processing unit 131, the redundancy unit 135, the selection unit 141, and the circuit unit 160 via an input signal path and a bypass 131B so that the pattern signals (scan signals) can be transmitted. The scan unpacking unit 110 outputs the pattern signal S111 to the selection unit 121, the processing unit 131, and the selection unit 141. The scan unpacking unit 110 outputs the pattern signal S112 to the selection unit 121 and the selection unit 122. The scan unfolding unit 110 outputs a pattern signal S113 to the selection unit 122 and the selection unit 123. The scan unfolding unit 110 outputs a pattern signal S114 to the selection unit 123 and the redundancy unit 135. The scan unfolding unit 110 outputs a pattern signal S115 to the circuit unit 160.

[0014] The selection units 121 to 123 select one signal from multiple input signals and output the selected signal to the processing units 132 to 134 via the input signal path. Specifically, the selection unit 121 receives pattern signals S111 and S112 from the scan unfolding unit 110. The selection unit 121 also receives control signal C121, which is included in control signal C12, from the control unit 100. The selection unit 121 selects either pattern signal S111 or pattern signal S112 according to control signal C121. The selection unit 121 is connected to the processing unit 132 and the selection unit 142 so that pattern signals can be transmitted. The selection unit 121 outputs the selected pattern signal as selection signal S121 to the processing unit 132 and the selection unit 142.

[0015] The selection unit 122 receives pattern signals S112 and S113 from the scan unfolding unit 110. The selection unit 122 also receives control signal C122, which is included in control signal C12, from the control unit 100. The selection unit 122 selects either pattern signal S112 or pattern signal S113 according to control signal C122. The selection unit 122 is connected to the processing unit 133 and the selection unit 143 so that pattern signals can be transmitted. The selection unit 122 outputs the selected pattern signal as selection signal S122 to the processing unit 133 and the selection unit 143.

[0016] The selection unit 123 receives pattern signals S113 and S114 from the scan unfolding unit 110. The selection unit 123 also receives control signal C123, which is included in control signal C12, from the control unit 100. The selection unit 123 selects either pattern signal S113 or pattern signal S114 according to control signal C123. The selection unit 123 is connected to the processing unit 134 and the selection unit 144 so that pattern signals can be transmitted. The selection unit 123 outputs the selected pattern signal as selection signal S123 to the processing unit 134 and the selection unit 144.

[0017] The processing units 131 to 134 and the redundant unit 135 are signal processing circuits having a logically equivalent configuration. That is, the semiconductor device 11 includes a plurality of signal processing units, and at least one of the plurality of signal processing units is the redundant unit 135 (redundant processing unit). The processing units 131 to 134 and the redundant unit 135 include a scan chain composed of a plurality of flip-flops. During normal operation, the processing units 131 to 134 and the redundant unit 135 perform predetermined signal processing on the input data in response to the clock signal S100. The processing units 131 to 134 and the redundant unit 135 output the data after signal processing to the selection units 141 to 144 via the output signal paths. The redundant unit 135 is used as an alternative processing unit when a failure is detected in the processing units 131 to 134. That is, when a failure is detected in any of the processing units 131 to 134, the redundant unit 135 is replaced with the failed processing unit. The signal processing executed in the redundant unit 135 is the same as the signal processing executed in the processing units 131 to 134. Note that the number of processing units included in the semiconductor device 11 is not limited to the present embodiment, and for example, it can be N (N is a natural number of 2 or more).

[0018] Hereinafter, the operations of the processing units 131 to 134 and the redundant unit 135 during the scan test will be described. The processing units 131 to 134 and the redundant unit 135 receive the clock signal S100, the shift enable signal S108, and the pattern signals S111 to S114. A scan test for the processing units 131 to 134 and the redundant unit 135 is executed using the clock signal S100, the shift enable signal S108, and the pattern signals S111 to S114.

[0019] Specifically, the processing unit 131 receives the pattern signal S111 from the scan expansion unit 110. The processing unit 131 stores the pattern signal S111 in the flip-flops constituting the scan chain in response to the clock signal S100. The processing unit 131 is connected to the selection unit 141 so that signals can be transmitted. The processing unit 131 outputs the pattern signal S111 read from the scan chain as the output signal S131 to the selection unit 141 in response to the shift enable signal S108.

[0020] The processing unit 132 receives the selection signal S121 from the selection unit 121. The selection signal S121 corresponds to the pattern signal S111 or the pattern signal S112. The processing unit 132 stores the selection signal S121 in the flip-flops constituting the scan chain according to the clock signal S100. The processing unit 132 is connected to the selection unit 142 so that signals can be transmitted. The processing unit 132 outputs the selection signal S121 read from the scan chain as the output signal S132 to the selection unit 142 according to the shift enable signal S108.

[0021] The processing unit 133 receives the selection signal S122 from the selection unit 122. The selection signal S122 corresponds to the pattern signal S112 or the pattern signal S113. The processing unit 133 stores the selection signal S122 in the flip-flops constituting the scan chain according to the clock signal S100. The processing unit 133 is connected to the selection unit 143 so that signals can be transmitted. The processing unit 133 outputs the selection signal S122 read from the scan chain as the output signal S133 to the selection unit 143 according to the shift enable signal S108.

[0022] The processing unit 134 receives the selection signal S123 from the selection unit 123. The selection signal S123 corresponds to the pattern signal S113 or the pattern signal S114. The processing unit 134 stores the selection signal S123 in the flip-flops constituting the scan chain according to the clock signal S100. The processing unit 134 is connected to the selection unit 144 so that signals can be transmitted. The processing unit 134 outputs the selection signal S123 read from the scan chain as the output signal S134 to the selection unit 144 according to the shift enable signal S108.

[0023] The redundancy unit 135 receives the pattern signal S114 from the scan unfolding unit 110. The redundancy unit 135 stores the pattern signal S114 in the flip-flops that constitute the scan chain in accordance with the clock signal S100. The redundancy unit 135 is connected to the selection unit 154 so that signal transmission is possible. In response to the shift enable signal S108, the redundancy unit 135 outputs the pattern signal S114 read from the scan chain as output signal S135 to the selection unit 154.

[0024] The number of processing units included in the semiconductor device 11 is not limited to four. For example, the semiconductor device 11 may have three or fewer processing units, or it may have five or more processing units.

[0025] Selection units 141 to 144 select one signal from multiple input signals and output the selected signal to selection units 151 to 154 via an output signal path. Specifically, selection unit 141 receives output signal S131 from processing unit 131. Selection unit 141 also receives pattern signal S111 from scan unfolding unit 110 via bypass 131B. Bypass 131B is a path for sending pattern signal S111 to selection unit 141, bypassing processing unit 131. In other words, selection unit 141 receives pattern signal S111 without going through the scan chain of processing unit 131. Furthermore, selection unit 141 receives control signal C141, which is included in control signal C14, from control unit 100. Selection unit 141 selects either output signal S131 or pattern signal S111 according to control signal C141. Selection unit 141 is connected to selection unit 151 so that signal transmission is possible. The selection unit 141 outputs the selected signal as selection signal S141 to the selection unit 151.

[0026] The selection unit 142 receives the output signal S132 from the processing unit 132. The selection unit 142 also receives the selection signal S121 from the selection unit 121 via the bypass 132B. The bypass 132B is a path for sending the selection signal S121 to the selection unit 142, bypassing the processing unit 132. In other words, the selection unit 142 receives the selection signal S121 without going through the scan chain of the processing unit 132. Furthermore, the selection unit 142 receives the control signal C142, which is included in the control signal C14, from the control unit 100. The selection unit 142 selects either the output signal S132 or the selection signal S121 according to the control signal C142. The selection unit 142 is connected to the selection unit 152 so that signal transmission is possible. The selection unit 142 outputs the selected signal as the selection signal S142 to the selection unit 152.

[0027] The selection unit 143 receives the output signal S133 from the processing unit 133. The selection unit 143 also receives the selection signal S122 from the selection unit 122 via the bypass 133B. The bypass 133B is a path for sending the selection signal S122 to the selection unit 143, bypassing the processing unit 133. In other words, the selection unit 143 receives the selection signal S122 without going through the scan chain of the processing unit 133. Furthermore, the selection unit 143 receives the control signal C143, which is included in the control signal C14, from the control unit 100. The selection unit 143 selects either the output signal S133 or the selection signal S122 according to the control signal C143. The selection unit 143 is connected to the selection unit 153 so that signal transmission is possible. The selection unit 143 outputs the selected signal as the selection signal S143 to the selection unit 153.

[0028] The selection unit 144 receives the output signal S134 from the processing unit 134. The selection unit 144 also receives the selection signal S123 from the selection unit 123 via the bypass 134B. The bypass 134B is a path for sending the selection signal S123 to the selection unit 144, bypassing the processing unit 134. In other words, the selection unit 144 receives the selection signal S123 without going through the scan chain of the processing unit 134. Furthermore, the selection unit 144 receives the control signal C144, which is included in the control signal C14, from the control unit 100. The selection unit 144 selects either the output signal S134 or the selection signal S123 according to the control signal C144. The selection unit 144 is connected to the selection unit 154 so that signal transmission is possible. The selection unit 144 outputs the selected signal as the selection signal S144 to the selection unit 154.

[0029] Selection units 151 to 154 select one signal from multiple input signals and output the selected signal to the scan compression unit 170 via an output signal path. Specifically, selection unit 151 receives selection signal S141 from selection unit 141. Also, selection unit 151 receives selection signal S142 from selection unit 142. Furthermore, selection unit 151 receives control signal C151, which is included in control signal C15, from the control unit 100. Selection unit 151 selects either selection signal S141 or selection signal S142 according to control signal C151. Selection unit 151 is connected to the scan compression unit 170 so that signal transmission is possible. Selection unit 151 outputs the selected signal as selection signal S151 to the scan compression unit 170.

[0030] The selection unit 152 receives a selection signal S142 from the selection unit 142. The selection unit 152 also receives a selection signal S143 from the selection unit 143. Furthermore, the selection unit 152 receives a control signal C152, which is included in the control signal C15, from the control unit 100. The selection unit 152 selects either the selection signal S142 or the selection signal S143 according to the control signal C152. The selection unit 152 is connected to the scan compression unit 170 to enable signal transmission. The selection unit 152 outputs the selected signal as the selection signal S152 to the scan compression unit 170.

[0031] The selection unit 153 receives selection signal S143 from selection unit 143. The selection unit 153 also receives selection signal S144 from selection unit 144. Furthermore, the selection unit 153 receives control signal C153, which is included in control signal C15, from the control unit 100. The selection unit 153 selects either selection signal S143 or selection signal S144 according to control signal C153. The selection unit 153 is connected to the scan compression unit 170 to enable signal transmission. The selection unit 153 outputs the selected signal as selection signal S153 to the scan compression unit 170.

[0032] The selection unit 154 receives a selection signal S144 from the selection unit 144. The selection unit 154 also receives an output signal S135 from the redundancy unit 135. Furthermore, the selection unit 154 receives a control signal C154, which is included in the control signal C15, from the control unit 100. The selection unit 154 selects either the selection signal S144 or the output signal S135 according to the control signal C154. The selection unit 154 is connected to the scan compression unit 170 so that signal transmission is possible. The selection unit 154 outputs the selected signal as the selection signal S154 to the scan compression unit 170.

[0033] The circuit unit 160 includes combinational circuits, sequential circuits, etc. The circuit unit 160 performs predetermined signal processing on the input data. The circuit unit 160 outputs the data after signal processing. During a scan test, the circuit unit 160 receives a pattern signal S115 from the scan unfolding unit 110. The circuit unit 160 performs predetermined signal processing on the pattern signal S115 and outputs the data after signal processing as an output signal S160 to the scan compression unit 170.

[0034] The scan compression unit 170 compresses multiple signals indicating the results of the scan test for the processing units 131-134 and the redundancy unit 135 according to the number of output terminals, and outputs the compressed signal as a single signal from the output terminal. Specifically, the scan compression unit 170 receives selection signals S151-S154 from the selection units 151-154. The scan compression unit 170 also receives output signal S160 from the circuit unit 160. The scan compression unit 170 compresses the selection signals S151-S154 and output signal S160, and outputs the compressed signal as output signal S170. Output signal S170 is output to, for example, a tester that inspects the semiconductor device 11. In the tester, the value indicated by output signal S170 is compared with an expected value, and based on the result of the comparison, a determination is made as to whether or not there is a fault in the processing unit.

[0035] [Comparative Example] A comparative example related to the semiconductor device according to this disclosure will be explained using Figure 2. Figure 2 is a block diagram showing the schematic configuration of a semiconductor device 21 according to a comparative example of this disclosure. The semiconductor device 21 includes a control unit 200, selection units 221 to 223, processing units 131 to 134, a redundant unit 135, selection units 241 to 244, and circuit units 251 to 254. The semiconductor device 21 differs from the semiconductor device 11 according to this disclosure in that it does not have bypasses 131B, 132B, 133B, 134B, a scan unfolding unit 110, and a scan compression unit 170.

[0036] The control unit 200 controls the operation of selection units 221-223 and 241-244. Specifically, the control unit 200 receives a setting signal S219, which includes setting parameters, and a clock signal S210. Based on the setting signal S219 and the clock signal S210, the control unit 200 generates control signals C22 and C24 to control the operation of selection units 221-223 and 241-244. The control unit 200 is connected to selection units 221-223 and 241-244 so that the control signals C22 and C24 can be transmitted. The control unit 200 outputs control signal C22 to selection units 221-223. The control unit 200 also outputs control signal C24 to selection units 241-244.

[0037] The selection units 221 to 223 select one signal from multiple input signals and output the selected signal to the processing units 132 to 134. Specifically, the selection unit 221 receives data signals S211 and S212. The selection unit 221 also receives control signal C221, which is included in control signal C22, from the control unit 200. The selection unit 221 selects either data signal S211 or data signal S212 according to control signal C221. The selection unit 221 is connected to the processing unit 132 so that data signals can be transmitted. The selection unit 221 outputs the selected data signal as selection signal S221 to the processing unit 132.

[0038] The selection unit 222 receives data signals S212 and S213. The selection unit 222 also receives control signal C222, which is included in control signal C22, from the control unit 200. The selection unit 222 selects either data signal S212 or data signal S213 according to control signal C222. The selection unit 222 is connected to the processing unit 133 to enable the transmission of data signals. The selection unit 222 outputs the selected data signal as selection signal S222 to the processing unit 133.

[0039] The selection unit 223 receives data signals S213 and S214. The selection unit 223 also receives control signal C223, which is included in control signal C22, from the control unit 200. The selection unit 223 selects either data signal S213 or data signal S214 according to control signal C223. The selection unit 223 is connected to the processing unit 134 to enable the transmission of data signals. The selection unit 223 outputs the selected data signal as selection signal S223 to the processing unit 134.

[0040] The processing units 131-134 and redundancy unit 135 shown in Figure 2 have the same configuration as the processing units 131-134 and redundancy unit 135 shown in Figure 1. The processing units 131-134 and redundancy unit 135 perform predetermined signal processing on the input data in accordance with the clock signal S210. Then, the processing units 131-134 and redundancy unit 135 output the signal-processed data to the selection units 241-244.

[0041] The processing unit 131 receives the data signal S211. The processing unit 131 performs predetermined signal processing on the data signal S211 in accordance with the input clock signal S210. The processing unit 131 is connected to the selection unit 241 so that the signal can be transmitted. The processing unit 131 outputs the processed data signal S211 as an output signal S131 to the selection unit 241.

[0042] The processing unit 132 receives a selection signal S221 from the selection unit 221. The selection signal S221 corresponds to either a data signal S211 or a data signal S212. The processing unit 132 performs predetermined signal processing on the selection signal S221 according to the input clock signal S210. The processing unit 132 is connected to the selection units 241 and 242 so that signals can be transmitted. The processing unit 132 outputs the processed selection signal S221 as an output signal S132 to the selection units 241 and 242.

[0043] The processing unit 133 receives a selection signal S222 from the selection unit 222. The selection signal S222 corresponds to either a data signal S212 or a data signal S213. The processing unit 133 performs predetermined signal processing on the selection signal S222 in accordance with the input clock signal S210. The processing unit 133 is connected to the selection units 242 and 243 so that signals can be transmitted. The processing unit 133 outputs the processed selection signal S222 as an output signal S133 to the selection units 242 and 243.

[0044] The processing unit 134 receives a selection signal S223 from the selection unit 223. The selection signal S223 corresponds to either a data signal S213 or a data signal S214. The processing unit 134 performs predetermined signal processing on the selection signal S223 according to the input clock signal S210. The processing unit 134 is connected to the selection units 243 and 244 so that signals can be transmitted. The processing unit 134 outputs the processed selection signal S223 as an output signal S134 to the selection units 243 and 244.

[0045] The redundant unit 135 receives the data signal S214. The redundant unit 135 performs predetermined signal processing on the data signal S214 in accordance with the input clock signal S210. The redundant unit 135 is connected to the selection unit 244 so that signal transmission is possible. The redundant unit 135 outputs the processed data signal S214 as output signal S135 to the selection unit 244.

[0046] The selection units 241 to 244 select one signal from multiple input signals and output the selected signal to the circuit units 251 to 254. Specifically, the selection unit 241 receives output signal S131 from the processing unit 131. The selection unit 241 also receives output signal S132 from the processing unit 132. Furthermore, the selection unit 241 receives control signal C241, which is included in control signal C24, from the control unit 200. The selection unit 241 selects either output signal S131 or output signal S132 according to control signal C241. The selection unit 241 is connected to the circuit unit 251 so that signal transmission is possible. The selection unit 241 outputs the selected signal as selection signal S241 to the circuit unit 251.

[0047] The selection unit 242 receives output signal S132 from the processing unit 132. The selection unit 242 also receives output signal S133 from the processing unit 133. Furthermore, the selection unit 242 receives control signal C242, which is included in control signal C24, from the control unit 200. The selection unit 242 selects either output signal S132 or output signal S133 according to control signal C242. The selection unit 242 is connected to the circuit unit 252 to enable signal transmission. The selection unit 242 outputs the selected signal as selection signal S242 to the circuit unit 252.

[0048] The selection unit 243 receives output signal S133 from the processing unit 133. The selection unit 243 also receives output signal S134 from the processing unit 134. Furthermore, the selection unit 243 receives control signal C243, which is included in control signal C24, from the control unit 200. The selection unit 243 selects either output signal S133 or output signal S134 according to control signal C243. The selection unit 243 is connected to the circuit unit 253 to enable signal transmission. The selection unit 243 outputs the selected signal as selection signal S243 to the circuit unit 253.

[0049] The selection unit 244 receives output signal S134 from the processing unit 134. The selection unit 244 also receives output signal S135 from the redundancy unit 135. Furthermore, the selection unit 244 receives control signal C244, which is included in control signal C24, from the control unit 200. The selection unit 244 selects either output signal S134 or output signal S135 according to control signal C244. The selection unit 244 is connected to the circuit unit 254 so that signal transmission is possible. The selection unit 244 outputs the selected signal as selection signal S244 to the circuit unit 254.

[0050] Circuit units 251 to 254 each include combinational circuits, sequential circuits, etc. Circuit units 251 to 254 perform predetermined signal processing on the input data. Circuit units 251 to 254 output the data after signal processing. Specifically, circuit unit 251 receives selection signal S241 from selection unit 241. Circuit unit 251 performs predetermined signal processing on selection signal S241 and outputs the data after signal processing. Circuit unit 252 receives selection signal S242 from selection unit 242. Circuit unit 252 performs predetermined signal processing on selection signal S242 and outputs the data after signal processing. Circuit unit 253 receives selection signal S243 from selection unit 243. Circuit unit 253 performs predetermined signal processing on selection signal S243 and outputs the data after signal processing. Circuit unit 254 receives selection signal S244 from selection unit 244. Circuit unit 254 performs predetermined signal processing on selection signal S244 and outputs the data after signal processing.

[0051] <Generating test patterns> The control units 100 and 200 of the semiconductor devices 11 and 21 according to this disclosure generate multiple test patterns for performing a scan test on the processing units 131 to 134 in response to setting signals S109 and S219. In this embodiment, the control unit 100 creates five test patterns. The scan test using the test patterns is realized by controlling the operation of the selection units 121 to 123, 141 to 144, 151 to 154, 221 to 223, and 241 to 244 using control signals C12, C14, C15, C22, and C24. The five test patterns generated by the control unit 100 of the semiconductor device 11 will be described below with reference to Figure 1.

[0052] <First Test Pattern> In the first test pattern, output signals S131 and S160, which are the results of scan tests on the processing unit 131 and the circuit unit 160, are output to the scan compression unit 170. On the other hand, in the first test pattern, output signals S132 to S135, which are the results of scan tests on the processing units 132 to 134 and the redundancy unit 135, are not output to the scan compression unit 170.

[0053] To perform a scan test using the first test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 131 to the scan compression unit 170, the control unit 100 sets control signal C141 so that selection unit 141 outputs output signal S131 as selection signal S141 to selection unit 151. The control unit 100 also sets control signal C151 so that selection unit 151 outputs selection signal S141, which corresponds to output signal S131, as selection signal S151 to the scan compression unit 170.

[0054] On the other hand, in the first test pattern, output signals S132 to S135 are not output to the scan compression unit 170, while pattern signals S112 to S114 are output to the scan compression unit 170. Specifically, the control unit 100 sets control signal C121 so that the selection unit 121 outputs pattern signal S112 as selection signal S121 to the selection unit 142 via the bypass 132B. The control unit 100 also sets control signal C142 so that the selection unit 142 outputs selection signal S121, which corresponds to pattern signal S112, as selection signal S142 to the selection unit 152. Furthermore, the control unit 100 sets control signal C152 so that the selection unit 152 outputs selection signal S142, which corresponds to pattern signal S112, as selection signal S152 to the scan compression unit 170.

[0055] In addition, the control unit 100 sets control signal C122 so that the selection unit 122 outputs the pattern signal S113 as selection signal S122 to the selection unit 143 via the bypass 133B. The control unit 100 also sets control signal C143 so that the selection unit 143 outputs the selection signal S122 corresponding to the pattern signal S113 as selection signal S143 to the selection unit 153. Furthermore, the control unit 100 sets control signal C153 so that the selection unit 153 outputs the selection signal S143 corresponding to the pattern signal S113 as selection signal S153 to the scan compression unit 170. Similarly, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 as selection signal S123 to the selection unit 144 via the bypass 134B. Furthermore, the control unit 100 sets control signal C144 so that the selection unit 144 outputs the selection signal S123 corresponding to the pattern signal S114 as selection signal S144 to the selection unit 154. Furthermore, the control unit 100 sets the control signal C154 so that the selection unit 154 outputs the selection signal S144, which corresponds to the pattern signal S114, to the scan compression unit 170 as the selection signal S154.

[0056] <Second Test Pattern> In the second test pattern, output signals S132 and S160, which are the results of scan tests on the processing unit 132 and the circuit unit 160, are output to the scan compression unit 170. On the other hand, in the second test pattern, output signals S131, S133, S134, and S135, which are the results of scan tests on the processing units 131, 133, 134 and the redundancy unit 135, are not output to the scan compression unit 170.

[0057] To perform a scan test using the second test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 132 to the scan compression unit 170, the control unit 100 sets control signal C121 so that selection unit 121 outputs pattern signal S112 to processing unit 132 as selection signal S121. The control unit 100 also sets control signal C142 so that selection unit 142 outputs output signal S132 to selection unit 152 as selection signal S142. Furthermore, the control unit 100 sets control signal C152 so that selection unit 152 outputs selection signal S142, which corresponds to output signal S132, to the scan compression unit 170 as selection signal S152.

[0058] On the other hand, in the second test pattern, output signals S131, S133, S134, and S135 are not output to the scan compression unit 170, while pattern signals S111, S113, and S114 are output to the scan compression unit 170. Specifically, the control unit 100 sets the control signal C141 so that the selection unit 141 outputs the pattern signal S111, which is input via the bypass 131B, to the selection unit 151 as the selection signal S141. Furthermore, the control unit 100 sets the control signal C151 so that the selection unit 151 outputs the selection signal S141, which corresponds to the pattern signal S111, to the scan compression unit 170 as the selection signal S151.

[0059] In addition, the control unit 100 sets control signal C122 so that the selection unit 122 outputs the pattern signal S113 as selection signal S122 to the selection unit 143 via the bypass 133B. The control unit 100 also sets control signal C143 so that the selection unit 143 outputs the selection signal S122 corresponding to the pattern signal S113 as selection signal S143 to the selection unit 153. Furthermore, the control unit 100 sets control signal C153 so that the selection unit 153 outputs the selection signal S143 corresponding to the pattern signal S113 as selection signal S153 to the scan compression unit 170. Similarly, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 as selection signal S123 to the selection unit 144 via the bypass 134B. Furthermore, the control unit 100 sets control signal C144 so that the selection unit 144 outputs the selection signal S123 corresponding to the pattern signal S114 as selection signal S144 to the selection unit 154. Furthermore, the control unit 100 sets the control signal C154 so that the selection unit 154 outputs the selection signal S144, which corresponds to the pattern signal S114, to the scan compression unit 170 as the selection signal S154.

[0060] <Third test pattern> In the third test pattern, output signals S133 and S160, which are the results of scan tests on the processing unit 133 and the circuit unit 160, are output to the scan compression unit 170. On the other hand, in the third test pattern, output signals S131, S132, S134, and S135, which are the results of scan tests on the processing units 131, 132, 134 and the redundancy unit 135, are not output to the scan compression unit 170.

[0061] To perform a scan test using the third test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 133 to the scan compression unit 170, the control unit 100 sets control signal C122 so that selection unit 122 outputs pattern signal S113 to processing unit 133 as selection signal S122. The control unit 100 also sets control signal C143 so that selection unit 143 outputs output signal S133 to selection unit 153 as selection signal S143. Furthermore, the control unit 100 sets control signal C153 so that selection unit 153 outputs selection signal S143, which corresponds to output signal S133, to the scan compression unit 170 as selection signal S153.

[0062] On the other hand, in the third test pattern, output signals S131, S132, S134, and S135 are not output to the scan compression unit 170, while pattern signals S111, S112, and S114 are output to the scan compression unit 170. Specifically, the control unit 100 sets the control signal C141 so that the selection unit 141 outputs the pattern signal S111, which is input via the bypass 131B, to the selection unit 151 as the selection signal S141. Furthermore, the control unit 100 sets the control signal C151 so that the selection unit 151 outputs the selection signal S141, which corresponds to the pattern signal S111, to the scan compression unit 170 as the selection signal S151.

[0063] In addition, the control unit 100 sets control signal C121 so that the selection unit 121 outputs the pattern signal S112 as selection signal S121 to the selection unit 142 via the bypass 132B. The control unit 100 also sets control signal C142 so that the selection unit 142 outputs the selection signal S121 corresponding to the pattern signal S112 as selection signal S142 to the selection unit 152. Furthermore, the control unit 100 sets control signal C152 so that the selection unit 152 outputs the selection signal S142 corresponding to the pattern signal S112 as selection signal S152 to the scan compression unit 170. Similarly, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 as selection signal S123 to the selection unit 144 via the bypass 134B. Furthermore, the control unit 100 sets control signal C144 so that the selection unit 144 outputs the selection signal S123 corresponding to the pattern signal S114 as selection signal S144 to the selection unit 154. Furthermore, the control unit 100 sets the control signal C154 so that the selection unit 154 outputs the selection signal S144, which corresponds to the pattern signal S114, to the scan compression unit 170 as the selection signal S154.

[0064] <Fourth test pattern> In the fourth test pattern, output signals S134 and S160, which are the results of scan tests on the processing unit 134 and the circuit unit 160, are output to the scan compression unit 170. On the other hand, in the fourth test pattern, output signals S131 to S133 and S135, which are the results of scan tests on the processing units 131 to 133 and the redundancy unit 135, are not output to the scan compression unit 170.

[0065] To perform a scan test using the fourth test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 134 to the scan compression unit 170, the control unit 100 sets control signal C123 so that selection unit 123 outputs pattern signal S114 to processing unit 134 as selection signal S123. The control unit 100 also sets control signal C144 so that selection unit 144 outputs output signal S134 to selection unit 154 as selection signal S144. Furthermore, the control unit 100 sets control signal C154 so that selection unit 154 outputs selection signal S144, which corresponds to output signal S134, to the scan compression unit 170 as selection signal S154.

[0066] On the other hand, in the fourth test pattern, output signals S131 to S133 and S135 are not output to the scan compression unit 170, while pattern signals S111 to S113 are output to the scan compression unit 170. Specifically, the control unit 100 sets the control signal C141 so that the selection unit 141 outputs the pattern signal S111, which is input via the bypass 131B, to the selection unit 151 as the selection signal S141. Furthermore, the control unit 100 sets the control signal C151 so that the selection unit 151 outputs the selection signal S141, which corresponds to the pattern signal S111, to the scan compression unit 170 as the selection signal S151.

[0067] In addition, the control unit 100 sets control signal C121 so that the selection unit 121 outputs the pattern signal S112 as selection signal S121 to the selection unit 142 via the bypass 132B. The control unit 100 also sets control signal C142 so that the selection unit 142 outputs the selection signal S121 corresponding to the pattern signal S112 as selection signal S142 to the selection unit 152. Furthermore, the control unit 100 sets control signal C152 so that the selection unit 152 outputs the selection signal S142 corresponding to the pattern signal S112 as selection signal S152 to the scan compression unit 170. Similarly, the control unit 100 sets control signal C122 so that the selection unit 122 outputs the pattern signal S113 as selection signal S122 to the selection unit 143 via the bypass 133B. Furthermore, the control unit 100 sets control signal C143 so that the selection unit 143 outputs the selection signal S122 corresponding to the pattern signal S113 as selection signal S143 to the selection unit 153. Furthermore, the control unit 100 sets the control signal C153 so that the selection unit 153 outputs the selection signal S143, which corresponds to the pattern signal S113, to the scan compression unit 170 as the selection signal S153.

[0068] <Test Pattern 5> In the fifth test pattern, each of the pattern signals S111 to S114 is output to the processing units 131 to 134 or the redundancy unit 135 according to the control signals C12, C14, and C15. Also, pattern signal S115 is output to the circuit unit 160. Depending on the input pattern signals S111 to S114, the processing units 131 to 134 and the redundancy unit 135 output output signals S131 to S135 to the scan compression unit 170. Also, the circuit unit 160 outputs output signal S160 to the scan compression unit 170. In the fifth test pattern, the pattern signals S111 to S114 are output to the scan compression unit 170 via either the processing units 131 to 134 or the redundancy unit 135. That is, in the fifth test pattern, the pattern signals S111 to S114 are not output to the scan compression unit 170 via the bypasses 131B to 134B.

[0069] To perform a scan test using the fifth test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 131 to the scan compression unit 170, the control unit 100 sets control signal C141 so that selection unit 141 outputs output signal S131 as selection signal S141 to selection unit 151. The control unit 100 also sets control signal C151 so that selection unit 151 outputs selection signal S141, which corresponds to output signal S131, as selection signal S151 to the scan compression unit 170.

[0070] In addition, in order to output the results of the scan test on the processing unit 132 to the scan compression unit 170, the control unit 100 sets control signal C121 so that the selection unit 121 outputs the pattern signal S112 to the processing unit 132 as selection signal S121. The control unit 100 also sets control signal C142 so that the selection unit 142 outputs the output signal S132 to the selection unit 152 as selection signal S142. Furthermore, the control unit 100 sets control signal C152 so that the selection unit 152 outputs the selection signal S142 corresponding to the output signal S132 to the scan compression unit 170 as selection signal S152.

[0071] Furthermore, in order to output the results of the scan test on the processing unit 133 to the scan compression unit 170, the control unit 100 sets the control signal C122 so that the selection unit 122 outputs the pattern signal S113 to the processing unit 133 as a selection signal S122. Also, the control unit 100 sets the control signal C143 so that the selection unit 143 outputs the output signal S133 to the selection unit 153 as a selection signal S143. Furthermore, the control unit 100 sets the control signal C153 so that the selection unit 153 outputs the selection signal S143 corresponding to the output signal S133 to the scan compression unit 170 as a selection signal S153.

[0072] In addition, in order to output the results of the scan test on the processing unit 134 to the scan compression unit 170, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 to the processing unit 134 as selection signal S123. The control unit 100 also sets control signal C144 so that the selection unit 144 outputs the output signal S134 to the selection unit 154 as selection signal S144. Furthermore, the control unit 100 sets control signal C154 so that the selection unit 154 outputs the selection signal S144 corresponding to the output signal S134 to the scan compression unit 170 as selection signal S154.

[0073] According to this embodiment, when verifying the operation of a semiconductor device using a tester, a scan test is performed using the first to fifth test patterns, and the faulty processing unit is identified based on the results of the scan test. The specific procedure for identifying the faulty processing unit will be described below with reference to Figures 1 and 3. Figure 3 is a flowchart showing the procedure for identifying a faulty processing unit in the semiconductor device according to this embodiment and replacing that processing unit with a redundant unit.

[0074] In step S301, a scan test using the fifth test pattern is performed on the semiconductor device 11. That is, in step S301, the selection units 151 to 154 output selection signals S151 to S154 corresponding to the output signals S131 to 134 to the scan compression unit 170. The scan compression unit outputs output signal S170 to the tester based on the selection signals S151 to S154.

[0075] In step S302, the tester compares the output signal S170 with the expected value of the scan test using the fifth test pattern and determines whether the output signal S170 matches the expected value. If the output signal S170 matches the expected value (YES in step S302), the tester determines that the processing units 131 to 134 are operating normally and terminates the process in this flowchart. On the other hand, if the output signal S170 does not match the expected value (NO in step S302), the tester determines that at least one of the processing units 131 to 134 may be faulty and proceeds to step S303.

[0076] In step S303, scan tests using the first to fourth test patterns are sequentially performed on the semiconductor device 11. Specifically, for example, a scan test using the first test pattern is performed first. The selection unit 151 outputs a selection signal S151 corresponding to the output signal S131 to the scan compression unit 170. Meanwhile, the selection units 152 to 154 output selection signals S152 to S154 corresponding to the pattern signals S112 to S114, respectively, to the scan compression unit 170. That is, in the scan test using the first test pattern, the output signals S132 to S134 of the other processing units 132 to 134, excluding the processing unit 131, are not output to the scan compression unit 170. The scan compression unit outputs the output signal S170 to the tester based on the selection signals S151 to S154. Next, a scan test using the second test pattern is performed. The selection unit 152 outputs a selection signal S152 corresponding to the output signal S132 to the scan compression unit 170. Meanwhile, the selection units 151, 153, and 154 output selection signals S151, S153, and S154, corresponding to the pattern signals S111, S113, and S114 respectively, to the scan compression unit 170. In other words, in a scan test using the second test pattern, the output signals S131, S133, and S134 of the other processing units 131, 133, and 134, excluding the processing unit 132, are not output to the scan compression unit 170. The scan compression unit outputs the output signal S170 to the tester based on the selection signals S151 to S154.

[0077] Next, a scan test using the third test pattern is performed. The selection unit 153 outputs a selection signal S153 corresponding to the output signal S133 to the scan compression unit 170. Meanwhile, the selection units 151, 152, and 154 output selection signals S151, S152, and S154 corresponding to the pattern signals S111, S112, and S114, respectively, to the scan compression unit 170. In other words, in the scan test using the third test pattern, the output signals S131, S132, and S134 of the other processing units 131, 132, and 134, excluding the processing unit 133, are not output to the scan compression unit 170. The scan compression unit outputs the output signal S170 to the tester based on the selection signals S151 to S154. Finally, a scan test using the fourth test pattern is performed. The selection unit 154 outputs a selection signal S154 corresponding to the output signal S134 to the scan compression unit 170. Meanwhile, the selection units 151 to 153 output selection signals S151 to S153, corresponding to the pattern signals S111 to S113, to the scan compression unit 170. That is, in the scan test using the fourth test pattern, the output signals S131 to S133 of the other processing units 131 to 133, excluding the processing unit 134, are not output to the scan compression unit 170. The scan compression unit outputs the output signal S170 to the tester based on the selection signals S151 to S154. In other words, in step S303, the scan test using multiple test patterns is repeated a number of times corresponding to the number of processing units 131 to 134. After the completion of the scan test using the fourth test pattern, the process proceeds to step S304.

[0078] In step S304, the tester compares the output signal S170, which indicates the result of the scan test using the first to fourth test patterns, with the expected value corresponding to the first to fourth scan patterns, and determines whether the output signal S170 matches the expected value. If all the output signals S170 obtained from the first to fourth test patterns match the corresponding expected value (YES in step S304), the tester determines that the processing units 131 to 134 are operating normally and proceeds to step S309. In step S309, the tester determines that the semiconductor device 11 has a malfunction due to a cause other than a failure of the processing units 131 to 134. That is, the tester determines that the malfunction of the semiconductor device 11 cannot be resolved using the redundancy unit 135. The semiconductor device 11 with the malfunction is discarded as irreparable, and the process according to this flowchart ends.

[0079] On the other hand, in step S304, if any of the output signals S170 obtained by the first to fourth test patterns do not match the expected value (NO in step S304), the tester determines that the processing unit that output the output signal S170 is faulty and proceeds to step S305.

[0080] In step S305, the control unit 100 controls the selection units 121-123, 141-144, and 151-154 via control signals C12, C14, and C15 to perform signal processing using the redundant unit instead of the processing unit that has been determined to be faulty. As an example, the operation of the control unit 100 when the processing unit 132 is determined to be faulty will be described below with reference to Figure 1.

[0081] Processing unit 131 receives pattern signal S111, processing unit 133 receives pattern signal S112, processing unit 134 receives pattern signal S113, and redundancy unit 135 receives pattern signal S114. In addition, selection unit 151 outputs selection signal S151 corresponding to output signal S131, selection unit 152 outputs selection signal S152 corresponding to output signal S133, selection unit 153 outputs selection signal S153 corresponding to output signal S134, and selection unit 154 outputs selection signal S154 corresponding to output signal S135. The output signal S132 of the faulty processing unit 132 is not output to the scan compression unit 170.

[0082] As described above, in order to replace the processing unit 132 with the redundant unit 135, the control unit 100 sets the control signal C122 so that the selection unit 122 outputs the pattern signal S112 as the selection signal S122 to the processing unit 133. Also, the control signal C143 is set so that the selection unit 143 outputs the output signal S133 as the selection signal S143 to the selection unit 152. Furthermore, the control unit 100 sets the control signal C152 so that the selection unit 152 outputs the selection signal S143 corresponding to the output signal S133 as the selection signal S152 to the scan compression unit 170.

[0083] In addition, the control unit 100 sets the control signal C123 so that the selection unit 123 outputs the pattern signal S113 as a selection signal S123 to the processing unit 134. It also sets the control signal C144 so that the selection unit 144 outputs the output signal S134 as a selection signal S144 to the selection unit 153. Furthermore, the control unit 100 sets the control signal C153 so that the selection unit 153 outputs the selection signal S144 corresponding to the output signal S134 as a selection signal S153 to the scan compression unit 170.

[0084] Furthermore, the control unit 100 sets control signal C154 so that the selection unit 154 outputs output signal S135 as selection signal S154 to the scan compression unit 170. Also, the control unit 100 sets control signal C141 so that the selection unit 141 outputs output signal S131 as selection signal S141 to the selection unit 151. Furthermore, the control unit 100 sets control signal C151 so that the selection unit 151 outputs selection signal S141, which corresponds to output signal S131, as selection signal S151 to the scan compression unit 170. By setting control signals C12, C14, and C15 as described above, the use of the faulty processing unit 132 can be avoided, and signal processing can be performed by a redundant unit 135 having a circuit configuration logically equivalent to that of the processing unit 132 as an alternative. By replacing the faulty processing unit with the redundant unit 135, the decrease in yield of the semiconductor device 11 caused by the failure of the processing unit can be suppressed.

[0085] Here, as an example, the operation of the control unit 200 when it is determined that the processing unit 132 is malfunctioning will be described below with reference to Figure 2.

[0086] Processing unit 131 receives data signal S211, and processing unit 133 receives data signal S212. Processing unit 134 receives data signal S213, and redundancy unit 135 receives data signal S214. Selection unit 241 outputs selection signal S241 corresponding to output signal S131, and selection unit 242 outputs selection signal S242 corresponding to output signal S133. Selection unit 243 outputs selection signal S243 corresponding to output signal S134, and selection unit 244 outputs selection signal S244 corresponding to output signal S135. The output signal S132 from the faulty processing unit 132 is not output to circuit units 251-254.

[0087] As described above, in order to replace the processing unit 132 with the redundant unit 135, the control unit 200 sets the control signal C222 so that the selection unit 222 outputs the data signal S212 as the selection signal S222 to the processing unit 133. Also, the control signal C242 is set so that the selection unit 242 outputs the output signal S133 as the selection signal S242 to the circuit unit 252.

[0088] In addition, the control unit 100 sets the control signal C223 so that the selection unit 223 outputs the data signal S213 as a selection signal S223 to the processing unit 134. Furthermore, the control signal C143 is set so that the selection unit 243 outputs the output signal S134 as a selection signal S243 to the circuit unit 253.

[0089] Furthermore, the control unit 100 sets control signal C244 so that the selection unit 244 outputs output signal S135 as selection signal S244 to the circuit unit 254. Also, the control unit 100 sets control signal C241 so that the selection unit 241 outputs output signal S131 as selection signal S241 to the circuit unit 251. By setting control signals C22 and C24 as described above, the use of the faulty processing unit 132 can be avoided, and signal processing can be performed by a redundant unit 135 having a circuit configuration logically equivalent to that of the processing unit 132 as an alternative. By replacing the faulty processing unit with the redundant unit 135, the decrease in yield of the semiconductor device 21 caused by the failure of the processing unit can be suppressed.

[0090] In step S306, a scan test using the fifth test pattern is performed again on the semiconductor device 11. That is, in the case where the processing unit 132 is faulty, the selection units 151 to 154 output selection signals S151 to S154 corresponding to output signals S131 and S133 to 135 to the scan compression unit 170. The scan compression unit outputs output signal S170 to the tester based on the selection signals S151 to S154.

[0091] In step S307, the tester compares the output signal S170 with the expected value of the scan test using the fifth test pattern and determines whether the output signal S170 matches the expected value. If the output signal S170 matches the expected value (YES in step S307), the tester determines that the processing units 131, 133, 134 and the redundant unit 135 are operating normally and proceeds to step S308. On the other hand, if the output signal S170 does not match the expected value (NO in step S307), the tester determines that the semiconductor device 11 will not operate normally even if the redundant unit 135 replaces the faulty processing unit 132, and proceeds to step S309.

[0092] In step S308, the semiconductor device 11 stores the settings of control signals C12, C14, and C15 to replace the faulty processing unit 132 using the redundant unit 135. For example, the semiconductor device 11 stores or overwrites the modified settings of control signals C12, C14, and C15 in a non-volatile memory where the original settings of the control signals C12, C14, and C15 are stored. If the semiconductor device 11 has a MOSFET-integrated electronic fuse (efuse), the modified settings of control signals C12, C14, and C15 may be stored in the efuse. After storing the modified settings of control signals C12, C14, and C15, the process described in this flowchart is terminated.

[0093] Advances in semiconductor process miniaturization have made it possible to integrate a large number of transistors onto a single chip. However, this miniaturization has also made the manufacturing process for semiconductor devices increasingly complex. This increased complexity increases the factors that can cause minute defects within semiconductor devices. The occurrence of minute defects within semiconductor devices leads to a decrease in yield. Therefore, efforts are being made to improve the yield of semiconductor devices by replacing a faulty processing unit with another processing unit when a failure is detected in a processing unit during the initial testing of the semiconductor device before shipment.

[0094] To improve the yield of semiconductor devices, it is necessary to identify the faulty processing unit. Traditionally, identifying the faulty processing unit required analyzing the results of scan tests. This analysis was time-consuming, leading to a problem where the time required for operational testing of semiconductor devices increased dramatically as semiconductor processes became more miniaturized.

[0095] According to this disclosure, by performing scan tests on the processing unit using multiple test patterns, it becomes possible to easily identify the faulty processing unit. In other words, it eliminates the need for the time-consuming analysis of test results that was previously required to identify the faulty processing unit. Therefore, according to this disclosure, it is possible to improve yield while reducing the cost required for testing to verify the operation of semiconductor devices.

[0096] [Second Embodiment] The procedure for identifying a faulty processing unit using the method according to this embodiment will be described below with reference to Figures 1 and 4. Figure 4 is a flowchart showing the procedure for identifying a faulty processing unit in the semiconductor device according to this embodiment and replacing it with a redundant unit. In Figure 4, steps other than steps S403a, S403b, and S404 are the same as in Figure 3. Therefore, the explanation of steps other than steps S403a, S403b, and S404 will be omitted.

[0097] The method according to this embodiment differs from the first embodiment in that it divides multiple processing units into groups of processing units and recursively performs scan tests on the groups of processing units to identify the faulty processing unit.

[0098] In this embodiment, if the output signal S170 indicating the result of the scan test using the fifth test pattern does not match the expected value (NO in step S302), the tester determines that at least one of the processing units 131 to 134 may be faulty, and proceeds to step S403a.

[0099] In step S403a, scan tests using the sixth and seventh test patterns are sequentially performed on the semiconductor device 11. The sixth test pattern is used to perform a scan test on the group including the processing unit 131 and processing unit 132. The seventh test pattern is used to perform a scan test on the group including the processing unit 133 and processing unit 134. The sixth and seventh test patterns are described below.

[0100] <6th Test Pattern> In the sixth test pattern, output signals S131, S132, and S160, which are the results of scan tests on the processing unit 131, processing unit 132, and circuit unit 160, are output to the scan compression unit 170. On the other hand, in the sixth test pattern, output signals S133 to S135, which are the results of scan tests on the processing unit 133, processing unit 134, and redundancy unit 135, are not output to the scan compression unit 170.

[0101] To perform a scan test using the sixth test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 131 to the scan compression unit 170, the control unit 100 sets control signal C141 so that selection unit 141 outputs output signal S131 as selection signal S141 to selection unit 151. The control unit 100 also sets control signal C151 so that selection unit 151 outputs selection signal S141, which corresponds to output signal S131, as selection signal S151 to the scan compression unit 170.

[0102] In addition, in order to output the results of the scan test on the processing unit 132 to the scan compression unit 170, the control unit 100 sets control signal C121 so that the selection unit 121 outputs the pattern signal S112 to the processing unit 132 as selection signal S121. The control unit 100 also sets control signal C142 so that the selection unit 142 outputs the output signal S132 to the selection unit 152 as selection signal S142. Furthermore, the control unit 100 sets control signal C152 so that the selection unit 152 outputs the selection signal S142 corresponding to the output signal S132 to the scan compression unit 170 as selection signal S152.

[0103] On the other hand, in the sixth test pattern, output signals S133 to S135 are not output to the scan compression unit 170, while pattern signals S113 and S114 are output to the scan compression unit 170. Specifically, the control unit 100 sets control signal C122 so that the selection unit 122 outputs pattern signal S113 as selection signal S122 to the selection unit 143 via the bypass 133B. The control unit 100 also sets control signal C143 so that the selection unit 143 outputs selection signal S122, which corresponds to pattern signal S113, as selection signal S143 to the selection unit 153. Furthermore, the control unit 100 sets control signal C153 so that the selection unit 153 outputs selection signal S143, which corresponds to pattern signal S113, as selection signal S153 to the scan compression unit 170. Similarly, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 as selection signal S123 to the selection unit 144 via the bypass 134B. The control unit 100 also sets control signal C144 so that the selection unit 144 outputs the selection signal S123 corresponding to the pattern signal S114 as selection signal S144 to the selection unit 154. Furthermore, the control unit 100 sets control signal C154 so that the selection unit 154 outputs the selection signal S144 corresponding to the pattern signal S114 as selection signal S154 to the scan compression unit 170.

[0104] <Test Pattern 7> In the seventh test pattern, output signals S133, S134, and S160, which are the results of scan tests on the processing unit 133, processing unit 134, and circuit unit 160, are output to the scan compression unit 170. On the other hand, in the sixth test pattern, output signals S131, S132, and S135, which are the results of scan tests on the processing unit 131, processing unit 132, and redundancy unit 135, are not output to the scan compression unit 170.

[0105] To perform a scan test using the seventh test pattern, the control unit 100 sets control signals C12, C14, and C15 to predetermined values ​​and outputs these control signals to selection units 121-123, 141-144, and 151-154, respectively. Specifically, in order to output the results of the scan test for the processing unit 133 to the scan compression unit 170, the control unit 100 sets control signal C122 so that selection unit 122 outputs pattern signal S113 to processing unit 133 as selection signal S122. The control unit 100 also sets control signal C143 so that selection unit 143 outputs output signal S133 to selection unit 153 as selection signal S143. Furthermore, the control unit 100 sets control signal C153 so that selection unit 153 outputs selection signal S143, which corresponds to output signal S133, to the scan compression unit 170 as selection signal S153.

[0106] In addition, in order to output the results of the scan test on the processing unit 134 to the scan compression unit 170, the control unit 100 sets control signal C123 so that the selection unit 123 outputs the pattern signal S114 to the processing unit 134 as selection signal S123. The control unit 100 also sets control signal C144 so that the selection unit 144 outputs the output signal S134 to the selection unit 154 as selection signal S144. Furthermore, the control unit 100 sets control signal C154 so that the selection unit 154 outputs the selection signal S144 corresponding to the output signal S134 to the scan compression unit 170 as selection signal S154.

[0107] On the other hand, in the seventh test pattern, output signals S131, S132, and S135 are not output to the scan compression unit 170, while pattern signals S111 and S112 are output to the scan compression unit 170. Specifically, the control unit 100 sets control signal C141 so that the selection unit 141 outputs the pattern signal S111, which is input via the bypass 131B, to the selection unit 151 as selection signal S141. Furthermore, the control unit 100 sets control signal C151 so that the selection unit 151 outputs the selection signal S141, which corresponds to pattern signal S111, to the scan compression unit 170 as selection signal S151. In addition, the control unit 100 sets control signal C121 so that the selection unit 121 outputs the pattern signal S112 to the selection unit 142 via the bypass 132B as selection signal S121. Furthermore, the control unit 100 sets the control signal C142 so that the selection unit 142 outputs the selection signal S121, which corresponds to the pattern signal S112, to the selection unit 152 as selection signal S142. In addition, the control unit 100 sets the control signal C152 so that the selection unit 152 outputs the selection signal S142, which corresponds to the pattern signal S112, to the scan compression unit 170 as selection signal S152.

[0108] In step S403a, for example, a scan test using the sixth test pattern is performed first. Selection units 151 and 152 output selection signals S151 and S152, corresponding to output signals S131 and S132, respectively, to the scan compression unit 170. Meanwhile, selection units 153 and 154 output selection signals S153 and S154, corresponding to pattern signals S113 and S114, respectively, to the scan compression unit 170. The scan compression unit outputs output signal S170 to the tester based on selection signals S151 to S154. Next, a scan test using the seventh test pattern is performed. Selection units 153 and 154 output selection signals S153 and S154, corresponding to output signals S133 and S134, respectively, to the scan compression unit 170. Meanwhile, the selection unit 151 and the selection unit 152 output selection signals S151 and S152, which correspond to pattern signals S111 and S112, respectively, to the scan compression unit 170. The scan compression unit outputs output signal S170 to the tester based on selection signals S151 to S154.

[0109] If the output signal S170 obtained by the sixth test pattern does not match the expected value, the tester determines that the processing unit 131 or processing unit 132 that output the output signal S170 is faulty. Similarly, if the output signal S170 obtained by the seventh test pattern does not match the expected value, the tester determines that the processing unit 133 or processing unit 134 that output the output signal S170 is faulty. The following describes an example where processing unit 132 is faulty. Based on the output signal S170 obtained by the sixth test pattern and the corresponding expected value, the tester determines that processing unit 131 or processing unit 132 is faulty.

[0110] In step S403b, scan tests using the first test pattern and the second test pattern are sequentially performed on the semiconductor device 11. Specifically, for example, a scan test using the first test pattern is performed first. The selection unit 151 outputs a selection signal S151 corresponding to the output signal S131 to the scan compression unit 170. Meanwhile, the selection units 152 to 154 output selection signals S152 to S154 corresponding to the pattern signals S112 to S114, respectively, to the scan compression unit 170. The scan compression unit outputs an output signal S170 to the tester based on the selection signals S151 to S154. Next, a scan test using the second test pattern is performed. The selection unit 152 outputs a selection signal S152 corresponding to the output signal S132 to the scan compression unit 170. Meanwhile, the selection units 151, 153, and 154 output selection signals S151, S153, and S154, corresponding to the pattern signals S111, S113, and S114 respectively, to the scan compression unit 170. The scan compression unit outputs an output signal S170 to the tester based on the selection signals S151 to S154.

[0111] In step S404, the tester compares the output signals S170, which indicate the results of the scan tests using the first and second test patterns, with the corresponding expected values, and determines whether the output signals S170 match the expected values. If both the output signals S170 obtained from the first and second test patterns match the corresponding expected values ​​(YES in step S404), the tester determines that the processing units 131 and 132 are operating normally and proceeds to step S309.

[0112] On the other hand, in step S404, if the output signal S170 obtained by the first or second test pattern does not match the expected value (NO in step S404), the tester determines that the processing unit that output the output signal S170 is faulty and proceeds to step S305. In the example above, the output signal S170 obtained by the second test pattern does not match the expected value, and the tester determines that the processing unit 132 that output the output signal S170 is faulty.

[0113] If processing unit 133 or processing unit 134 is faulty, in step S403a, the tester determines that processing unit 133 or processing unit 134 is faulty based on the output signal S170 obtained by the seventh test pattern and the corresponding expected value. Next, in step S403b, scan tests using the third test pattern and the fourth test pattern are sequentially performed on the semiconductor device 11. Next, in step S404, if the output signal S170 obtained by the third test pattern or the fourth test pattern does not match the expected value (NO in step S404), the tester determines that the processing unit that output the output signal S170 is faulty, and proceeds to step S305. For example, if processing unit 134 is faulty, the output signal S170 obtained by the fourth test pattern does not match the expected value, and the tester determines that the processing unit 134 that output the output signal S170 is faulty.

[0114] Furthermore, the grouping of multiple processing units is not limited to two divisions, and any division method can be adopted. In addition, after identifying the group containing the processing unit experiencing a failure, the identified group may be further divided into multiple groups, the group containing the failureing processing unit may be identified from the newly divided groups, and the failureing processing unit may be identified from the identified group. The number of processing units included in the semiconductor device 11 is not limited to the description in this disclosure, and can be, for example, N (where N is a natural number of 2 or more). Furthermore, the number of processing units included in one group is not limited to the description in this disclosure, and can be, for example, M (where M is a natural number less than N).

[0115] According to this embodiment, by recursively performing scan tests on groups containing multiple processing units, faulty processing units can be identified more efficiently. The method according to this embodiment is particularly effective when there are many processing units to be inspected. In other words, according to this embodiment, yield can be improved while further reducing the cost required for testing to verify operation in semiconductor devices containing highly integrated processing units.

[0116] [Third Embodiment] The equipment according to the third embodiment will be described with reference to Figure 5. Figure 5 is a block diagram showing the schematic configuration of the equipment according to this embodiment.

[0117] Figure 5 is a schematic diagram showing a device EQP including a photoelectric converter APR. All or part of the photoelectric converter APR is a semiconductor device IC. The semiconductor device IC provides the functions of a semiconductor device according to this disclosure. The photoelectric converter APR in this example can be used, for example, as an image sensor, an AF (Auto Focus) sensor, a photometering sensor, a distance measuring sensor, etc. The semiconductor device IC has a pixel area PX in which pixel circuits PXC, including a photoelectric conversion unit, are arranged in a matrix. The semiconductor device IC may have a peripheral area PR around the pixel area PX. Circuits other than pixel circuits can be arranged in the peripheral area PR.

[0118] The photoelectric converter APR may have a stacked structure (chip stacking structure) comprising a first semiconductor chip provided with multiple photoelectric conversion units and a second semiconductor chip provided with peripheral circuits. The peripheral circuits on the second semiconductor chip can each be a column circuit corresponding to a pixel row of the first semiconductor chip. Alternatively, the peripheral circuits on the second semiconductor chip can each be a matrix circuit corresponding to a pixel or pixel block of the first semiconductor chip. For connecting the first and second semiconductor chips, through-swivel electrodes (TSVs), direct bonding of conductors such as copper for inter-chip wiring, connection by microbumps between chips, or connection by wire bonding can be employed.

[0119] The photoelectric converter APR may include a semiconductor device IC as well as a package PKG that houses the semiconductor device IC. The package PKG may include a substrate on which the semiconductor device IC is fixed, a lid made of glass or the like that faces the semiconductor device IC, and connecting members such as bonding wires and bumps that connect terminals provided on the substrate to terminals provided on the semiconductor device IC.

[0120] The EQP device may further comprise at least one of the following: an optical device OPT, a control unit CTRL, a processing unit PRCS, a display unit DSPL, a memory device MMRY, and a mechanical device MCHN. The optical device OPT corresponds to the photoelectric converter APR as a photoelectric converter, and is, for example, a lens, shutter, or mirror. The control unit CTRL controls the photoelectric converter APR and is, for example, a semiconductor device such as an ASIC.

[0121] The processing unit PRCS processes the signals output from the photoelectric converter APR and constitutes either the AFE (analog front end) or DFE (digital front end). The processing unit PRCS is a semiconductor device such as a CPU (central processing unit) or ASIC (application-specific integrated circuit). The display device DSPL is an EL display device, liquid crystal display device, etc., that displays the information (image) obtained from the photoelectric converter APR. The memory device MMRY is a magnetic device, semiconductor device, etc., that stores the information (image) obtained from the photoelectric converter APR. The memory device MMRY is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as flash memory or hard disk drive.

[0122] Furthermore, the processing unit PRCS may acquire optical flow using the signals output by the semiconductor device according to this disclosure. For example, the processing unit PRCS may generate a correlation image weighted based on a sine function, a correlation image weighted based on a cosine function, and a normal image, and acquire optical flow from these three images.

[0123] The mechanical device MCHN has moving parts or propulsion parts such as motors and engines. The equipment EQP displays the signals output from the photoelectric converter APR on the display device DSPL, or transmits them to the outside using a communication device (not shown) provided by the equipment EQP. For this purpose, it is preferable that the equipment EQP further includes a memory device MMRY and a processing device PRCS, separate from the memory circuit and arithmetic circuit of the photoelectric converter APR. The mechanical device MCHN may be controlled based on the signals output from the photoelectric converter APR.

[0124] The EQP (Equipment Equipped Device) shown in Figure 5 can be electronic devices such as information terminals with imaging capabilities (e.g., smartphones and wearable devices), cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). In cameras, the mechanical device MCHN can drive components of the optical device OPT for zooming, focusing, and shutter operation. The EQP can also be transportation equipment (mobile devices) such as vehicles, ships, drones, and airplanes. Furthermore, the EQP can be medical equipment such as endoscopes and CT scanners. Additionally, the EQP can be measuring instruments such as distance sensors, analytical instruments such as electron microscopes, office equipment such as photocopiers, and industrial equipment such as robots.

[0125] The mechanical device MCHN in transport equipment can be used as a mobile device. The device EQP as transport equipment is suitable for transporting the photoelectric converter APR, assisting and / or automating driving (operation) through its imaging function, etc. The processing device PRCS for assisting and / or automating driving (operation) can perform processing to operate the mechanical device MCHN as a mobile device based on information obtained from the photoelectric converter APR.

[0126] According to this disclosure, the yield of semiconductor devices can be improved, and the time and cost required for inspecting semiconductor devices can be reduced. Therefore, the photoelectric converter APR according to this embodiment can provide high value to its designers, manufacturers, distributors, buyers, and / or users. Thus, by incorporating the photoelectric converter APR into an equipment EQP, the value of the equipment EQP can also be increased. Therefore, when manufacturing and selling equipment EQPs, deciding to incorporate the photoelectric converter APR of this embodiment into the equipment EQP is advantageous in increasing the value of the equipment EQP. Increasing value here includes at least one of the following: addition of functions, improvement of performance, improvement of characteristics, improvement of reliability, improvement of manufacturing yield, reduction of environmental impact, cost reduction, miniaturization, and weight reduction.

[0127] For example, by installing the APR (Photoelectric Converter) in transportation equipment, superior performance can be obtained when photographing the outside of the transportation equipment or measuring the external environment. Therefore, when manufacturing and selling transportation equipment, deciding to install the APR (Photoelectric Converter) according to this embodiment in the transportation equipment is advantageous in improving the performance of the transportation equipment itself. In particular, the APR (Photoelectric Converter) is suitable for transportation equipment that uses information obtained from the APR to provide driving assistance and / or automatic driving.

[0128] [Fourth Embodiment] Figures 6(a) and 6(b) are block diagrams of the equipment related to the in-vehicle camera in this embodiment. Figures 6(a) and 6(b) show an example of applying the photoelectric conversion device including the semiconductor device according to this disclosure to a moving object such as a vehicle. The device 80 has an imaging device 800 (an example of a photoelectric conversion device) and a signal processing device (processing device) that processes signals from the imaging device 800. The device 80 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the imaging device 800, and a parallax calculation unit 802 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the device 80.

[0129] Here, the device 80 may include an optical system (not shown) that guides light to the imaging device 800. The optical system may include, for example, lenses, shutters, and mirrors. In addition, multiple photoelectric conversion units that are substantially conjugate to the pupil of the optical system may be arranged in pixels of the imaging device 800. For example, the multiple photoelectric conversion units may be arranged corresponding to one microlens. The multiple photoelectric conversion units receive light beams that have passed through different positions in the pupil of the optical system. As a result, the imaging device 800 outputs multiple image data corresponding to the light beams that have passed through different positions in the pupil of the optical system. The disparity calculation unit 802 may then calculate the disparity using the output multiple image data.

[0130] Furthermore, the device 80 includes a distance measurement unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax calculation unit 802 and the distance measurement unit 803 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 804 may use any of this distance information to determine the possibility of collision. Note that the distance information may be acquired using ToF (Time of Flight) technology. The distance information acquisition means may be implemented by specially designed hardware or by a software module. It may also be implemented by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or a combination thereof.

[0131] Device 80 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Device 80 is also connected to a control ECU 820, which is a control device that outputs a control signal to generate braking force on the vehicle based on the collision determination result of the collision determination unit 804. Furthermore, device 80 is connected to a warning device 830 that issues a warning to the driver based on the collision determination result of the collision determination unit 804. For example, if the collision determination result of the collision determination unit 804 indicates a high probability of collision, the control ECU 820 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 830 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seatbelt or steering wheel. As described above, device 80 functions as a control means that controls the actions that control the vehicle.

[0132] In this embodiment, the equipment 80 images the area around the vehicle, for example, in front of or behind it. Figure 6(b) shows the equipment when imaging the area in front of the vehicle (imaging range 850). The vehicle information acquisition device 810, acting as an imaging control means, sends instructions to the equipment 80 or imaging device 800 to perform the imaging operation. This configuration allows for further improvement of the accuracy of distance measurement.

[0133] The above example described controlling a vehicle to avoid collisions with other vehicles, but it can also be applied to control systems that automatically follow other vehicles, or control systems that automatically stay within their lane. Furthermore, the equipment is not limited to vehicles such as automobiles, but can be applied to mobile objects (mobile devices) such as ships, aircraft, satellites, industrial robots, and consumer robots. In addition, it can be applied not only to mobile objects, but also to a wide range of devices that utilize object recognition or biometric recognition, such as intelligent transportation systems (ITS) and surveillance systems.

[0134] [Modified Embodiment] The present invention is not limited to the embodiments described above and can be modified in various ways. For example, an example in which a part of the configuration of one embodiment is added to another embodiment, or an example in which a part of the configuration of one embodiment is replaced with a part of the configuration of another embodiment, is also an embodiment of the present invention.

[0135] For example, additional selection units corresponding to selection units 141 to 144 may be provided in the semiconductor device 11 between the redundant unit 135 and the selection unit 154 according to this disclosure, and a bypass may be provided in the semiconductor device 11 for inputting the pattern signal S114 to the additional selection unit by bypassing the redundant unit 135.

[0136] Each functional unit included in the semiconductor device according to this disclosure may include various circuit configurations. For example, the processing units 131-134 and the redundant unit 135 may be signal processing circuits. Also, the scan unpacking unit 110 and the scan compression unit 170 may be a signal unpacking circuit and a signal compression circuit, respectively. Furthermore, the selection units 121-123, 141-144, and 151-154 are signal selection circuits and may include multiplexers.

[0137] The embodiments described above can be modified as appropriate without departing from the technical concept. Furthermore, the disclosures in this specification include not only what is described herein, but also all matters that can be understood from this specification and the drawings attached thereto. In addition, the disclosures in this specification include the complement of the concepts described herein. That is, if this specification states, for example, "A is greater than B," then even if the statement "A is not greater than B" is omitted, this specification can be said to disclose that "A is not greater than B." This is because the statement "A is greater than B" presupposes that the case where "A is not greater than B" is being considered.

[0138] The disclosures in this specification include the following methods and structures: (Method 1) A method for inspecting a semiconductor device which includes multiple processing units, each having a scan chain, A first step involves inputting a scan signal to the plurality of processing units and determining whether a failure has occurred in any of the plurality of processing units based on the output signals of the plurality of processing units and the expected value corresponding to the scan signal. In the first step, when it is determined that a fault has occurred, the scan signal is input to some of the processing units among the plurality of processing units, and a second step is taken to determine whether or not a fault has occurred in the processing unit based on the output signal of the processing unit and the expected value. Methods that include... (Method 2) The method according to Method 1, wherein, in the second step, output signals from processing units other than the aforementioned processing units are not used to determine the fault. (Method 3) The semiconductor device includes a scan compression unit that outputs multiple output signals from the multiple processing units as a single signal. In the second step, some processing units output the output signal to the scan compression unit, while other processing units do not output the output signal to the scan compression unit. The method described in Method 1 or 2. (Method 4) The method according to any one of methods 1 to 3, wherein in the second step, the scan signal is output to the scan compression unit via a bypass that goes around the other processing units. (Method 5) The aforementioned partial processing unit is one of the plurality of processing units, The second step involves sequentially inputting the scan signal to each of the plurality of processing units to identify the processing unit in which a malfunction has occurred. The method described in any one of Methods 1 to 4. (Method 6) Each of the aforementioned processing units is one of a plurality of groups, each containing a plurality of the aforementioned processing units. The second step described above is: The steps include identifying the group in which a failure has occurred among the aforementioned group, The steps include dividing the identified group into further groups and By repeating this process, the faulty processing unit is identified. The method described in any one of Methods 1 to 4. (Method 7) At least one of the plurality of processing units is a redundant processing unit having a configuration corresponding to the processing unit, When it is determined that the processing unit is malfunctioning, the malfunctioning processing unit is replaced with the redundant processing unit. The method described in any one of Methods 1 to 6. (Method 8) The method of Method 7, further comprising the step of replacing the faulty processing unit with the redundant processing unit, inputting the scan signal to the plurality of processing units, and determining whether the semiconductor device is operating normally based on the output signals of the plurality of processing units excluding the faulty processing unit and the expected value. (Composition 1) Multiple processing units, each having a scan chain, A redundant processing unit having a configuration corresponding to the aforementioned processing unit, and which can replace the faulty aforementioned processing unit, A scan expansion unit that expands the input signal into multiple scan signals, A scan compression unit receives multiple output signals corresponding to the scan signal from the multiple processing units and the redundant processing unit, and outputs the multiple output signals as a single signal. A plurality of input signal paths for transmitting the plurality of scan signals from the scan deployment unit to the plurality of processing units and the redundant processing unit, A plurality of output signal paths for transmitting the plurality of output signals from the plurality of processing units and the plurality of redundant processing units to the scan compression unit, Multiple bypasses are provided for transmitting the scan signal from the scan expansion unit to the scan compression unit, bypassing the multiple processing units. A semiconductor device equipped with the following features. (Configuration 2) The system further comprises a control unit that switches the plurality of input signal paths, the plurality of output signal paths, and the plurality of bypasses, The control unit, A first operation involves inputting the plurality of scan signals to the plurality of processing units and outputting output signals corresponding to the scan signals from the plurality of processing units to the scan compression unit, After the first operation, a second operation is performed in which the scan signal is input to some of the processing units among the plurality of processing units, and output signals corresponding to the scan signal are output from the processing units to the scan compression unit. Execute The semiconductor device described in Configuration 1. (Composition 3) In the second operation, the semiconductor device according to configuration 1 or 2, wherein the processing units other than the certain processing units do not output the output signal to the scan compression unit. (Composition 4) In the second operation, a portion of the plurality of scan signals is output to the scan compression unit via the bypass, as described in any one of configurations 1 to 3, the semiconductor device according to this configuration. (Composition 5) The output signal path further comprises a first selection unit, The first selection unit receives the output signal from the processing unit and the scan signal from the scan deployment unit via the bypass. The semiconductor device according to any one of configurations 2 to 4, wherein the control unit controls the first selection unit to output the output signal or the scan signal to the scan compression unit. (Composition 6) The output signal path further comprises a second selection unit, The second selection unit receives a selection signal from the first selection unit and the output signal from the redundancy processing unit. The control unit controls the second selection unit to output the selection signal or the output signal to the scan compression unit. The semiconductor device described in configuration 5. (Composition 7) The input signal path further comprises a third selection unit, The third selection unit receives the scan signal from the scan deployment unit, The control unit controls the third selection unit to output the scan signal to the processing unit or the redundancy processing unit. A semiconductor device according to any one of configurations 2 to 6. (Composition 8) A photoelectric conversion device including a semiconductor device described in any one of items 1 to 7, Optical device corresponding to the aforementioned photoelectric converter, A control device for controlling the aforementioned photoelectric converter, A processing device that processes the signal output from the aforementioned photoelectric converter, A display device that displays information obtained by the aforementioned photoelectric converter. A storage device for storing information obtained by the aforementioned photoelectric converter, and At least one of the following: a mechanical device that operates based on information obtained from the aforementioned photoelectric converter, A device equipped with the following features. (Composition 9) The processing device is the device described in configuration 8, which acquires distance information from the photoelectric converter to the object. (Composition 10) A mobile body comprising the equipment described in configuration 8 or 9.

[0139] The present invention can also be realized by supplying a program that implements one or more of the functions of the above-described embodiments to a system or device via a network or storage medium, and by a process in which one or more processors in the computer of that system or device read and execute the program. It can also be realized by a circuit (e.g., an ASIC) that implements one or more functions.

[0140] It should be noted that the embodiments described above are merely examples of how the present invention can be implemented, and the technical scope of the present invention should not be interpreted as being limited by them. In other words, the present invention can be implemented in various ways without departing from its technical concept or its main features. [Explanation of Symbols]

[0141] 11 Semiconductor Equipment 100 Control Unit 110 Scan and unfolding unit 131-134 Processing Unit 135 Redundant section Selection section 121-123, 141-144, 151-154 170 Scan Compression Unit

Claims

1. A method for inspecting a semiconductor device which includes multiple processing units, each having a scan chain, A first step involves inputting a scan signal to the plurality of processing units and determining whether a failure has occurred in any of the plurality of processing units based on the output signals of the plurality of processing units and the expected value corresponding to the scan signal. In the first step, when it is determined that a fault has occurred, the scan signal is input to some of the processing units among the plurality of processing units, and the second step is to determine whether or not a fault has occurred in the processing unit based on the output signal of the processing unit and the expected value. Methods that include...

2. The method according to claim 1, wherein, in the second step, output signals from processing units other than the aforementioned processing units are not used for determining the fault.

3. The semiconductor device includes a scan compression unit that outputs multiple output signals from the multiple processing units as a single signal. In the second step, some processing units output the output signal to the scan compression unit, while other processing units do not output the output signal to the scan compression unit. The method according to claim 2.

4. The method according to claim 3, wherein in the second step, the scan signal is output to the scan compression unit via a bypass that goes around the other processing units.

5. The aforementioned partial processing unit is one of the plurality of processing units, The second step involves sequentially inputting the scan signal to each of the plurality of processing units to identify the processing unit in which a malfunction has occurred. The method according to claim 1.

6. Each of the aforementioned processing units is one of a plurality of groups, each containing a plurality of the aforementioned processing units. The second step described above is: The steps include identifying the group in which a failure has occurred among the aforementioned group, The steps of further dividing the identified group into multiple groups By repeating this process, the faulty processing unit is identified. The method according to claim 1.

7. At least one of the plurality of processing units is a redundant processing unit having a configuration corresponding to the processing unit, When it is determined that the processing unit is malfunctioning, the malfunctioning processing unit is replaced with the redundant processing unit. The method according to claim 1.

8. The method according to claim 7, further comprising the step of replacing the faulty processing unit with the redundant processing unit, inputting the scan signal to the plurality of processing units, and determining whether the semiconductor device is operating normally based on the output signals of the plurality of processing units excluding the faulty processing unit and the expected value.

9. Multiple processing units, each having a scan chain, A redundant processing unit having a configuration corresponding to the aforementioned processing unit, and which can replace the faulty aforementioned processing unit, A scan expansion unit that expands the input signal into multiple scan signals, A scan compression unit receives multiple output signals corresponding to the scan signal from the multiple processing units and the redundant processing unit, and outputs the multiple output signals as a single signal. A plurality of input signal paths for transmitting the plurality of scan signals from the scan deployment unit to the plurality of processing units and the redundant processing unit, A plurality of output signal paths for transmitting the plurality of output signals from the plurality of processing units and the plurality of redundant processing units to the scan compression unit, Multiple bypasses are provided for transmitting the scan signal from the scan expansion unit to the scan compression unit, bypassing the multiple processing units. A semiconductor device equipped with the following features.

10. The system further comprises a control unit that switches the plurality of input signal paths, the plurality of output signal paths, and the plurality of bypasses, The control unit, A first operation involves inputting the plurality of scan signals to the plurality of processing units and outputting output signals corresponding to the scan signals from the plurality of processing units to the scan compression unit, After the first operation, a second operation is performed in which the scan signal is input to some of the processing units among the plurality of processing units, and an output signal corresponding to the scan signal is output from the processing unit to the scan compression unit. A semiconductor device according to claim 9, which performs the following actions.

11. In the second operation, the other processing units, excluding the part of the processing unit, do not output the output signal to the scan compression unit, as described in claim 10.

12. The semiconductor device according to claim 11, wherein in the second operation, a portion of the plurality of scan signals is output to the scan compression unit via the bypass.

13. The output signal path further comprises a first selection unit, The first selection unit receives the output signal from the processing unit and the scan signal from the scan deployment unit via the bypass. The control unit controls the first selection unit to output the output signal or the scan signal to the scan compression unit. The semiconductor device according to claim 12.

14. The output signal path further comprises a second selection unit, The second selection unit receives a selection signal from the first selection unit and the output signal from the redundancy processing unit. The control unit controls the second selection unit to output the selection signal or the output signal to the scan compression unit. The semiconductor device according to claim 13.

15. The input signal path further comprises a third selection unit, The third selection unit receives the scan signal from the scan deployment unit, The control unit controls the third selection unit to output the scan signal to the processing unit or the redundancy processing unit. The semiconductor device according to claim 10.

16. A photoelectric conversion device including a semiconductor device according to any one of claims 9 to 15, Optical device corresponding to the aforementioned photoelectric converter, A control device for controlling the aforementioned photoelectric converter, A processing device that processes the signal output from the aforementioned photoelectric converter, A display device that displays information obtained by the aforementioned photoelectric converter. A storage device for storing information obtained by the aforementioned photoelectric converter, and At least one of the following: a mechanical device that operates based on information obtained from the aforementioned photoelectric converter; A device equipped with the following features.

17. The apparatus according to claim 16, wherein the processing device acquires distance information from the photoelectric converter to the object.

18. A mobile body comprising the device described in claim 17.

Images