Indication device

Abstract

A semiconductor having a high aperture ratio and a capacitive element capable of increasing charge capacitance. We provide the device. [Solution] A transistor on a substrate, a first light-transmitting conductive film on the substrate, and An oxide insulating film covering the zista and having an opening provided on a conductive film having first light-transmitting properties, , on an oxide insulating film, and in contact with a first light-transmitting conductive film at the opening, nitrogen A dielectric insulating film and a second light-transmitting material connected to a transistor, with a recess formed at the opening. It comprises a conductive film having a second light-transmitting property and an organic resin film that fills the recesses of the conductive film having a second light-transmitting property. It is a semiconductor device.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device or display device having an oxide semiconductor. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors being described are amorphous silicon, single-crystal silicon formed on a glass substrate. It is made of silicon semiconductors such as silicon or polycrystalline silicon. Transistors using semiconductors are also used in integrated circuits (ICs) and other applications.

[0003] In recent years, metal oxides exhibiting semiconductor properties have been used in transistors instead of silicon semiconductors. The technology is attracting attention. In this specification, metal oxides exhibiting semiconductor properties are referred to as oxides. Let's call it a semiconductor.

[0004] For example, as an oxide semiconductor, zinc oxide or an In-Ga-Zn oxide is used. A transistor is fabricated and used as a switching element for pixels in a display device. The technology is disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0006] A capacitive element has a dielectric film between a pair of electrodes, and of the pair of electrodes, at least The other electrode is a gate electrode, source electrode, or drain electrode that constitutes a transistor. They are often formed with a conductive film that has light-shielding properties.

[0007] Furthermore, in liquid crystal display devices, the larger the charge capacitance of the capacitive element, the more the applied electric field changes. In this context, the ability to maintain a constant orientation of liquid crystal molecules in a liquid crystal element for an extended period of time is important. Yes, it is possible. When displaying a still image, the duration can be extended by rewriting the image data. This can reduce the number of times it is used, and thus reduce power consumption.

[0008] In order to increase the charge capacitance of a capacitive element, the area occupied by the capacitive element must be increased. One method is to increase the area where the pair of electrodes overlap. However, liquid crystal In a display device, a light-shielding electrode is used to increase the area over which a pair of electrodes overlap. Increasing the surface area of ​​the film reduces the aperture ratio of the pixels, which degrades the display quality of the image. This problem is particularly pronounced in high-resolution liquid crystal displays.

[0009] On the other hand, in liquid crystal display devices, display defects can occur due to disorder in the orientation of liquid crystal molecules. Disorders in the orientation of liquid crystal molecules include disclination and light leakage.

[0010] Near the alignment layer, one end of the liquid crystal molecule lifts up from the alignment layer and becomes oriented. Then, the direction from the edge closest to the alignment film toward the lifted edge was orthogonally projected onto the substrate surface. The direction is called the "pretilt direction." Also, the angle between the long axis of the liquid crystal molecule and the alignment film is called It's called "pre-tilt angle".

[0011] The pretilt angles of adjacent liquid crystal molecules are almost the same, but the direction of pretilt differs. The misalignment of liquid crystal molecules resulting from this is called "disclination." This can cause linear defects in pixels when the liquid crystal display is showing white.

[0012] Furthermore, due to the unevenness of the region where the alignment film is formed (hereinafter referred to as the formed region), the liquid crystal component The misalignment of liquid crystal molecules resulting from different pre-tilt angles is called "light leakage." This results in a decrease in contrast when the LCD display shows black.

[0013] Therefore, one aspect of the present invention is a container that has a high aperture ratio and can increase its charge capacity. One objective is to provide a semiconductor device having a quantitative element. Alternatively, one aspect of the present invention is One of the objectives of this invention is to provide a semiconductor device with high contrast. The objective of this embodiment is to provide a semiconductor device using a light-transmitting electrode.

[0014] Furthermore, the description of these problems does not preclude the existence of other problems. One embodiment does not need to solve all of these problems. [Means for solving the problem]

[0015] One aspect of the present invention is a transistor on a substrate and a first light-transmitting conductive film on the substrate. an oxide that covers the transistor and has an opening provided on a conductive film having first light-transmitting properties. An insulating film and a conductive film on the oxide insulating film that has first light transmittance at the opening. A nitride insulating film in contact with the transistor and a second that is connected to the transistor and has a recess formed at its opening. A conductive film having light-transmitting properties, and an organic resin film filling the recesses of the second conductive film having light-transmitting properties. It is a semiconductor device having the following features.

[0016] Furthermore, one aspect of the present invention comprises a transistor on a substrate and a first translucent conductive material on the substrate. An opening is provided on the conductive film that covers the transistor and has first light-transmitting properties. An oxide insulating film and a conductive material having first light transmission at the opening on the oxide insulating film. A nitride insulating film in contact with the electrode film, connected to a transistor, and having a recess formed at the opening. An oxide insulating film having a second light-transmitting conductive film and an opening, The angle between the surface of the first translucent conductive film and the side surface of the oxide insulating film is 5° or more. 5° or less, preferably 5° to 30°, and more preferably 10° to 20°. This is a semiconductor device. Furthermore, an organic resin film fills the recesses of the second light-transmitting conductive film. You may have it.

[0017] A transistor consists of a gate electrode formed on a substrate and a gate in contact with the gate electrode. An insulating film, an oxide semiconductor film in contact with the gate insulating film, and a pair of conductive materials in contact with the oxide semiconductor film. A conductive film having a first light-transmitting property is in contact with the gate insulating film.

[0018] Furthermore, the oxide semiconductor film is formed simultaneously with the first light-transmitting conductive film.

[0019] Furthermore, the first light-transmitting conductive film and the oxide semiconductor film are made of In, Ga, or Zn It includes at least one of the following. [Effects of the Invention]

[0020] According to one aspect of the present invention, a capacitance element capable of having a high aperture ratio and increasing charge capacitance is provided. A semiconductor device having children can be fabricated. Alternatively, according to one aspect of the present invention, High-last semiconductor devices can be fabricated. Alternatively, according to one aspect of the present invention, light transmission is possible. A semiconductor device can be fabricated using electrodes that possess certain properties. [Brief explanation of the drawing]

[0021] [Figure 1] These are block diagrams and circuit diagrams illustrating one form of a semiconductor device. [Figure 2] This is a top view illustrating one form of a semiconductor device. [Figure 3] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 4] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 5] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 6] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 7] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 8] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 9] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 10] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 11] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 12] This is a top view illustrating one form of a semiconductor device. [Figure 13] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 14] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 15]This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 16] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 17] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 18] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 19] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 20] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 21] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 22] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 23] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 24] This is a cross-sectional view illustrating one form of a method for manufacturing semiconductor devices. [Figure 25] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 26] This is a cross-sectional view illustrating one form of transistor. [Figure 27] This is a cross-sectional view illustrating one form of transistor. [Figure 28] This is a cross-sectional view illustrating one form of transistor. [Figure 29] This is a cross-sectional view illustrating one form of transistor. [Figure 30] This is a cross-sectional view illustrating one form of transistor. [Figure 31] This figure shows the micro-electron diffraction pattern of an oxide semiconductor. [Figure 32] This figure shows the micro-electron diffraction pattern of an oxide semiconductor. [Figure 33] This is a diagram illustrating a touch sensor according to an embodiment. [Figure 34] This diagram illustrates an example configuration of a touch panel and electronic device according to an embodiment. [Figure 35] This is a diagram illustrating a pixel equipped with a touch sensor according to an embodiment. [Figure 36] This diagram illustrates the operation of the touch sensor and pixels according to the embodiment. [Figure 37] This is a block diagram showing an example configuration of a semiconductor device. [Figure 38] This is a timing chart illustrating one example of a method for driving semiconductor devices. [Figure 39] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 40] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 41] This is a diagram illustrating STEM imagery. [Figure 42] This is a diagram illustrating the image observed with a polarizing microscope. [Figure 43] This is a diagram illustrating the calculation results. [Figure 44] This is a diagram illustrating an SEM image. [Figure 45] This is a diagram illustrating STEM imagery. [Figure 46] This is a diagram illustrating the image observed with a polarizing microscope. [Figure 47] This is a diagram illustrating the structure of the sample. [Figure 48] This is a diagram illustrating sheet resistance. [Figure 49] This is a diagram illustrating sheet resistance. [Figure 50] This is a diagram illustrating sheet resistance. [Figure 51] This is a diagram illustrating the measurement results of SIMS. [Figure 52] This diagram illustrates the measurement results of ESR. [Figure 53] This diagram illustrates the measurement results of ESR. [Figure 54] A diagram illustrating the bulk model of InGaZnO4 crystals. [Figure 55] A diagram illustrating the formation energy and thermodynamic transition level of VoH. [Modes for carrying out the invention]

[0022] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention The present invention is not limited to the following description, and its form and scope may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention The following embodiments and examples are not to be interpreted as being limited to their descriptions. In the embodiments and examples described below, parts that are the same or have similar functions In some cases, the same reference numeral or hatch pattern is used in common across different drawings, and the repetition of this pattern is used. I will omit the explanation of the repetition.

[0023] In each figure described herein, the size, film thickness, or region of each component is as follows: It may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. stomach.

[0024] Furthermore, the terms "first," "second," "third," etc. used in this specification are used to avoid confusion of constituent elements. This is a selection and not a numerical limit. Therefore, for example, "the first" This can be explained by substituting "the second" or "the third" as appropriate.

[0025] Furthermore, the functions of "source" and "drain" are used in situations where the direction of current changes during circuit operation. In this specification, "sauce" and "dressing" may be used interchangeably. The term "in" may be used interchangeably.

[0026] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic field at a given point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within a given object. Furthermore, generally speaking, the potential difference between the potential at a certain point and a reference potential (for example, the ground potential) This is simply called electric potential or voltage, and the terms electric potential and voltage are often used as synonyms. Therefore, unless otherwise specified in this specification, potential may be read as voltage. You may substitute "voltage" with "potential."

[0027] In this specification, when an etching process is performed after a photolithography process: The mask formed in the photolithography process is removed after the etching process. .

[0028] (Embodiment 1) In this embodiment, drawings illustrate a semiconductor device and a method for manufacturing the same, which are aspects of the present invention. I will explain by referring to it.

[0029] Figure 1(A) shows a liquid crystal display as an example of a semiconductor device. The display device comprises a pixel unit 101, a scan line driving circuit 104, and a signal line driving circuit 106, each of which m lines are arranged in parallel or nearly parallel, and their potential is controlled by the scan line drive circuit 104. The scan lines 107 and the signal line drive circuit 106, each arranged in parallel or approximately parallel to the others. It has n signal lines 109 whose potential is controlled. Furthermore, the pixel section 101 is a matrix It has multiple pixels 301 arranged in a cub-like pattern. Also, along the signal line 109, each is flat It has capacitance lines 115 arranged in rows or approximately parallel to each other. The capacitance lines 115 are located on the scan lines 10 Along 7, each may be arranged parallel or approximately parallel. Also, the scan line drive circuit 1 Sometimes, the 04 and the signal line drive circuit 106 are collectively referred to as the drive circuit section.

[0030] Each scan line 107 is one of the pixels 301 arranged in m rows and n columns in the pixel section 101. It is electrically connected to n pixels 301 arranged in any row. Also, each signal line 109 This refers to m pixels 30 arranged in m rows and n columns, where m pixels 30 are located in any of the columns. It is electrically connected to 1. m and n are both integers greater than or equal to 1. Also, each capacitance line 115 This refers to m pixels 30 arranged in m rows and n columns, where m pixels 30 are located in any of the columns. It is electrically connected to 1. Note that the capacitance lines 115 are parallel to each other along the scan lines 107. Or, if they are arranged in roughly parallel directions, then any of the pixels 301 arranged in m rows and n columns The n pixels 301 arranged in the row are electrically connected.

[0031] Figure 1(B) shows a circuit that can be used for pixel 301 of the liquid crystal display device shown in Figure 1(A). The structure is shown.

[0032] The pixel 301 shown in Figure 1(B) consists of a liquid crystal element 132, a transistor 103, and a capacitive element. It has 105 and

[0033] The potential of one of the pair of electrodes of the liquid crystal element 132 is set appropriately according to the specifications of the pixel 301. The orientation state of the liquid crystal element 132 is set according to the data written to it. A common potential (C) is applied to one of the pairs of electrodes of the liquid crystal element 132 that each of the pixel circuits 111 possesses. A Mon potential may be applied. Also, the pair of electrodes of the liquid crystal element 132 for each pixel 301 in each row You may apply different potentials to one side. Alternatively, in IPS mode or FFS mode, the liquid It is also possible to connect one of the pair of electrodes of the crystal element 132 to the capacitance line CL.

[0034] For example, the driving method for a liquid crystal display device equipped with liquid crystal elements 132 is TN mode, ST N mode, VA mode, ASM (Axially Symmetric Aligned) Micro-cell mode, OCB (Optically Compensated) d Birefringence) mode, FLC (Ferroelectric Li) quid Crystal) mode, AFLC(AntiFerroelectric) mode Liquid Crystal mode, MVA mode, PVA (Patterned Vertical Alignment mode, IPS mode, FFS mode, or Even when using modes such as TBA (Transverse Bend Alignment) Good. In addition to the above-mentioned driving method, ECB (Ele ctrically Controlled Birefringence) mode, P DLC (Polymer Dispersed Liquid Crystal) Mode PNLC (Polymer Network Liquid Crystal) mode This includes guest / host modes, etc. However, it is not limited to this, and also includes liquid crystal elements and their driving methods. Various formulas can be used.

[0035] Furthermore, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be constructed in this manner. The liquid crystal exhibiting the blue phase has a response speed of 1 msec or less. Because it is short and optically isotropic, orientation processing is unnecessary and it has low dependence on the viewing angle.

[0036] In pixel 301 at row m, column n, the source electrode and drain electrode of transistor 103 One end is electrically connected to the signal line DL_n, and the other end is connected to the other pair of electrodes of the liquid crystal element 132. It is electrically connected to the scan line GL_m. Also, the gate electrode of transistor 103 is connected to the scan line GL_m. Electrically connected. Transistor 103 is on or off by It has a function to control the writing of data to the data signal.

[0037] One of the pair of electrodes of the capacitive element 105 is connected to a wiring (hereinafter referred to as the capacitance line CL) to which the potential is supplied. One end is electrically connected to the other end of a pair of electrodes on the liquid crystal element 132. The potential value of the capacitance line CL is set appropriately according to the specifications of pixel 301. Capacitive element 1 05 functions as a retention capacitor to hold the written data. One of the pair of electrodes 105 is connected to the liquid crystal element 132 in IPS mode or FFS mode. It is also possible to electrically connect to one of the pair of electrodes.

[0038] For example, in the liquid crystal display device having pixel 301 as shown in Figure 1(B), the scan line driving circuit 104 Next, pixels 301 in each row are selected sequentially, and transistor 103 is turned on to turn on the data signal Write the data.

[0039] The pixel 301 on which data has been written is retained when transistor 103 is turned off. This is the state it enters. By doing this row by row, the image can be displayed.

[0040] In this specification, an example of a liquid crystal display device using a liquid crystal element is a permeable liquid crystal display device. Crystal display device, transflective type liquid crystal display device, reflective type liquid crystal display device, direct view type liquid crystal display device, projection type Examples include liquid crystal display devices. One example of a liquid crystal element is one in which light is affected by the optical modulation effect of liquid crystals. There is an element that controls transparency or opacity. This element is constructed of a pair of electrodes and a liquid crystal layer. It is possible to do so. Furthermore, the optical modulation effect of liquid crystals is due to the electric field applied to the liquid crystal (the lateral electric field). It is controlled by an electric field (including a vertical or diagonal electric field). Specifically, Examples of liquid crystal elements include nematic liquid crystals, cholesteric liquid crystals, smectic liquid crystals, and Discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal Crystal, polymer-dispersed liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain liquid crystal Examples include molecular liquid crystals and banana-shaped liquid crystals.

[0041] Next, a specific example of a liquid crystal display device using a liquid crystal element in pixel 301 will be described. Here, Figure 2 shows a top view of pixel 301, as shown in Figure 1(B). Note that in Figure 2, The counter electrode and liquid crystal element are omitted.

[0042] In Figure 2, the conductive film 304c, which functions as a scan line, is oriented in a direction approximately perpendicular to the signal line (Figure It is provided extending in the central left-right direction. The conductive film 310d, which functions as a signal line, scans It is provided extending in a direction approximately perpendicular to the line (up and down in the diagram). It functions as a capacity line. The conductive film 310f is provided extending in a direction parallel to the signal line. The conductive film 304c is electrically connected to the scan line drive circuit 104 (see Figure 1(A)). It is configured such that the conductive film 310d functions as a signal line and the conductive film 31 functions as a capacitance line. 0f is electrically connected to the signal line drive circuit 106 (see Figure 1(A)).

[0043] Transistor 103 is located in the region where the scan line and signal line intersect. STA 103 consists of a conductive film 304c that functions as a gate electrode, and a gate insulating film (shown in Figure 2). ) and the oxide semiconductor film 308b on which the channel region formed on the gate insulating film is formed. It is composed of conductive films 310d and 310e that function as source and drain electrodes. Furthermore, the conductive film 304c also functions as a scanning line and is superimposed on the oxide semiconductor film 308b. The region functions as the gate electrode of transistor 103. In addition, the conductive film 310d is It also functions as a signal line, and the region that overlaps with the oxide semiconductor film 308b is the signal of transistor 103. It functions as a drain electrode or a drain electrode. Also, in Figure 2, the scan lines are the top shape. In this case, the edge is located outside the edge of the oxide semiconductor film 308b. Therefore, the scan line is It functions as a light-shielding film that blocks light from light sources such as backlights. As a result, transistor The oxide semiconductor film 308b contained in is not irradiated with light, and the electrical characteristics of the transistor do not change. It can be suppressed.

[0044] Furthermore, the conductive film 310e has light-transmitting properties that allow it to function as a pixel electrode in the aperture 362c. It is electrically connected to the conductive film 316b.

[0045] Capacitive element 105 has a translucent conductive film 308c formed on the gate insulating film, and A dielectric film formed of a nitride insulating film provided on the transistor 103, and as a pixel electrode It is composed of a conductive film 316b that has functional light transmission. That is, the capacitive element 105 is transparent It is optical. Furthermore, the capacitive element 105 functions as a conductor in the aperture 362. It is connected to the 310f film.

[0046] Here, it is desirable that the conductive film 316b be rectangular in shape, as shown in Figure 2. However, the present invention is not limited to this aspect. For example, the conductive film 316b is FFS mode, Like the pixel electrodes provided in liquid crystal display devices such as IPS mode and MVA mode, slits It is possible to have a structure with teeth, or a comb-like structure.

[0047] Since the capacitive element 105 is light-transmitting, the large number of capacitive elements 105 within the pixel 301 It can be formed over a large area. Therefore, while increasing the opening ratio, typically 50% In addition, it is possible to set the amount to preferably 55% or more, preferably 60% or more, and A liquid crystal display device with increased capacity can be obtained. For example, a liquid crystal display device with high resolution In this configuration, the pixel area becomes smaller, and the area of ​​the capacitive element also becomes smaller. Therefore, resolution In high-resolution liquid crystal displays, the charge capacitance accumulated in the capacitive elements decreases. However, However, since the capacitive element 105 shown in this embodiment is light-transmitting, the capacitive element is used in the pixel. By providing this feature, it is possible to increase the aperture ratio while obtaining sufficient charge capacitance in each pixel. Typically, high resolution cameras have a pixel density of 200 ppi or more, and even 300 ppi or more. It can be suitably used in liquid crystal display devices.

[0048] Furthermore, the pixel 301 shown in Figure 2 has sides parallel to the conductive film 304c which functions as a scan line. In comparison, the side parallel to the conductive film 310d, which functions as a signal line, is shorter, and the capacitance The conductive film 310f, which functions as a line, is parallel to the conductive film 310d, which functions as a signal line. It is extended and provided in this manner. As a result, the area of ​​the conductive film 310f in the pixel 301 is reduced. Because this is possible, the aperture ratio can be increased. Furthermore, it functions as a capacitance line. Since the conductive film 310f comes into direct contact with the light-transmitting conductive film 308c without using connecting electrodes, This allows for an even higher aperture ratio.

[0049] Furthermore, in one aspect of the present invention, the aperture ratio can be increased even in a high-resolution liquid crystal display device. Therefore, it is possible to efficiently utilize the light from light sources such as backlights, and liquid crystal display devices This can reduce power consumption.

[0050] Next, Figure 3 shows a cross-sectional view between the dashed lines C and D in Figure 2. Note that in Figure 3, The drive circuit section includes the scan line drive circuit 104 and the signal line drive circuit 106 (top view omitted). A cross-sectional view of the device is shown at AB. In this embodiment, the semiconductor device is a longitudinal electric field type This section will explain liquid crystal display devices.

[0051] The liquid crystal display device shown in this embodiment has liquid crystals between a pair of substrates (substrate 302 and substrate 342). Element 322 is being held in place.

[0052] The liquid crystal element 322 has a translucent conductive film 316b above the substrate 302 and controls the orientation. The control film (hereinafter referred to as alignment films 318 and 352), the liquid crystal layer 320, and the conductive film 350, It has the following characteristics. The light-transmitting conductive film 316b is used as one electrode of the liquid crystal element 322. The conductive film 350 functions as the other electrode of the liquid crystal element 322. In terms of form, a planarization film 317 is placed between a light-transmitting conductive film 316b and an alignment film 318. It has. The planarization film 317 is a transparent conductive film that functions as at least a pixel electrode. This refers to the organic resin film that fills the recess of 316b. The conductive film 316b has light-transmitting properties. A recessed area through which the backlight of a liquid crystal display device passes, i.e., a light-transmitting guide By filling the openings of the insulating film 312 on the film 308c with the planarizing film 317, the alignment film The unevenness of the area to be formed can be reduced. That is, it can be formed on a transparent conductive film 316b. The unevenness of the orientation film 318 can be reduced. The depth of the recess is the insulating film 31 It corresponds to a thickness of 2.

[0053] The planarization film 317 is preferably translucent. However, in one aspect of the present invention, this is not the case. It is not limited to these. For example, the planarization film 317 may be a color filter or a black matrix. It is also possible for the planarization film 317 to have the function of a color filter. If available, for example, for red pixels, blue pixels, and green pixels, each color A colored planarization film 317 can then be formed.

[0054] Thus, a liquid crystal display device refers to a device that has liquid crystal elements. The device includes a drive circuit for driving multiple pixels, etc. Furthermore, the liquid crystal display device is mounted on a separate substrate. This includes a control circuit, power supply circuit, signal generation circuit, and backlight module, etc., located in the same area. It is sometimes called a liquid crystal module.

[0055] In the drive circuit section, a conductive film 304a functions as a gate electrode, and as a gate insulating film Functional insulating film 305 and insulating film 306, oxide semiconductor film 30 in which a channel region is formed 8a, conductive films 310a and 310b, which function as source and drain electrodes, provide traction The oxide semiconductor film 308a constitutes the inverter 102. The oxide semiconductor film 308a is provided on the gate insulating film. Furthermore, insulating films 312 and 314 are provided on the conductive films 310a and 310b as protective films. It's being kicked.

[0056] In the pixel area, the conductive film 304c functions as a gate electrode, and the gate insulating film functions as a gate insulating film. Insulating film 305 and insulating film 306, and a channel region formed on the gate insulating film are formed An oxide semiconductor film 308b is formed, and a conductive film 310 functions as a source electrode and a drain electrode. d and 310e constitute the transistor 103. The oxide semiconductor film 308b is the gate It is provided on an insulating film. Also, on the conductive films 310d and 310e, there is an insulating film 312, an insulating film 314 is provided as a protective layer.

[0057] Furthermore, the light-transmitting conductive film 316b, which functions as a pixel electrode, is insulated from the insulating film 312 and an insulating film. The conductive film 310e is connected at an opening provided in the edge film 314.

[0058] Furthermore, one of the electrodes is a translucent conductive film 308c, which functions as a dielectric film. The insulating film 314 and the other electrode, which is a transparent conductive film 316b, provide capacitance. The element 105 is composed of a light-transmitting conductive film 308c provided on the gate insulating film. .

[0059] Furthermore, in the drive circuit section, the conductive film 30 formed simultaneously with the conductive films 304a and 304c 4b and conductive film 31 formed simultaneously with conductive films 310a, 310b, 310d, and 310e 0c refers to the transparent conductive film 31 that was formed simultaneously with the transparent conductive film 316b. It will be connected via 6a.

[0060] The conductive film 304b and the light-transmitting conductive film 316a are insulating film 305, insulating film 306, The connection is made at the openings provided in the insulating film 312 and insulating film 314. Also, the conductive film 31 The conductive film 316a, which is transparent to 0c, is provided in the insulating film 312 and insulating film 314. Connect at the mouth.

[0061] In this embodiment, the transparent conductive film 30 is one electrode of the capacitive element 105. To improve the conductivity of 8c, an opening is provided in the insulating film 312. In this opening, By coming into contact with the insulating film 314 formed of a nitride insulating film, the light-transmitting conductive film 308c The conductivity increases. However, the light-transmitting properties that function as pixel electrodes in the opening A recess is formed in the conductive film 316b having the above. Here, the liquid crystal display shown in this embodiment The device has a planarization film 317 on a light-transmitting conductive film 316b that functions as a pixel electrode. Therefore, the planarization film 317 is filled into the recesses of the light-transmitting conductive film 316b, and furthermore, The surface of the planarized film 317 has few steps. As a result, the orientation film provided on the planarized film 317 The surface irregularities of 318 are mitigated, making it possible to reduce unevenness in the liquid crystal alignment. This can reduce display defects in liquid crystal displays.

[0062] The components of the display device shown in Figure 3 will be explained below.

[0063] There are no major restrictions on the material of the substrate 302, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrates, ceramic substrates, quartz substrates, etc. A fire substrate or the like may be used as substrate 302. Also, silicon or silicon carbide may be used. Single-crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates and the like can also be used, and semiconductor elements are provided on these substrates. This may be used as substrate 302. In total, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm) ), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm) ), by using large-area substrates such as the 10th generation (2950mm x 3400mm), large-scale Liquid crystal display devices can be manufactured.

[0064] Furthermore, a flexible substrate is used as the substrate 302, and the transistor is formed directly on the flexible substrate. This may be done. Alternatively, a release layer may be provided between the substrate 302 and the transistor. Release layer After partially or completely completing the element section on top of it, it is separated from the substrate 302 and placed on another substrate It can be used to reproduce the image. In this case, the transistor is not suitable for substrates with poor heat resistance or flexible substrates. It can also be mounted on the circuit board.

[0065] The conductive films 304a, 304b, and 304c are aluminum, chromium, copper, and tantalum. , a metallic element selected from titanium, molybdenum, and tungsten, or the aforementioned metallic elements It can be formed using an alloy as a component, or an alloy combining the aforementioned metal elements. Furthermore, one or more metallic elements selected from manganese and zirconium are used. It is acceptable to have them. Also, conductive films 304a, 304b, and 304c may be single-layer or two-layer or more. A layered structure may also be used. For example, a single-layer structure of an aluminum film containing silicon, A two-layer structure in which a titanium film is laminated on a titanium film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a titanium nitride film, tantalum nitride film or tungsten nitride film A two-layer structure consisting of a tungsten film laminated on a stainless steel film, a titanium film, and aluminum on the titanium film. There are also three-layer structures, such as one in which a titanium film is layered and then a titanium film is formed on top of it. In addition to nium, titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and Scandinavian An alloy film or nitride film made of one or more elements selected from um may also be used. stomach.

[0066] Furthermore, the conductive films 304a, 304b, and 304c are made of indium tin oxide and tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide Apply a light-transmitting conductive material such as indium tin oxide with added silicon oxide. It is also possible to use a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element. It is also possible.

[0067] Furthermore, the conductive films 304a, 304b, and 304c function as insulating films, acting as part of the gate insulating film. Between film 305, there is an In-Ga-Zn oxidoxide nitride film, an In-Sn oxidoxide nitride film, and In -Ga-based oxidogenic nitride film, In-Zn-based oxidogenic nitride film, Sn-based oxidogenic nitride film, In-based oxidogenic nitride film A nitride film, metal nitride film (InN, ZnN, etc.), etc. may be provided. These films should have a thickness of 5 eV or more. Preferably, it has a work function of 5.5 eV or greater, and a value greater than the electron affinity of the oxide semiconductor. Therefore, by shifting the threshold voltage of an oxide semiconductor transistor to a positive value... This makes it possible to realize a switching element with so-called normally-off characteristics. For example, In-G When using an α-Zn-based oxide nitride film, at least the oxide semiconductor films 308a and 308b A film with a very high nitrogen concentration, specifically an In-Ga-Zn oxidnitride film with a nitrogen concentration of 7 atomic percent or more, is used.

[0068] On the substrate 302 and the conductive films 304a, 304c, and 304b, there is an insulating film 305, an insulating film 306 is formed. Insulating film 305 and insulating film 306 are formed in the drive circuit section of transistor 1 The gate insulating film of 02 and the gate insulating film of transistor 103 of pixel portion 101 To have the ability.

[0069] Examples of insulating film 305 include silicon nitride, silicon oxide nitride, aluminum nitride, It is preferable to form it using a nitride insulating film such as aluminum nitride oxide.

[0070] Examples of the insulating film 306 include silicon oxide, silicon oxide nitride, silicon nitride oxide, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn gold A group oxide or the like may be used, and it can be provided in a laminated or single layer. Furthermore, as the insulating film 306, Hafnium silicate (HfSiO x ), nitrogen-added hafnium silicate (Hf Si x O y N z ), nitrogen-added hafnium aluminate (HfAl x O y N z ), By using high-k materials such as hafnium oxide and yttrium oxide, transistors can be created. This can reduce gate leaks.

[0071] The total thickness of insulating film 305 and insulating film 306 is preferably 5 nm or more and 400 nm or less. Or, 10 nm to 300 nm, more preferably 50 nm to 250 nm. That's good.

[0072] On the insulating film 306 are oxide semiconductor films 308a, 308b and a light-transmitting conductive film 30 8c is formed. The oxide semiconductor film 308a is formed in a position where it overlaps with the conductive film 304a. This is achieved and functions as the channel region of transistor 102 in the drive circuit section. Also, oxide The semiconductor film 308b is formed in a position where it overlaps with the conductive film 304c, and the transistors of the pixel area It functions as a channel region 103. The light-transmitting conductive film 308c is a capacitive element 10 It functions as one of the electrodes of 5.

[0073] The oxide semiconductor films 308a, 308b, and the light-transmitting conductive film 308c are typically These are In-Ga oxide film, In-Zn oxide film, and In-M-Zn oxide film (where M is Al, T is Al). (i, Ga, Y, Zr, La, Ce, Nd, or Hf)

[0074] Furthermore, the oxide semiconductor films 308a and 308b, and the light-transmitting conductive film 308c are In -When it is an M-Zn oxide film, and the sum of In and M is set to 100 atomic%, The atomic ratio of In to M is preferably 25 atoms or more for In and 75 atoms for M. Less than ic%, more preferably In is 34 atomic% or more and M is 66 atomic% Less than.

[0075] The oxide semiconductor films 308a, 308b, and the light-transmitting conductive film 308c are energy - The gap is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. Thus, by using oxide semiconductors with a wide energy gap, transistors can be made The off-current can be reduced.

[0076] The thicknesses of the oxide semiconductor films 308a, 308b, and the light-transmitting conductive film 308c are 3 200 nm or less and more than 1 nm, preferably 100 nm or less and more than 3 nm, more preferably 50 nm or less and more than 3 n m.

[0077] As the oxide semiconductor films 308a and 308b and the conductive film 308c having translucency, In-Ga-Zn oxide having an atomic ratio of In: Ga:Zn = 1:1:1 or 3:1:2 can be used. Note that the atomic ratios of the oxide semiconductor films 308a and 308b and the conductive film 308c having translucency each include a fluctuation of plus or minus 20% of the above atomic ratio as an error.

[0078] Both the oxide semiconductor films 308a and 308b and the conductive film 308c having translucency are formed on a gate insulating film (here, on the insulating film 306), but have different impurity concentrations. Specifically, [[ID=二十]]the impurity concentration of the conductive film 308c having translucency is higher than that of the oxide semiconductor films 308a and 308b. For example, the hydrogen concentration contained in the oxide semiconductor films 308a and 308b is less than 5 × 10 atoms / cm < 19 , preferably less than 5 × 10 3 atoms / cm 18 < 3 , preferably 1 × 10 atoms / cm 18 < 3 or less, more preferably 5 × 10 17 ato ms / cm 3 or less, still more preferably 1 × 10 16 atoms / cm 3 or less, and the hydrogen concentration contained in the conductive film 308c having translucency is 8 × 10 atoms / cm 19 < 3 or more , preferably 1 × 10 20 atoms / cm 3 or more, more preferably 5 × 10 20 ato ms / cm 3 That concludes the explanation. Furthermore, compared to oxide semiconductor films 308a and 308b, the light transmittance is The hydrogen concentration in the conductive film 308c having the above properties is twice, preferably 10 times or more.

[0079] Furthermore, the light-transmitting conductive film 308c has greater resistance than the oxide semiconductor films 308a and 308b. The rate is low. The resistivity of the light-transmitting conductive film 308c is low compared to the oxide semiconductor films 308a and 308. The resistivity of b is 1 × 10 -8 1×10 times more -1 It is preferable that it be less than or equal to double, and typically 1 x 10 -3 Ωcm or more, 1 × 10 4 Less than Ωcm, more preferably with a resistivity of 1 × 10⁻⁶. - 3 Ωcm or more, 1 × 10 -1 It should be less than Ωcm.

[0080] In oxide semiconductor films 308a and 308b, silicon and carbon, which are among the Group 14 elements, are present. When element is present, oxygen vacancies increase in oxide semiconductor films 308a and 308b, leading to n-type formation. This is why the concentration of silicon and carbon in the oxide semiconductor films 308a and 308b The degree (concentration obtained by secondary ion mass spectrometry) is 2 × 10 18 atoms / cm 3 Below Below, preferably 2 × 10 17 atoms / cm 3 The following applies:

[0081] Furthermore, in oxide semiconductor films 308a and 308b, obtained by secondary ion mass spectrometry... The concentration of alkali metals or alkaline earth metals is 1 × 10⁻⁶ 18 atoms / cm 3 Below Below, preferably 2 × 10 16 atoms / cm3 The following applies: Alkali metals and alkalis. Earth metals can generate carriers when they combine with oxide semiconductors, which can be a factor in transistors. The off-current may increase. For this reason, the oxide semiconductor films 308a and 308b It is preferable to reduce the concentration of alkali metals or alkaline earth metals.

[0082] Furthermore, if nitrogen is present in the oxide semiconductor films 308a and 308b, the carriers will be As offspring are produced, the carrier density increases, and it becomes easier for it to become n-type. As a result, nitrogen is present in the oxidation. Transistors using solid semiconductors tend to exhibit normally-on characteristics. Therefore, the oxide in question In semiconductor films, it is preferable to reduce nitrogen as much as possible. For example, secondary ions The nitrogen concentration obtained by mass spectrometry is 5 × 10⁻⁶. 18 atoms / cm 3 Do the following This is preferable.

[0083] For the oxide semiconductor films 308a and 308b, oxide semiconductor films with low carrier density are used. For example, oxide semiconductor films 308a and 308b have a carrier density of 1 × 10⁻⁶. 17 pieces / cm 3 The following is preferably 1 × 10 15 pieces / cm 3 More preferably 1 × 10 13 pieces / cm 3 More preferably 1 × 10 11 pieces / cm 3 The following oxide semiconductor films are used.

[0084] Furthermore, this is not limited to the semiconductor characteristics and electrical characteristics (field effect) of the transistor as needed. A suitable composition should be used depending on the fruit mobility, threshold voltage, etc. To obtain the semiconductor characteristics of the transistor, the oxide semiconductor films 308a and 308b are used as carriers. A. Appropriately determine density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. It is preferable to make it such.

[0085] The oxide semiconductor films 308a and 308b are made of oxide semiconductors such as insulating film 306 and insulating film 312. Because it is in contact with a film formed of a material that can improve the interfacial properties with the conductive film, acid The oxide semiconductor films 308a and 308b function as semiconductors, and the oxide semiconductor films 308a and 3 Transistors containing 08b have excellent electrical properties.

[0086] Furthermore, the oxide semiconductor films 308a and 308b have low impurity concentrations and low defect level densities. By using low-temperature oxide semiconductor films, transistors with excellent electrical properties can be fabricated. This is preferable. Here, the impurity concentration is low and the defect level density is low (low oxygen deficiency). (i) This is called high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductors, being highly intrinsic, have few carrier sources, thus allowing for a lower carrier density. In some cases, this can occur. Therefore, when a channel region is formed in the oxide semiconductor film, A zistor exhibits an electrical characteristic where the threshold voltage is negative (also known as normally-on). In some cases, this is rare. Also, high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors Body membranes have a low defect level density, which can result in a low trap level density. Oxide semiconductor films that are highly intrinsic or substantially high-purity intrinsic have remarkably low off-currents, and Channel width is 1 x 10 6 Even with a device with a channel length L of 10 μm, the source electrode and the channel When the voltage between the drain electrodes (drain voltage) is in the range of 1V to 10V, the off-current is half Below the measurement limit of the conductor parameter analyzer, i.e., 1 × 10⁻⁶ -13 The characteristic of being A or less Therefore, a transient in which a channel region is formed in the oxide semiconductor film can be obtained. The transistor exhibits small fluctuations in electrical characteristics and can be highly reliable. Charges trapped in the trap levels of a semiconductor film take a long time to disappear. They can sometimes behave like fixed charges. Therefore, oxides with a high trap level density are particularly problematic. Transistors in which a channel region is formed in a semiconductor film may have unstable electrical properties. Impurities include hydrogen, nitrogen, alkali metals, or alkaline earth metals.

[0087] On the other hand, the light-transmitting conductive film 308c is at the opening 362 (see Figure 6(A)). It comes into contact with the insulating film 314. The insulating film 314 is protected from external impurities, such as water and alkali metals. Furthermore, it is a film that prevents alkaline earth metals and the like from diffusing into the oxide semiconductor film, and an insulating film 31 4 contains hydrogen. Therefore, the hydrogen in the insulating film 314 is in the oxide semiconductor films 308a and 308b. When hydrogen diffuses into the oxide semiconductor film formed at the same time, hydrogen in the oxide semiconductor film becomes oxygen and They bond, and electrons, which are carriers, are generated. As a result, oxide semiconductor films have high conductivity. It functions as a conductor. In other words, it can be described as a highly conductive oxide semiconductor film. Here, acid The oxide semiconductor films 308a and 308b are mainly composed of the same materials, and the hydrogen concentration is the same as that of oxide semiconductor films. Because it is higher than the body membranes 308a and 308b, the conductivity of the metal oxide is enhanced, and it is translucent. It is called a conductive film 308c having the following properties.

[0088] Furthermore, the oxide semiconductor films 308a, 308b, and the light-transmitting conductive film 308c are, for example, For example, a non-single-crystal structure is also acceptable. A non-single-crystal structure is, for example, CAAC-OS (CA), which will be discussed later. xis Aligned Crystalline Oxide Semiconductor This includes tor, polycrystalline structure, microcrystalline structure (described later), or amorphous structure. In this context, the amorphous structure has the highest defect level density, while CAAC-OS has the lowest defect level density. i. Furthermore, the oxide semiconductor films 308a and 308b, and the light-transmitting conductive film 308c are, They have the same crystallinity.

[0089] Furthermore, the oxide semiconductor films 308a, 308b, and the light-transmitting conductive film 308c are non Crystalline structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal The mixed film may have two or more structural regions. The mixed film may be, for example, amorphous. Crystalline structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal structure The structure may have a single-layer structure of two or more regions. Furthermore, the mixed film is, for example, For example, the amorphous region, the microcrystalline region, the polycrystalline region, and the CAAC-OS region. It may have a stacked structure consisting of two or more regions of single-crystal structure.

[0090] However, one embodiment of the present invention is not limited thereto, and includes a light-transmitting conductive film 30 In some cases, 8c may not be in contact with the insulating film 314.

[0091] Furthermore, one embodiment of the present invention is not limited thereto, and includes a transparent conductive film 308 c may, in some cases, be formed in a separate process from the oxide semiconductor film 308a or 308b. It may be. In that case, the transparent conductive film 308c may have a different material from the oxide semiconductor films 308 a and 308b. For example, the transparent conductive film 308 c may be formed using indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, or the like .

[0092] The liquid crystal display device shown in this embodiment forms one electrode of the capacitor element simultaneously with the oxide semiconductor film of the transistor. Further, a transparent conductive film functioning as a pixel electrode is used as the other electrode of the capacitor element. For these reasons, in order to form the capacitor element, a step of newly forming a conductive film is unnecessary, and the manufacturing process of the liquid crystal display device can be reduced. Further, since the capacitor element has a pair of electrodes formed of a transparent conductive film, it has transparency. As a result, while increasing the occupied area of the capacitor element, the aperture ratio of the pixel can be increased.

[0093] The conductive films 310a, 310b, 310c, 310d, and 310e are used in a single-layer structure or a laminated structure as a single metal composed of aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy having this as a main component. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and further a titanium film or a titanium nitride film is formed thereon, a three-layer structure ​​Molybdenum film or molybdenum nitride film and the molybdenum film or molybdenum nitride film An aluminum film or copper film is layered on top, and then a molybdenum film or nitride film is placed on top of that. Some structures include a three-layer structure that forms a molybdenum film. Other materials include indium oxide, tin oxide, or pyroxene oxide. A transparent conductive material containing lead may also be used.

[0094] insulating film 306, oxide semiconductor films 308a, 308b, light-transmitting conductive film 308c, And on the conductive films 310a, 310b, 310c, 310d, and 310e, there is an insulating film 312. An insulating film 314 is formed. The insulating film 312, like the insulating film 306, is an oxide semiconductor. It is preferable to use a material that can improve the interfacial properties with the film, and the oxide insulating film is It can be formed using the following. Here, the insulating film 312 is the insulating film 312a, 31 It is formed by stacking 2b layers.

[0095] The insulating film 312a is an oxide insulating film that permeates oxygen. When forming the insulating film 312b to be formed on, the oxide semiconductor films 308a, 308b, and permeable It also functions as a damage mitigation film for the photosensitive conductive film 308c.

[0096] The insulating film 312a has a thickness of 5 nm to 150 nm, preferably 5 nm to 5 Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 0 nm or less can be used. In the details, a silicon oxidizide film is defined as having a composition in which the oxygen content is greater than the nitrogen content. The term refers to a film with a high nitrogen content; a silicon nitride film, in terms of its composition, has a higher nitrogen content than oxygen. It refers to a membrane.

[0097] Furthermore, the insulating film 312a preferably has a low defect content, and typically, in ESR measurement... Furthermore, the spin density of the signal appearing at g = 2.001 derived from the dangling bonds of silicon is preferably 3×10 or less. This is because if the defect density in the insulating film 312 17 spins / cm 3 a is high, oxygen will bind to these defects, reducing the amount of oxygen permeating through the insulating film 312a. a.

[0098] In addition, it is preferable that the amount of defects at the interfaces between the insulating film 312a and the oxide semiconductor films 308a, 308b, and the conductive film 308c having translucency is small. Typically, from ESR measurement, it is preferable that the spin density of the signal appearing at g = 1.93 derived from the defects in the oxide semiconductor films 308a, 308b, and the conductive film 308c having translucency is 1×10 or less, and more preferably below the detection limit. 17 spins / cm 3

[0099] In the insulating film 312a, all the oxygen that enters the insulating film 312a from the outside does not move outside the insulating film 312a and some oxygen remains in the insulating film 312a. Also, when oxygen enters the insulating film 312 a, the oxygen contained in the insulating film 312a may move outside the insulating film 312a, resulting in oxygen movement in the insulating film 312a.

[0100] When an oxide insulating film that permeates oxygen is formed as the insulating film 312a, the oxygen that desorbs from the insulating film 312b provided on the insulating film 312a can be moved through the insulating film 312a to the oxide semiconductor films 308a, 308b, and the conductive film 308c having translucency.

[0101] The insulating film 312b is formed so as to be in contact with the insulating film 312a. The insulating film 312b​​​​​​ It is possible to form it using an oxide insulating film that contains more oxygen than satisfactorily satisfactorily. I. Oxide insulating films containing more oxygen than satisfying the stoichiometric composition will become acidic when heated. Some of the elements are eliminated. Oxide insulating film contains more oxygen than satisfactorily required to satisfy the stoichiometric composition. In TDS analysis, the amount of oxygen removed, converted to oxygen atoms, was 1.0 × 10⁻⁶. 18 atoms / cm 3 Preferably 3.0 × 10 20 atoms / cm 3 The above describes oxide insulating films. That is the case.

[0102] The insulating film 312b has a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or less. Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 400 nm or less can be used.

[0103] Furthermore, the insulating film 312b preferably has a low defect count, and typically, in ESR measurements... Furthermore, the spin density of the signal appearing at g=2.001 originating from silicon dangling bonds is reduced. The degree is 1.5 × 10 18 spins / cm 3 Less than, and even 1 x 10 18 spins / cm 3 The following is preferable. Note that insulating film 312b is oxide compared to insulating film 312a. Because they are separated from the semiconductor films 308a and 308b and the light-transmitting conductive film 308c, The defect density can be higher than that of the insulating film 312a.

[0104] The insulating film 314 contains blocks of oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing a nitride insulating film having a rubbing effect, oxide semiconductor films 308a, 308b, and Furthermore, it is possible to prevent the diffusion of oxygen from the transparent conductive film 308c to the outside. Nitride Examples of insulating films include silicon nitride, silicon oxide nitride, aluminum nitride, and aluminum oxide nitride. It includes things like nium.

[0105] Furthermore, it has a blocking effect on oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. An oxide insulating film having a blocking effect on oxygen, hydrogen, water, etc. is provided on the nitride insulating film. It may also be used. As an oxide insulating film having a blocking effect on oxygen, hydrogen, water, etc., an oxide Aluminum oxide nitride, gallium oxide, gallium oxide nitride, yttrium oxide Examples include yttrium oxide nitride, hafnium oxide, and hafnium oxide nitride. Also, capacity To control the charge capacitance of the element, oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. A nitride insulating film or an oxide insulating film is appropriately provided on a nitride insulating film having a blocking effect. That's good too.

[0106] Furthermore, transparent conductive films 316a and 316b are formed on the insulating film 314. The light-transmitting conductive film 316a conducts through the opening 364a (see Figure 6(C)). The film 304b is electrically connected to the conductive film 3 at the opening 364b (see Figure 6(C)). It is electrically connected to 10c. That is, it is a connection that connects conductive film 304b and conductive film 310c. It functions as an electrode. The light-transmitting conductive film 316b has an opening 364c (see Figure 6(C)). In the light, it is electrically connected to the conductive film 310e and functions as a pixel electrode of the pixel. Furthermore, the light-transmitting conductive film 316b functions as one of the pair of electrodes of the capacitive element. It is possible.

[0107] Furthermore, in order to create a connection structure in which conductive film 304b and conductive film 310c are in direct contact, Before forming the film 310c, in order to form openings in the insulating film 305 and insulating film 306, Turning is required to form a mask. However, as shown in Figure 3, light transmission By connecting the conductive film 304b and the conductive film 310c with the conductive film 316a having, This eliminates the need to create a connection part where the conductive film 304b and the conductive film 310c are in direct contact, This allows for one less mask to be used, thus reducing the manufacturing process for liquid crystal displays. This is possible.

[0108] The light-transmitting conductive films 316a and 316b include indiu containing tungsten oxide. Indium oxide, indium zinc oxide containing tungsten oxide, indium zinc oxide containing titanium oxide Oxides, indium tin oxide containing titanium oxide, ITO, indium zinc oxide, keroxide A transparent conductive material such as indium tin oxide with added inium can be used. ru.

[0109] As the planarization film 317, organic resins such as acrylic resin, polyimide, and epoxy resin are used. It is possible to have it. Furthermore, the planarization film 317 is thicker than or equal to 1500 nm than the thickness of the insulating film 312. Preferably, the thickness of the insulating film 312 is between 1000 nm and 317. By making the thickness greater than or equal to that of the insulating film 312, a planarization film is formed in the recess of the light-transmitting conductive film 316b. It is possible to fill 317, reducing the unevenness in the region where the alignment film 318 is formed. This is possible. Furthermore, if the thickness of the planarization film 317 is thick, the liquid crystal molecules contained in the liquid crystal layer 320 When controlling the orientation, a transparent conductive film 316b that functions as a pixel electrode is applied. The voltage increases, and power consumption increases, so the thickness of the planarization film 317 is 150 A value of 0 nm or less is preferred.

[0110] By forming a planarized film 317 using an organic resin, it functions at least as a pixel electrode. It is possible to fill the recesses of the light-transmitting conductive film 316b with the planarizing film 317. It is possible to reduce the uneven orientation of liquid crystal molecules that make up the liquid crystal layer 320.

[0111] As the alignment film 318, an organic resin such as polyimide can be used. The film thickness shall be between 40 nm and 100 nm, and further between 50 nm and 90 nm. This is preferable. By using such a film thickness, the pre-tilt angle of the liquid crystal molecules can be increased. Yes, it is possible. Dislocation can be reduced by increasing the pretilt angle of the liquid crystal molecules. It is possible to do so.

[0112] Furthermore, a colored film (hereinafter referred to as the colored film 346) is formed on the substrate 342. The colored film 346 has the function of a color filter. A light-shielding film 344 adjacent to it is formed on the substrate 342. The light-shielding film 344 is a black matrix It functions as a sculpting element. Also, the colored film 346 is not necessarily required; for example, a liquid crystal In cases where the display device is monochrome, for example, the colored film 346 may be omitted.

[0113] The colored film 346 can be any colored film that transmits light in a specific wavelength range, for example, A red (R) color filter that transmits light in the red wavelength range, and a filter that transmits light in the green wavelength range. A green (G) color filter that transmits light in the blue wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range. Filters and the like can be used.

[0114] The light-shielding film 344 only needs to have the function of blocking light in a specific wavelength band, and is made of metal. An organic insulating film containing a film or black pigment can be used.

[0115] Furthermore, an insulating film 348 is formed on the colored film 346. The insulating film 348 is planarized It functions as a layer, or it suppresses the diffusion of impurities that the colored film 346 may contain to the liquid crystal element. It has the function of controlling.

[0116] Furthermore, a conductive film 350 is formed on the insulating film 348. The conductive film 350 is in the pixel area It functions as the other electrode of the pair of electrodes that the liquid crystal element has. An orientation film 352 is formed on films 316a, 316b, and the conductive film 350.

[0117] Furthermore, between the light-transmitting conductive films 316a and 316b and the conductive film 350, there is a liquid crystal layer 3 20 is formed. The liquid crystal layer 320 is also formed on the substrate 3 using a sealing material (not shown). It is sealed between 02 and substrate 342. The sealing material prevents moisture and other substances from entering from the outside. To suppress contamination, a configuration in which the material comes into contact with an inorganic material is preferred.

[0118] Furthermore, a liquid crystal layer 320 is placed between the light-transmitting conductive films 316a and 316b and the conductive film 350. A spacer may be provided to maintain the thickness (also called the cell gap).

[0119] Regarding the method for manufacturing an element portion provided on a substrate 302 as shown in the liquid crystal display device in Figure 3, This will be explained using Figures 4 to 7. Here, the element portion is provided on the substrate 302. This refers to the region sandwiched between the substrate 302 and the alignment film 318.

[0120] First, prepare the substrate 302. Here, a glass substrate is used as the substrate 302.

[0121] Next, a conductive film is formed on the substrate 302, and the conductive film is processed to a desired region, thereby enabling conductivity Films 304a, 304b, and 304c are formed. Note that conductive films 304a, 304b, and 304 The formation of c involves forming a mask in the desired region by first patterning, and covering the mask. It can be formed by etching the areas that have not been cracked. (See Figure 4(A)).

[0122] Furthermore, conductive films 304a, 304b, and 304c are typically produced by vapor deposition and CVD methods. They can be formed using methods such as sputtering and spin coating.

[0123] Next, an insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304b, and 304c. Then, an insulating film 306 is formed on the insulating film 305 (see Figure 4(A)).

[0124] The insulating film 305 and insulating film 306 are formed by sputtering, CVD, or the like. This can be achieved. Note that if insulating film 305 and insulating film 306 are formed continuously in a vacuum, impurities will be produced. The inclusion of [unspecified substance] is suppressed, which is preferable.

[0125] Next, an oxide semiconductor film 307 is formed on the insulating film 306 (see Figure 4(B)).

[0126] Oxide semiconductor film 307 is produced by sputtering, coating, pulsed laser deposition, and laser - It can be formed using methods such as ablation.

[0127] Next, the oxide semiconductor film 307 is processed into a desired region, thereby creating an island-shaped oxide semiconductor film 3 Form 08a, 308b, and 308d. Note that oxide semiconductor films 308a, 308b, 3 Formation of 08d involves forming a mask in the desired region by a second patterning, and the mask It can be formed by etching the areas not covered by the material. This involves using dry etching, wet etching, or a combination of both. They can be there (see Figure 4(C)).

[0128] Furthermore, after this, heat treatment is performed to incorporate the oxide semiconductor films 308a, 308b, and 308d. The hydrogen, water, etc. that are present are removed, and at least oxide semiconductor films 308a, 308b, 308d The hydrogen concentration contained in may be reduced. As a result, the oxide semiconductor film 308 is purified. a, 308b, and 308d can be formed. The temperature of the heat treatment is typically 2 The heating temperature shall be between 50°C and 650°C, preferably between 300°C and 500°C. The temperature of the process is typically between 300°C and 400°C, preferably between 320°C and 370°C. By doing the following, it is possible to reduce warping and shrinkage of substrates even on large-area substrates. This improves yield.

[0129] The heat treatment can be carried out using an electric furnace, RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. This makes it possible to shorten the heat treatment time and reduce warping of the substrate during the heat treatment process. This is particularly preferable for large-area substrates.

[0130] Furthermore, the heat treatment is performed using nitrogen, oxygen, and ultra-dry air (preferably with a water content of 20 ppm or less). (Air) with a concentration of 1 ppm or less, preferably 10 ppb or less, or a noble gas (argon, helix) The procedure should be carried out under an atmosphere of (such as) nitrogen, oxygen, ultra-dry air, or a noble gas mixed with water. It is preferable that it does not contain elements, water, etc. Also, after heat treatment in a nitrogen or noble gas atmosphere Alternatively, heating may be performed in an oxygen or ultra-dry air atmosphere. As a result, the oxide semiconductor film contains This allows for the removal of hydrogen, water, etc., while simultaneously supplying oxygen to the oxide semiconductor film. As a result, the amount of oxygen vacancies contained in the oxide semiconductor film can be reduced.

[0131] Furthermore, if the film deposition temperature of the insulating film 311a that is formed later is set to be between 280°C and 400°C... In addition, hydrogen, water, etc. contained in the oxide semiconductor films 308a, 308b, and 308d are removed. Since this is possible, the heat treatment is unnecessary.

[0132] Next, conductive film 3 is applied to the insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d. It forms 09 (see Figure 5(A)).

[0133] The conductive film 309 can be formed, for example, by a sputtering method.

[0134] Next, the conductive film 309 is processed into the desired region, thereby creating conductive films 310a, 310b, 31 0c, 310d, and 310e are formed. Note that conductive films 310a, 310b, 310c, and 3 Formation of 10d and 310e involves creating a mask in the desired region by third patterning. This can be formed by etching the areas not covered by the mask (Figure 5). (See (B)).

[0135] Next, insulating film 306, oxide semiconductor films 308a, 308b, 308d, and conductive film 31 Insulating film 311a, 31 1b forms a stacked insulating film 311 (see Figure 5(C)).

[0136] Furthermore, after forming the insulating film 311a, the insulating film 311b is continuously formed without exposure to the atmosphere. It is preferable to form it. After forming the insulating film 311a, do not open it to the atmosphere and the flow rate of the raw material gas The insulating film 311b is continuously formed by adjusting one or more of the pressure, high-frequency power, and substrate temperature. This reduces the concentration of impurities originating from atmospheric components at the interface in insulating films 311a and 311b. In addition, the oxygen contained in the insulating film 311b can be removed from the oxide semiconductor film 308a, 30 It is possible to move to 8b and 308d, and oxide semiconductor films 308a, 308b, 3 This can reduce the oxygen deficit in 08d.

[0137] The insulating film 311a is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 400°C, preferably 200°C to 370°C, and then processed. The raw material gas is introduced into the chamber and the pressure inside the processing chamber is set to between 20 Pa and 250 Pa, and furthermore, The pressure should be between 100 Pa and 250 Pa, and high-frequency power should be applied to electrodes installed in the processing chamber. Depending on the supply conditions, a silicon oxide film or a silicon oxide nitride film can be formed. .

[0138] As the source gas for the insulating film 311a, a silicon-containing depositing gas and an oxidizing gas are used. It is preferable to do so. Typical examples of silicon-containing sedimentary gases include silane, disilane, and Examples include silane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide.

[0139] By using the above conditions, an oxide insulating film that permeates oxygen is formed as the insulating film 311a. This is possible. In addition, by providing insulating film 311a, the insulating film 311b that will be formed later can be During the formation process, damage to the oxide semiconductor films 308a, 308b, and 308d can be reduced. It is Noh.

[0140] The insulating film 311a was placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature between 280°C and 400°C, and the raw material gas is introduced into the processing chamber. The pressure is set to 100 Pa or more and 250 Pa or less, and high-frequency power is applied to the electrodes installed in the processing chamber. Depending on the supply conditions, the insulating film 311a may be a silicon oxide film or a silicon oxide nitride film. It is possible to form this.

[0141] Under these film deposition conditions, by setting the substrate temperature to the film deposition temperature of the insulating film 311a, silicon And the binding force of oxygen becomes stronger. As a result, oxygen permeates through the insulating film 311a, and it becomes dense. A hard oxide insulating film is available, typically using 0.5% by weight of hydrofluoric acid at 25°C. The etching rate in this case is 10 nm / min or less, preferably 8 nm / min or less, for silica oxide A silicon oxide or silicon nitride film can be formed.

[0142] Furthermore, in this process, since the insulating film 311a is formed while heating, In this process, hydrogen, water, etc., contained in the oxide semiconductor films 308a, 308b, and 308d are removed. It is possible.

[0143] Furthermore, heating is performed in the process of forming the insulating film 311a, so the oxide semiconductor film 308a , 308b and 308d are exposed for a short heating time, and the oxide semi-oxides due to heat treatment are reduced. The amount of oxygen desorbed from the conductive film can be reduced. That is, the amount of oxygen contained in the oxide semiconductor film can be reduced. This can reduce the amount of oxygen deficiency.

[0144] Furthermore, by setting the pressure in the processing chamber to between 100 Pa and 250 Pa, the insulating film 311 Because the water content in a is reduced, variations in the electrical characteristics of the transistor are reduced. This also allows for the suppression of fluctuations in the threshold voltage.

[0145] Furthermore, by setting the pressure in the processing chamber to between 100 Pa and 250 Pa, the insulating film 311a When forming the film, damage to the oxide semiconductor films 308a, 308b, and 308d is reduced. This is possible, and the amount of oxygen vacancies contained in the oxide semiconductor films 308a, 308b, and 308d This can be reduced. In particular, the composition of insulating film 311a or insulating film 311b that is formed later. By increasing the film temperature, typically to a temperature higher than 220°C, the oxide semiconductor film 30 Some of the oxygen contained in 8a, 308b, and 308d is easily removed, leading to the formation of oxygen deficiencies. Furthermore, to improve the reliability of the transistor, the amount of defects in the insulating film 311b, which is formed later, is reduced. Using film deposition conditions that allow for this process, the amount of oxygen desorption is easily reduced. As a result, oxide semiconductors It can be difficult to reduce oxygen deficiency in body membranes 308a, 308b, and 308d. While doing so, the pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, and when the insulating film 311a is deposited... By reducing damage to oxide semiconductor films 308a, 308b, and 308d, Even with a small amount of oxygen desorption from insulating film 311b, oxide semiconductor films 308a, 308b, and 308... It is possible to reduce oxygen deficiency in d.

[0146] Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times, It is possible to reduce the hydrogen content contained in the insulating film 311a. As a result, the oxide semiconductor Because the amount of hydrogen mixed into the conductive films 308a, 308b, and 308d can be reduced, transistor This can suppress the negative shift in the threshold voltage.

[0147] The insulating film 311b is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 280°C, more preferably 200°C to 240°C. The raw material gas is introduced into the processing chamber, and the pressure inside the processing chamber is set to between 100 Pa and 250 Pa. More preferably, the pressure should be 100 Pa or more and 200 Pa or less, and the electrode provided in the processing chamber should be 0. 17W / cm 2 More than 0.5W / cm 2 More preferably, 0.25 W / cm² 2 0 0.35W / cm 2 Under the following conditions for supplying high-frequency power, silicon oxide film or nitrogen oxide film A silicon dioxide film is formed.

[0148] As the source gas for insulating film 311b, a silicon-containing depositing gas and an oxidizing gas are used. It is preferable to do so. Typical examples of silicon-containing sedimentary gases include silane, disilane, and Examples include silane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide.

[0149] As a film deposition condition for insulating film 311b, the above-mentioned power density high frequency is used in the processing chamber at the above-mentioned pressure. By supplying power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. Furthermore, as the oxidation of the raw material gas progresses, the oxygen content in the insulating film 311b becomes stoichiometrically It becomes more than that. However, if the substrate temperature is the deposition temperature of the insulating film 311b, Because the bond between silicon and oxygen is weak, some of the oxygen is removed when heated. As a result, chemical Oxidation occurs when a substance contains more oxygen than satisfactorily satisfactorily, and some of the oxygen is removed upon heating. A material insulating film can be formed. Also, oxide semiconductor films 308a, 308b, 308d An insulating film 311a is provided on top. Therefore, in the process of forming the insulating film 311b, The insulating film 311a acts as a protective film for the oxide semiconductor films 308a, 308b, and 308d. As a result, damage to oxide semiconductor films 308a, 308b, and 308d is reduced while maintaining high power. - An insulating film 311b can be formed using high-density high-frequency power.

[0150] Furthermore, in the film deposition conditions for insulating film 311b, silicon-containing deposition properties in response to oxidizing gases By increasing the gas flow rate, it is possible to reduce the number of defects in the insulating film 311b. In summary, ESR measurement showed that g = 2.001 originates from the dangling bond of silicon. The spin density of the signal appearing is 6 × 10 17 spins / cm 3 Less than 3 × 10 17 spins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 Below This allows for the formation of oxide insulating films with fewer defects. As a result, the reliability of the transistor is improved. It can improve.

[0151] Next, a heat treatment is performed. The temperature of this heat treatment is typically 150°C or higher until the substrate strain point is reached. A temperature of 200°C to 450°C, more preferably 300°C to 450°C. The temperature of the heat treatment is typically 300°C to 400°C, preferably. By maintaining a temperature between 320°C and 370°C, warping and shrinkage of the substrate are prevented even in large-area substrates. This makes it possible to reduce the yield, improving the return on investment.

[0152] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Processing time can be reduced.

[0153] The heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm). Air with a podium level of 10 ppb or less (preferably 10 ppb or less), or a noble gas (argon, helium, etc.) The procedure should be carried out under the following conditions. Note that the above-mentioned nitrogen, oxygen, ultra-dry air, or noble gases may contain hydrogen and water. It is preferable that the following are not included.

[0154] This heat treatment removes some of the oxygen contained in the insulating film 311b from the oxide semiconductor film 308a. , move to 308b and 308d, and the oxide semiconductor films 308a, 308b and 308d are contained within them. It is possible to reduce the oxygen vacancies. As a result, oxide semiconductor films 308a, 308 The amount of oxygen deficiency contained in b,308d can be further reduced.

[0155] Furthermore, if the insulating films 311a and 311b contain water, hydrogen, etc., the water, hydrogen, etc. can be blocked. An insulating film 313 having a coating function is subsequently formed and heat treatment is performed, and the insulating film 311a, Water, hydrogen, etc. contained in 311b migrate to oxide semiconductor films 308a, 308b, and 308d. As a result, defects occur in the oxide semiconductor films 308a, 308b, and 308d. By heating, water, hydrogen, etc. contained in the insulating films 311a and 311b are removed. This is possible, reducing variations in the electrical characteristics of transistors and also reducing fluctuations in the threshold voltage. It can be suppressed.

[0156] Furthermore, by forming the insulating film 311b on the insulating film 311a while heating, oxide semiconductors Oxygen is transferred to the body membranes 308a, 308b, and 308d, and oxide semiconductor films 308a, 308 Since it is possible to reduce the oxygen deficiency contained in b and 308d, the heat treatment is performed. It's not necessary.

[0157] Furthermore, when forming conductive films 310a, 310b, 310c, 310d, and 310e, The oxide semiconductor films 308a, 308b, and 308d are damaged by etching. The back channels of oxide semiconductor films 308a and 308b (oxide semiconductor films 308a, 3 In 08b, the conductive films 304a and 304c, which function as gate electrodes, are opposite to the surface facing them. Oxygen deficiency occurs on the opposite side. However, an acid that satisfies the stoichiometric composition in the insulating film 311b By applying an oxide insulating film containing more oxygen than the element, the back can be treated by heat treatment. This allows for the repair of oxygen vacancies that occur on the channel side. This enables the oxide semiconductor film 30 Because defects in 8a and 308b can be reduced, the reliability of the transistor can be improved. It can be raised.

[0158] The heat treatment may be performed after the opening 362, which is formed later, has been created.

[0159] Next, the insulating film 311 is processed into a desired area to form the insulating film 312 and the opening 362 The insulating film 312 and the opening 362 are formed by creating a fourth pattern in the desired region. A mask is formed by etching, and the areas not covered by the mask are etched. This can be formed (see Figure 6(A)).

[0160] The opening 362 is formed so that the surface of the oxide semiconductor film 308d is exposed. For example, a dry etching method can be used to form the opening 362. Furthermore, the method for forming the opening 362 is not limited to this, and includes wet etching, Alternatively, a formation method combining dry etching and wet etching may be used.

[0161] Next, an insulating film 313 is formed on the insulating film 312 and the oxide semiconductor film 308d (Figure 6( See B).

[0162] The insulating film 313 is a barrier against external impurities, such as oxygen, hydrogen, water, alkali metals, It is preferable to use a material that prevents alkaline earth metals, etc., from diffusing into the oxide semiconductor film. Furthermore, it is preferable that the material contains hydrogen, and typically an inorganic insulating material containing nitrogen, such as a nitride. An insulating film can be used. Examples of insulating films 313 include those produced by CVD, sputtering, etc. It can be formed using the G method.

[0163] When insulating film 313 is deposited by plasma CVD or sputtering, an oxide semiconductor is formed. The film is exposed to plasma, and oxygen vacancies are created in the oxide semiconductor film. Alternatively, insulating film 313 This is because external impurities, such as water, alkali metals, and alkaline earth metals, can cause oxide semiconductors to form. It is a membrane formed of a material that prevents diffusion into the body membrane, and furthermore, it contains hydrogen. Therefore, it is an insulator. When hydrogen from film 313 diffuses into oxide semiconductor film 308d, When hydrogen combines with oxygen, electrons, which act as carriers, are produced. Alternatively, in an oxide semiconductor film... When hydrogen fills the oxygen vacancies, electrons, which act as carriers, are generated. The oxide semiconductor film 308d becomes a conductive film 308c with high conductivity and light transmission. .

[0164] Furthermore, the insulating film 313 is preferably formed at a high temperature in order to enhance its blocking properties. For example, substrate temperature 100°C to 400°C, more preferably 300°C to 400°C. It is preferable to heat and form the film at the specified temperature. Oxygen is desorbed from the oxide semiconductor used as 308a and 308b, and the carrier concentration increases. Since this phenomenon may occur, the temperature should be set so that this phenomenon does not occur.

[0165] Next, the insulating film 313 is processed into a desired region to form the insulating film 314 and the opening 364. a, 364b, and 364c are formed. Note that insulating film 314 and openings 364a, 364 b, 364c is used to form a mask by a fifth patterning in the desired region, and the mask It can be formed by etching the areas not covered by the material (see Figure 6(C)). .

[0166] Furthermore, the opening 364a is formed so that the surface of the conductive film 304a is exposed. The opening 364b is formed so that the conductive film 310c is exposed. Also, the opening 364c is The conductive film 310e is formed so that it is exposed.

[0167] Furthermore, as a method for forming the openings 364a, 364b, and 364c, for example, dry ec The ching method can be used. However, the method of forming openings 364a, 364b, and 364c Legally, this is not limited to, but also includes wet etching methods or dry etching methods. A formation method combining this with the wet etching method may also be used.

[0168] Next, a conductive film 31 is applied to the insulating film 314 so as to cover the openings 364a, 364b, and 364c. Form 5 (see Figure 7(A)).

[0169] The conductive film 315 can be formed, for example, by a sputtering method.

[0170] Next, by processing the conductive film 315 into a desired region, a light-transmitting conductive film 316a is obtained. 316b is formed. Note that the formation of the light-transmitting conductive films 316a and 316b is desired. A mask is formed in the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see Figure 7(B)).

[0171] Next, a planarization film 317 is formed so as to cover the insulating film 314 and the conductive films 316a and 316b. (See Figure 7(C).)

[0172] As for the planarized film 317, spin coating, dip coating, slit coating, By forming the planarized film 317 using wet methods such as inkjet or printing, the area to be formed A planarized film 317 with a flat surface can be formed without being affected by the unevenness of the region. For the planarized film 317, spin coating, dip coating, and slit coating methods were used. In this case, after applying the composition, a mask is formed in the desired area by a seventh patterning process. The planarized film 317 is formed by etching the areas not covered by the mask. It is possible.

[0173] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to sixth, or the Patternings 1 through 7, i.e., 6 or 7 masks, for transistors and capacitors. The elements can be formed simultaneously.

[0174] In this embodiment, hydrogen contained in the insulating film 314 is expanded into the oxide semiconductor film 308d. The conductivity of the oxide semiconductor film 308d was increased by scattering, but the oxide semiconductor films 308a and 30 8b is covered with a mask, and impurities, typically hydrogen, boron, and lysate, are added to the oxide semiconductor film 308d. By adding tin, antimony, noble gas elements, alkali metals, alkaline earth metals, etc., acid The conductivity of the oxide semiconductor film 308d may be increased. Hydrogen and boron may be added to the oxide semiconductor film 308d. Methods for adding phosphorus, tin, antimony, noble gas elements, etc. include ion doping. , ion implantation, etc. On the other hand, alkali metals and alkaline earth elements are used in oxide semiconductor films 308d. One method for adding metals, etc., involves exposing the oxide semiconductor film 308d to a solution containing the impurities. There is a law.

[0175] Various films such as oxide semiconductor films and inorganic insulating films disclosed in the above embodiments are produced by sputtering. or by the plasma CVD (Chemical Vapor Deposition) method This can be done, but it may also be formed by other methods, such as thermal CVD. An example of the law is MOCVD (Metal Organic Chemical Vapor Deposition method and ALD (Atomic Layer Deposition) You may also use method n).

[0176] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage of never being accomplished.

[0177] In the thermal CVD method, the raw material gas and oxidizer are simultaneously introduced into the chamber, and the chamber is subjected to atmospheric pressure. Alternatively, by applying reduced pressure and reacting the film near or on the substrate, the film can be deposited on the substrate. You may go.

[0178] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber, and the raw material gas for the reaction is The gases are introduced into the chamber sequentially, and film deposition can be performed by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), two types or less The above raw material gases are supplied to the chamber in order, and the first is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. A second raw material gas is introduced. If an inert gas is introduced at the same time, the inert gas is... It acts as a carrier gas, and also when introducing a second raw material gas, an inert gas is introduced at the same time. Good. Also, instead of introducing an inert gas, the first source gas was removed by vacuum evacuation. Later, a second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate and forms the first layer. A film is formed, and it reacts with a second raw material gas introduced later, so that the second layer is laminated on top of the first layer. A thin film is formed. This process is repeated multiple times while controlling the gas introduction sequence until the desired thickness is reached. By doing this, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the gas introduction. Because it can be adjusted by the number of times the sequence is repeated, precise film thickness adjustment is possible. It is suitable for fabricating miniature FETs.

[0179] Thermal CVD methods such as MOCVD and ALD are disclosed in the embodiments described above. Various films such as oxide semiconductor films and inorganic insulating films can be formed, for example, In-Ga When forming a -Zn-O film, trimethylindium, trimethylgallium, and Zn-O are used. Methylzinc is used. The chemical formula for trimethylindium is In(CH3)3. Furthermore, the chemical formula for trimethylgallium is Ga(CH3)3. Also, dimethylzinc... The chemical formula is Zn(CH3)2. Furthermore, it is not limited to these combinations, but also includes trim Triethylgallium (chemical formula Ga(C2H5)3) can also be used instead of tylgallium. It is also possible to use diethylzinc (chemical formula Zn(C2H5)2) instead of dimethylzinc. can.

[0180] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and a liquid containing a hafnium precursor compound (hafnium alkoxide solution, typically tetra A raw material gas obtained by vaporizing dimethylamide hafnium (TDMAH) and an oxidizing agent Two types of gases, ozone (O3), are used. The chemical formula is Hf[N(CH3)2]4. Other material liquids include tetrakis(E Examples include hafnium (methylmethylamide).

[0181] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, A liquid containing a medium and an aluminum precursor compound (such as trimethylaluminum (TMA)) Two types of gases are used: a vaporized raw material gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other material solutions include Tris( Dimethylamide) Aluminum, Triisobutylaluminum, Aluminum Tris(2 Examples include 2,6,6-tetramethyl-3,5-heptanedione).

[0182] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Chlorodisilane is adsorbed onto the film-forming surface, and chlorine contained in the adsorbed material is removed, resulting in an oxidizing gas (O 2. A radical of nitrous oxide is supplied and reacted with the adsorbed material.

[0183] For example, oxide semiconductor films, such as In-Ga-Zn-, can be deposited using an ALD-based film deposition system. When forming an O film, In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. - An O layer is formed, and then Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. After forming the layer, a ZnO layer is formed by simultaneously introducing Zn(CH3)2 gas and O3 gas. The order of these layers is not limited to this example. Also, by mixing these gases, In-G A mixed compound layer such as an aO layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. Furthermore, instead of O3 gas, H2O gas obtained by bubbling with an inert gas such as Ar was used. It is also acceptable to use O3 gas, but it is preferable to use O3 gas that does not contain H. In(CH3)3 gas Alternatively, In(C2H5)3 gas may be used. Also, Ga(CH3)3 gas may be used instead. Alternatively, Ga(C2H5)3 gas may be used. Also, instead of In(CH3)3 gas, I n(C2H5)3 gas may be used. Alternatively, Zn(CH3)2 gas may be used.

[0184] Next, regarding the element portion provided on the substrate 342 which is provided opposite the substrate 302, The following explanation will be given. Here, the element portion provided on the substrate 342 is referred to as the substrate 342 This refers to the region sandwiched between the aligning film 352.

[0185] First, prepare substrate 342. The materials used for substrate 342 are the same as those used for substrate 302. This can be done. Next, a light-shielding film 344 and a colored film 346 are formed on the substrate 342 (Figure 8(A )reference).

[0186] The light-shielding film 344 and the colored film 346 are produced using various materials by printing, inkjet, and These are formed at the desired locations using etching methods such as photolithography.

[0187] Next, an insulating film 348 is formed on the light-shielding film 344 and the colored film 346 (see Figure 8(B)). ).

[0188] Examples of insulating film 348 include organic insulating films such as acrylic resin, epoxy resin, and polyimide. A border film can be used. By forming an insulating film 348, for example, a colored film 34 This can suppress the diffusion of impurities contained in 6 towards the liquid crystal layer 320. Furthermore, the insulating film 348 is not necessarily required, and a structure without the insulating film 348 can be formed. That's good too.

[0189] Next, a conductive film 350 is formed on the insulating film 348 (see Figure 8(C)). The conductive film 350 and The materials shown in conductive films 316a and 316b can be used in this regard.

[0190] The structure to be formed on the substrate 342 can be created through the above process.

[0191] Next, the insulating film 31 formed on substrate 302 and substrate 342, more specifically on substrate 302 4. Transparent conductive films 316a, 316b and conductive film 35 formed on the substrate 342 Alignment film 318 and alignment film 352 are formed on the 0, respectively. Alignment film 318, Alignment film 352 These can be formed using methods such as rubbing and photo-alignment. Subsequently, the substrate 302 and the base A liquid crystal layer 320 is formed between the plate 342 and the liquid crystal layer 320. The method for forming the liquid crystal layer 320 is to disperse The drip method (dropping method) or the method of bonding substrate 302 and substrate 342 together and then using capillary action An injection method for injecting liquid crystal can be used.

[0192] By following the above steps, the liquid crystal display device shown in Figure 3 can be manufactured.

[0193] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0194] <Example 1> A modified example of the planarization film 317 in Embodiment 1 will be explained with reference to Figure 9. Figure 9 Similar to Figure 3, AB is a cross-sectional view of the drive circuit section, and CD is a cross-sectional view of the pixel section.

[0195] Figure 9 shows that the planarization film 317a is not provided on the entire substrate 302, and a light-transmitting conductive film 3 The points provided on 16a and 316b differ from the cross-sectional view shown in Figure 3. That is, the orientation film 318 is It has a region in contact with the planarization film 317a and a region in contact with the insulating film 314.

[0196] In the pixel area, the display area is a transparent conductive film 316b that functions as a pixel electrode. This is the region where it is formed. Therefore, at least flat on the light-transmitting conductive film 316b. The formation of the chemical film 317a reduces the unevenness of the region on which the orientation film 318 is formed. This is possible. As a result, it is possible to reduce display defects caused by poor alignment of liquid crystal molecules.

[0197] Here, the method for manufacturing the liquid crystal display device shown in Figure 9 is described using Figures 4 to 7 and Figure 10. I will explain.

[0198] Similar to Embodiment 1, the process proceeds as shown in Figures 4 to 7(A), and as shown in Figure 10(A). On the substrate 302, conductive films 304a, 304b, 304c, which function as gate electrodes, Insulating film 305 and insulating film 306 function as a galvanic insulating film, oxide semiconductor film 308a, 3 08b, 308d, conductive film 310a, 310b, 310c, 310d, 310e, insulating film 312, insulating film 314, conductive film 315, and planarization film 317 are formed. In this process, the first to fifth patterning is performed, and the conductive film 304a is produced accordingly. 304b, 304c, oxide semiconductor film 308a, 308b, 308d, conductive film 310a , 310b, 310c, 310d, 310e, opening 362, and openings 364a, 36 They form 4b and 364c.

[0199] Next, the planarized film 317 is processed to the desired region, as shown in Figure 10(B), A planarization film 317a is formed. Note that the formation of the planarization film 317a occurs when the planarization film 317a is insensitive. When formed with a photopolymer resin, a mask is formed in the desired region by a sixth patterning process. This can be formed by etching the areas not covered by the mask. When the planarization film 317a is formed of a photosensitive resin, the desired region is used for the sixth patterning. By further exposure and development, a planarized film 317a can be formed.

[0200] Next, the planarized film 317a is used as a mask, and the conductive film 315 in the area not covered by the mask By etching, transparent conductive films 316a and 316b can be formed. Here, the light-transmitting conductive films 316a, 316b, and the planarization film 317a are each Instead of performing patterning separately to form the planarized film 317a, By turning, it is also possible to form transparent conductive films 316a and 316b. Therefore, it is possible to reduce the patterning process. That is, the first to sixth patterns In other words, transistors, capacitive elements, and planarization films 317a are formed simultaneously using six masks. It is possible.

[0201] Furthermore, after Figure 10(C), by performing a heat treatment, the ends become curved as shown in Figure 11. A planarized film 317b can be formed. As a result, the region to which the orientation film 318 is formed The unevenness can be further reduced. The temperature of the heat treatment is the flattened film 317b This should be done at a temperature below the firing temperature. This heat treatment produces a translucent conductive film 316a, 3 A planarized film 317a can be formed with its end located on 16b. Alternatively, as shown in Figure 11 As shown, the planarized film has its edges located on the outside of the light-transmitting conductive films 316a and 316b. 317b can be formed.

[0202] <Modification 2> A modified example of a liquid crystal display device using a liquid crystal element in pixel 301 will be described. Here, Figure Figure 12 shows a top view of pixel 301 shown in 1(B). Note that in Figure 12, the counter electrode And the liquid crystal element is omitted. Note that the same configuration as Embodiment 1 and Modification 1 is explained below. The explanation is omitted. Here, a modified example 1 shown in Embodiment 1 is used to function as a pixel electrode. A conductive film and a planarization film are formed, and this modified example can be applied to Embodiment 1 as appropriate. .

[0203] As shown in Figure 2, in Figure 12, an opening 374c is provided inside the opening 372c. It differs from pixel 301. Also, Figure 2 shows that an aperture 372 is provided instead of an aperture 362. The pixels shown are different. The conductive film 310e functions as a pixel electrode in the aperture 374c. It is electrically connected to a light-transmitting conductive film 316b.

[0204] Next, Figure 13 shows a cross-sectional view between the dashed lines C and D in Figure 12. A cross-sectional view of the drive circuit section (top view omitted) is shown at A and B.

[0205] As shown in Figure 13, the conductive film 304b is provided with insulating film 306 and insulating film 312 The opening 372a (see Figure 14(A)) and the opening 374 provided in the insulating film 314 It has a (see Figure 14(C)). Opening 374a (see Figure 14(C)) is an opening It is located inside section 372a (see Figure 14(A)). Opening 374a (see Figure 14(C)) In this configuration, the conductive film 304b and the light-transmitting conductive film 316a are connected.

[0206] Furthermore, on the conductive film 310c, there is an opening 372b provided in the insulating film 312 (Figure 14 (A (See reference.) and an opening 374b provided in the insulating film 314 (see Figure 14(C)) Opening 374b (see Figure 14(C)) is opening 372b (see Figure 14(A)). It is located inside the opening 374b (see Figure 14(C)). A transparent conductive film 316a is connected to it.

[0207] Furthermore, on the conductive film 310e, there is an opening 372c provided in the insulating film 312 (Figure 14 (A (See reference.) and an opening 374c (see Figure 14(C)) provided in the insulating film 314. Opening 374c (see Figure 14(C)) is located at opening 372c (see Figure 14(A)). It is located inside the opening 374c (see Figure 14(C)). A transparent conductive film 316b is connected to it.

[0208] Furthermore, on the light-transmitting conductive film 308c, there is an opening 372 provided in the insulating film 312. (See Figure 14(A).) It has a light-transmitting conductive film 308 at the opening 372. c is in contact with the insulating film 314.

[0209] The connection between conductive film 304b and the light-transmitting conductive film 316a, conductive film 310c and light-transmitting The connection portion of the conductive film 316a having properties, the conductive film 310e, and the transparent conductive film 316b The connection points are each covered with insulating film 305 and / or insulating film 314. O5 and insulating film 314 are protected from external impurities, such as water, alkali metals, and alkaline earth elements. It is formed with an insulating film made of a material that prevents metals and other substances from diffusing into the oxide semiconductor film. Furthermore, the sides of the openings 372a, 372b, 372c, and 372 (see Figure 14(A)) are insulated. It is covered with film 305 and / or insulating film 314. Since an oxide semiconductor film is provided on the side, external impurities such as water and alkali gold are blocked. The group, alkaline earth metals, etc., are conductive films 304b, 310c, 310e, and light-transmitting properties. From the connection point of the conductive films 316a and 316b, the oxide semiconductor film contained in the transistor This prevents diffusion. Therefore, it prevents fluctuations in the electrical characteristics of the transistor. This makes it possible to improve the reliability of liquid crystal display devices.

[0210] The method for manufacturing the element portion provided on the substrate 302 shown in the liquid crystal display device in Figure 13. This will be explained using Figures 4, 5, 14, and 15.

[0211] Similar to Embodiment 1, the process shown in Figures 4 and 5 is followed to form a gate electrode on the substrate 302. Conductive films 304a, 304b, 304c that function as gate insulating films, insulating film 3 05 and insulating film 306, oxide semiconductor films 308a, 308b, 308d, conductive film 310a , 310b, 310c, 310d, 310e, and insulating film 311 are formed. In this process, the first to third patterning is performed, and the conductive film 304a is produced accordingly. 304b, 304c, oxide semiconductor film 308a, 308b, 308d, conductive film 310a These form 310b, 310c, 310d, and 310e.

[0212] After this, a heat treatment is performed in the same manner as in Embodiment 1 to remove the oxygen contained in the insulating film 311b. A portion is moved to oxide semiconductor films 308a and 308b, and oxide semiconductor films 308a and 308 The amount of oxygen vacancies in the oxide semiconductor film contained in b can be reduced.

[0213] Next, as shown in Figure 14(A), the insulating film 311 is processed into a desired region, thus providing insulation. A film 312 and openings 372, 372b, and 372c are formed. Furthermore, the gate insulating film An opening 372a is formed by processing a portion of the insulating film 306 into a desired area. Oh, insulating film 305, insulating film 312, and openings 372, 372a, 372b, 372c Formation involves forming a mask by a fourth patterning in the desired region, and then covering with the mask. It can be formed by etching the areas that have not been etched. Openings 372, 372a As for the method of forming 372b and 372c, the formation of the opening 362 as shown in Embodiment 1 may be appropriate. A method can be used.

[0214] In the etching process, at least an opening 372a is formed, which will be performed later. During the etching process using the mask formed by the fifth patterning, It is possible to reduce the quantity.

[0215] Next, insulating film 305, conductive films 310c, 310e, insulating film 312, and oxide semiconductor film An insulating film 313 is formed on 308d (see Figure 14(B)).

[0216] Next, similar to Embodiment 1, the insulating film 313 is processed into a desired region, 14, and openings 374a, 374b, 374c are formed. Note that insulating film 314, The openings 374a, 374b, and 374c are masked by a fifth patterning in the desired area. This can be achieved by forming the mask and etching the areas not covered by the mask. (See Figure 14(C)).

[0217] Next, similar to Embodiment 1, an insulating material is placed over the openings 374a, 374b, and 374c. A conductive film 315 is formed on film 314. Also, a modified example of Embodiment 1 is formed on the conductive film 315. Similarly, a planarization film 317a is formed (see Figure 15(A)). Formation is performed when the planarization film 317a is formed of a non-photosensitive resin, and a sixth pattern is formed in the desired region. Form a mask by etching, and etch the areas not covered by the mask. It can be formed by this. Also, when the planarization film 317a is formed of a photosensitive resin, By exposing and developing the desired region using a sixth patterning method, a planarized film 317a is formed. It is possible.

[0218] Next, the planarized film 317a is used as a mask, and the conductive film 315 in the area not covered by the mask By etching, transparent conductive films 316a and 316b are formed (Figure 15). See B).

[0219] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to sixth patterns This means that transistors and capacitive elements can be formed simultaneously using six masks. ru.

[0220] In Figure 14(A), the case where the opening 372a is not formed is shown in Figure 14(C). In the etching process, insulating film 305, insulating film 306, insulating film 312, and insulating film 31 4 must be etched, which increases the amount of etching compared to the other openings. Therefore, variations occur in the etching process, and in some areas, An opening 374a is not formed, and a translucent conductive film 316a and conductive film 3 are formed later. A contact failure occurs in 04b. However, in this embodiment, twice The etching process forms openings 372a and 374a, Etching defects are less likely to occur during the formation process. As a result, the yield of liquid crystal display devices is improved. It is possible to improve it. Note that although the explanation here uses opening 372a, The same effect is observed in the mouth portion 374b and the opening 374c.

[0221] In this modified example, in the etching process performed in Figure 14(A), the opening 372a is In order to form the film, insulating film 306 and insulating film 312 were etched, but instead the insulating film 305, insulating film 306, and insulating film 312 may be etched. As a result, Figure 14( In the etching process performed in C), etching of only the insulating film 314 is performed at all openings. This process involves etching, and since the etching amount is the same, it further reduces etching defects. It is possible.

[0222] <Variation 3> A modified example of a liquid crystal display device using a liquid crystal element in pixel 301 will be described. Figures 3 and 9 are shown below. In the liquid crystal display device shown in Figure 13, the light-transmitting conductive film 308c is an insulating film 314 Although it is in contact with the insulating film 305, it can be structured to be in contact with the insulating film 305. In this case, as shown in Figure 6. Since there is no need to provide an opening 362, the light-transmitting conductive films 316a and 316b It is possible to reduce the step difference on the surface. Therefore, the liquid crystal molecules contained in the liquid crystal layer 320 It is possible to reduce orientation distortion. Furthermore, it is possible to manufacture liquid crystal display devices with high contrast. It is possible.

[0223] In this structure, as shown in Figure 4(B), before forming the oxide semiconductor film 307, insulation The film 306 can be selectively etched to expose a portion of the insulating film 305.

[0224] <Modification 4> Here, a modified example of the liquid crystal display device shown in Embodiment 1 is shown using Figures 16 to 18. Let me explain. In Figure 16, AB shows a cross-sectional view of the drive circuit section, and CD shows the pixel section. A cross-sectional view is shown. Here, a modified example 1 shown in Embodiment 1 is used as the pixel electrode. A conductive film and a planarized film capable of performing the function are formed, as appropriate in Embodiment 1, Modification 2, and Modification 3. This modified example can be applied.

[0225] The liquid crystal display device shown in Figure 16, compared to the liquid crystal display device shown in Embodiment 1, has channel The difference lies in the use of protected transistors.

[0226] In the drive circuit section, a conductive film 304a functions as a gate electrode, and as a gate insulating film Functional insulating film 305 and insulating film 306, oxide semiconductor film 30 in which a channel region is formed 8a, conductive films 310a and 310b, which function as source and drain electrodes, provide traction The radiator 102 is composed of an oxide semiconductor film 308a and conductive films 310a and 310b. Furthermore, an insulating film 312 that functions as a channel protective film is provided. Also, conductive films 310a, 3 An insulating film 314 is provided on 10b and 310c as a protective layer.

[0227] In the pixel area, the conductive film 304c functions as a gate electrode, and the gate insulating film functions as a gate insulating film. Insulating film 305 and insulating film 306, and a channel region formed on the gate insulating film are formed An oxide semiconductor film 308b is formed, and a conductive film 310 functions as a source electrode and a drain electrode. d and 310e constitute the transistor 103. Oxide semiconductor film 308b and conductive film 3 An insulating film 312, which functions as a channel protective film, is provided between 10d and 310e. Furthermore, an insulating film 314 is provided on the conductive films 310d, 310e, and the light-transmitting conductive film 308c. It is provided as a protective layer.

[0228] Furthermore, a light-transmitting conductive film 316b that functions as a pixel electrode is provided on the insulating film 314. The conductive film 310e is connected at the opening.

[0229] Furthermore, one of the electrodes is a translucent conductive film 308c, which functions as a dielectric film. The insulating film 314 and the other electrode, which is a transparent conductive film 316b, provide capacitance. This constitutes element 105.

[0230] Furthermore, in the drive circuit section, the conductive film 30 formed simultaneously with the conductive films 304a and 304c 4b and conductive film 31 formed simultaneously with conductive films 310a, 310b, 310d, and 310e 0c refers to the transparent conductive film 31 that was formed simultaneously with the transparent conductive film 316b. It will be connected via 6a.

[0231] In this modified example, the conductive films 310a, 310b, 310d, and 310e are etched. When this occurs, the region that becomes the channel region in the oxide semiconductor films 308a and 308b is the insulating film 31 Because it is covered by 2, the conductive films 310a, 310b, 310d, and 310e are formed. Due to ching, the regions that become channel regions in oxide semiconductor films 308a and 308b are It is undamaged. Furthermore, the insulating film 312 contains more oxygen than satisfactorily satisfactorily. It is formed with an oxide insulating film containing oxygen. Therefore, some of the oxygen contained in the insulating film 312 The oxide semiconductor film 308a, 308b is moved to the oxide semiconductor film 308a, 308b. The amount of oxygen deficiency can be reduced.

[0232] The method for manufacturing the element portion provided on the substrate 302 shown in the liquid crystal display device in Figure 16. This will be explained using Figures 4, 17, and 18.

[0233] Similar to Embodiment 1, the process shown in Figure 4 is followed, and a gate electrode is formed on the substrate 302. Conductive films 304a, 304b, 304c, insulating film 305 that functions as a gate insulating film and An insulating film 306 and oxide semiconductor films 308a, 308b, and 308d are formed. In the process, the first patterning and the second patterning are performed, and the conductive film 304 a, 304b, 304c form oxide semiconductor films 308a, 308b, and 308d. .

[0234] Next, as shown in Figure 17(A), the insulating film 311a and insulating film 3 are similar to those in Embodiment 1. The stacked 11b forms an insulating film 311.

[0235] After this, similar to Embodiment 1, a heat treatment is performed to remove one of the oxygen contained in the insulating film 311. The oxygen is transferred from the part to the oxide semiconductor film 308a, 308b, and the oxide semiconductor film 308a, 3 The amount of oxygen vacancies in the oxide semiconductor film contained in 08b can be reduced.

[0236] Next, as shown in Figure 17(B), the insulating film 311 is processed into a desired region, causing oxidation. An insulating film 312 is formed on the semiconductor films 308a and 308b. In this process, If the insulating film 306 is formed with the same material as 312, a portion of the insulating film 306 will be etched. Therefore, only the regions covered by the oxide semiconductor films 308a and 308b remain. The formation of film 306 and insulating film 312 is carried out by the shape of a mask formed by third patterning in the desired region. The mask can be formed by performing the process and etching the areas not covered by the mask. ru.

[0237] Next, conductive films are applied to insulating film 305, insulating film 306, oxide semiconductor films 308a and 308b. After formation, conductive films 310a, 310b, 310c, 310a, 310b, 310c, 310b 10d and 310e are formed (see Figure 17(C)). Note that conductive films 310a and 310b are also formed. The formation of 310c, 310d, and 310e is done by massing the desired region with a fourth patterning. The mask is formed by creating a groove and etching the areas not covered by the mask. It is possible.

[0238] Next, insulating film 305, insulating film 312, oxide semiconductor film 308d, conductive films 310a, 31 An insulating film 313 is formed on 0b, 310c, 310d, and 310e (see Figure 18(A)). .

[0239] Next, similar to Embodiment 1, the insulating film 305 and insulating film 313 are processed into the desired regions. This forms the insulating film 314 and the openings 384a, 384b, and 384c. The edge film 314 and the openings 384a, 384b, 384c are used to create a fifth pattern in the desired region. A mask is formed by etching, and the areas not covered by the mask are etched. It can be formed (see Figure 18(B)).

[0240] Next, similar to Embodiment 1, an insulating material is placed over the openings 384a, 384b, and 384c. A conductive film is formed on the film 314. Also, a flat film is formed on the conductive film, similar to the modified example 1 of Embodiment 1. A photocatalytic film 317a is formed. Note that the formation of the planarization film 317a is performed when the planarization film 317a is not photosensitive. When formed with a resin, a mask is formed in the desired region by a sixth patterning process. This can be formed by etching the areas not covered by the mask. When the planarized film 317a is formed of a photosensitive resin, the desired region is made by a sixth patterning. By exposing and developing, a planarized film 317a can be formed. Next, the planarized film By using 317a as a mask and etching the conductive film in the areas not covered by the mask, A translucent conductive film 316a, 316b is formed (see Figure 18(C)).

[0241] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to sixth patterns This means that transistors and capacitive elements can be formed simultaneously using six masks. ru.

[0242] <Modification 5> Here, a modified example of the liquid crystal display device shown in Embodiment 1 is shown in Figures 19, 20 to 20. Let's explain using 22. In Figure 19, AB shows a cross-sectional view of the drive circuit section, and CD shows A cross-sectional view of the pixel area is shown. Note that, in this example, the pixel electrode functions using Embodiment 1. A light-transmitting conductive film and a planarization film are formed, using modified example 1 of Embodiment 1 as appropriate. This allows for the formation of a light-transmitting conductive film and a planarization film that function as pixel electrodes.

[0243] The liquid crystal display device shown in Figure 19 has a different insulating film 3 compared to the liquid crystal display device shown in Embodiment 1. At the 92 opening, the oxide semiconductor film 308a and the conductive films 310a and 310b are connected. The difference is that the oxide semiconductor film 308b and the conductive films 310d and 310e are connected. Furthermore, there is an insulating film 394 between the insulating film 314 and the light-transmitting conductive film 316b. They are different.

[0244] In the drive circuit section, a conductive film 304a functions as a gate electrode, and as a gate insulating film Functional insulating film 305 and insulating film 306, oxide semiconductor film 30 in which a channel region is formed 8a, insulating film 392 covering the oxide semiconductor film 308a, oxidation at the opening of the insulating film 392 A conductive film 310a that is in contact with the semiconductor film 308a and functions as a source electrode and a drain electrode. , 310b constitutes transistor 102. Also, conductive films 310a, 310b, 3 Insulating films 312, 314, and 394 are provided on 10c as protective layers. It is.

[0245] In the pixel area, the conductive film 304c functions as a gate electrode, and the gate insulating film functions as a gate insulating film. Insulating film 305 and insulating film 306, and a channel region formed on the gate insulating film are formed an oxide semiconductor film 308b, an insulating film 392 covering the oxide semiconductor film 308b, insulating film 39 At the opening 2, it is in contact with the oxide semiconductor film 308b and serves as the source electrode and drain electrode. The transistor 103 is formed by the functional conductive films 310d and 310e. On 310d and 310e, insulating film 312, insulating film 314, and insulating film 394 form a protective layer. It is established in this manner.

[0246] Furthermore, the light-transmitting conductive film 316b, which functions as a pixel electrode, is an insulating film 312, an insulating film The conductive film 310e is connected to the film 314 and the insulating film 394 at the openings provided in the film.

[0247] Furthermore, one of the electrodes is a translucent conductive film 308c, which functions as a dielectric film. Insulating films 314 and 394, and a translucent conductive film 3 that functions as the other electrode. 16b constitutes the capacitive element 105.

[0248] Since the insulating film 392 is in contact with the oxide semiconductor films 308a and 308b, the oxide insulating film forms It is preferable that the insulating film 392 be formed using the same material as the insulating film 306. This is possible. In addition, the insulating film 392 is an oxide insulating film that permeates oxygen, similar to the insulating film 312a. It is preferable that it be a film with a small number of defects. As a result, the oxygen contained in the insulating film 312b It is possible to move the oxide semiconductor film 308a, 308b, and oxide semiconductor film 30 It is possible to reduce the oxygen vacancies contained in 8a and 308b. It is preferable to have a small amount of defects at the interface between 308a, 308b and the insulating film 392.

[0249] The insulating film 394 is provided to control the charge capacitance of the capacitive element 105. Therefore, insulation The film 394 can be formed using an oxide insulating film or a nitride insulating film as appropriate. The insulating film 394 is formed by CVD (chemical vapor deposition) using organic silane gas. By using an oxide insulating film, typically a silicon oxide film, it is possible to improve flatness. This is preferable. Furthermore, the insulating film 314 ensures that the capacitive element 105 obtains a predetermined charge capacitance. If possible, the insulating film 394 does not need to be provided.

[0250] In this modified example, the conductive films 310a, 310b, 310d, and 310e are etched. At that time, the oxide semiconductor films 308a and 308b are covered by the insulating film 3, so the conductive film 3 By etching to form 10a, 310b, 310d, and 310e, an oxide semiconductor film is formed. 308a and 308b are undamaged. Furthermore, the insulating film 312 has a stoichiometric composition. It is formed with an oxide insulating film that contains more oxygen than the oxygen to be filled. Therefore, insulating film 312 A portion of the oxygen contained in the oxide semiconductor film 308a, 308b is transferred to the oxide semiconductor film The amount of oxygen deficiency in 308a and 308b can be reduced.

[0251] The method for manufacturing the element portion provided on the substrate 302 shown in the liquid crystal display device in Figure 19. This will be explained using Figures 4, 20, and 22.

[0252] Similar to Embodiment 1, the process shown in Figures 4(A) to 4(C) is followed, and the substrate 302 is then coated with gel. Conductive films 304a, 304b, and 304c function as gate electrodes, and function as gate insulating films. The insulating film 305 and insulating film 306, and oxide semiconductor films 308a, 308b, and 308d are formed To accomplish this. In addition, in the said process, the first patterning and the second patterning are performed. Conductive films 304a, 304b, 304c and oxide semiconductor films 308a, 308b, 3 It forms 08d.

[0253] Next, as shown in Figure 20(A), an insulating film 390 is formed. It is formed using the same conditions as for 305 or insulating film 311a.

[0254] Next, the insulating film 390 is processed into the desired region, thereby openings 391, 391a, 391 An insulating film 392 having b, 391c, and 391d is formed. Note that the formation of the insulating film 392 is , a mask is formed in the desired region by a third patterning, and the area not covered by the mask It can be formed by etching a specific region.

[0255] Next, after forming conductive films on the oxide semiconductor films 308a, 308b and the insulating film 392, , conductive films 310a, 310b, 310c, 310d, 3 are formed through the same process as in Embodiment 1. Form 10e (see Figure 20(C)). Note that conductive films 310a, 310b, and 310c are also formed. The formation of 310d and 310e is achieved by forming a mask in the desired region through a fourth patterning. This can be achieved by performing this process and etching the areas not covered by the mask.

[0256] Next, insulating film 392 and conductive films 310a, 310b, 310c, 310d, 310e An insulating film 311 is formed on top (see Figure 21(A)).

[0257] Next, the insulating film 311 is processed into a desired region, thereby creating an insulating film 31 having an opening 393. Form 2. Note that the insulating film 312 and the opening 393 are subjected to a fifth pattern in the desired region. A mask is formed using a etchant, and the areas not covered by the mask are etched to create a shape. This can be achieved (see Figure 21(B)).

[0258] Next, as shown in Figure 21(C), the oxide semiconductor film 308d, the insulating film 392 and the opening Insulating film 313 and insulating film 394 are formed to cover 393.

[0259] The insulating film 394 is formed using methods such as CVD or sputtering.

[0260] Next, similar to Embodiment 1, insulating film 305, insulating film 306, insulating film 392, insulating film 3 12. By processing the insulating film 314 and insulating film 394 into the desired region, openings 365a, 3 65b and 365c are formed. Note that the openings 365a, 365b, and 365c are the desired area A mask is formed in the region by a sixth patterning, and the region not covered by the mask is... It can be formed by cutting (see Figure 22(A)).

[0261] Next, conductive films are formed on conductive films 304b, 310c, 310e, and insulating film 394. After that, conductive films 316a and 316b are formed through the same process as in Embodiment 1 (Figure 22( See B). Note that the formation of conductive films 316a and 316b is performed in the desired region by the seventh pattern. A mask is formed by etching, and the areas not covered by the mask are etched. , can be formed.

[0262] Next, as shown in Figure 22(C), a planarization film 317 is formed in the same manner as in Embodiment 1.

[0263] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to seventh patterns This means that transistors and capacitive elements can be formed simultaneously using seven masks. ru.

[0264] (Embodiment 2) In this embodiment, due to a structure different from that of Embodiment 1, light leakage that causes display defects is prevented. A liquid crystal display device capable of reducing [the specified noise level] will be explained using Figures 23 and 24.

[0265] In Figure 23, in the insulating film 312 having an opening 362 (see Figure 24(C)), , the angle between the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 (hereinafter referred to as the tape The difference from Embodiment 1 is that the angle (called the P-angle) is small. Also, the insulating film 314 and the conductive film 3 This embodiment differs from Embodiment 1 in that it does not have a planarization film on 16a and 316b.

[0266] On a translucent conductive film 308c, the translucent conductive film 308c and insulating film 3 The taper angle of the sides of the 12 is 5° to 45°, preferably 5° to 30°, and further Preferably, the angle is 10° to 20°, so that the insulating film 314 is placed on the insulating film 312 via the insulating film 314. The irregularities of the translucent conductive film 316b provided are mitigated. That is, the orientation film 318 Because the unevenness of the formed region is reduced, the orientation disorder of the liquid crystal molecules contained in the liquid crystal layer 320 is reduced. It is possible to do so.

[0267] Furthermore, by reducing the unevenness of the region where the alignment film 318 is formed, the film thickness of the alignment film 318 is reduced. This can improve uniformity. The thickness of the alignment film 318 affects the pre-tilt angle of the liquid crystal molecules. Therefore, by increasing the uniformity of the thickness of the alignment film 318, the pre-tilt angle of the liquid crystal molecules can be controlled. This is possible, and typically, if the pre-tilt angle of the liquid crystal molecule is 6° or more, discline Less likely to cause irritation.

[0268] Therefore, in order to reduce the unevenness of the region on which the alignment film 318 is formed, a light-transmitting guide The taper angle of the sides of the film 308c and the insulating film 312 is 5° to 45°, preferably 5°. By setting the temperature to 30° or less, and more preferably 10° or more and 20° or less, the pre-crystallized liquid crystal molecules The orientation film 3 is designed so that the tilt angle is such that discrepancies are less likely to occur. It is possible to form it at 18, and the orientation disorder of the liquid crystal molecules contained in the liquid crystal layer 320 is reduced. This makes it possible to reduce the step height in the region where the alignment film 318 is formed. It is possible to reduce it.

[0269] Here, the method for manufacturing the liquid crystal display device shown in Figure 23 is described using Figures 4, 5, and 24. I will explain.

[0270] Similar to Embodiment 1, the gate electricity is placed on the substrate 302 through the process shown in Figures 4 to 5(C). Conductive films 304a, 304b, and 304c function as electrodes, and insulating films function as gate dielectrics. Edge film 305 and insulating film 306, oxide semiconductor films 308a, 308b, 308d, conductive film 3 Forms 10a, 310b, 310c, 310d, 310e, and insulating film 311. In this process, the first to third patterning is performed, and a conductive film 3 is formed in each case. 04a, 304b, 304c, oxide semiconductor film 308a, 308b, 308d, conductive film 3 It forms 10a, 310b, 310c, 310d, and 310e.

[0271] Next, as shown in Figure 24(A), a mask 33 is applied to the desired region by a fourth patterning. Forms 0.

[0272] Next, by performing a heat treatment, the sides of the mask 330 are insulated, as shown in Figure 24(B). The angle formed on the surface of the film 311 is reduced, and a mask 332 with curved sides is formed.

[0273] Next, by etching the insulating film 311 in the area not covered by the mask 332, Figure As shown in 24(C), the taper angle of the side is 5° or more and 45° or less, preferably 5° or more. Form an insulating film 312 with an angle of 30° or less, more preferably 10° to 20° or less. This can be done. It is preferable to use dry etching for the etching process. In the etching process, the film thickness of the mask 332 is gradually reduced, and the area of ​​the mask 332 It is preferable to gradually reduce the size. As a result, the insulating film 311 is gradually exposed while the ec It is possible to chinch the tapered angle of the sides of the formed insulating film 312. It is possible.

[0274] After this, similar to Embodiment 1, insulating film 314, light-transmitting conductive films 316a, 31 Form 6b and the orientation film 318.

[0275] In the above steps, a pixel section having a transistor and a drive circuit section are formed on the substrate 302. This is possible. In addition, in the manufacturing process shown in this embodiment, the first to sixth patterns This means that transistors and capacitive elements can be formed simultaneously using six masks. ru.

[0276] (Embodiment 3) In this embodiment, regarding the liquid crystal display device having the structures of Embodiment 1 and Embodiment 2, Next, we will explain using Figure 25.

[0277] In Figure 25, the element portion provided on the substrate 302 has a light-transmitting conductive film 3 The angle between the surface of 08c and the side surface of the insulating film 312 (hereinafter referred to as the taper angle) is small. This differs from Embodiment 1 in several respects. Note that such an insulating film 312 is the insulating film shown in Embodiment 2. The structure and formation method of 312 can be used as appropriate.

[0278] The taper angle between the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 is small. By providing the edge film 312 on the element portion, the recess in the area that will become the display area in the conductive film 316b is created. The protrusion can be reduced. As a result, in the planarized film 317 near the display area, Because the effect of the unevenness of the insulating film 312 is mitigated, the planarized film 317 is formed compared to Embodiment 1. It is possible to further reduce the surface irregularities. As a result, the liquid contained in the liquid crystal layer 320 It is possible to further reduce the disorder of orientation of crystal molecules. Also, the region to which the orientation film 318 is formed By reducing the height difference, it is possible to further reduce light leakage.

[0279] (Embodiment 4) In this embodiment, the modifications applicable to the transistors shown in Embodiment 1 and Embodiment 2 are described. Let me explain the examples.

[0280] <Example 1: Regarding the undercoat insulating film> In the transistors 102 and 103 shown in Embodiments 1 and 2, as necessary Therefore, an underlayer insulating film is provided between the substrate 302 and the conductive films 304a, 304b, and 304c. This can be done. Materials for the underlayer insulating film include silicon oxide, silicon oxide nitride, and silicon nitride. N, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide Examples include aluminum oxide and aluminum nitride. Furthermore, silicon nitride is used as a material for the underlayer insulating film. , use gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc. Then, impurities, typically alkali metals, water, hydrogen, etc., are transferred from the substrate 302 to the oxide semiconductor film 30 This can suppress diffusion to 8a and 308b.

[0281] The underlying insulating film can be formed by sputtering, CVD, or other methods.

[0282] <Modification Example 2: Regarding the gate insulating film> In the transistors 102 and 103 shown in Embodiments 1 and 2, as necessary Thus, the layered structure of the insulating film that functions as a gate insulating film can be deformed. This will be explained using transistor 103.

[0283] As shown in Figure 26(A), the gate insulating film consists of insulating film 305 and insulating film 306 at the gate. The conductive film 304c, which functions as an electrode, is layered sequentially starting from the electrode side.

[0284] By providing an insulating film 305 formed of a nitride insulating film on the conductive film 304c side, the conductive film 3 Impurities from O4c, typically hydrogen, nitrogen, alkali metals, or alkaline earth metals. This prevents substances such as these from migrating to the oxide semiconductor film 308b.

[0285] Furthermore, an insulating film 306 formed of an oxide insulating film is provided on the oxide semiconductor film 308b side. This reduces the defect level density at the interface between the insulating film 306 and the oxide semiconductor film 308b. This makes it possible to obtain transistors with less degradation of electrical characteristics. Furthermore, as insulating film 306, similar to insulating film 312b, oxygen that satisfies the stoichiometric composition is more suitable than When formed using an oxide insulating film containing a large amount of oxygen, the insulating film 306 and the oxide semiconductor film Since it is possible to further reduce the defect level density at the 308b interface, it is even more preferable. It's nice.

[0286] Furthermore, as shown in Figure 26(A), the insulating film 305 is a nitride insulating film 305 with few defects. a and the highly hydrogen-blocking nitride insulating film 305b are arranged in order from the conductive film 304c side. A stacked structure can be formed. The insulating film 305 is a nitride insulating material with few defects. By providing film 305a, the dielectric strength of the gate insulating film can be improved. Furthermore, By providing a nitride insulating film 305b with high hydrogen blocking properties, the conductive film 304c and nitrogen This prevents hydrogen from moving from the oxide insulating film 305a to the oxide semiconductor film 308b. Cut.

[0287] An example of a method for fabricating the nitride insulating films 305a and 305b shown in Figure 26(A) is described below. First, plasma C using a mixed gas of silane, nitrogen, and ammonia as the raw material gas. A silicon nitride film with few defects is formed as a nitride insulating film 305a using the VD method. Next, the raw material gas is switched to a mixed gas of silane and nitrogen, resulting in a lower hydrogen concentration and a lower hydrogen content. A silicon nitride film capable of blocking is formed as a nitride insulating film 305b. This formation method produces nitrides with few defects and hydrogen blocking properties. A gate insulating film can be formed by stacking insulating films.

[0288] Alternatively, as shown in Figure 26(B), the insulating film 305 has high impurity blocking properties. Nitride insulating film 305c, nitride insulating film 305a with few defects, and hydrogen blocking properties The laminated structure is such that the high nitride insulating film 305b and the conductive film 304c are stacked sequentially from the conductive film 304c side. This is possible. As the insulating film 305, a nitride insulating film 305c with high impurity blocking properties is used. By providing this, impurities from the conductive film 304c, typically hydrogen, nitrogen, and alkali metals, are filtered out. This prevents alkaline earth metals, etc., from migrating to the oxide semiconductor film 308b. ru.

[0289] An example of the method for fabricating nitride insulating films 305a, 305b, and 305c shown in Figure 26(B) is provided below. As shown below, initially, a mixed gas of silane, nitrogen, and ammonia was used as the raw material gas. By plasma CVD, a silicon nitride film with high impurity blocking properties is created as a nitride insulating film. It is formed as 305c. Next, by increasing the ammonia flow rate, a nitrogen with fewer defects is formed. A silicon dioxide film is formed as a nitride insulating film 305a. Next, the raw material gas is silane and nitrogen By switching to a pure gas mixture, it is possible to reduce the hydrogen concentration and block hydrogen. A silicon nitride film is formed as a nitride insulating film 305b. By this formation method, Insulating film 3, which consists of laminated nitride insulating films with few defects and impurity blocking properties. 05 can be formed.

[0290] <Modification 3: Regarding a pair of electrodes> In the liquid crystal display device shown in Embodiment 1 and Embodiment 2, conductive films 310a, 310 The materials that can be used for b, 310c, 310d, and 310e will be explained here. Let's explain using transistor 103.

[0291] The conductive film 310d provided on the transistor 103 shown in Embodiment 1 and Embodiment 2 , as 310e, tungsten, titanium, aluminum, copper, molybdenum, chromium, Alternatively, it is preferable to use a conductive material that readily bonds with oxygen, such as pure tantalum or an alloy. As a result, the oxygen contained in the oxide semiconductor film 308b and the conductive films 310d and 310e The conductive material bonds with the oxide semiconductor film 308b, forming regions with many oxygen vacancies. Furthermore, conductive materials in which conductive films 310d and 310e are formed on oxide semiconductor film 308b. In some cases, some of the constituent elements may be mixed in. As a result, as shown in Figure 27, oxide semi-oxides In the conductive film 308b, a low-resistance region 3 is present near the region in contact with the conductive films 310d and 310e. 34a and 334b ​​are formed. Low-resistance regions 334a and 334b ​​are conductive films 310d and 3 It is in contact with 10e and formed between the insulating film 306 and the conductive films 310d and 310e. Because the anti-conductive regions 334a and 334b ​​have high conductivity, the oxide semiconductor film 308b and the conductive film 31 It is possible to reduce the contact resistance with 0d and 310e, and increase the on-current of the transistor. It is possible to increase it significantly.

[0292] Furthermore, the conductive films 310d and 310e are made of a conductive material that readily bonds with oxygen and titanium nitride. Alternatively, a laminated structure with conductive materials that do not readily bond with oxygen, such as tantalum nitride or ruthenium, may be used. By using such a layered structure, the boundary between the conductive films 310d and 310e and the insulating film 312a is On the surface, it is possible to prevent oxidation of the conductive films 310d and 310e, and the conductive film 310d This makes it possible to suppress the increased resistance of the 310e.

[0293] <Modification 4: Regarding oxide semiconductor films> In the method for manufacturing transistors 102 and 103 shown in Embodiment 1 and Embodiment 2 After forming conductive films 310a, 310b, 310d, and 310e, an oxide semiconductor film 308 a, 308b are exposed to plasma generated in an oxidizing atmosphere, and oxide semiconductor films 308a, 30 Oxygen can be supplied to 8b. The oxidizing atmosphere can be oxygen, ozone, or nitrous oxide. Furthermore, in the plasma treatment, a nitrogen dioxide atmosphere is present. The oxide semiconductor films 308a and 308b are exposed to plasma generated without the application of IAS. This is preferable. As a result, the oxide semiconductor films 308a and 308b are not damaged, and It is possible to supply oxygen, and oxygen contained in the oxide semiconductor films 308a and 308b The amount of defects can be reduced. Also, the oxide semiconductor film 308a can be removed by etching. Removal of impurities remaining on the surface of 308b, such as fluorine, chlorine, and other halogens. It is possible.

[0294] <Modification 5: Regarding oxide semiconductor films> In the transistors 102 and 103 shown in Embodiments 1 and 2, as necessary Thus, the oxide semiconductor film can be made into a stacked structure. Here, transistor 103 I will use it to explain.

[0295] The transistor shown in Figure 28 has an acid between the insulating film 306 and the conductive films 310d and 310e. A multilayer film 336 containing a synthetic semiconductor film is formed.

[0296] The multilayer film 336 has an oxide semiconductor film 336a and an oxide film 336b. That is, multilayer The film 336 has a two-layer structure. In addition, a portion of the oxide semiconductor film 336a is a channel region. It functions. In addition, an insulating film 312a is formed so as to be in contact with the multilayer film 336, providing insulation. An oxide film 336b is formed so as to be in contact with film 312a. That is, oxide semiconductor film 3 An oxide film 336b is provided between 36a and the insulating film 312a.

[0297] The oxide film 336b is composed of one or more of the elements that make up the oxide semiconductor film 336a. It is an oxide film. The oxide film 336b is one of the elements that make up the oxide semiconductor film 336a. Because it is composed of the above, at the interface between the oxide semiconductor film 336a and the oxide film 336b Therefore, interfacial scattering is less likely to occur. Consequently, carrier movement is not hindered at the interface. Therefore, the field-effect mobility of the transistor increases.

[0298] Oxide films 336b are typically In-Ga oxide, In-Zn oxide, In-M- Zn oxide (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), Furthermore, the energy at the lower end of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 336a, and is representative. This includes the energy at the lower end of the conduction band of the oxide film 336b and the conduction of the oxide semiconductor film 336a. The energy difference from the lower end of the belt is 0.05 eV or more, 0.07 eV or more, and 0.1 eV or more. , or 0.15eV or more, and 2eV or less, 1eV or less, 0.5eV or less, or 0. It is 4 eV or less. That is, the electron affinity of the oxide film 336b and the electron affinity of the oxide semiconductor film 336a The difference from electron affinity is 0.05 eV or greater, 0.07 eV or greater, 0.1 eV or greater, or 0. 0.15eV or higher, and 2eV or lower, 1eV or lower, 0.5eV or lower, or 0.4eV or lower That is the case.

[0299] The oxide film 336b, by containing In, has high carrier mobility (electron mobility). It is preferable.

[0300] The oxide film 336b can be Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf Having a higher atomic ratio of In may have the following effects: (1) Oxides (2) Increase the energy gap of film 336b. (3) Make it smaller. (4) Compare with oxide semiconductor film 336a. This increases the insulating properties. (5) Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf is a metallic element with a strong bonding force with oxygen, so Al, Ti, Ga, Y, Zr, La, Having Ce, Nd, or Hf in a higher atomic ratio than In makes oxygen deficiency less likely to occur. ru.

[0301] When oxide film 336b is an In-M-Zn oxide, the atomic ratio of In to M is: When the sum of and M is taken as 100 atomic%, preferably In is 50 atomic. Less than %, M is 50 atomic% or more, more preferably In is 25 atomic% or less Full, M must be 75% or higher.

[0302] Furthermore, the oxide semiconductor film 336a and the oxide film 336b are In-M-Zn oxide (M is In the case of Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf, oxide semiconductor film 3 Compared to 36a, the oxide film 336b contains M(Al, Ti, Ga, Y, Zr, La The atomic ratio of Ce, Nd, or Hf is large, and typically, oxide semiconductor film 336a Compared to the atoms contained in the above, there are 1.5 times or more, preferably 2 times or more, and more preferably The atomic ratio is more than three times higher.

[0303] Furthermore, the oxide semiconductor film 336a and the oxide film 336b are In-M-Zn oxide (M is In the case of Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf, oxide film 336b In:M:Zn=x1:y1:z1 [atomic ratio], oxide semiconductor film 336a In:M If Zn = x²:y²:z² [atomic ratio], then y1 / x1 is greater than y² / x². Preferably, y1 / x1 is 1.5 times or more than y2 / x2. More preferably, y1 / x1 is at least twice as large as y2 / x2, and more preferably, y1 / x1 is equal to y2 / x It is more than 3 times greater than 2. In this case, in the oxide film 336b, y1 is greater than or equal to x1. This is preferable because it allows for stable electrical characteristics to be imparted to transistors using the oxide semiconductor film. However, when y1 becomes more than 3 times x1, the transistor using an oxide semiconductor film Since the field effect mobility decreases, it is preferable that y1 is less than three times x1.

[0304] For example, as an oxide semiconductor film 336a, In:Ga:Zn=1:1:1 or 3:1: In-Ga-Zn oxide with an atomic ratio of 2 can be used. Also, oxide film 336b As In:Ga:Zn=1:3:n (where n is an integer between 2 and 8), 1:6:m (where m is 2 Use an integer between 10 and above, or an In-Ga-Zn oxide with an atomic ratio of 1:9:6. This is possible. The atomic ratio of oxide semiconductor film 336a and oxide film 336b is as follows. Each of these includes a variation of plus or minus 20% in the above atomic ratio as an error. In the conductive film 336a, if the proportion of Zn is greater than or equal to Ga, CAAC-OS is more likely to form. It is preferable.

[0305] The oxide film 336b is an oxide semiconductor film used when forming the insulating film 312b that is formed later. It also functions as a damage mitigation film for 336a.

[0306] The thickness of the oxide film 336b is 3 nm to 100 nm, preferably 3 nm to 50 nm. Let m be less than or equal to m.

[0307] Furthermore, the oxide film 336b, like the oxide semiconductor film 336a, can, for example, have a non-single crystal structure. This is also good. Non-single crystal structures include, for example, CAAC-OS (C Axis Align), which will be discussed later. ed Crystalline Oxide Semiconductor), polycrystalline structure The structure includes a microcrystalline structure or an amorphous structure, as described later.

[0308] Furthermore, the oxide semiconductor film 336a and oxide film 336b create regions with an amorphous structure, and micro It has two or more types of structures: crystalline structure, polycrystalline structure, CAAC-OS, and single crystal structure. A mixed film may be formed, for example, consisting of regions with an amorphous structure and regions with a microcrystalline structure. , two or more of the following regions: polycrystalline region, CAAC-OS region, single-crystal region It may have regions. Also, the mixed film may have regions of amorphous structure and regions of microcrystalline structure. , two or more of the following regions: polycrystalline region, CAAC-OS region, single-crystal region It may have a layered structure in the region.

[0309] Here, an oxide film 336b is provided between the oxide semiconductor film 336a and the insulating film 312a. Therefore, impurities and Even if a trap level is formed due to a defect, the said trap level and the oxide semiconductor film 336a There is a gap between them. As a result, electrons flowing through the oxide semiconductor film 336a are trapped at the trap level. It is less likely to be captured by electric fields, and it is possible to increase the on-current of the transistor, as well as the electric field. The effective mobility can be increased. Also, when an electron is trapped at the trap level, the electron This results in a negative fixed charge. As a result, the transistor's threshold voltage fluctuates. However, there is a gap between the oxide semiconductor film 336a and the trap level. Therefore, it is possible to reduce electron trapping at the trap level, and threshold voltage fluctuations This can be reduced.

[0310] Furthermore, the oxide film 336b can shield against external impurities, It is possible to reduce the amount of impurities that move from to the oxide semiconductor film 336a. The oxide film 336b is less likely to form oxygen vacancies. For these reasons, the oxide semiconductor film 336a It is possible to reduce the impurity concentration and oxygen deficiency in the solution.

[0311] Furthermore, the oxide semiconductor film 336a and the oxide film 336b are not simply stacked on top of each other. <Continuous junction (here, in particular, a structure in which the energy at the lower end of the conduction band changes continuously between each film) The film is fabricated so that trap centers and recombination centers are formed at the interface of each film. The layered structure is designed so that there are no impurities that would form a defect level like the one at the center. Impurities are present between the stacked oxide semiconductor film 336a and oxide film 336b. Then, the continuity of the energy band is lost, and carriers are trapped or reconnected at the interface. They combine and disappear.

[0312] To form continuous bonding, a multi-chamber type film deposition system equipped with a load lock chamber is required. By using a sputtering device, each film is continuously layered without being exposed to the atmosphere. This is necessary. Each chamber in the sputtering apparatus is for the oxide semiconductor film To remove impurities such as water as much as possible, an adsorption-type vacuum pump such as a cryopump is used. Using a pump to perform high vacuum evacuation (5×10 -7 Pa~1×10 -4 It is preferable to do so (up to about Pa). It seems so. Alternatively, you can combine a turbomolecular pump and a cold trap to remove air from the exhaust system. It is preferable to prevent gases, especially those containing carbon or hydrogen, from flowing back into the bar. stomach.

[0313] In Figure 28, the multilayer film 336 consists of an oxide semiconductor film 336a and an oxide film 336b. Although a two-layer structure was adopted, an oxide film 3 was further placed between the insulating film 306 and the oxide semiconductor film 336a. A three-layer structure similar to 36b may be provided. In this case, the insulating film 306 and the oxide semiconductor may be used. The thickness of the oxide film provided between the conductive films 336a is preferably smaller than that of the oxide semiconductor film 336a. The oxide film thickness is 1 nm to 5 nm, preferably 1 nm to 3 nm. This makes it possible to reduce the fluctuation in the transistor's threshold voltage.

[0314] <Modification 6: Regarding oxide semiconductor films> In modified example 5, the structure of the multilayer film including the oxide semiconductor film can be appropriately modified. Here, we will use transistor 103 for the explanation.

[0315] As shown in Figure 29, an oxide semiconductor film is included between insulating film 306 and insulating film 312a. A multilayer film 336 is formed.

[0316] The multilayer film 336 is an oxide formed between the insulating film 306 and the conductive films 310d and 310e. A semiconductor film 336a, an oxide semiconductor film 336a, and conductive films 310d and 310e are formed on the semiconductor film 336a and the conductive films 310d and 310e. It has an oxide film 336b which is formed. In addition, a part of the oxide semiconductor film 336a is a channel region It functions as a region. In addition, an insulating film 312a is formed so as to be in contact with the multilayer film 336. Furthermore, an oxide film 336b is formed so as to be in contact with the insulating film 312a. An oxide film 336b is provided between the conductive film 336a and the insulating film 312a.

[0317] In this modified example, transistor 103 has conductive films 310d and 310e, which are oxide semiconductor films 3 Since it is in contact with 36a, compared to the transistor shown in Modification 5, the oxide semiconductor film The contact resistance between 336a and the conductive films 310d and 310e is low, resulting in improved on-current. He is a star.

[0318] Furthermore, in the modified transistor 103 shown here, the conductive films 310d and 310e are oxide semiconductors. Since it is in contact with the body film 336a, the oxide semiconductor film 336a and the conductive films 310d and 310 The oxide film 336b can be made thicker without increasing the contact resistance with e. This can cause plasma damage when forming insulating film 312b or insulating films 312a, 3 The trap levels that arise due to the inclusion of constituent elements of 12b are between the oxide semiconductor film 336a and the oxide. Formation near the interface with film 336b can be suppressed. In other words, the transform shown in this modified example The zista can achieve both improved on-current and reduced threshold voltage fluctuations.

[0319] <Example 7: Regarding the structure of a transistor> In the transistors 102 and 103 shown in Embodiments 1 and 2, as necessary Thus, multiple opposing gate electrodes can be provided via an oxide semiconductor film. This will be explained using transistor 103.

[0320] The transistor 103 shown in Figure 30 has a conductive film 304c provided on the substrate 302. Furthermore, insulating film 305 and insulating film 306 are formed on the substrate 302 and conductive film 304c. And, through insulating film 305 and insulating film 306, the oxide semiconductor film 3 overlaps with the conductive film 304c. It has 08b and conductive films 310d and 310e in contact with the oxide semiconductor film 308b. Furthermore, on the insulating film 306, the oxide semiconductor film 308b, and the conductive films 310d and 310e, An insulating film 312 and an insulating film 314 are formed by laminating the edge film 312a and insulating film 312b. Furthermore, it is superimposed with the oxide semiconductor film 308b via insulating film 312 and insulating film 314. It has a conductive film 316c.

[0321] The conductive film 304c and the conductive film 316c face each other via the oxide semiconductor film 308b. The conductive films 304c and 316c function as gate electrodes. By forming it simultaneously with the light-transmitting conductive film 316b, the number of process steps can be reduced. It is desirable because it is a Noh play.

[0322] In this modified example, transistor 103 is opposite a conductive film 308b. It has a film 304c and a conductive film 316c. The conductive film 304c and the conductive film 316c have different potentials. By applying this voltage, the threshold voltage of transistor 103 can be controlled.

[0323] Furthermore, the configuration and methods shown in this embodiment are similar to those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0324] (Embodiment 5) In this embodiment, the transistors included in the semiconductor device described in the above embodiment are used. In this, oxide semiconductor films 308a, 308b, a light-transmitting conductive film 308c, and multiple One embodiment applicable to the layer film 336 will be described. Here, the oxide semiconductor film is described as As explained using an example, the oxide film contained in the multilayer film can also have a similar structure.

[0325] Oxide semiconductor films are oxide semiconductors with a single-crystal structure (hereinafter referred to as single-crystal oxide semiconductors). Polycrystalline oxide semiconductors (hereinafter referred to as polycrystalline oxide semiconductors), microcrystalline oxides Material semiconductors (hereinafter referred to as microcrystalline oxide semiconductors), and amorphous oxide semiconductors (hereinafter referred to as It may be composed of one or more of the following: , which is called an amorphous oxide semiconductor. Also, the oxide semiconductor film is It may also be composed of CAAC-OS. Furthermore, the oxide semiconductor film may be amorphous oxide semiconductor. It may be composed of an oxide semiconductor having a body and crystal grains. Below, single-crystal oxide semiconductors Body, CAAC-OS, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, amorphous oxide semiconductor I will explain about that.

[0326] <Single-crystal oxide semiconductor> Single-crystal oxide semiconductors, for example, have low impurity concentrations and low defect level densities (oxygen vacancies). Because the number of carriers is small, the carrier density can be lowered. Therefore, single-crystal oxide semiconductors When transistors used in the channel region rarely exhibit normally-on electrical characteristics. Furthermore, single-crystal oxide semiconductors have a low defect level density, and therefore a low trap level density. This can happen. Therefore, transistors that use single-crystal oxide semiconductors in the channel region are This can result in transistors with smaller variations in electrical characteristics and thus greater reliability.

[0327] <caac-os> CAAC-OS is an oxide semiconductor film having multiple crystalline regions, and most of the bonds The crystal portion is small enough to fit within a cube with sides less than 100 nm. Therefore, CAAC-O The crystalline portion contained in S is contained within a cube with sides of less than 10 nm, less than 5 nm, or less than 3 nm. This also includes cases of round size. CAAC-OS has more defect levels than microcrystalline oxide semiconductor films. It is characterized by its low density. A detailed explanation of CAAC-OS follows below.

[0328] CAAC-OS is used in a transmission electron microscope (TEM). When observed with a microscope, clear boundaries between crystalline regions, i.e., bonds, can be seen. It is difficult to identify grain boundaries (also called grain boundaries). Therefore, C AAC-OS is less prone to the decrease in electron mobility caused by grain boundaries.

[0329] CAAC-OS was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). ) This confirms that metal atoms are arranged in layers in the crystalline region. Each layer is designed to counteract the unevenness of the surface (also called the surface to be formed) or upper surface that forms the CAAC-OS film. This is the reflected shape, and it is arranged parallel to the surface or top surface of the CAAC-OS.

[0330] On the other hand, CAAC-OS was observed by TEM from a direction roughly perpendicular to the sample surface (planar TEM). (M observation) reveals that in the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. .

[0331] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of CAAC-OS exhibits orientation. It becomes clear that...

[0332] X-ray diffraction (XRD) equipment for CAAC-OS When structural analysis is performed using this method, for example, CAAC-OS having InGaZnO4 crystals In the out-of-plane analysis, a peak appeared near 31° at the diffraction angle (2θ). This may occur. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the CAAC-OS crystals have c-axis orientation, and the c-axis is approximately perpendicular to the surface being formed or the upper surface. It can be confirmed that it is facing in a certain direction.

[0333] On the other hand, for CAAC-OS, in-pl X-rays are incident from a direction approximately perpendicular to the c-axis. In analysis using the ANE method, a peak may appear when 2θ is around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. Single crystal oxidation of InGaZnO4 For solid semiconductors, fix 2θ to around 56° and use the normal vector of the sample surface as the axis (φ axis). When the sample is rotated while analysis (φ scan) is performed, it is possible to return to a crystal plane equivalent to the (110) plane. Six peaks belonging to this group are observed. In contrast, in the case of CAAC-OS, 2θ is set to 56°. Even when fixed in the vicinity and scanned using φ, no clear peak appears.

[0334] From the above, it can be concluded that in CAAC-OS, the orientation of the a-axis and b-axis is irregular between different crystalline regions. However, the c-axis orientation is important, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that they are facing in that direction. Therefore, they are arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of metal atoms is a plane parallel to the ab-plane of the crystal.

[0335] The crystalline portion is formed when CAAC-OS is deposited or when crystallization treatment such as heat treatment is performed. It is formed at that time. As mentioned above, the c-axis of the crystal is the surface or top surface of CAAC-OS. It is oriented in a direction parallel to the normal vector. Therefore, for example, the shape of CAAC-OS is E. When altered by ching or other means, the c-axis of the crystal is on the surface or top surface of CAAC-OS. The normal vector may not always be parallel to the vector.

[0336] Furthermore, the degree of crystallinity in CAAC-OS does not need to be uniform. For example, CAAC-OS When the crystalline portion is formed by crystal growth from near the top surface of CAAC-OS, near the top surface The region may have a higher degree of crystallinity than the region near the surface being formed. Also, CAAC- When impurities are added to OS, the degree of crystallinity in the areas where the impurities are added changes, and partial bonding occurs. Regions with different degrees of crystallinity may also be formed.

[0337] Furthermore, the out-of-plane method for CAAC-OS containing InGaZnO4 crystals. Analysis revealed that in addition to a peak near 2θ = 31°, a peak also appeared near 2θ = 36°. In some cases, the peaks near 36° 2θ indicate c-axis orientation in a portion of CAAC-OS. This indicates that crystals that do not possess this property are included. CAAC-OS has a peak around 31° when 2θ is near 31°. It is preferable that the curve is shown and that 2θ does not show a peak near 36°.

[0338] Furthermore, CAAC-OS can be used, for example, to observe spots (bright spots) in electron diffraction patterns. This may occur. In particular, electron beams with a beam diameter of 10 nmφ or less, or 5 nmφ or less. The electron diffraction pattern obtained using this method is called a micro-electron diffraction pattern. Figure 31 shows C This is an example of the micro-electron diffraction pattern of a sample containing AAC-OS. Here, the sample is... CAAC-OS is cut perpendicular to the surface to be formed, and thin slices are prepared with a thickness of approximately 40 nm. It transforms. Also, here, an electron beam with a beam diameter of 1 nmφ is directed perpendicular to the cross-section of the sample. The electron beam is then incident. From Figure 31, the micro-electron diffraction pattern of CAAC-OS shows that the spots are visible. It can be measured.

[0339] CAAC-OS can sometimes be formed, for example, by reducing the concentration of impurities. Yes, there are. Here, the impurities are the main components of oxide semiconductors such as hydrogen, carbon, silicon, and transition metal elements. These are elements other than the constituent elements. In particular, elements such as silicon are metallic elements that make up oxide semiconductors. It has a stronger bonding force with oxygen than other elements. Therefore, when this element removes oxygen from an oxide semiconductor, acid It can disrupt the atomic arrangement of ion semiconductors and reduce their crystallinity. Also, iron and nickel, etc. Heavy metals such as argon and carbon dioxide have large atomic radii (or molecular radii), so acids This can disrupt the atomic arrangement of oxide semiconductors and reduce the crystallinity of oxide semiconductors. Therefore, CAAC-OS is an oxide semiconductor with a low impurity concentration. Furthermore, it is contained within oxide semiconductors. These impurities can become carrier sources.

[0340] Furthermore, in CAAC-OS, the distribution of the crystalline portion does not need to be uniform. For example, CAA In the formation process of C-OS, when crystal growth is performed from the surface side of the oxide semiconductor, the surface to be formed The proportion of the crystalline portion may be higher near the surface compared to the vicinity of the crystalline portion. Also, CAAC -When impurities are mixed into the OS, the crystallinity of the crystalline region decreases in the region where the impurities are mixed. It can happen.

[0341] Furthermore, CAAC-OS can be formed, for example, by reducing the defect level density. In oxide semiconductors, for example, the presence of oxygen vacancies increases the defect level density. The loss can be due to it becoming a carrier trap or a carrier source by capturing hydrogen. This can happen. In order to form CAAC-OS, for example, oxygen vacancies are created in the oxide semiconductor. It is important to prevent them from occurring. Therefore, CAAC-OS is an oxide with a low defect level density. It is a semiconductor. Alternatively, CAAC-OS is an oxide semiconductor with few oxygen vacancies.

[0342] In CAAC-OS, constant photocurrent measurement method (CPM: Constant Photo The absorption coefficient derived by the current method is 1 × 10 -3 Less than / cm, good Mashiku is 1 x 10 -4 Less than / cm, more preferably 5×10 -5 It will be less than / cm. The yield coefficient is the energy (wavelength) corresponding to the localized energy levels resulting from oxygen deficiency and impurity contamination. Because it has a positive correlation with (converted to) the defect level density in CAAC-OS is extremely low.

[0343] Furthermore, the absorption coefficient curve obtained by CPM measurement shows that the arbor originating from the band's tail is By removing the absorption coefficient component called the bucktail, the absorption coefficient due to the defect level is given by the following formula It can be calculated from this. Note that the ar-back tail is obtained by CPM measurement. This refers to a region in the absorption coefficient curve that has a constant slope, and this slope is called the ARBAC energy. It's called ghee.

[0344]

number

[0345] Here, α(E) represents the absorption coefficient at each energy, and α u represents the absorption coefficient according to the Urbach tail.

[0346] In addition, a transistor using CAAC-OS that is highly pure and truly or substantially highly pure and truly has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light.

[0347] <Fabrication method of CAAC-OS> The c-axis of the crystal part included in CAAC-OS aligns in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface of CAAC-OS. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the surface to be formed or the cross-sectional shape of the surface), they may face different directions. Note that the direction of the c-axis of the crystal part is a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface when CAAC-OS is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation.

[0348] Three methods can be cited as the formation method of CAAC-OS.

[0349] The first method is to form an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower, so as to form crystal parts in which the c-axis of the crystal parts included in the oxide semiconductor film aligns in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0350] The second method is to perform a heat treatment at 200°C or higher and 700°C or lower after forming the oxide semiconductor film with a thin thickness, so as to form crystal parts in which the c-axis of the crystal parts included in the oxide semiconductor film aligns in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface. ​​​​​​​

[0351] The third method involves depositing a thin first layer of oxide semiconductor film, followed by heating at 200°C or above 700°C. By performing a heat treatment below ℃ and then depositing a second oxide semiconductor film, the oxide semiconductor The c-axis of the crystalline portion contained in the conductive film is aligned with the normal vector of the surface being formed or the surface normal vector. This method forms crystal regions aligned in parallel directions.

[0352] Here, we will describe a method for forming CAAC-OS using the first method.

[0353] <Target and method for creating the target> Furthermore, CAAC-OS is used as a target for sputtering oxide semiconductors, such as polycrystalline ones. The film is deposited using a sputtering method. When the particles collide, the crystalline region contained in the sputtering target is cleaved from the ab plane. , peeled off as flat or pellet-shaped sputtering particles having a surface parallel to the ab plane. This can happen. In this case, the plate-shaped or pellet-shaped sputtered particles may become crystals. By maintaining its state, CAAC-OS can be deposited on the surface to be formed. .

[0354] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0355] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities present in the deposition chamber (such as hydrogen, water, carbon dioxide, and nitrogen) can be measured. It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is The film is formed at a temperature of -80°C or lower, preferably -100°C or lower, and more preferably -120°C or lower. Use gas.

[0356] Furthermore, by increasing the heating temperature of the surface to be formed during film formation (e.g., substrate heating temperature), the surface to be formed Sputtering particle migration occurs after reaching a certain temperature. Specifically, the temperature of the surface to be formed... The film is formed at a temperature of 100°C to 740°C, preferably 200°C to 500°C. By increasing the temperature of the surface to be formed during film deposition, flat or pellet-shaped sputtered particles can be produced. When it reaches the surface to be formed, migration occurs on that surface, sputtering The flat surface of the particles adheres to the surface to be formed. Note that this also varies depending on the type of oxide, but spa The uttering particles have a diameter (equivalent circle diameter) of a plane parallel to the ab plane that is between 1 nm and 30 nm. Alternatively, it will be approximately 1 nm to 10 nm. The ng particle may be a hexagonal prism in which the hexagonal faces are parallel to the ab plane. The direction perpendicular to the hexagonal face is the c-axis direction.

[0357] Furthermore, the sputtering target is sputtered using oxygen cations. Therefore, plasma damage during film deposition can be reduced. When impacting the surface of the ring target, the crystallinity of the sputtering target decreases. This can suppress the process of becoming amorphous or undergoing amorphization.

[0358] Furthermore, the sputtering target is sputtered using oxygen or argon cations. By ringing, if the sputtering particles are flat or pellet-shaped, then hexagonal prism-shaped, Positive charges can be applied to the corners of a angular surface. By having a charge, positive charges repel each other within a single sputtering particle. It can maintain a flat or pellet-like shape.

[0359] The corners on the surface of the plate-shaped or pellet-shaped sputtered particles have a positive charge. For this purpose, it is preferable to use a direct current (DC) power supply. Note that radio frequency (RF) power supplies and alternating current (AC) power supplies are also acceptable. (AC) power supply can also be used. However, RF power supply is suitable for film deposition on large-area substrates. It is difficult to apply to puttering equipment. Furthermore, from the following perspectives, DC power is preferable to AC power. A power source is considered preferable.

[0360] When using an AC power supply, adjacent targets alternate between cathode potential and anode potential. To return. When plate-shaped or pellet-shaped sputtering particles are positively charged, they will reflect each other. By repelling each other, it is possible to maintain a flat or pellet-like shape. Furthermore, when using an AC power supply, there is a momentary period during which no electric field is applied, so a flat plate or The charge that was attached to the pellet-shaped sputtering particles disappears, and the sputtering particles The structure may collapse. Therefore, it is better to use a DC power supply rather than an AC power supply. It is clear that this is preferable.

[0361] Furthermore, by increasing the oxygen content in the deposition gas and optimizing the power, plasma damage during film deposition can be reduced. It is preferable to reduce the amount of oxygen. The oxygen content in the film-forming gas is 30% by volume or more, preferably 100%. This is expressed as a percentage by volume.

[0362] As an example of a target for sputtering, an In-Ga-Zn compound target is used. The following is an example.

[0363] InO X powder, GaO Y Powder, and ZnO Z The powders are mixed in a predetermined molar ratio and then subjected to pressure treatment. Furthermore, by heat treatment at a temperature between 1000°C and 1500°C, polycrystalline In-G is produced. The target is an α-Zn compound. Note that this pressurized treatment is performed while cooling (or allowing to cool). You can proceed from here, or you can proceed while heating. Note that X, Y, and Z are any positive numbers. Here, the given molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z powder However, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 3:1:2, 1: The ratios are 3:2, 1:6:4, or 1:9:6. Note that the type of powder and the amount of powder used in the mixture may vary. The ol ratio can be adjusted as appropriate depending on the sputtering target being fabricated.

[0364] By using the sputtering target in the manner described above, the thickness is uniform. This allows for the formation of oxide semiconductor films with uniform crystal orientation.

[0365] <Polycrystalline oxide semiconductors> Polycrystalline oxide semiconductors contain multiple crystal grains. For example, polycrystalline oxide semiconductors have amorphous regions. They may have it.

[0366] Polycrystalline oxide semiconductors can be observed, for example, by TEM, to confirm the crystal grains. In some cases, the crystal grains contained in polycrystalline oxide semiconductors can be observed, for example, by TEM. , 2nm to 300nm, 3nm to 100nm, or 5nm to 50nm The particle size is often such that... Also, polycrystalline oxide semiconductors, for example, when observed by TEM... In some cases, the boundary between the amorphous region and the crystal grain, and the boundary between crystal grains themselves, can be observed. In polycrystalline oxide semiconductors, grain boundaries can sometimes be observed, for example, using TEM imaging.

[0367] A polycrystalline oxide semiconductor, for example, has multiple crystal grains, and the orientation of these multiple crystal grains These may differ. Also, polycrystalline oxide semiconductors can be analyzed, for example, using an XRD device. Out-of-plane analysis revealed a peak near 31° in the orientation-indicating 2θ. In some cases, peaks showing multiple orientations may appear. Furthermore, polycrystalline oxide semiconductors are... For example, spots may be observed in electron diffraction patterns.

[0368] Polycrystalline oxide semiconductors, for example, have high crystallinity, and therefore have high electron mobility. There is a correlation. Therefore, transistors using polycrystalline oxide semiconductors in the channel region have high power It has boundary effect mobility. However, in polycrystalline oxide semiconductors, impurities may segregate at grain boundaries. Yes. Also, grain boundaries in polycrystalline oxide semiconductors become defect levels. Because these can act as carrier sources and trap levels, polycrystalline oxide semiconductors can act as channels. The transistor used in the region is compared to the transistor using CAAC-OS in the channel region. In general, these transistors can exhibit large fluctuations in electrical characteristics, resulting in unreliable designs.

[0369] Polycrystalline oxide semiconductors are formed by high-temperature heat treatment or laser light treatment. It is possible.

[0370] <Microcrystalline oxide semiconductor> Microcrystalline oxide semiconductor films are difficult to clearly identify as crystalline in TEM images. This can be difficult. The crystalline portion contained in the microcrystalline oxide semiconductor film is between 1 nm and 100 nm. They are often smaller than or equal to 1 nm or between 1 nm and 10 nm in size. In particular, they are 1 nm or larger than 10 nm Nanocrystals (nc:nanocry) are microcrystals smaller than nm, or between 1 nm and 3 nm in size. An oxide semiconductor film having stal is made nc-OS (nanocrystalline It is called an Oxide Semiconductor (Oxide Semiconductor) film. Also, an nc-OS film is, for example, In some cases, it can be difficult to clearly identify grain boundaries in images obtained using TEM.

[0371] nc-OS films are used in minute regions (for example, regions between 1 nm and 10 nm, especially regions between 1 nm and 10 nm). The atomic arrangement has periodicity in the region of 3 nm or less. In addition, the nc-OS film is different There is no regularity in the crystal orientation between the crystalline regions. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS films may be indistinguishable from amorphous oxide semiconductor films. There are cases where this occurs. For example, XRD using X-rays with a diameter larger than that of the crystalline region on an nc-OS film. When structural analysis is performed using the apparatus, the out-of-plane method analyzes the crystal planes. The indicated peak is not detected. Also, the probe diameter is larger than that of the crystalline region in the nc-OS film. Electron diffraction (also called limited-field electron diffraction) using electron beams (for example, 50 nm or greater). When this is done, a diffraction pattern resembling a halo pattern is observed. On the other hand, when applied to an nc-OS film... Furthermore, the probe diameter should be close to or smaller than the size of the crystal (for example, 1 nm to 30 nm). When electron diffraction (also called nanobeam electron diffraction) is performed using the electron beam shown below, spots A circular pattern is observed. Furthermore, when nanobeam electron diffraction is performed on the nc-OS film, a circular pattern is observed. In some cases, a ring-shaped region of high brightness may be observed. Also, compared to the nc-OS film... When nanobeam electron diffraction is performed, multiple spots may be observed within a ring-shaped region. be.

[0372] Figure 32 shows nanobeam electron diffraction with different measurement locations for a sample having an nc-OS film. This is an example of the procedure performed. Here, the sample is cut in a direction perpendicular to the surface on which the nc-OS film is formed. The sample is thinned to a thickness of 10 nm or less. In addition, here, the probe diameter is 1 nm. The sub-wire is incident on the sample from a direction perpendicular to the cross-section. As shown in Figure 32, the sample has an nc-OS film. When nanobeam electron diffraction is performed on a sample, a diffraction pattern showing crystal planes is obtained, but It was found that no orientation toward a specific crystal plane was observed.

[0373] nc-OS films are oxide semiconductor films with higher orderliness than amorphous oxide semiconductor films. Therefore, nc-OS films have a lower defect level density than amorphous oxide semiconductor films. However, Furthermore, the nc-OS film does not show any regularity in crystal orientation between different crystalline regions. Therefore, nc- OS films have a higher defect level density compared to CAAC-OS films.

[0374] Therefore, nc-OS films may have a higher carrier density compared to CAAC-OS films. Yes. Oxide semiconductor films with high carrier density may have high electron mobility. Therefore Transistors using nc-OS films may have high field-effect mobility. Because nc-OS films have a higher defect level density compared to CAAC-OS films, carrier traffic The number of pips may increase. Therefore, transistors using nc-OS film are CAAC- Compared to transistors using OS films, these transistors exhibit greater fluctuations in electrical characteristics and lower reliability. It becomes a st. However, nc-OS films can be formed even if they contain a relatively large amount of impurities. Because this is possible, it is easier to form than CAAC-OS films and can be suitably used depending on the application. This is possible in some cases. Therefore, semiconductors having transistors using nc-OS films. The device can sometimes be manufactured with high productivity.

[0375] <Method for fabricating microcrystalline oxide semiconductor films> Next, the method for depositing microcrystalline oxide semiconductor films will be explained below. The film is kept in an atmosphere containing oxygen, preferably at a temperature between room temperature and 75°C, preferably between room temperature and 50°C. Below, the film is deposited by sputtering. The deposition atmosphere is an oxygen-containing atmosphere. This reduces oxygen vacancies in the microcrystalline oxide semiconductor film, resulting in a film containing microcrystalline regions. It is possible.

[0376] In microcrystalline oxide semiconductor films, reducing oxygen vacancies results in a film with stable physical properties. This is possible. In particular, when a semiconductor device is fabricated using a microcrystalline oxide semiconductor film, microcrystalline Oxygen vacancies in crystalline oxide semiconductor films act as donors, and carriers enter the microcrystalline oxide semiconductor film. This generates electrons, which become a factor in the fluctuation of the electrical properties of semiconductor devices. Therefore, oxygen By fabricating semiconductor devices using microcrystalline oxide semiconductor films with reduced defects, reliability can be improved. It can be used to create a high-performance semiconductor device.

[0377] Furthermore, in microcrystalline oxide semiconductor films, increasing the oxygen partial pressure of the deposition atmosphere results in oxygen vacancies. It is preferable because it can be further reduced. More specifically, the oxygen partial pressure in the film deposition atmosphere is reduced to 33%. It is preferable to keep the above in place.

[0378] The target used when forming a microcrystalline oxide semiconductor film by sputtering. This can use the same targets and fabrication methods as CAAC-OS.

[0379] Furthermore, nc-OS can be formed even if it contains a relatively large amount of impurities, It is easier to form than CAAC-OS and can be suitably used in some applications. For example, nc-OS can be produced by film deposition methods such as sputtering using an AC power supply. It may be formed. The sputtering method using an AC power supply allows for highly uniform film deposition on large substrates. Because it is possible to use nc-OS in the channel region, semiconductors have transistors Body devices can be manufactured with high productivity.

[0380] <Amorphous oxide semiconductor> Amorphous oxide semiconductors, for example, have a disordered atomic arrangement and do not have crystalline regions. Amorphous oxide semiconductors, for example, have an amorphous state like quartz, and their atomic arrangement is not regular. I can't see it.

[0381] Amorphous oxide semiconductors are difficult to visualize using, for example, TEM observation. This may be the case.

[0382] Amorphous oxide semiconductors are analyzed using an XRD instrument and the out-of-plane method. When this is done, the peak indicating orientation may not be detected. Also, amorphous oxide semiconductor films For example, a halo pattern may be observed in electron diffraction patterns. Also, amorphous acids For example, in ionized semiconductor films, spots cannot be observed using micro-electron diffraction patterns. Halo patterns may be observed.

[0383] Amorphous oxide semiconductors can be formed by, for example, incorporating high concentrations of impurities such as hydrogen. In some cases, this can be achieved. Therefore, amorphous oxide semiconductors can, for example, have high impurity levels. It is an oxide semiconductor containing a certain concentration.

[0384] When oxide semiconductors contain high concentrations of impurities, defects such as oxygen vacancies can form in the oxide semiconductor. Defect levels may form. Therefore, amorphous oxide semiconductors with high impurity concentrations have a dense defect level structure. The degree is high. Also, amorphous oxide semiconductors have low crystallinity, so CAAC-OS and nc-OS Compared to that, the defect level density is higher.

[0385] Therefore, amorphous oxide semiconductors have an even higher carrier density compared to nc-OS. In some cases, transistors using amorphous oxide semiconductors in the channel region are... - The electrical properties may be those of a malion. Therefore, the electrical properties of a normally-malion are required. Amorphous oxide semiconductors can be suitably used in transistors. Because the energy level density is high, the trap energy level density may also be high. Therefore, amorphous oxide semiconductors Transistors that use a conductor in the channel region use CAAC-OS or nc-OS in the channel region. Compared to the transistors used in the region, these transistors exhibit greater fluctuations in electrical characteristics and are less reliable. This can sometimes happen. However, amorphous oxide semiconductors tend to contain a relatively large amount of impurities when used in film deposition methods. Because it can also be formed by law, its formation is easy, and it can be suitably used depending on the application. In some cases, this is possible. For example, spin coating, sol-gel coating, immersion coating, spray coating, etc. Methods include screen printing, contact printing, inkjet printing, and roll coating. Alternatively, amorphous oxide semiconductors may be formed by film deposition methods such as mist CVD. A semiconductor device having a transistor that uses amorphous oxide semiconductor in the channel region has high productivity. It can be manufactured at a high price.

[0386] Furthermore, oxide semiconductors have a higher density when, for example, there are fewer defects. For example, if a material such as hydrogen has high crystallinity, its density will be high. Also, oxide semiconductors, for example, When the concentration of impurities such as hydrogen is low, the density increases. For example, single-crystal oxide semiconductors are CA It can have a higher density than AC-OS. Also, for example, CAAC-OS is microcrystalline oxidation In some cases, the density is higher than that of a monocrystalline semiconductor. Also, for example, polycrystalline oxide semiconductors are microcrystalline acids They can sometimes have a higher density than oxide semiconductors. Also, for example, microcrystalline oxide semiconductors are amorphous. It can sometimes have a higher density than oxide semiconductors.

[0387] (Embodiment 6) In this embodiment, a semiconductor device according to one aspect of the present invention can be applied to a human The interface will be described in particular. This section describes an example configuration of a touch sensor (hereinafter referred to as a touch sensor).

[0388] Touch sensors include capacitive, resistive, surface elastic, infrared, and optical types. Various methods can be used, such as different approaches.

[0389] Typical capacitive touch sensors include surface-type capacitive sensors and projected-type capacitive sensors. There are various types, such as the quantitative type. Also, projected capacitive capacitance types differ mainly in their driving methods, such as self There are various methods, such as the capacity method and the mutual capacity method. In this case, using the mutual capacity method allows for simultaneous detection of multiple points. This is preferable because it enables the output of data (also known as multi-point detection (multi-touch)).

[0390] This section will explain touch sensors in detail, but in addition, there are cameras (infrared cameras) (including) the movement (gestures) of the object being detected (e.g., fingers or hands) and the user's vision Sensors capable of detecting point-like movements are used as human interfaces. It is also possible.

[0391] <Examples of sensor detection methods> Figures 33(A) and (B) show schematic diagrams illustrating the configuration of a mutual capacitive touch sensor, and input / output. This is a schematic diagram of a waveform. The touch sensor has a pair of electrodes, and a capacitance is formed between them. An input voltage is applied to one of the pair of electrodes. Also, a current flows through the other electrode. It is equipped with a detection circuit that detects electric current (or the potential of the other electrode).

[0392] For example, as shown in Figure 33(A), when a square wave is used as the input voltage waveform, the output voltage A waveform with a sharp peak is detected as a flow waveform.

[0393] Furthermore, as shown in Figure 33(B), when a conductive object to be detected is in close proximity to or in contact with the capacitance... In this case, the charge capacitance between the electrodes decreases, and consequently, the output current value decreases.

[0394] In this way, the change in capacitance is measured using the change in output current (or potential) in relation to the input voltage. By detecting this, it is possible to detect the proximity or contact of the object being detected.

[0395] <Example of touch sensor configuration> Figure 33(C) shows an example configuration of a touch sensor with multiple capacities arranged in a matrix. This indicates.

[0396] The touch sensor has multiple wires extending in the X direction (horizontal direction of the paper), and these multiple wires It has multiple intersecting wires that extend in the Y direction (vertical direction of the paper). Between two intersecting wires A capacity is formed there.

[0397] Furthermore, wiring extending in the X direction includes the input voltage or common potential (including ground potential and reference potential). Either of the following is input: Also, a detection circuit (for example) is used for wiring extending in the Y direction. (such as source meters and sense amplifiers) are electrically connected, and the current flowing through the wiring (and It can detect electric potential.

[0398] The touch sensor is configured so that input voltages are sequentially applied to multiple wires extending in the X direction. By scanning in the Y direction and detecting changes in the current (or potential) flowing through the wiring extending in the Y direction, This enables two-dimensional sensing of the object being detected.

[0399] <Example of touch panel configuration> Below are examples of touch panel configurations that include a display unit with multiple pixels and a touch sensor. Next, we will describe an example of how the touch panel can be incorporated into an electronic device.

[0400] Figure 34(A) is a schematic cross-sectional view of an electronic device equipped with a touch panel.

[0401] The electronic device 3530 includes a housing 3531 and at least a touch panel 3 inside the housing 3531. It has 532, a battery 3533, and a control unit 3534. The touch panel 3532 is also control The control unit 3534 is electrically connected to the display unit via wiring 3535. The display of images and the operation of the touch sensor are controlled. Also, the battery 3533 It is electrically connected to the control unit 3534 via wiring 3536 and supplies power to the control unit 3534. It is possible.

[0402] The touch panel 3532 is provided so that its display surface is exposed to the outside of the housing 3531. It is possible to display an image on the exposed surface of the touch panel 3532, and to touch or come into close proximity. It can detect the object to be detected.

[0403] Figures 34(B) to (D) show examples of touch panel configurations.

[0404] The touch panel 3532 shown in Figure 34(B) consists of a first substrate 3541 and a second substrate 354 Between the three elements is a display panel 3540 equipped with a display unit 3542 and a touch sensor 3544. The system includes a third substrate 3545 and a protective substrate 3546.

[0405] The display panel 3540 can be a liquid crystal display device using liquid crystal elements, or electronic paper, etc. Various display devices can be applied. Note that the touch panel 3532 is configured with the display panel 3540. Depending on the circumstances, a backlight, polarizing plate, etc., may be provided separately.

[0406] Since the object to be detected is in contact with or in close proximity to one side of the protective substrate 3546, at least its surface The surface is preferably made with enhanced mechanical strength, for example, by ion exchange or air cooling strengthening methods. Tempered glass that has been physically or chemically treated and has compressive stress applied to its surface. It can be used on protective substrate 3546. Alternatively, it can be used on plastic with a coated surface. Flexible substrates such as those made of acrylic can also be used. Furthermore, a protective film or light can be placed on the protective substrate 3546. A protective film may be provided.

[0407] The touch sensor 3544 is provided on at least one side of the third substrate 3545. Alternatively, a pair of electrodes constituting the touch sensor 3544 are formed on both sides of the third substrate 3545. It is also possible to use a flexible fin as the third substrate 3545 in order to make the touch panel thinner. A film may also be used. In addition, the touch sensor 3544 is a pair of substrates (including film) A sandwiched configuration is also acceptable.

[0408] In Figure 34(B), a third substrate comprising a protective substrate 3546 and a touch sensor 3544 is shown. The diagram shows the components bonded by adhesive layer 3547, but these are not necessarily bonded. It is not necessary. Also, the third substrate 3545 and the display panel 3540 are bonded together with an adhesive layer. It can also be used as a composition.

[0409] The touch panel 3532 shown in Figure 34(B) comprises a display panel and a base equipped with a touch sensor. The board and the panel are provided separately. A touch panel having such a configuration can be attached as an external touch panel. It can also be called a touch panel. This configuration provides a display panel and a touch sensor. The circuit boards are manufactured separately, and by stacking them, the touch sensor mechanism is created on the display panel. Because it can add functionality, touch panels can be easily manufactured without going through special manufacturing processes. It can be manufactured.

[0410] The touch panel 3532 shown in Figure 34(C) has a touch sensor 3544 on the second substrate 35 It is provided on the side of the protective substrate 3546 of 43. Touch panel having such a configuration This can also be called an on-cell type touch panel. By adopting this configuration, the necessary circuit boards are required. By reducing the number of layers, it is possible to make the touch panel thinner and lighter.

[0411] The touch panel 3532 shown in Figure 34(D) has a touch sensor 3544 on a protective substrate 354 It is provided on one side of 6. This configuration allows the display panel and touch Since each sensor can be manufactured separately, it is easy to manufacture a touch panel. Yes, it is possible. Furthermore, it reduces the number of circuit boards required, allowing for thinner and lighter touch panels. This can be achieved.

[0412] The touch panel 3532 shown in Figure 34(E) has a touch sensor 3544 on the display panel 35 It is located inside a pair of 40 substrates. A touch panel having such a configuration is installed in It can also be called a cell-type touch panel. By using this configuration, the number of circuit boards required is reduced. Because it can reduce the amount of dust, it is possible to make the touch panel thinner and lighter. Nell, for example, the transistors, wiring, electrodes, etc., provided by the display unit 3542, form the first base A circuit that functions as a touch sensor is fabricated on board 3541 or on the second substrate 3543. This can be achieved by using an optical touch sensor. In addition, when using an optical touch sensor, the photoelectric conversion element is It may also be configured to include these features.

[0413] <Example configuration of an in-cell type touch panel> The following describes the configuration of a touch panel in which a touch sensor is incorporated into a display unit having multiple pixels. Let's explain an example. Here, a liquid crystal element is applied as the display element provided in the pixel. Here is an example.

[0414] Figure 35(A) shows one of the pixel circuits provided in the display section of the touch panel illustrated in this configuration example. This is an equivalent circuit diagram for the section.

[0415] Each pixel has at least a transistor 3503 and a liquid crystal element 3504. Wiring 3501 is connected to the gate of inverter 3503, and wiring 35 is connected to either the source or the drain. 02 is electrically connected to each other.

[0416] The pixel circuit consists of multiple wires extending in the X direction (for example, wire 3510_1, wire 3510 _2) and a plurality of wires (e.g., wire 3511) extending in the Y direction, which are relative to each other They are arranged intersectingly, and a volume is formed between them.

[0417] Furthermore, among the pixels provided in the pixel circuit, some adjacent pixels are provided together. One electrode of the liquid crystal element is electrically connected, forming a single block. The lock consists of island-shaped blocks (for example, block 3515_1, block 3515_2) and They are classified into two types: a linear block extending in the Y direction (for example, block 3516), and a linear block extending in the Y direction. It is done. Note that Figure 35 shows only a part of the pixel circuit, but in reality there are two types. The blocks are repeatedly arranged in the X and Y directions.

[0418] The wiring 3510_1 (or 3510_2) extending in the X direction is connected to the island-shaped block 351 It is electrically connected to 5_1 (or block 3515_2). Note that X is not shown in the diagram. The wiring 3510_1 extending in the direction is discontinuous along the X direction via a linear block. Multiple island-shaped blocks 3515_1 arranged in the configuration are electrically connected. The existing wiring 3511 is electrically connected to the linear block 3516.

[0419] Figure 35(B) shows multiple wirings 3510 extending in the X direction and multiple wirings extending in the Y direction. This is an equivalent circuit diagram showing the connection configuration of line 3511. Each of the wirings 3510 extending in the X direction An input voltage or common potential can be applied to it. Also, wiring 3 extends in the Y direction. Each of the 511s is either input to the ground potential or electrically connected to the wiring 3511 and the detection circuit. It is possible.

[0420] <Example of touch panel operation> The operation of the touch panel described above will be explained below using Figure 36.

[0421] As shown in Figure 36(A), one frame period is divided into a writing period and a detection period. The write-in period is the period during which image data is written to the pixels, and wiring 3510 (gate wire) (Also known as) are selected sequentially. Meanwhile, during the detection period, sensing is performed using a touch sensor. During this period, wiring 3510 extending in the X direction is sequentially selected, and an input voltage is applied.

[0422] Figure 36(B) is an equivalent circuit diagram during the writing period. During the writing period, the X direction A common potential is input to both the wiring 3510 extending in the direction and the wiring 3511 extending in the Y direction. It can be done.

[0423] Figure 36(C) is an equivalent circuit diagram at a certain point in the detection period. During the detection period, the Y direction Each of the wirings 3511 extending in the direction is electrically connected to the detection circuit. Also, extending in the X direction Of the 3510 wires, the selected one receives the input voltage, while the others do not. A common potential is input.

[0424] In this way, the image writing period and the period during which sensing is performed by the touch sensor are determined independently. It is preferable to install them in an upright position. This prevents touch caused by noise during pixel writing. This can suppress the decrease in sensor sensitivity.

[0425] (Embodiment 7) This embodiment describes a driving method for reducing the power consumption of a display device. The driving method of this embodiment allows a display device in which oxide semiconductor transistors are applied to the pixels. Further reductions in power consumption can be achieved. The following uses Figures 37 and 38 to illustrate the display device. As an example, we will explain how to reduce the power consumption of liquid crystal display devices.

[0426] Figure 37 is a block diagram showing an example of the configuration of the liquid crystal display device according to this embodiment. As such, the liquid crystal display device 500 has a liquid crystal panel 501 as a display module, and further It has a control circuit 510 and a counter circuit.

[0427] The liquid crystal display device 500 receives digital data, namely image signals (Video) and liquid crystal particles. A sync signal (SYNC) is input to control the screen refresh of the NEL501. Examples of signals include horizontal synchronization signals (Hsync), vertical synchronization signals (Vsync), and There is a reference clock signal (CLK), etc.

[0428] The liquid crystal panel 501 includes a display unit 530, a scan line drive circuit 540, and a data line drive circuit 5 It has 50. The display unit 530 has multiple pixels 531. Pixels 531 in the same row are shared The scan line 541 is connected to the scan line drive circuit 540, and the pixels 531 in the same column are common Data line 551 is connected to data line drive circuit 550.

[0429] The LCD panel 501 has a common voltage (Vcom) and a high power supply voltage as the power supply voltage ( VDD) and low power supply voltage (VSS) are supplied. The common voltage (Vcom) is displayed on the 5th display unit. It is supplied to each of the 30 pixels 531.

[0430] The data line drive circuit 550 processes the input image signal and generates a data signal. The scan line drive circuit 540 outputs a data signal to the TA line 551. A scanning signal is output to scan line 541 to select pixel 531.

[0431] Pixel 531 is a switch whose electrical connection to data line 551 is controlled by a scan signal. It has a switching element. When the switching element is turned on, data line 551 is transmitted to pixel 531. The data signal is written.

[0432] The electrode to which Vcom is applied corresponds to the common electrode.

[0433] The control circuit 510 is a circuit that controls the entire liquid crystal display device 500. It includes a circuit that generates control signals for the circuits that constitute 0.

[0434] The control circuit 510 receives the synchronization signal (SYNC) and then controls the scan line drive circuit 540 and the data line drive circuit. It has a control signal generation circuit that generates control signals for the motion circuit 550. Scan line drive circuit 540 Control signals include the start pulse (GSP) and the clock signal (GCLK), and data The control signals for the wire drive circuit 550 are a start pulse (SSP) and a clock signal (SC). Examples include LK, etc. For example, the control circuit 510 uses clock signals (GCLK, SCLK) This generates multiple clock signals with the same period but shifted phases.

[0435] Furthermore, the control circuit 510 receives an image signal (Vide) input from outside the liquid crystal display device 500. o) Output control to the data line drive circuit 550.

[0436] The data line drive circuit 550 is a digital-to-analog conversion circuit (hereinafter referred to as the DA conversion circuit 55) It is called 2.) The DA conversion circuit 552 converts the image signal to analog and the data signal Generate a number.

[0437] Furthermore, if the image signal input to the liquid crystal display device 500 is an analog signal, the control cycle The signal is converted to a digital signal via channel 510 and output to the LCD panel 501.

[0438] The image signal consists of image data for each frame. The control circuit 510 processes the image signal. Based on the information obtained from that process, the output of the image signal to the data line drive circuit 550 is controlled. It has the function of detecting motion from image data for each frame. It is equipped with a motion detection unit 511 that detects when there is no movement. The control circuit 510 stops outputting the image signal to the data line drive circuit 550, and also when there is motion If it is determined that this is the case, the output of the image signal will be resumed.

[0439] There are no particular restrictions on the image processing for motion detection performed by the motion detection unit 511. For example, as a motion detection method, the difference data between two consecutive frames of image data can be used. There is a way to obtain the data. From the obtained differential data, it is possible to determine whether or not there is movement. There are also methods for detecting motion vectors, etc.

[0440] Furthermore, the liquid crystal display device 500 is equipped with an image signal correction circuit that corrects the input image signal. For example, a voltage higher than the voltage corresponding to the grayscale of the image signal can be applied to pixel 531. The image signal is corrected so that it can be written. This correction improves the response of the liquid crystal element. This allows for a reduction in processing time. The image signal is then corrected and processed to drive the control circuit 510. The method is called overdrive. Also, the frame frequency of the image signal When performing double-speed driving, which drives the liquid crystal display device 500 at integer multiples, the control circuit 510 has two Create image data that interpolates between frames, or display black between two frames. You just need to generate image data for that purpose.

[0441] Below, using the timing chart shown in Figure 38, we will discuss moving images like video, This section describes the operation of a liquid crystal display device 500 for displaying still images. Figure 38 shows the vertical synchronization signal (Vsync) and the data line 5 from the data line drive circuit 550. The signal waveform of the data signal (Vdata) output to 51 is shown.

[0442] Figure 38 is a timing chart of the liquid crystal display device 500 over a 3m frame period. So, the image data for the initial k-frame period and the final j-frame period has motion. Assume that there is no motion in the image data for the other frame periods. Note that k and j are 1. These are integers between m-2 and above.

[0443] During the initial k-frame period, the motion detection unit 511 detects motion in the image data of each frame. It is determined that there is a data. The control circuit 510 determines that there is a data based on the determination result of the motion detection unit 511. The DATA signal (Vdata) is output to data line 551.

[0444] Then, the motion detection unit 511 performs image processing for motion detection, and the k+1 frame If the control circuit 510 determines that there is no movement in the image data, the motion detection unit 511 makes a determination. Based on the results, during the k+1th frame period, the image signal (Vid The output of eo) is stopped. Therefore, the data from the data line drive circuit 550 to the data line 551 The output of the TA signal (Vdata) is stopped. Furthermore, the rewriting of the display unit 530 is stopped. Therefore, control signals (start pulse signals) are sent to the scan line drive circuit 540 and the data line drive circuit 550. The supply of signals (such as the clock signal) is stopped. Then, the control circuit 510 controls the motion detection unit 51 In step 1, until a result indicating that there is motion in the image data is obtained, the data line is sent to the data line drive circuit 550. Output of the image signal, output of control signals to the scan line drive circuit 540 and the data line drive circuit 550. The power is stopped, and the rewriting of the display unit 530 is stopped.

[0445] In this specification, "not supplying a signal" to the liquid crystal panel means that the signal is not supplied. Applying a voltage different from the predetermined voltage required to operate the circuit to the wiring, or This refers to putting wiring into an electrically floating state.

[0446] When the rewriting of the display unit 530 is stopped, an electric field in the same direction continues to be applied to the liquid crystal element. This can lead to deterioration of the liquid crystal in the liquid crystal element. If such problems become apparent, Regardless of the determination result of the motion detection unit 511, the control circuit 510 scans at a predetermined timing. The line drive circuit 540 and the data line drive circuit 550 are supplied with signals, and the data with reversed polarity is output. It is recommended to write the signal to data line 551 and reverse the direction of the electric field applied to the liquid crystal element. .

[0447] The polarity of the data signal input to data line 551 is determined based on Vcom. The polarity is positive if the data signal voltage is higher than Vcom, and negative if it is lower. It is the polarity.

[0448] Specifically, as shown in Figure 38, when the m+1th frame period begins, the control circuit 510 The system outputs control signals to the scan line drive circuit 540 and the data line drive circuit 550, and drives the data lines. The image signal Video is output to circuit 550. The data line drive circuit 550 is the kth frame. During this period, the polarity of the data signal (Vdata) output to data line 551 is reversed. The resulting data signal (Vdata) is output to data line 551. Therefore, the image data shows movement. During the m+1 frame period and the 2m+1 frame period, which are periods in which polarity is not detected, The inverted data signal (Vdata) is written to data line 551. During periods of no change, the display unit 530 is rewritten intermittently, thus consuming power due to the rewriting process. This method reduces costs while preventing degradation of the liquid crystal elements.

[0449] Then, the motion detection unit 511 detects motion in the image data from the 2m+1 frame onward. If it determines that this is the case, the control circuit 510 will then operate the scan line drive circuit 540 and the data line drive circuit 550. This controls the display unit 530 and rewrites it.

[0450] As described above, according to the driving method in Figure 38, the motion of the image data (Video) is Regardless of the context, the data signal (Vdata) has its polarity reversed every m-frame period. Regarding the rewriting of the display unit 530, the display period of the image including motion is displayed frame by frame. The display unit 530 is rewritten, and the display period of an image without movement is every m frames. This will result in the display being rewritten. As a result, power consumption associated with rewriting the display will be reduced. This is possible. Therefore, it is possible to suppress the increase in power consumption due to the increase in driving frequency and pixel count. Cut.

[0451] As described above, the liquid crystal display device 500 has a mode for displaying video and a mode for displaying still images. In this mode, the driving method of the liquid crystal display is changed to suppress the degradation of the liquid crystal and improve the display quality. This makes it possible to provide a power-saving liquid crystal display device while maintaining its position.

[0452] Furthermore, when displaying still images, if the pixels are rewritten every frame, the human eye cannot perceive the rewriting of the pixels. The image may be perceived as flickering, which can cause eye strain. Display devices are effective in reducing eye strain because the pixel refresh rate is low during the display period of still images. That is the case.

[0453] Therefore, a liquid crystal panel in which an oxide semiconductor transistor forms the backplane is used. Therefore, we provide a high-definition, low-power, small-to-medium-sized liquid crystal display that is very suitable for portable electronic devices. It is possible to do so.

[0454] Furthermore, in order to prevent deterioration of the LCD, the interval for reversing the polarity of the data signal (here, the m-frame period) is set. The interval should be 2 seconds or less, preferably 1 second or less.

[0455] Furthermore, motion detection of the image data was performed by the motion detection unit 511 of the control circuit 510, but motion detection The motion detection does not need to be performed solely by the motion detection unit 511. The data indicating the presence or absence of motion is displayed on the liquid crystal display device 500. The control circuit 510 may also be configured to receive input from an external source.

[0456] Furthermore, the condition for determining that there is no movement in the image data is the image data between two consecutive frames. The number of frames required for determination is not determined by the data itself, but depends on the usage mode of the liquid crystal display device 500. This can be determined as appropriate. For example, if there is no movement in the image data of consecutive m frames. In some cases, the rewriting of the display unit 530 may be stopped.

[0457] In this embodiment, a liquid crystal display device was used as the display device, but in this embodiment The driving method in this form can be used in other display devices, such as light-emitting display devices.

[0458] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0459] (Embodiment 8) One aspect of the present invention is a semiconductor device that can be applied to various electronic devices (including amusement machines). It is possible. As for electronic devices, television equipment (television or television receiver) Also called a signaling device. ), computer monitors, digital cameras, digital video cameras Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices Examples include pachinko machines, slot machines, and game cabinets. An example of the equipment is shown in Figure 39.

[0460] Figure 39(A) shows table 9000 having a display unit. Table 9000 is The housing 9001 incorporates a display unit 9003, and the display unit 9003 displays video. It is possible to do so. Furthermore, the configuration in which the housing 9001 is supported by four legs 9002 is... It is shown. Furthermore, the casing 9001 has a power cord 9005 for power supply.

[0461] The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Yes. Therefore, the display quality of the display unit 9003 can be improved.

[0462] The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This allows for communication with or control of other home appliances, It can also be used as a control device to control other home appliances via screen operation.

[0463] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be positioned relative to the floor. It can be stood upright and used as a television set. In a small room, Installing a large-screen television set reduces the available space, but a table If the display unit is built into the unit, the space in the room can be used more effectively.

[0464] Figure 39(B) shows the television equipment 9100. The housing 9101 incorporates a display unit 9103, and the display unit 9103 displays images. It is possible to demonstrate this. Here, the stand 9105 supports the housing 9101. This shows the configuration.

[0465] The television unit 9100 is operated using the control switches on the housing 9101, or a separate unit. This can be done using the remote control unit 9110. The remote control unit 9110 has an operating key -9109 allows you to control the channel and volume, and the information is displayed on the display unit 9103. The video can be controlled. Furthermore, the remote control unit 9110 can control the remote control. A display unit 9107 may be provided to display information output from the unit 9110.

[0466] The television system 9100 shown in Figure 39(B) includes a receiver, a modem, and other components. The television equipment 9100 can receive general television broadcasts using its receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (sender to receiver) or two-way (sender and receiver, or receivers to receivers, etc.) It is also possible to conduct information and communication with )

[0467] The semiconductor device shown in any of the above embodiments is used in the display units 9103 and 9107. This is possible. Therefore, the display quality of television equipment can be improved.

[0468] Figure 39(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 9 203, Keyboard 9204, External connection port 9205, Pointing device 920 Includes 6, etc.

[0469] The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Yes. Therefore, it is possible to improve the display quality of the computer 9200.

[0470] The display unit 9203 has a touch input function, and the display unit 92 of the computer 9200 By touching the display buttons shown in 03 with your finger, you can operate the screen or input information. This enables communication with or control of other home appliances, and the screen It may also be used as a control device to control other home appliances through operation. For example, an image sensor By using a semiconductor device with a sensor function, the display unit 9203 can be given a touch input function. It is possible.

[0471] Figures 40(A) and 40(B) show a foldable tablet device. ) is in an open state, and the tablet terminal consists of a housing 9630, a display unit 9631a, and a display Part 9631b, display mode switching switch 9034, power switch 9035, power saving mode It has a code change switch 9036, a fastener 9033, and an operating switch 9038.

[0472] The semiconductor device shown in any of the above embodiments includes a display unit 9631a and a display unit 9631b It can be used for this purpose. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0473] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will Data can be entered by touching the operation key 9638. Note that the display unit 96 In 31a, as an example, one half of the area has a display-only function, and the other half of the area The area indicates a configuration having touch panel functionality, but is not limited to this configuration. Display unit 96 The entire area of ​​31a may also be configured to have touch panel functionality. For example, the display unit 9 The entire surface of 631a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed It can be used as a display screen.

[0474] In addition, in the display unit 9631b, similar to the display unit 9631a, one of the display units 9631b The area can be designated as the touch panel area 9632b. Also, the touch panel keyboard Touch the location where the display toggle button 9639 is displayed using your finger or stylus. This allows keyboard buttons to be displayed on the display unit 9631b.

[0475] Furthermore, simultaneously with respect to the touch panel area 9632a and the touch panel area 9632b You can also use touch input.

[0476] Additionally, the display mode switch 9034 selects the display orientation, such as portrait or landscape. You can switch between modes, such as black and white or color display. Power saving mode switching. Switch 9036 is detected by an optical sensor built into the tablet device when it is in use. The display brightness can be optimized according to the amount of light. In addition to sensors, other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt It may be built-in.

[0477] Furthermore, Figure 40(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other. The quality of the display may also differ. For example, one display panel can provide a higher resolution display than the other. You can also use "ru".

[0478] Figure 40(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 9 633, and a charge / discharge control circuit 9634 are included. Note that in Figure 40(B), the charge / discharge control circuit 96 As an example of 34, consider a configuration having a battery 9635 and a DC-DC converter 9636. This is what is being shown.

[0479] Note that the tablet device is foldable, so when not in use, the casing 9630 is closed. This can be done. Therefore, the display units 9631a and 9631b can be protected. We can provide tablet devices that are highly durable and reliable from a long-term use perspective.

[0480] In addition, the tablet devices shown in Figures 40(A) and 40(B) are also available in various forms. Features for displaying information (still images, videos, text images, etc.), calendar, date or time. Functions that display information such as the above on the display unit, and the ability to perform touch input operations or edit the information displayed on the display unit. It has features such as touch input functionality and the ability to control processing through various software (programs). It is possible.

[0481] The touch panel is powered by a solar cell 9633 mounted on the surface of the tablet device. It can be supplied to the display unit or the video signal processing unit, etc. Note that the solar cell 9633 is It can be provided on one or both sides of the housing 9630, and efficiently charges the battery 9635. This configuration is suitable because it allows for the operation of electricity. Note that the battery 9635 is a ri Using lithium-ion batteries offers advantages such as miniaturization.

[0482] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 40(B) are shown in Figure 40( A block diagram is shown and explained in C). Figure 40(C) shows solar cell 9633, battery 9 635, DC-DC converter 9636, converter 9637, switch SW1 to SW3 The display unit 9631 is shown, along with the battery 9635 and the DC-DC converter 963 6. Converter 9637 and switches SW1 to SW3 control the charge and discharge as shown in Figure 40(B). This corresponds to circuit 9634.

[0483] First, we will explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panel is set to a voltage suitable for charging the battery 9635. The CDC converter 9636 performs either a boost or buck conversion. Then, the display unit 9631 operates. When power from solar cell 9633 is used, turn on switch SW1 and convert The TA9637 will boost or lower the voltage to the required level for the display unit 9631. When you do not want to display anything on the display unit 9631, turn off switch SW1 and switch SW2. You should configure it to be turned on to charge the 9635 battery.

[0484] While the solar cell 9633 is shown as an example of a power generation method, it is not particularly limited to this method. , by other power generation methods such as piezoelectric elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the battery 9635. For example, power may be supplied wirelessly (contactlessly). This can be done using a contactless power transmission module that transmits and receives power for charging, or by combining it with other charging methods. It can also be used as a composition.

[0485] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used. [Examples]

[0486] In this embodiment, a liquid crystal display device was fabricated using Embodiment 1. This section describes the structure of the liquid crystal and the evaluation of the orientation of the liquid crystal molecules.

[0487] First, the preparation process for sample 1 will be explained. In this example, the process is shown in Figures 4 to 7. We will explain using the pixel area (CD).

[0488] First, as shown in Figure 4(A), a glass substrate is used as the substrate 302, and on the substrate 302 A conductive film 304c was formed.

[0489] A 200 nm thick tungsten film was formed by sputtering, and the first photolithography was performed. A mask is formed on the tungsten film by a process, and the tungsten is then used with the mask. A portion of the film was etched using a dry etching method to form a conductive film 304c.

[0490] Next, insulating film 305 and insulating film 30, which function as gate insulating films, are placed on the conductive film 304c. Formed 6.

[0491] As insulating film 305, a first silicon nitride film with a thickness of 50 nm and a second film with a thickness of 300 nm A silicon nitride film, a third silicon nitride film with a thickness of 50 nm, was laminated using plasma CVD. It was formed by [doing something].

[0492] As insulating film 306, a silicon oxidizride film with a thickness of 50 nm is formed by plasma CVD. I did it.

[0493] Next, as shown in Figure 4(B), an oxide semiconductor film 307 was formed on the insulating film 306.

[0494] As the oxide semiconductor film 307, a 35 nm thick In-Ga-Zn oxide film was sputtered The film was formed by a targeting method. The target used to form the In-Ga-Zn oxide film was also used. The composition of the compound was In:Ga:Zn = 1:1:1.

[0495] Next, a mask is formed on the oxide semiconductor film 307 by a second photolithography process. Using the mask, a portion of the oxide semiconductor film 307 is etched using a wet etching method. The oxide semiconductor films 308b and 308d were formed as shown in Figure 4(C).

[0496] Next, as shown in Figure 5(A), a conductive film is placed on the insulating film 306 and the oxide semiconductor film 308b. Formed 309.

[0497] The conductive film 309 consists of a tungsten film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm. The film and a 200 nm thick titanium film were formed by stacking them using the sputtering method.

[0498] Next, a mask is formed on the conductive film 309 by a third photolithography step, and the mask Using a tool, a portion of the conductive film 309 was etched using the dry etching method, as shown in Figure 5(B). As shown, conductive films 310d and 310e were formed.

[0499] Next, as shown in Figure 5(C), insulating film 306, oxide semiconductor films 308b, 308d, Insulating films 311a and 311b were formed on conductive films 310d and 310e.

[0500] As insulating film 311a, a silicon oxidizride film with a thickness of 50 nm is formed by plasma CVD. The film was formed. Note that insulating film 311a is an insulating film that permeates oxygen.

[0501] As insulating film 311b, a silicon oxide nitride film with a thickness of 400 nm was formed by plasma CVD. The insulating film 311b contains more oxygen than satisfactorily satisfactorily. It is an insulating film that contains oxygen, and some of the oxygen is removed upon heating.

[0502] Next, a mask is formed on the insulating film 311b by a fourth photolithography step, and the mask Using a screw, a portion of the insulating film 311a and insulating film 311b was etched using the dry etching method. By chipping, an insulating film 312 having an opening 362 was formed, as shown in Figure 6(A).

[0503] Next, a heat treatment is performed to remove water, nitrogen, hydrogen, etc. from the insulating film 312, and the insulation A portion of the oxygen contained in film 312 was supplied to the oxide semiconductor film 308b. Here, nitrogen and The material was heat-treated at 350°C for 1 hour in an oxygen atmosphere.

[0504] Next, as shown in Figure 6(B), the insulating film 312 and the oxide semiconductor film 308d are placed on the insulating film. 313 was formed.

[0505] As insulating film 313, a silicon oxidizride film with a thickness of 100 nm is formed by plasma CVD. After formation, a 200 nm thick silicon oxide film was processed using plasma CVD with organic silane gas. It was formed by lamination according to the law.

[0506] Next, a mask is formed on the insulating film 313 by a fifth photolithography step, and the mask Using a tool, a portion of the insulating film 312 and insulating film 313 is etched using the dry etching method. Then, as shown in Figure 6(C), an opening 364c was formed.

[0507] Next, a conductive film 315 was formed as shown in Figure 7(A).

[0508] As conductive film 315, an ITO film containing silicon oxide with a thickness of 100 nm was sputtered. It was formed according to the law. After that, it was heat-treated in a nitrogen atmosphere at 250°C for 1 hour.

[0509] Next, a mask is formed on the conductive film 315 by a sixth photolithography step, and the mask Using the method shown in Figure 7, a portion of the conductive film 315 was etched using the wet etching method. As shown in B), a conductive film 316b was formed.

[0510] Next, as shown in Figure 7(C), a planarization film 317 is applied to the insulating film 314 and the conductive film 316b. It formed.

[0511] The composition is coated onto insulating film 314 and conductive film 316b and fired to form an aqueous solution with a thickness of 400 nm. A rillic resin film was formed as a planarized film 317.

[0512] Next, an alignment film 318 (see Figure 3) was formed on the planarized film 317.

[0513] The element was fabricated on the substrate 302 through the above process. This sample will be referred to as Sample 1. .

[0514] Furthermore, in sample 1, an element portion was fabricated in which no planarization film was formed. This sample was then compared to sample 2. do.

[0515] Sample 1 and Sample 2 were examined using a scanning transmission electron microscope (STEM). The results observed using mission electron microscopy are shown in Figure 41. show.

[0516] Figure 41(A) shows the cross-section of the insulating film 312 near the opening in sample 2, as observed by STE. This is an M-image. Figure 41(B) shows a cross-section of the insulating film 312 near the opening in sample 1. This is a STEM image.

[0517] As shown in Figure 41(B), the planarization film 317 is formed in the recess of the light-transmitting conductive film 316b. The thickness is greater than the thickness of the insulating film 312. That is, the planarization film 317 is a transparent conductive film 3 It can be seen that it is filling the recess of 16b. Also, the translucent conductive material on the insulating film 312 A planarization film 317 is also formed on the film 316b, and a distribution is formed on the planarization film 317. It can be seen that the surface of the target film 318 has few irregularities.

[0518] On the other hand, as shown in Figure 41(A), in sample 2 where the planarization film 317 is not formed, orientation Steps are formed in the film 318. Furthermore, in the light-transmitting conductive film 316b In the recessed areas, the thickness of the alignment film 318 is thick, and the transparent conductive film 316 on the insulating film 312 On surface b, the thickness of the alignment film 318 is thin. In other words, the uniformity of the thickness of the alignment film 318 is low. Light.

[0519] Next, similar to Embodiment 1, a light-shielding film 344, a colored film 346, an insulating film 348, and a conductive film 3 A substrate 342 on which 50 and the alignment film 352 were formed was then formed on the substrate 342. After the sealing material is provided, the liquid crystal material is dropped between the substrate 342 and the sealing material using a dispenser method. Next, the substrates 302 and 342 were fixed together using a sealing material, and the liquid crystal display device was constructed. I made it.

[0520] Here, the liquid crystal display device prepared using sample 1 will be referred to as sample 3. Also, using sample 2... The liquid crystal display device prepared using this method will be designated as sample 4.

[0521] Next, the orientation of liquid crystal molecules in sample 3 and sample 4 was evaluated. Here, a polarizing microscope was used. The pixel area was observed. Figure 42(A) shows that in sample 4, the backlight transmittance was set to 100%. Figure 42(B) shows the observed image of the pixel area in sample 3, and the backlight This is an observation image of the pixel area when the transmittance is set to 100%. Also, Figure 42(C) shows the result for sample 4. Figure 42(D) shows the observed image of the pixel area when the backlight transmittance is set to 0%. This is an observation image of the pixel area in sample 3 when the backlight transmittance is set to 0%.

[0522] In Figure 42(A), a line defect 401 caused by discraction is observed, In Figure 42(B), no display malfunction is observed. Also, in Figure 42(C), light leakage is observed. Although error 403 is observed, no display malfunction is observed in Figure 42(D). Therefore, by filling the recesses of the light-transmitting conductive film with a planarizing film, the display of the liquid crystal display device This shows that defects can be reduced.

[0523] Figure 43 shows the results of the calculation of the relationship between the film thickness of the planarization film and the driving voltage of the liquid crystal display device. This will be shown.

[0524] Figure 43(A) is a model diagram used in the calculation. A 500 nm thick insulating layer is placed on substrate 410. A film 411 was provided. Note that multiple insulating films 411 are provided, and the spacing between the insulating films 411 is 1 The thickness was set to 0 μm. In addition, a pixel electrode 41 with a thickness of 100 nm was placed on the substrate 410 and the insulating film 411. 3 was provided. Also, a flat surface was placed on the pixel electrode 413 so as to fill the recess of the pixel electrode 413. A coating film 415 was formed. The planarization film 415 was made of acrylic resin. In addition, a thick coating was applied on the substrate 420. A pixel electrode 419 with a thickness of 100 nm was provided. Also, between the planarization film 415 and the pixel electrode 419 A liquid crystal layer 417 was provided. The distance (cell gap) between the pixel electrode 413 and the pixel electrode 419 was set to 4 The unit was expressed as μm.

[0525] Here, in the planarization film 415, the thickness of the planarization film 415 provided on the insulating film 411 Figure 43(B) shows the results of calculating the driving voltage of the liquid crystal display device by varying t. The calculation was performed using thickness t as 0nm, 100nm, 400nm, 700nm, and 900nm. Furthermore, as a comparative example, the driving voltage of a liquid crystal display device without the planarization film 415 was calculated. The relationship between the driving voltage and transmittance is shown in Figure 43(B). In Figure 43(B), the horizontal axis represents the liquid This graph shows the driving voltage of the crystal display device, with the vertical axis representing the normalized transmittance.

[0526] As shown in Figure 43(B), when a planarization film is applied to the pixel electrode, the driving voltage increases. As the thickness of the tanning film increases, the driving voltage increases. However, when flat on the pixel electrode Even with a flattening film, the voltage is the same as when no planarizing film is provided on the pixel electrode, therefore, A planarization film can be formed on the electrode. [Examples]

[0527] In this embodiment, a liquid crystal display device was fabricated using Embodiment 2. This section describes the structure of the liquid crystal and the evaluation of the orientation of the liquid crystal molecules.

[0528] First, the preparation process for sample 5 will be explained. In this example, see Figures 4 to 5 and Figure 2. The explanation will use the pixel section (CD) shown in 4. The same manufacturing process as for sample 1 will be explained. Details are omitted.

[0529] Similar to Example 1, the gate electrode and the process shown in Figures 4 to 5(C) are formed on the substrate 302. Conductive film 304c that functions as a gate insulating film, insulating film 305 and insulating film 30 6. The oxide semiconductor films 308b and 308d, the conductive films 310d and 310e, and the insulating film 311 form It was accomplished. In addition, in the said process, the first patterning to the third patterning was performed. Conductive film 304c, oxide semiconductor films 308b, 308d, conductive films 310d, 310 It forms an e.

[0530] Next, as shown in Figure 24(A), a fourth patterning is applied to a desired region on the insulating film 311. This formed the mask 330.

[0531] Next, by performing a heat treatment, the sides of the mask 330 are insulated, as shown in Figure 24(B). A mask 332 was formed in which the angle formed by the surface of the film 311 was reduced and the sides were curved.

[0532] Here, the mask 332 is formed by heat treatment at 170°C for 15 minutes in a nitrogen atmosphere. Ta.

[0533] Next, the insulating film 311 is etched using the dry etching method with the mask 332. As shown in Figure 24(C), an insulating film 312 having an opening 362 was formed.

[0534] Next, as shown in Figure 7(A), a conductive film 315 was formed in the same manner as in Example 1.

[0535] Next, a mask is formed on the conductive film 315 by a sixth photolithography step, and the mask Using the method shown in Figure 7, a portion of the conductive film 315 was etched using the wet etching method. As shown in B), a conductive film 316b was formed.

[0536] Next, an orientation film 318 (see Figure 3) was formed on the conductive film 316b.

[0537] Through the above process, the element was fabricated on the substrate 302. This sample will be designated as sample 5. .

[0538] Furthermore, in sample 5, the heat treatment to form the mask 332 shown in Figure 24(B) was not performed. Then, the insulating film 311 is etched using the mask 330 to form an insulating film 3 having an opening 362. An element section with 12 formed was fabricated. This sample will be designated as sample 6.

[0539] The surfaces of sample 5 and sample 6 were examined using a scanning electron microscope (SEM). The results observed (on microscope) are shown in Figure 44.

[0540] Figure 44(A) is an SEM image of the surface of sample 6 observed from the orientation film 318 side. In Figure 44(A), Figure 44(B) shows a high-magnification SEM image of the region enclosed by the dashed line A. Figure 44(C) shows an SEM image of the region enclosed by the dashed line B, observed at high magnification.

[0541] Furthermore, in sample 5, the same region as in Figures 44(B) and 44(C) was observed at high magnification. The SEM images are shown in Figures 44(D) and 44(E), respectively.

[0542] Note that Figure 44(A) is an SEM image with a magnification of 1000x, and Figures 44(B) to 4 Image 4(E) is an SEM image with a magnification of 10,000x.

[0543] Compared with Figures 44(B) and 44(C), the openings shown in Figures 44(D) and 44(E) are different. It can be seen that the taper angle at the end of part 362 is small.

[0544] Next, in the insulating film 312 of sample 5 and sample 6, a light-transmitting conductive film 308c and To observe the taper angle of the side surface of the insulating film 312, the cross-sections of sample 5 and sample 6 were observed. The results are shown in Figure 45. Figure 45 is a STEM image at a magnification of 40,000x.

[0545] Figure 45(A) shows the cross-section of the insulating film 312 near the opening in sample 6, as observed by STE. This is an M-image. Figure 45(B) shows a cross-section of the insulating film 312 near the opening in sample 5. This is a STEM image.

[0546] As shown in Figure 45(B), in sample 5, the surface of the light-transmitting conductive film 308c and the insulating film The taper angle formed by the side of 312 is 16°. On the other hand, from Figure 45(A), the odor of sample 6 The taper angle formed by the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 is a step. The conductive film 308c, which is stepped and transparent, has a taper angle of 45°, and the insulating film 31 On side 4, the taper angle is 85°.

[0547] Based on the above, an insulating film 312 having an opening 362 is formed using Embodiment 2. This reduces the unevenness of the translucent conductive film 316b formed on the insulating film 312. This is possible.

[0548] Next, similar to Embodiment 1, a light-shielding film 344, a colored film 346, an insulating film 348, and a conductive film 3 A substrate 342 on which 50 and the alignment film 352 were formed was then formed on the substrate 342. After the sealing material is provided, the liquid crystal material is dropped between the substrate 342 and the sealing material using a dispenser method. Next, the substrates 302 and 342 were fixed together using a sealing material, and the liquid crystal display device was constructed. I made it.

[0549] Here, the liquid crystal display device prepared using sample 5 will be referred to as sample 7. Also, using sample 6... The liquid crystal display device prepared using this method will be designated as sample 8.

[0550] Next, the orientation of liquid crystal molecules in samples 7 and 8 was evaluated. Here, a polarizing microscope was used. The pixel area was observed. Figure 46(A) shows that in sample 8, the backlight transmittance was set to 100%. Figure 46(B) shows the observed image of the pixel area in sample 7, and the backlight This is an observation image of the pixel area when the transmittance is set to 100%. Also, Figure 46(C) shows the result for sample 8. Figure 46(D) shows the observed image of the pixel area when the backlight transmittance is set to 0%. This is an observation image of the pixel area in sample 7 when the backlight transmittance is set to 0%.

[0551] In Figure 46(A), a line defect 431 caused by discrination is observed. Furthermore, in Figure 46(B), defect 433 caused by discrepancy is observed. However, defect 433 shown in Figure 46(B) is a smaller defect. Also, Figure 46(C In Figure 46(D), light leakage 403 is observed, but in Figure 46(D), display malfunction is observed. It is not possible. Therefore, by reducing the taper angle of the insulating film having an aperture, This shows that display malfunctions in display devices can be reduced. [Examples]

[0552] In this example, the resistance of the oxide semiconductor film and the multilayer film are shown in Figures 47 and 48. I will explain.

[0553] First, the structure of the sample will be explained using Figure 47.

[0554] Figure 47(A) is a top view of samples 9 to 12, and the cross-sectional view is shown by the dashed line A1-A2. This is shown in Figures 47(B), (C), and (D). Note that the top view is the same for samples 9 through 12. Because the layered structure of the cross-section is different, the cross-sectional view is different. The cross-sectional view of sample 9 is shown in Figure 47(B). Figure 47(C) shows a cross-sectional view of sample 10, and Figure 47(D) shows cross-sectional views of sample 11 and sample 12. They will each be shown.

[0555] Sample 9 has an insulating film 1903 formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. A border film 1904 is formed, and an oxide semiconductor film 1905 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, cover both ends of the oxide semiconductor film 1905. i. oxide semiconductor film 1905 and conductive films 1907, 1909 are insulated films 1910, 1911 It covers. Furthermore, the insulating films 1910 and 1911 are provided with openings 1913 and 1915. In each of these openings, the conductive films 1907 and 1909 are exposed.

[0556] Sample 10 has an insulating film 1903 formed on a glass substrate 1901, and on the insulating film 1903 An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, are located at both ends of the oxide semiconductor film 1905. The insulating film 1911 covers the oxide semiconductor film 1905 and the conductive films 1907 and 1909. Furthermore, the insulating film 1911 is provided with openings 1917 and 1919, and each of these At the opening, conductive films 1907 and 1909 are exposed.

[0557] Samples 11 and 12 have an insulating film 1903 formed on a glass substrate 1901, and the insulating film An insulating film 1904 is formed on 1903, and a multilayer film 1906 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, cover both ends of the multilayer film 1906. The insulating film 1911 covers the multilayer film 1906 and the conductive films 1907 and 1909. 1911 is provided with openings 1917 and 1919, and each of these openings As a result, conductive films 1907 and 1909 are exposed.

[0558] Thus, samples 9 to 12 are oxide semiconductor films 1905 or multilayer films 1906 The structure of the insulating film in contact with the upper layer is different. Sample 9 has an oxide semiconductor film 1905 and an insulating film 1910. The oxide semiconductor film 1905 and the insulating film 1911 are in contact, and in sample 10, the oxide semiconductor film 1905 and the insulating film 1911 are in contact, and Material 11 and sample 12 have a multilayer film 1906 and an insulating film 1911 in contact with each other.

[0559] Next, we will explain the method for preparing each sample.

[0560] First, we will explain the method for preparing sample 9.

[0561] On the glass substrate 1901, an insulating film 1903 is applied to a thickness of 400 by plasma CVD. A silicon nitride film with a thickness of nm was deposited.

[0562] Next, on insulating film 1903, insulating film 1904 is applied to a thickness of 50 by plasma CVD. A silicon oxidoxide-nitride film with a thickness of nm was deposited.

[0563] Next, on the insulating film 1904, a metal oxide target is applied as an oxide semiconductor film 1905. Using In:Ga:Zn=1:1:1, IGZ with a thickness of 35nm was produced by sputtering. An O film was deposited. Then, an etching process was performed using a mask formed by a photolithography process. An oxide semiconductor film 1905 was formed by performing a polishing process.

[0564] Next, the insulating film 1903 and the oxide semiconductor film 1905 are subjected to a sputtering method to increase the thickness A 50nm tungsten film, a 400nm thick aluminum film, and a 100nm thick tungsten film. After sequentially stacking the tongue films, etching is performed using a mask formed by a photolithography process. A coating process was performed to form conductive films 1907 and 1909.

[0565] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a 450 nm thick silicon oxide nitride film is applied as insulating film 1910 by plasma CVD. After forming the film, the film was heat-treated in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. .

[0566] Next, on insulating film 1910, insulating film 1911 is applied to a thickness of 50 by plasma CVD. A silicon nitride film with a thickness of nm was deposited.

[0567] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, etching is performed to create openings 1913 and 1911 in the insulating film 1910 and insulating film 1911. Formed 15.

[0568] Sample 9 was prepared using the above procedure.

[0569] Next, the method for preparing sample 10 will be described.

[0570] Insulating film 1903, oxide semiconductor film 1905, conductive film 1907, and conductive film 19 of sample 9 On top of 09, an insulating film 1910 with a thickness of 450 nm was formed by plasma CVD. After forming the film, a heat treatment was performed in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. Then, the insulating film 1910 was removed.

[0571] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a silicon nitride film with a thickness of 50 nm is formed as insulating film 1911 by plasma CVD. A thin film was formed.

[0572] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911.

[0573] Sample 10 was prepared using the above procedure.

[0574] Next, we will explain how to prepare sample 11.

[0575] Sample 11 used a multilayer film 1906 instead of the oxide semiconductor film 1905 of Sample 10. As the multilayer film 1906, a metal oxide target (In:Ga: Using Zn=1:3:2, a 10nm thick IGZO film was deposited by sputtering. Next, using a metal oxide target (In:Ga:Zn=1:1:1), sputtering A 10nm thick IGZO film is deposited using the IGZO method, followed by deposition on a metal oxide target (In:G Using a:Zn=1:3:2, a 10nm thick IGZO film was formed by sputtering. A film was formed. Subsequently, an etching process was carried out using the mask formed by the photolithography process. This process was carried out to form a multilayer film 1906.

[0576] Sample 11 was prepared using the above procedure.

[0577] Next, we will explain how to prepare sample 12.

[0578] Sample 12 used a multilayer film 1906 instead of the oxide semiconductor film 1905 of Sample 10. Furthermore, compared to sample 11, sample 12 had a different thickness of IGZO film constituting the multilayer film 1906. Different. As for the multilayer film 1906, a metal oxide target (In: Using Ga:Zn=1:3:2, a 20nm thick IGZO film was produced by sputtering. After forming the film, a metal oxide target (In:Ga:Zn=1:1:1) is used to perform a spatula. A 15nm thick IGZO film was deposited using the taring method, followed by a metal oxide target (I Using n:Ga:Zn=1:3:2, IGZO with a thickness of 10 nm was produced by sputtering. A film was formed. Then, etching was performed using a mask formed by a photolithography process. A grafting treatment was performed to form a multilayer film 1906.

[0579] Sample 12 was prepared using the above procedure.

[0580] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided on sample 9 to sample 12. The sheet resistance was measured. In sample 9, the projections were made at openings 1913 and 1915. The sheet resistance of the oxide semiconductor film 1905 was measured by bringing a probe into contact with it. Also, samples 10 to In sample 12, the probe was brought into contact with openings 1917 and 1919, and the oxide The sheet resistance of semiconductor film 1905 and multilayer film 1906 was measured. In the 12 oxide semiconductor films 1905 and multilayer films 1906, the conductive film 1907 and the conductive film The width of the opposing films 1909 is 1 mm, and the distance between conductive film 1907 and conductive film 1909 is 10 The thickness was set to μm. In addition, in samples 9 to 12, the conductive film 1907 was set to ground potential, and the conductive film was set to ground potential. A voltage of 1V was applied to film 1909.

[0581] The sheet resistances of samples 9 to 12 are shown in Figure 48.

[0582] The sheet resistance of sample 9 is approximately 1 × 10⁻⁶. 11 The value was Ω / sq. Also, the sheet of sample 10 The resistance was 2620 Ω / sq. The sheet resistance of sample 11 was 4410 Ω / sq. The result was q. Furthermore, the sheet resistance of sample 12 was 2930 Ω / sq.

[0583] Thus, the difference between the oxide semiconductor film 1905 and the insulating film in contact with the multilayer film 1906 Furthermore, the sheet resistances of the oxide semiconductor film 1905 and the multilayer film 1906 show different values.

[0584] Furthermore, when the sheet resistances of samples 9 to 12 described above are converted to resistivity, sample 9 is: 3.9 × 10 5 Ωcm, sample 10 is 9.3 × 10 -3 Ωcm, sample 11 is 1.3 × 1 0 -2 Ωcm, sample 12 is 1.3 × 10 -2 It was Ωcm.

[0585] Sample 9 is an oxide-nitride film used as an insulating film 1910 in contact with the oxide semiconductor film 1905. A nitride film is formed. The oxide semiconductor film 1905 is used as an insulating film 1911. It is not in contact with the silicon film. On the other hand, samples 10 to 12 are oxide semiconductor film 1905, And a silicon nitride film is formed in contact with the multilayer film 1906 to be used as an insulating film 1911. In this way, the oxide semiconductor film 1905 and the multilayer film 1906 are in contact with the insulating film 1911. When placed in contact with the silicon nitride film used, the oxide semiconductor film 1905 and the multilayer film 19 Defects, typically oxygen vacancies, are formed at 06, and hydrogen contained in the silicon nitride film is also formed. However, these substances migrate or diffuse into the oxide semiconductor film 1905 and the multilayer film 1906. As a result of these processes... The conductivity of the oxide semiconductor film 1905 and the multilayer film 1906 is improved.

[0586] For example, when an oxide semiconductor film is used in the channel formation region of a transistor, as shown in Sample 9. A configuration in which a silicon oxide nitride film is provided in contact with an oxide semiconductor film is preferred. As for the light-transmitting conductive film used for the electrodes of the quantitative element, as shown in Samples 10 to 12... A configuration in which a silicon nitride film is provided in contact with an oxide semiconductor film or a multilayer film is preferred. By using this configuration, the oxide semiconductor used in the channel formation region of the transistor... A film or multilayer film and an oxide semiconductor film or multilayer film used as electrodes for a capacitive element are manufactured in the same process. The resistivity of oxide semiconductor films and multilayer films can be changed by fabricating them using this method.

[0587] Next, for sample 10 and sample 11, the sheet resistance values ​​of the samples stored in a high-temperature, high-humidity environment were... Measurements were taken. The conditions for each sample used here are described below. In some conditions, different conditions were used compared to those for sample 10 and sample 11. Therefore, Samples that have the same structure as material 10 and sample 11 but are prepared under different conditions are respectively called sample 10a and sample 11. Let's call this sample 11a.

[0588] First, we will explain the method for preparing sample 10a.

[0589] Insulating film 1903 and insulating film 1904 were deposited on the glass substrate 1901.

[0590] On the insulating film 1904, a metal oxide target (In: Using Ga:Zn=1:1:1, a 35nm thick IGZO film was produced by sputtering. The film was formed. Subsequently, etching was performed using a mask formed by a photolithography process. After the initial treatment, the oxide semiconductor film 1905 is heat-treated at 350°C or 450°C to form the film. I did it.

[0591] A thickness of 50n is applied to the insulating film 1903 and the oxide semiconductor film 1905 by sputtering. After sequentially layering a titanium film of m thickness and a copper film of 400 nm thickness, the photolithography process is performed. Using the mask formed from the mask, etching was performed to create conductive film 1907 and conductive film 1909. It formed.

[0592] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a 450 nm thick silicon oxide nitride film is applied as insulating film 1910 by plasma CVD. After forming the film, the film was heat-treated in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. .

[0593] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a silicon nitride film with a thickness of 50 nm is formed as insulating film 1911 by plasma CVD. A film was deposited. The deposition temperature for the silicon nitride film was set to 220°C or 350°C.

[0594] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, etching is performed to create openings 1913 and 1911 in the insulating film 1910 and insulating film 1911. Formed 15.

[0595] Sample 10a was prepared using the above procedure.

[0596] Next, we will explain how sample 11a was prepared.

[0597] Sample 11a uses a multilayer film 1906 instead of the oxide semiconductor film 1905 of sample 10a. There it was. As for the multilayer film 1906, a metal oxide target (In:G) was applied on the insulating film 1904. Using a:Zn=1:1:1, a 10nm thick IGZO film was formed by sputtering. After film formation, sputtering is performed using a metal oxide target (In:Ga:Zn=1:3:2). A 10nm thick IGZO film was deposited using the ring method. Subsequently, a photolithography process was performed. After etching using the mask formed by this process, heating is performed at 350°C or 450°C. A heat treatment was performed to form a multilayer film 1906.

[0598] Sample 11a was prepared using the above procedure.

[0599] Next, the oxide semiconductor film 1905 and multilayer film 1 provided on sample 10a and sample 11a The sheet resistance of 906 was measured. In samples 10a and 11a, the opening 1917 The probe is then brought into contact with the opening 1919, and the oxide semiconductor film 1905 and the multilayer film 190 The sheet resistance of sample 6 was measured. Note that the oxide semiconductor film 1905 of sample 10a and sample 11a was measured. , and in the multilayer film 1906, the width between the opposing conductive film 1907 and conductive film 1909 is 1. The thickness was 5 mm, and the distance between conductive film 1907 and conductive film 1909 was set to 10 μm. Also, sample 1 In samples 0a and 11a, conductive film 1907 is set to ground potential, and conductive film 1909 is given 1V. The substance was applied. Furthermore, in an atmosphere of 60°C and 95% humidity, samples 10a and 11a were subjected to the same procedure. After storing the samples for 60 and 130 hours, the sheet resistance values ​​of each sample were measured.

[0600] The sheet resistance values ​​of sample 10a and sample 11a are shown in Figure 49. Note that in Figure 49, the actual The line indicates that the deposition temperature of the silicon nitride film formed as insulating film 1911 in each sample was 220°C. The temperature is in °C, and the dashed line indicates 350°C. Also, the black markers indicate that in each sample, The white paint indicates that the oxide semiconductor film 1905 was formed and then heat-treated at 350°C. The marker is heated at 450°C after forming an oxide semiconductor film 1905 or a multilayer film 1906. This indicates that processing has been performed. The rounded corner markers indicate that each sample has an oxide semiconductor film 1905. This indicates that it is sample 10a. The triangular marker indicates that each sample has a multilayer film 1906. This indicates that it is sample 11a. Note that in Figure 49, after the multilayer film 1906 was formed, The measurement results for sample 11a heated to 350°C, i.e., the black triangular markers are plotted. do not have.

[0601] As shown in Figure 49, samples 10a and 11a have low sheet resistance values ​​and are used as electrodes for capacitive elements. It can be seen that the desirable sheet resistance value of 0.2Ω / sq. or less is met. It can be seen that material 10a and sample 11a exhibit little variation in sheet resistance over time. Therefore, the oxide semiconductor film or multilayer film in contact with the silicon nitride film is in a high-temperature, high-humidity environment. Because the amount of variation in sheet resistance is small, a light-transmitting conductive film used for the electrodes of a capacitive element is used. It can be used in this way.

[0602] Next, in samples 10a and 11a, the substrate temperatures were set to 25°C, 60°C, and 150°C. The results of measuring the sheet resistance values ​​for each sample are shown in Figure 50. Deposition temperature of silicon nitride film formed as insulating film 1911 for 10a and sample 11a The temperature is 220°C, and after forming the oxide semiconductor film 1905 or multilayer film 1906, 350 Samples that had been heat-treated at °C were used. The black circle markers indicate the measurement results for sample 10a. The painted triangular markers indicate the measurement results for sample 11a.

[0603] As shown in Figure 50, even when the substrate temperature is increased, the oxide semiconductor film 1905 and the multilayer film 1906 remain stable. It can be seen that the resistance value does not change. That is, the oxide semiconductor film in contact with the silicon nitride film Alternatively, a multilayer film can also be called a degenerate semiconductor. An oxide semiconductor film or multilayer film in contact with a silicon nitride film. Because the layer film exhibits little change in sheet resistance even when the substrate temperature changes, it is used as an electrode for capacitive elements. It can be used as a conductive film with light-transmitting properties.

[0604] The configuration shown in this embodiment can be appropriately combined with other embodiments or configurations shown in other examples. It can be used. [Examples]

[0605] This embodiment involves impurity analysis of an oxide semiconductor film and an insulating film formed on the oxide semiconductor film. This will be explained using Figure 51.

[0606] In this embodiment, two types of samples (hereinafter referred to as "samples") were used as samples for impurity analysis. Samples 13 and 14) were prepared.

[0607] First, the method for preparing sample 13 is shown below.

[0608] Sample 13 involved depositing an IGZO film on a glass substrate, followed by a silicon nitride film. Subsequently, heat treatment was performed at 450°C for 1 hour under a nitrogen atmosphere, followed by a mixture of nitrogen and oxygen gas. The material was heat-treated at 450°C for 1 hour under an atmosphere of nitrogen (80%) and oxygen (20%).

[0609] The IGZO film deposition conditions involve sputtering, using a metal oxide target. Using (In:Ga:Zn=1:1:1), Ar / O2 = 100 / 100 sccm(O2 Under the conditions of =50%, pressure=0.6Pa, deposition power=5000W, and substrate temperature=170℃, 1 A 00nm thick IGZO film was deposited.

[0610] Furthermore, the deposition conditions for the silicon nitride film are as follows: PE-CVD method, SiH4 / N2 / N H3 = 50 / 5000 / 100 sccm, pressure = 100 Pa, deposition power = 1000 W, base A silicon nitride film with a thickness of 100 nm was deposited under the condition of a plate temperature of 220°C.

[0611] Next, the method for preparing sample 14 is shown below.

[0612] An IGZO film is formed on a glass substrate, and then a silicon oxide-nitride film and a silicon nitride film are formed. The film was deposited by layering. Then, it was heat-treated at 450°C for 1 hour under a nitrogen atmosphere, followed by nitration. The treatment was performed at 450°C for 1 hour under a mixed gas atmosphere of nitrogen and oxygen (nitrogen = 80%, oxygen = 20%). He carried out the rationale.

[0613] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 13. The following conditions were used. Furthermore, the conditions for depositing the silicon oxide nitride film were determined by the PE-CVD method. SiH4 / N2O = 30 / 4000 sccm, pressure = 40 Pa, deposition power = 150 W. A silicon oxide-nitride film with a thickness of 50 nm was deposited under the condition of substrate temperature = 220°C, and then P Using the E-CVD method, SiH4 / N2O = 160 / 4000 sccm, pressure = 200 Pa. A 400nm thick silicon oxide nitride film was deposited under the conditions of deposition power = 1500W and substrate temperature = 220℃. A film was deposited.

[0614] The results of the impurity analysis of sample 13 and sample 14 are shown in Figure 51.

[0615] Furthermore, for impurity analysis, secondary ion mass spectrometry (SIMS) is used. Using Ion Mass Spectrometry, the direction of the arrow shown in Figure 51 is divided Analysis was performed, specifically measurements taken from the glass substrate side.

[0616] Further, FIG. 51(A) shows the concentration profile of hydrogen (H) obtained by measuring Sample 13 FIG. 51(B) shows the concentration profile of hydrogen (H) obtained by measuring Sample 14 is.

[0617] From FIG. 51(A), it can be seen that the hydrogen (H) concentration in the IGZO film is 1.0×10 20 atoms / c m 3 It can also be seen that the hydrogen (H) concentration in the silicon nitride film is 1.0×10 2 3 atoms / cm 3 It can also be seen that from FIG. 51(B), the hydrogen in the IGZO film (H) concentration is 5.0×10 19 atoms / cm 3 It can also be seen that the hydrogen (H) concentration in the silicon oxynitride film is 3.0×10 atoms / cm 21 atoms / cm 3 It can be seen that.

[0618] Note that, due to the measurement principle of SIMS, it is known that it is difficult to accurately obtain data near the sample surface or near the interface of a film with a different material. Therefore, when analyzing the thickness direction distribution of hydrogen (H) in a film by SIMS, in the area where the target film exists It is difficult to obtain accurate data near the surface. Therefore, when analyzing the thickness direction distribution of hydrogen (H) in the film by SIMS, in the area where the target film exists In the surrounding area, the average value in the area where there is no extreme fluctuation and a substantially constant intensity can be obtained is adopted In the surrounding area where there is no extreme fluctuation and a substantially constant intensity can be obtained, the average value is adopted is.

[0619] [[ID=XX]] Thus, by changing the configuration of the insulating film in contact with the IGZO film, a difference in the hydrogen concentration in the IGZO film was confirmed.

[0620] For example, when using the above-described IGZO film in the channel formation region of a transistor, Sample 1 As shown in 4, a configuration in which a silicon oxidizide film is provided in contact with the IGZO film is preferred. As a light-transmitting conductive film used for the electrodes of the capacitive element, IGZO is used, as shown in sample 13. A configuration in which a silicon nitride film is provided in contact with the film is preferred. By using such a configuration Therefore, the IGZO film used in the channel formation region of the transistor and the I used in the electrodes of the capacitive element are used. Even when GZO films and IGZO films are fabricated using the same process, the hydrogen concentration in the IGZO film can be changed. [Examples]

[0621] In this example, the defect amounts of the oxide semiconductor film and the multilayer film are shown using Figures 52 and 53. I will explain.

[0622] First, let's describe the structure of the sample.

[0623] Sample 15 consists of a 35 nm thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor It has a nitride insulating film with a thickness of 100 nm formed on the film.

[0624] Samples 16 and 17 are multilayer films with a thickness of 30 nm formed on a quartz substrate, and on the multilayer film It has a nitride insulating film with a thickness of 100 nm formed thereon. The multilayer film of sample 16 has a thickness A first IGZO film with a thickness of 10 nm, a second IGZO film with a thickness of 10 nm, and a third IGZO film with a thickness of 10 nm Three IGZO films are stacked in sequence. Sample 17 also has a first IGZO film with a thickness of 20 nm. The O film, a second IGZO film with a thickness of 15 nm, and a third IGZO film with a thickness of 10 nm are stacked in order. It is layered. Samples 16 and 17, compared to sample 15, use an oxide semiconductor film instead. The difference is that it has a multilayer film.

[0625] Sample 18 consists of an oxide semiconductor film with a thickness of 100 nm formed on a quartz substrate, and an oxide semiconductor film. A 250 nm thick oxide insulating film formed on the body film, and a 10 nm thick oxide insulating film formed on the oxide insulating film. It has a 0 nm nitride insulating film. Sample 18 has an oxide half compared to Samples 15 to 17. The difference is that the conductive film is not in contact with the nitride insulating film, but rather with the oxide insulating film.

[0626] Next, we will explain the method for preparing each sample.

[0627] First, we will explain the method for preparing sample 15.

[0628] A 35 nm thick IGZO film was deposited on a quartz substrate as an oxide semiconductor film. The film deposition conditions involve sputtering to a metal oxide target (In:Ga:Z Using n=1:1:1, Ar / O2 = 100 sccm / 100 sccm (O2=50%) The following conditions were used: pressure = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 170°C.

[0629] Next, as the first heat treatment, the material is heated in a nitrogen atmosphere at 450°C for 1 hour, Heating in a 450°C nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) for 1 hour. The process was completed.

[0630] Next, a silicon nitride film with a thickness of 100 nm is deposited on the oxide semiconductor film as a nitride insulating film. The silicon nitride film deposition conditions were as follows: PE-CVD method, SiH4 / N2 / NH 3 = 50 / 5000 / 100 sccm, pressure = 100 Pa, deposition power = 1000 W, substrate The test was conducted under the condition of a temperature of 350°C.

[0631] Next, as a second heat treatment, the material was heated in a nitrogen atmosphere at 250°C for 1 hour.

[0632] Sample 15 was prepared using the above procedure.

[0633] Next, the method for preparing sample 16 will be described.

[0634] Sample 16 had a multilayer film formed in place of the oxide semiconductor film of Sample 15. This involves sputtering a metal oxide target (In:Ga:Zn=) onto a quartz substrate. Using a 1:3:2 ratio, Ar / O2 = 180 / 20 sccm (O2 = 10%), pressure = 0. The first IGZ with a thickness of 10 nm was deposited under the conditions of 6 Pa, deposition power = 5000 W, and substrate temperature = 25°C. An O film was deposited. Next, a metal oxide target (In:Ga:Zn) was formed using the puttering method. Using a ratio of 1:1:1, Ar / O2 = 100 / 100 sccm (O2 = 50%), pressure = Under the conditions of 0.6 Pa, deposition power = 5000 W, and substrate temperature = 170°C, a second film with a thickness of 10 nm was produced. An IGZO film was deposited. Next, a metal oxide target (In:Ga) was formed using the puttering method. Using Zn=1:3:2, Ar / O2=180 / 20sccm (O2=10%), pressure Under the conditions of force = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25°C, a 10 nm thick third layer was deposited. An IGZO film was deposited.

[0635] The other steps were the same as for sample 15. Sample 16 was formed by the above steps.

[0636] Next, the method for preparing sample 17 will be described.

[0637] Sample 17 had a multilayer film formed instead of the oxide semiconductor film of Sample 15. This involves creating a 20nm thick IGZO film on a quartz substrate using the same conditions as the first IGZO film shown in sample 16. The first IGZO film was deposited. Next, the second I shown in sample 16 was deposited by sputtering. Using the same conditions as the GZO film, a second IGZO film with a thickness of 15 nm was deposited. Next, the sample Using the same conditions as the third IGZO film shown in 16, a third IGZO film with a thickness of 10 nm was formed. It formed a membrane.

[0638] The other steps were the same as for sample 15. Sample 17 was formed by the above steps.

[0639] Next, the method for preparing sample 18 will be described.

[0640] Sample 18 was prepared using the same conditions as Sample 15, by creating a 100 nm thick oxide semiconductor on a quartz substrate. A membrane was formed.

[0641] Next, the first heat treatment was performed using the same conditions as for sample 15.

[0642] Next, on the oxide semiconductor film, a first silicon oxide nitride film with a thickness of 50 nm is applied as an oxide insulating film. A film and a second silicon oxidizride film with a thickness of 200 nm were formed. Here, PE-CV Using method D, SiH4 / N2O = 30 / 4000 sccm, pressure = 40 Pa, deposition power = 1 A first silicon oxide-nitride film with a thickness of 50 nm was deposited under the conditions of 50 W and substrate temperature = 220°C. Then, using the PE-CVD method, SiH4 / N2O = 160 / 4000 sccm, pressure Under the conditions of =200Pa, deposition power=1500W, and substrate temperature=220℃, a 200nm thickness was achieved. A second silicon oxide-nitride film was deposited. The second silicon oxide-nitride film was stoichiometrically... It is a membrane that contains more oxygen than the required amount to make up its composition.

[0643] Next, using the same conditions as for sample 15, a silicon nitride film with a thickness of 100 nm was laid on an oxide insulating film. It formed.

[0644] Next, a second heat treatment was performed using the same conditions as for sample 15.

[0645] Sample 18 was formed by the above process.

[0646] Next, ESR measurements were performed on samples 15 to 18. ESR measurements were performed at a predetermined temperature. Then, using the magnetic field value (H0) at which microwave absorption occurs, we can use the equation g = hν / βH0 to determine g A parameter called a value is obtained. Note that ν is the microwave frequency, and h is Planck's constant. It is a number, and β is a Bohr magneton; both are constants.

[0647] Here, ESR measurements were performed under the following conditions: The measurement temperature was set to room temperature (25°C), and the value was 8.9 The high-frequency power (microwave power) was set to 2 GHz and the direction of the magnetic field was determined by the fabricated sample. It was made parallel to the film surface.

[0648] The oxide semiconductor films and multilayer films contained in samples 15 to 17 were obtained by ESR measurement. The first derivative curve is shown in Figure 52. Figure 52(A) shows the measurement results for sample 15, and Figure 52(B) shows the first derivative curve. Figure 52(C) shows the measurement results for sample 16, and Figure 52(C) shows the measurement results for sample 17.

[0649] Figure 53 shows the first derivative curve obtained by ESR measurement of the oxide semiconductor film contained in sample 18. show.

[0650] In Figures 52(A) to 52(C), sample 15 was oxidized at a g value of 1.93. A symmetrical signal caused by defects in the semiconductor film has been detected. Sample 16 and Sample In 17, a signal with symmetry due to defects in the multilayer film was detected at a g-value of 1.95. The spin density of sample 15 with a g value of 1.93 is 2.5 × 10⁻⁶. 19 SPI ns / cm 3 The sum of the spin densities for sample 16 with g values ​​of 1.93 and 1.95. is 1.6 × 10 19 spins / cm 3 The g value in sample 17 was 1.93 and The sum of the spin densities of 1.95 is 2.3 × 10⁻⁶. 19 spins / cm 3 That was the case. In other words, It can be seen that oxide semiconductor films and multilayer films contain defects. One example of a defect in multilayer films is oxygen deficiency.

[0651] In Figure 53, sample 18 is a multiplier of the oxide semiconductor film of sample 15, sample 16, and sample 17. Compared to layer films, oxide semiconductor films have greater thickness, yet exhibit symmetry due to defects. No signal was detected, i.e., below the detection limit (here, the detection limit is 3.7 × 10⁻⁶). 16 s pins / cm 3 This indicates the amount of defects contained in the oxide semiconductor film. It is clear that it is difficult to detect.

[0652] A nitride insulating film, in this case a nitride film formed by PE-CVD, on an oxide semiconductor film or multilayer film. When a reconstituted film comes into contact with the oxide semiconductor film or multilayer film, defects, typically oxygen vacancies, are formed. It can be seen that... On the other hand, an oxide semiconductor film is an oxide insulating film, in this case, a silicon oxide nitride film. By providing this, excess oxygen contained in the silicon oxidnitride film, i.e., oxygen that satisfies the stoichiometric composition, is removed. More oxygen diffuses into the oxide semiconductor film, and the number of defects in the oxide semiconductor film does not increase.

[0653] From the above, as shown in Samples 15 to 17, the oxide semiconductor film or multilayer film in contact with the nitride insulating film has many defects, typically a large amount of oxygen deficiency and high conductivity, so it can be used as an electrode of a capacitive element. On the other hand, as shown in Sample 18, the oxide semiconductor film or multilayer film in contact with the oxide insulating film has a small amount of oxygen deficiency and low conductivity, so it can be used as a channel formation region of a transistor. The body film or multilayer film has m...

Claims

1. A transistor, a capacitive element, and a reflective display element are provided in at least one pixel. One of the source electrode or drain electrode of the transistor is electrically connected to a signal line. The source electrode or drain electrode of the transistor, the other of which is electrically connected to the first electrode of the display element, The gate electrode of the transistor is electrically connected to the scan line. The other of the source electrode or drain electrode of the transistor is electrically connected to one electrode of the capacitive element, in a display device. A first conductive film having the function of a gate electrode of the transistor and the function of a scanning line, A first insulating film having a region positioned above the first conductive film and containing silicon nitride, A second insulating film having a region positioned above the first insulating film and containing silicon dioxide, A first oxide semiconductor film having a region that overlaps with the first conductive film via the first insulating film and the second insulating film, A second oxide semiconductor film having a region positioned above the first oxide semiconductor film, A second conductive film having a region positioned above the second insulating film and functioning as the other electrode of the capacitive element, A third conductive film having a region that functions as either the source electrode or the drain electrode of the transistor, functions as the signal line, and is located above the second oxide semiconductor film, A fourth conductive film having a region positioned above the second oxide semiconductor film, which functions as the other of the source electrode or drain electrode of the transistor, A fifth conductive film is electrically connected to the second conductive film, functions as wiring that supplies potential to the second conductive film, and has a region that extends across the pixel and adjacent pixels. A third insulating film having a region in contact with the upper surface of the second oxide semiconductor film and containing silicon oxide, A fourth insulating film having a region positioned above the third insulating film and containing silicon nitride, A sixth conductive film is electrically connected to the fourth conductive film, has a region positioned above the fourth insulating film, and functions as the first electrode of the display element, A fifth insulating film having a region located above the second conductive film, a region located above the sixth conductive film, a region located above the second oxide semiconductor film, and containing an organic resin, The sixth conductive film functions as one electrode of the capacitive element, The sixth conductive film has a region in contact with the fifth insulating film, The fifth insulating film has a region with a greater film thickness than the second insulating film. Each of the first oxide semiconductor film and the second oxide semiconductor film comprises In, Ga, and Zn. The atomic ratio of Ga to In in the second oxide semiconductor film is greater than the atomic ratio of Ga to In in the first oxide semiconductor film. Display device.

2. A transistor, a capacitive element, and a reflective display element are provided in at least one pixel. One of the source electrode or drain electrode of the transistor is electrically connected to a signal line. The source electrode or drain electrode of the transistor, the other of which is electrically connected to the first electrode of the display element, The gate electrode of the transistor is electrically connected to the scan line. The other of the source electrode or drain electrode of the transistor is electrically connected to one electrode of the capacitive element, in a display device. A first conductive film having the function of a gate electrode of the transistor and the function of a scanning line, A first insulating film having a region positioned above the first conductive film and containing silicon nitride, A second insulating film having a region positioned above the first insulating film and containing silicon dioxide, A first oxide semiconductor film having a region that overlaps with the first conductive film via the first insulating film and the second insulating film, A second oxide semiconductor film having a region positioned above the first oxide semiconductor film, A second conductive film having a region positioned above the second insulating film and functioning as the other electrode of the capacitive element, A third conductive film having a region that functions as either the source electrode or the drain electrode of the transistor, functions as the signal line, and is located above the second oxide semiconductor film, A fourth conductive film having a region positioned above the second oxide semiconductor film, which functions as the other of the source electrode or drain electrode of the transistor, A fifth conductive film is electrically connected to the second conductive film, functions as wiring that supplies potential to the second conductive film, and has a region that extends across the pixel and adjacent pixels. A third insulating film having a region in contact with the upper surface of the second oxide semiconductor film and containing silicon oxide, A fourth insulating film having a region positioned above the third insulating film and containing silicon nitride, A sixth conductive film is electrically connected to the fourth conductive film, has a region positioned above the fourth insulating film, and functions as the first electrode of the display element, A fifth insulating film having a region located above the second conductive film, a region located above the sixth conductive film, a region located above the second oxide semiconductor film, and containing an organic resin, The sixth conductive film functions as one electrode of the capacitive element, The sixth conductive film has a region in contact with the fifth insulating film, The fifth insulating film has a region with a greater film thickness than the second insulating film. Each of the first oxide semiconductor film and the second oxide semiconductor film comprises In, Ga, and Zn. The atomic ratio of Ga to In in the second oxide semiconductor film is greater than the atomic ratio of Ga to In in the first oxide semiconductor film. The second oxide semiconductor film has crystals whose c-axis is aligned in a direction perpendicular to the surface of the second oxide semiconductor film. Display device.

3. A transistor, a capacitive element, and a reflective display element are provided in at least one pixel. One of the source electrode or drain electrode of the transistor is electrically connected to a signal line. The source electrode or drain electrode of the transistor, the other of which is electrically connected to the first electrode of the display element, The gate electrode of the transistor is electrically connected to the scan line. The other of the source electrode or drain electrode of the transistor is electrically connected to one electrode of the capacitive element, in a display device. A first conductive film having the function of a gate electrode of the transistor and the function of a scanning line, A first insulating film having a region positioned above the first conductive film and containing silicon nitride, A second insulating film having a region positioned above the first insulating film and containing silicon dioxide, A first oxide semiconductor film having a region that overlaps with the first conductive film via the first insulating film and the second insulating film, A second oxide semiconductor film having a region positioned above the first oxide semiconductor film, A second conductive film having a region positioned above the second insulating film and functioning as the other electrode of the capacitive element, A third conductive film having a region that functions as either the source electrode or the drain electrode of the transistor, functions as the signal line, and is located above the second oxide semiconductor film, A fourth conductive film having a region positioned above the second oxide semiconductor film, which functions as the other of the source electrode or drain electrode of the transistor, A fifth conductive film is electrically connected to the second conductive film, functions as wiring that supplies potential to the second conductive film, and has a region that extends across the pixel and adjacent pixels. A third insulating film having a region in contact with the upper surface of the second oxide semiconductor film and containing silicon oxide, A fourth insulating film having a region positioned above the third insulating film and containing silicon nitride, A sixth conductive film is electrically connected to the fourth conductive film, has a region positioned above the fourth insulating film, and functions as the first electrode of the display element, A fifth insulating film having a region located above the second conductive film, a region located above the sixth conductive film, a region located above the second oxide semiconductor film, and containing an organic resin, The third conductive film does not overlap with the fifth conductive film. The sixth conductive film functions as one electrode of the capacitive element, The sixth conductive film has a region in contact with the fifth insulating film, The fifth insulating film has a region with a greater film thickness than the second insulating film. Each of the first oxide semiconductor film and the second oxide semiconductor film comprises In, Ga, and Zn. The atomic ratio of Ga to In in the second oxide semiconductor film is greater than the atomic ratio of Ga to In in the first oxide semiconductor film. Display device.

4. A transistor, a capacitive element, and a reflective display element are provided in at least one pixel. One of the source electrode or drain electrode of the transistor is electrically connected to a signal line. The source electrode or drain electrode of the transistor, the other of which is electrically connected to the first electrode of the display element, The gate electrode of the transistor is electrically connected to the scan line. The other of the source electrode or drain electrode of the transistor is electrically connected to one electrode of the capacitive element, in a display device. A first conductive film having the function of a gate electrode of the transistor and the function of a scanning line, A first insulating film having a region positioned above the first conductive film and containing silicon nitride, A second insulating film having a region positioned above the first insulating film and containing silicon dioxide, A first oxide semiconductor film having a region that overlaps with the first conductive film via the first insulating film and the second insulating film, A second oxide semiconductor film having a region positioned above the first oxide semiconductor film, A second conductive film having a region positioned above the second insulating film and functioning as the other electrode of the capacitive element, A third conductive film having a region that functions as either the source electrode or the drain electrode of the transistor, functions as the signal line, and is located above the second oxide semiconductor film, A fourth conductive film having a region positioned above the second oxide semiconductor film, which functions as the other of the source electrode or drain electrode of the transistor, A fifth conductive film is electrically connected to the second conductive film, functions as wiring that supplies potential to the second conductive film, and has a region that extends across the pixel and adjacent pixels. A third insulating film having a region in contact with the upper surface of the second oxide semiconductor film and containing silicon oxide, A fourth insulating film having a region positioned above the third insulating film and containing silicon nitride, A sixth conductive film is electrically connected to the fourth conductive film, has a region positioned above the fourth insulating film, and functions as the first electrode of the display element, A fifth insulating film having a region located above the second conductive film, a region located above the sixth conductive film, a region located above the second oxide semiconductor film, and containing an organic resin, The third conductive film does not overlap with the fifth conductive film. The sixth conductive film functions as one electrode of the capacitive element, The sixth conductive film has a region in contact with the fifth insulating film, The fifth insulating film has a region with a greater film thickness than the second insulating film. Each of the first oxide semiconductor film and the second oxide semiconductor film comprises In, Ga, and Zn. The atomic ratio of Ga to In in the second oxide semiconductor film is greater than the atomic ratio of Ga to In in the first oxide semiconductor film. The second oxide semiconductor film has crystals whose c-axis is aligned in a direction perpendicular to the surface of the second oxide semiconductor film. Display device.

5. In any one of claims 1 to 4, The fifth insulating film has a region with a film thickness of 450 nm or more and 1500 nm or less. Display device.

6. In any one of claims 1 to 5, The fifth insulating film includes an acrylic resin. Display device.

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