Systems and methods for real-time frequency shift detection

Abstract

The systems and methods disclosed herein include a correction circuit. The correction circuit may include a signal conditioning circuit configured to condition a received reference signal. The correction circuit may include a filter configured to filter the conditioned signal received from the signal conditioning circuit. The correction circuit may include a phase detector circuit configured to generate at least one output signal based on measuring a phase shift between multiple received input signals. At least one of the multiple input signals may include the conditioned signal received from the filter.

Description

[Technical Field]

[0001] The present disclosure relates to frequency shift detection, and more particularly to a system and method for real-time frequency shift detection in a resonator-based oscillator via a filter. [Background technology]

[0002] Timing is at the heart of many electronics applications, from data acquisition to telecommunications. Oscillators can be used as clocks to provide precise timing for these electronics applications. Core parameters of timing oscillators can include cost, power consumption, size, precision, accuracy, frequency stability over temperature, jitter, and phase noise, and different applications may require different specifications for each of these parameters. High-performance applications such as computer networking and telecommunications require clocks with very low jitter and very high temperature stability, often at the expense of cost and size. These and other deficiencies exist. Summary of the Invention

[0003] An embodiment of the present disclosure provides a correction circuit. The correction circuit may include a signal conditioning circuit configured to condition a received reference signal. The correction circuit may include a filter configured to filter the conditioned signal received from the signal conditioning circuit. The correction circuit may include a phase detector circuit configured to generate at least one output signal based on measuring a phase shift between a plurality of received input signals. At least one of the plurality of input signals may include the conditioned signal received from the filter.

[0004] An embodiment of the present disclosure provides a method. The method may include sending a reference signal. The method may include adjusting the reference signal. The method may include filtering the adjusted reference signal. The method may include sending the filtered adjusted signal. The method may include measuring a phase shift between the filtered adjusted signal and a second signal. The method may include generating an output signal including a frequency correction signal. The method may include sending the frequency correction signal.

[0005] An embodiment of the present disclosure provides an oscillator. The oscillator may include a mechanical resonator. The oscillator may include a correction circuit. The oscillator may include an output conditioner circuit. The correction circuit may include a signal conditioning circuit configured to condition a reference signal received from the mechanical resonator. The correction circuit may include a filter configured to filter the conditioned signal received from the signal conditioning circuit. The correction circuit may include a phase detector circuit configured to generate at least one output signal based on measuring a phase shift between a plurality of received input signals. At least one of the plurality of input signals may include the conditioned signal received from the filter. The phase detector circuit may be further configured to send the at least one output signal to the output conditioner circuit. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 illustrates a correction circuit according to an exemplary embodiment. [Figure 2] FIG. 2 shows a correction circuit according to another exemplary embodiment. [Figure 3] FIG. 3 illustrates the response of a filter according to an example embodiment. [Figure 4] FIG. 4 shows a correction circuit according to another exemplary embodiment. [Figure 5] FIG. 5 shows a correction circuit according to another exemplary embodiment. [Figure 6] FIG. 6 shows the response of a filter according to another exemplary embodiment. [Figure 7] FIG. 7 illustrates an oscillator system in accordance with an exemplary embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] The following description of the embodiments provides non-limiting representative examples that specifically describe the features and teachings of various aspects of the present invention by reference to numerals. It should be recognized from the description of the embodiments that the described embodiments can be implemented separately or in combination with other embodiments. Those skilled in the art who review the description of the embodiments should be able to know and understand the described various aspects of the present invention. The description of the embodiments should facilitate understanding of the present invention to the extent that other implementations that are not expressly exhaustive but are within the knowledge of those skilled in the art who read the description of the embodiments will be understood to be consistent with the application of the present invention.

[0008] The systems and methods disclosed herein actively detect frequency shifts from a nominal value using a specific filter architecture in a correction circuit. This architecture uses a filter to generate a measurable phase shift around the nominal frequency of the MEMS resonator. The measured phase shift is used to create a frequency correction signal. The MEMS resonator is connected to a reference clock (f ref ) can be configured to generate a reference clock (f ref) can be fed into a signal conditioning circuit, which allows for waveform manipulation and outputs a conditioned signal. The conditioned signal is used as the input to a filter. The phase shift caused by the filter is a linear function of the absolute frequency. As the frequency moves away from the nominal value, the phase of the output relative to the input shifts. The phase delta caused by the filter is detected in real time by a phase detector circuit. The output of the phase detector circuit is used as a frequency correction signal. When the filter is integrated with the oscillator, the resulting system compensates for sources of resonator frequency shift. Sources of resonator frequency shift can be, for example, but not limited to, heat / temperature, environmental stress, and / or aging. In some examples, aging can refer to changes in the nominal frequency of the resonator over a period of time, which can be caused by physical changes in the resonator itself. These physical changes can be related to specific components that make up the resonator, such as, but not limited to, the body, springs, and / or damping sources. Detecting and correcting resonator frequency shift is an essential function for maintaining a constant frequency.

[0009] Compared to conventional frequency correction methods, the systems and methods disclosed herein offer several advantages. First, the correction signal is a linear function of only the reference frequency. The correction signal corresponds to a delta from the nominal frequency, regardless of the source of the shift. The systems and methods disclosed herein can be used to correct a wide range of frequency error sources, including, but not limited to, temperature, pressure, and aging. Second, there is no need to directly measure temperature with a sensor, which can introduce errors in precision or accuracy. Third, the filter takes on a variety of configurations, allowing the ability to design application-specific filter transfer functions. This allows for a specific correction signal to be obtained with high sensitivity. The systems and methods disclosed herein are configured to detect resonator frequency shifts in real time, regardless of their source, with high sensitivity and low overall noise.

[0010] Mechanical resonators (e.g., microelectromechanical systems (MEMS) resonators, nanoelectromechanical systems (NEMS) resonators, bulk acoustic wave (BAW) resonators, surface acoustic wave (SAW) resonators, quartz crystal (XTAL) resonators, and film bulk acoustic resonators (FBAR) are desirable for oscillators used in these applications because of their high quality factor (Q), resulting in low jitter and phase noise. However, the temperature stability performance of mechanical resonators can be compromised because the resonant frequency depends on the temperature-sensitive material properties of the resonator. Therefore, a frequency shift detector must be used to compensate for frequency errors (i.e., deviations from the desired output frequency) caused by temperature variations. The oscillators disclosed herein that use temperature compensation of their output frequency may be referred to as temperature-compensated oscillators (TCXOs). In this manner, phase measurements may be used to correct for temperature changes.

[0011] 1 illustrates a correction circuit according to an exemplary embodiment. Correction circuit 100 may include a signal conditioning circuit 110, a filter 120, and a phase detector circuit 130. While FIG. 1 illustrates a single example of a component of circuit 100, it will be understood that any number of components of circuit 100 may be included.

[0012] The signal conditioning circuit 110 may be configured to receive a reference signal. In some examples, the reference signal may be a microelectromechanical system (MEMS) resonator frequency (f ref) and other reference clock signals. Signal conditioning circuit 110 may be configured to send one or more signals directly to filter 120. For example, signal conditioning circuit 110 may be configured to send a conditioned signal directly to filter 120. Signal conditioning circuit 110 may be configured to send one or more signals directly to phase detector circuit 130. For example, signal conditioning circuit 110 may be configured to send a conditioned signal directly to phase detector circuit 130. In other examples, signal conditioning circuit 110 may be configured to generate and send one or more signals to phase detector circuit 130 without sending them directly. Furthermore, signal conditioning circuit 110 may be configured to generate and send one or more signals to filter 120 without sending them directly.

[0013] In some examples, the signal sent directly by signal conditioning circuit 110 to filter 120 and the signal sent directly by signal conditioning circuit 110 to phase detector circuit 130 may each be conditioned by signal conditioning circuit 110. Signal conditioning circuit 110 may be configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication prior to input to filter 120. Such conditioning of the reference signal by signal conditioning circuit 110 may be necessary for optimal operation of filter 120, for example, to obtain an ideal signal-to-noise ratio of phase shift per unit frequency shift. In some examples, depending on the type of filter 120 used, signal conditioning circuit 110 may be configured to modify the waveform, for example, change the amplitude, maintain a constant amplitude, or change from a sine wave to a square wave or vice versa. In some examples, the type of signal conditioning circuit 110 may depend on the type of filter 120.

[0014] Filter 120 may be configured to filter the signal conditioned by signal conditioning circuit 110. For example, filter 120 may be configured to filter the conditioned signal generated and sent by signal conditioning circuit 110. Specifically, filter 120 may be configured to shift the phase of its output relative to its input, where the phase shift is proportional to the frequency shift from the nominal output frequency. Filter 120 may be configured to send the conditioned signal to phase detector circuit 130.

[0015] The phase detector circuit 130 may be configured to receive multiple input signals and generate at least one output signal. In some examples, the phase detector circuit 130 may be configured to receive a first input signal of the multiple input signals, the first input signal including a signal that has not passed through the filter 120. The phase detector circuit 130 may be configured to receive a second input signal of the multiple input signals, the second input signal including a conditioned signal that has passed through the filter 120. In some examples, the phase detector circuit 130 may be configured to receive both the unfiltered conditioned signal and the filtered conditioned signal. The phase detector circuit 130 may be configured to detect a phase delta that represents a shift in the phase of the output relative to the input relative to a nominal value.

[0016] The phase detector circuit 130 may be configured to generate at least one output signal including a frequency correction signal. In some examples, the at least one output signal or frequency correction signal may be a linear function of the reference signal. For example, the phase detector circuit 130 may be configured to operate as a comparator configured to compare the phase and / or frequency of the received first and second input signals to generate at least one output signal. More specifically, the output of the phase detector circuit 130, e.g., the at least one output signal including the frequency correction signal, may include a signal proportional to the phase of the first and second input signals relative to each other.

[0017] Figure 2 illustrates a correction circuit according to another exemplary embodiment. Figure 2 may reference the same components as circuit 100 described above with respect to Figure 1. While Figure 2 illustrates a single instance of the components of circuit 100, it will be understood that any number of the components of circuit 100 may be included.

[0018] The signal conditioning circuit 110 may be configured to receive a reference signal. In some examples, the reference signal may be a microelectromechanical system (MEMS) resonator frequency (f ref ) and other reference clock signals. Signal conditioning circuit 110 may be configured to send one or more signals directly to filter 120. For example, signal conditioning circuit 110 may be configured to send a conditioned signal directly to filter 120. Signal conditioning circuit 110 may be configured to send one or more signals directly to phase detector circuit 130. For example, signal conditioning circuit 110 may be configured to send a conditioned signal directly to phase detector circuit 130. In other examples, signal conditioning circuit 110 may be configured to generate and send one or more signals to phase detector circuit 130 without sending them directly. Furthermore, signal conditioning circuit 110 may be configured to generate and send one or more signals to filter 120 without sending them directly.

[0019] In some examples, the signal sent directly by signal conditioning circuit 110 to filter 120 and the signal sent directly by signal conditioning circuit 110 to phase detector circuit 130 may each be conditioned by signal conditioning circuit 110. Signal conditioning circuit 110 may be configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication. In some examples, depending on the type of filter 120 used, signal conditioning circuit 110 may be configured to modify the waveform, for example, to change the amplitude, maintain a constant amplitude, or change from a sine wave to a square wave or vice versa. In some examples, the type of signal conditioning circuit 110 may depend on the type of filter 120.

[0020] Filter 120 may include an analog filter according to an exemplary embodiment. For example, filter 120 may include an analog RLC filter. As described above, signal conditioning circuit 120 may be configured to rely on filter 120 and phase detector circuit 130. For example, analog RLC filter 120 may be matched to a constant amplitude input via amplitude adjustment. Filter 120 may be configured to filter the conditioned signal. For example, filter 120 may be configured to filter the conditioned signal generated and sent by signal conditioning circuit 110. Filter 120 may be configured to send the conditioned signal to phase detector circuit 130.

[0021] FIG. 3 illustrates a filter response according to an exemplary embodiment. As shown in FIG. 3, filter 120 may include a high-order notch filter or bandpass filter configured to produce a sharp phase response near a natural resonance. As further shown in FIG. 3, the response may include a second-order notch filter response. Filter 120 may be configured to use a switched-capacitor filter in implementing the response. The timing of the switching circuitry may be adjusted to match the microelectromechanical system (MEMS) resonator frequency (f ref ) can be driven by a reference signal such as ref ) can be set to ensure that the filter response follows the resonance of the MEMS resonator. The resistors in analog RLC filter 120 can be based on switched capacitor circuits, where the resistance value changes with f rather than temperature, unlike ASIC-based resistor implementations that are temperature dependent. ref Link directly to.

[0022] The phase detector circuit 130 may be configured to receive multiple input signals and generate at least one output signal. In some examples, the phase detector circuit 130 may be configured to receive a first input signal of the multiple input signals, the first input signal including a signal that has not passed through the filter 120. The phase detector circuit 130 may be configured to receive a second input signal of the multiple input signals, the second input signal including a conditioned signal that has passed through the filter 120. In some examples, the phase detector circuit 130 may be configured to receive both the unfiltered conditioned signal and the filtered conditioned signal. The phase detector circuit 130 may be configured to detect a phase delta that represents a shift in the phase of the output relative to the input relative to a nominal value.

[0023] The phase detector circuit 130 may be configured to generate at least one output signal including a frequency correction signal. In some examples, the at least one output signal or the frequency correction signal may be a linear function of the reference signal. For example, the phase detector circuit 130 may be configured to compare the phase and / or frequency of the received first and second input signals to generate the at least one output signal.

[0024] FIG. 4 illustrates a correction circuit according to another exemplary embodiment. FIG. 4 may reference the same components as circuit 100 described above with respect to FIGS. 1-3. While FIG. 4 illustrates a single instance of the components of circuit 100, it is understood that any number of the components of circuit 100 may be included. Correction circuit 100 may include signal conditioning circuit 110, converter 115, filter 120, and phase detector circuit 130.

[0025] The signal conditioning circuit 110 may be configured to receive a reference signal. In some examples, the reference signal may be a microelectromechanical system (MEMS) resonator frequency (f ref), etc. Signal conditioning circuit 110 may be configured to send one or more signals to filter 120 via converter 115. For example, signal conditioning circuit 110 may be configured to send a conditioned signal to filter 120 via converter 115. Converter 115 may be configured to send one or more signals directly to phase detector circuit 130. For example, converter 115 may be configured to send the conditioned, converted signal directly to phase detector circuit 130. In other examples, converter 115 may be configured to convert one or more signals and send them to phase detector circuit 130 without sending them directly.

[0026] In some examples, the signal sent directly by the converter 115 to the filter 120 and the signal sent directly by the converter 115 to the phase detector circuit 130 may be conditioned by the signal conditioning circuit 110 and converted by the converter 115, respectively. The signal conditioning circuit 110 may be configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication. In some examples, depending on the type of filter 120 used, the signal conditioning circuit 110 may be configured to modify the waveform, for example, to change the amplitude, maintain a constant amplitude, or change from a sine wave to a square wave or vice versa. In some examples, the type of the signal conditioning circuit 110 may depend on the type of the filter 120. As described above, the signal conditioning circuit 120 may be configured depending on the filter 120 and the phase detector circuit 130.

[0027] Converter 115 may include an analog-to-digital converter (ADC). In some examples, converter 115 may or may not form part of signal conditioning circuit 110. To the extent converter 115 forms part of signal conditioning circuit 110, signal conditioning circuit 110 may be further configured to perform additional operations, including, but not limited to, sine wave to square wave conversion, as described above with respect to the signal conditioning circuit. In some examples, converter 115 converts the MEMS resonator frequency (f ref), which allows the filter response and phase delay to be processed by a DSP engine. In some examples, the digitally-based discrete-time filter 120 and the phase detector circuit 130 may comprise a DSP engine (not shown), which may be configured to perform operations in addition to those performed by the filter 120 and the phase detector circuit 130. The DSP clocking may be configured to capture the MEMS resonator frequency (f ref ), which can be set to ensure the filter response follows the resonance of the MEMS resonator. In some examples, a transducer 115 can be connected between the signal conditioning circuit 110 and the filter 120.

[0028] Filter 120 may include a digital-based discrete-time filter according to an exemplary embodiment. Filter 120 may be configured to filter the conditioned and converted signal. For example, filter 120 may be configured to filter the conditioned signal generated by signal conditioning circuit 110 and sent, which may then be converted by converter 115. Filter 120 may be configured to send the filtered converted signal to phase detector circuit 130. Specifically, a digital bitstream input (analog-to-digital conversion) for digital-based discrete-time filter 120 may be obtained through converter 115. Converter 115 may match a constant amplitude input via amplitude adjustment and sharp transitions, e.g., sine wave to square wave conversion.

[0029] The phase detector circuit 130 may be configured to receive multiple input signals and generate at least one output signal. In some examples, the phase detector circuit 130 may be configured to receive a first input signal of the multiple input signals, the first input signal including a signal that has not passed through the filter 120, has been conditioned by the signal conditioning circuit 110, and has been converted by the converter 115. The phase detector circuit 130 may be configured to receive a second input signal of the multiple input signals, the second input signal including a conditioned and converted signal that has passed through the filter 120. In some examples, the phase detector circuit 130 may be configured to receive both the unfiltered conditioned converted signal and the filtered converted conditioned signal. The phase detector circuit 130 may be configured to detect a phase delta that represents a shift in the phase of the output relative to the input relative to a nominal value.

[0030] The phase detector circuit 130 may be configured to generate at least one output signal including a frequency correction signal. In some examples, the at least one output signal or the frequency correction signal may be a linear function of the reference signal. For example, the phase detector circuit 130 may be configured to compare the phase and / or frequency of the received first and second input signals to generate the at least one output signal.

[0031] FIG. 5 illustrates a correction circuit according to another exemplary embodiment. FIG. 5 may reference the same components as circuit 100 described above with respect to FIGS. 1-4. While FIG. 5 illustrates a single instance of the components of circuit 100, it will be understood that any number of the components of circuit 100 may be included. Correction circuit 100 may include a signal conditioning circuit 110, a filter 120, a driver circuit 125, a phase detector circuit 130, and a sensing circuit 135.

[0032] The signal conditioning circuit 110 may be configured to receive a reference signal. In some examples, the reference signal may be a microelectromechanical system (MEMS) resonator frequency (f ref), etc. Signal conditioning circuit 110 may be configured to send one or more signals to filter 120 via driver circuit 125. For example, signal conditioning circuit 110 may be configured to send a conditioned signal to filter 120 via driver circuit 125. The driver may be configured to send one or more signals directly to phase detector circuit 130. For example, driver circuit 125 may be configured to send a conditioned signal directly to phase detector circuit 130. In other examples, driver circuit 125 may send one or more signals to phase detector circuit 130 without sending them directly. For example, driver circuit 125 may be configured to send one or more conditioned signals to phase detector circuit 130 via filter 120 and sensing circuit 135.

[0033] In some examples, the signal sent directly by driver circuit 125 to phase detector circuit 130 and the signal sent directly by driver circuit 125 to filter 120 may each be conditioned by signal conditioning circuit 110. Signal conditioning circuit 110 may be configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication. In some examples, depending on the type of filter 120 used, signal conditioning circuit 110 may be configured to modify the waveform, for example, change the amplitude, maintain a constant amplitude, or change from a sine wave to a square wave or vice versa. In some examples, the type of signal conditioning circuit 110 may depend on the type of filter 120.

[0034] Filter 120 may include a mechanical resonator filter according to an exemplary embodiment. For example, filter 120 may include a MEMS-based resonator. As described above, signal conditioning circuit 120 may be configured to rely on filter 120 and phase detector circuit 130. For example, in the case of a mechanical resonator filter 120, drive circuit 125 may be required to provide a low-impedance buffered output. To account for the temperature dependence of the resonator, the mechanical resonator may require a temperature-dependent drive amplitude. Drive circuit 125 and sense circuit 135 may be configured to interface with filter 120. In some examples, drive circuit 125 may or may not constitute part of signal conditioning circuit 110. To the extent that drive circuit 125 constitutes part of signal conditioning circuit 110, signal conditioning circuit 110 may be further configured to perform additional operations, including, but not limited to, amplitude control and / or signal conversion, as described above with respect to signal conditioning circuit 110.

[0035] FIG. 6 illustrates the response of a filter according to another exemplary embodiment. Specifically, FIG. 6 illustrates the phase response of a high-quality MEMS resonator. As shown in FIG. 6, the filter 120 has a phase response at the MEMS resonator frequency (f ref) can be configured to have high phase sensitivity near the reference frequency (F1). In some examples, exposure to error sources, including but not limited to stress and aging, can be common between the two resonators, thereby mitigating aging and accuracy concerns. These error sources can be further mitigated by fabricating both resonators in the same body. In some examples, the resonators can operate in a single resonant mode, in which case there can be two resonators formed from a single common material substrate, such as silicon, in the case of MEMS resonators. In other examples, a single body can operate in more than one resonant mode, in which case this can be referred to as two resonators fabricated from the same body. Filter 120 can be configured to filter the conditioned signal driven by drive circuit 125. For example, filter 120 can be configured to filter the conditioned signal generated and sent by signal conditioning circuit 110. Filter 120 can be configured to send the conditioned signal to phase detector circuit 130 via sense circuit 135. Drive circuit 125 can be configured to amplify and buffer the reference signal conditioned by signal conditioning circuit 110. The output of the driver circuit 125, including the amplified and buffered signal, may be configured to mechanically stimulate a resonant mode of the resonator, allowing the resonator to have energy to sense resonance. The sense circuit 125 may be configured to amplify the measured resonance of the resonator. The resonator output sense signal of the MEMS mechanical resonator may be small and must be amplified before being used by the phase detector circuit 130. The driver circuit 125 and the sense circuit 135 may each include one or more amplifiers configured to perform their respective amplification, as described above.

[0036] The phase detector circuit 130 may be configured to receive multiple input signals and generate at least one output signal. In some examples, the phase detector circuit 130 may be configured to receive a first input signal of the multiple input signals, the first input signal including a signal that has not passed through the filter 120. The phase detector circuit 130 may be configured to receive a second input signal of the multiple input signals, the second input signal including a conditioned signal that has passed through the filter 120. In some examples, the phase detector circuit 130 may be configured to receive both the unfiltered conditioned signal and the filtered conditioned signal. The phase detector circuit 130 may be configured to detect a phase delta that represents a shift in the phase of the output relative to the input relative to a nominal value.

[0037] The phase detector circuit 130 may be configured to generate at least one output signal including a frequency correction signal. In some examples, the at least one output signal or the frequency correction signal may be a linear function of the reference signal. For example, the phase detector circuit 130 may be configured to compare the phase and / or frequency of the received first and second input signals to generate the at least one output signal.

[0038] FIG. 7 illustrates an oscillator system according to an exemplary embodiment. As shown in FIG. 7, the oscillator system 700 may include a compensation circuit 100 according to an exemplary embodiment. The oscillator may include, without limitation, a temperature-compensated oscillator, a mechanical resonator (e.g., a microelectromechanical system (MEMS) resonator, a nanoelectromechanical system (NEMS) resonator, a bulk acoustic wave (BAW) resonator, a surface acoustic wave (SAW) resonator, a crystal (XTAL) resonator, and a film bulk acoustic resonator (FBAR)). The oscillator 700 may include a mechanical resonator 710, support circuitry 720, a compensation circuit 730, a temperature compensator 740, a frequency synthesizer 750, and an output adjuster 760. The compensation circuit 730 may include any of the compensation circuits 100, including any of the filters 120, as described above. As an example, the support circuitry 720 may include a drive circuit and / or a sense circuit similar to the drive circuit 125 and the sense circuit 135 described above. The frequency synthesizer 750 may be configured to include a phase-locked loop (PLL), e.g., a fractional-N PLL circuit, and a time-domain divider. The output conditioner 760 provides a buffered output (f output ) to a device user. Output conditioner 760 may be configured to include a signal converter. In some examples, the buffered output (f output ) may include a low voltage (CMOS clipped sine wave output.

[0039] Throughout this specification and claims, the following terms have at least the meaning expressly associated therewith herein, unless the context clearly dictates otherwise: The term "or" shall mean an inclusive "or." Furthermore, the terms "a," "an," and "the" shall mean one or more unless specifically stated otherwise or clear from the context to refer to the singular form.

[0040] Numerous specific details are described herein. However, it should be understood that implementations of the disclosed technology may be practiced without these specific details. In other instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure an understanding of this specification. References to "some examples," "other examples," "one example," "one example," "various examples," "one embodiment," "one embodiment," "some embodiments," "exemplary embodiments," "various embodiments," "one implementation," "one implementation," "exemplary implementation," "various implementations," "some implementations," and the like indicate that implementations of the disclosed technology so described may include particular features, structures, or characteristics, but not all implementations necessarily include the particular features, structures, or characteristics. Furthermore, repeated use of the phrases "in one example," "in one embodiment," or "in one implementation" do not necessarily refer to the same example, embodiment, or implementation, but may.

[0041] As used herein, unless otherwise specified, the use of ordinal adjectives such as "first," "second," "third," etc. to describe a common object merely indicates that different instances of a similar object are being referred to and does not imply that the objects so described must be in a given order either temporally, spatially, ordinally, or in any other way.

[0042] While particular implementations of the disclosed technology have been described in connection with what are presently considered to be the most practical and diverse implementations, it is to be understood that the disclosed technology is not limited to the disclosed implementations, but rather is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

[0043] This specification uses examples to disclose particular implementations of the disclosed technology, including the best mode, and also to enable those skilled in the art to practice the disclosed technology, including making and using any device or system, and performing any incorporated methods. The patentable scope of particular implementations of the disclosed technology is defined in the claims, and may include other examples that occur to those skilled in the art. Such other examples are within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements that do not differ substantially from the literal language of the claims.

Claims

1. a signal conditioning circuit configured to condition the received reference signal; a filter configured to filter the conditioned signal received from the signal conditioning circuit; a phase detector circuit configured to generate at least one output signal based on measuring a phase shift between a plurality of received input signals, at least one of the plurality of input signals including the conditioned signal received from the filter; and A correction circuit comprising:

2. The correction circuit of claim 1 , wherein the reference signal comprises a reference clock signal.

3. 2. The correction circuit of claim 1, wherein the phase detector circuit is configured to receive a first input signal of the plurality of input signals, the first input signal including a signal that has not passed through the filter.

4. 4. The correction circuit of claim 3, wherein the phase detector circuit is configured to receive a second input signal of the plurality of input signals, the second input signal including the conditioned signal filtered by the filter.

5. 2. The correction circuit of claim 1, wherein the signal conditioning circuit is configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication.

6. The correction circuit of claim 1 , wherein the phase detector circuit is configured to generate the at least one output signal comprising a frequency correction signal.

7. 2. The correction circuit of claim 1, wherein the at least one output signal is a linear function of the reference signal.

8. The compensation circuit of claim 1 , wherein the filter comprises an analog filter.

9. The compensation circuit of claim 8 , wherein the analog filter comprises a bandpass filter.

10. The correction circuit of claim 1 , wherein the filter comprises a digital filter.

11. The correction circuit of claim 10 , wherein the digital filter comprises a discrete-time filter.

12. The correction circuit of claim 10 further comprising a converter coupled between the signal conditioning circuit and the digital filter.

13. The compensation circuit of claim 1 , wherein the filter comprises a mechanical resonator filter.

14. The correction circuit of claim 13 further comprising a drive circuit and a sense circuit.

15. 15. The correction circuit of claim 14, wherein the phase detector circuit is configured to receive an output directly from the driver circuit.

16. 2. The correction circuit of claim 1, wherein the phase detector circuit is configured to detect a phase delta that represents a shift in phase of an output relative to an input relative to a nominal value.

17. The compensation circuit of claim 1 , wherein the type of the signal conditioning circuit depends on the type of the filter.

18. transmitting a reference signal; adjusting the reference signal; filtering the conditioned reference signal; sending the filtered conditioned signal; measuring a phase shift between the filtered conditioned signal and a second signal; generating an output signal including a frequency correction signal; sending said frequency correction signal; A method comprising:

19. a mechanical resonator; a correction circuit; an output regulator circuit; An oscillator comprising: The correction circuit a signal conditioning circuit configured to condition a reference signal received from the mechanical resonator; a filter configured to filter the conditioned signal received from the signal conditioning circuit; a phase detector circuit configured to generate at least one output signal based on measuring a phase shift between a plurality of received input signals, at least one of the plurality of input signals including the conditioned signal received from the filter, the phase detector circuit further configured to send the at least one output signal to the output conditioner circuit; Including, Oscillator.

20. 20. The oscillator of claim 19, wherein the oscillator is a temperature compensated oscillator.

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